Signal generation circuit, switching control circuit, switching power supply, and vehicle

Abstract

To provide a signal generation circuit capable of dispersing noise over wide bands and suppressing noise in a specific frequency band.SOLUTION: A signal generation circuit (X2) comprises: a first generation circuit (1) which generates a digital voltage (VD) which periodically repeats an increase and a decrease in a predetermined voltage value range and skips a specific range that is a part of the predetermined voltage value range; a conversion circuit (2) which converts the digital voltage into an analog voltage (VA); and a second generation circuit (3) which generates a signal (S1) in a frequency corresponding to a value of the analog voltage on the basis of the analog voltage.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a signal generating circuit, a switching control circuit, a switching power supply device, and a vehicle. [Background technology]

[0002] Increasing the frequency of signals used in a circuit often leads to increased noise. For example, in switching power supplies, there are cases where it is desirable to increase the switching frequency in order to reduce the circuit size, but increasing the switching frequency leads to increased conducted and radiated noise.

[0003] One technique for suppressing the effects of noise is spread spectrum technology (see, for example, Patent Document 1). Spread spectrum technology spreads noise over a wide band, making it possible to substantially suppress the effects of noise. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2023 / 286459

[0005] [overview] However, if the allowable noise level for a particular frequency band is strict, there is a risk that the noise in the particular frequency band will exceed the allowable noise level if the noise is spread over a wide band using spread spectrum technology.

[0006] The signal generation circuit according to the present disclosure includes a first generation circuit configured to generate a digital voltage that periodically increases and decreases within a predetermined voltage value range and skips a specific range that is part of the predetermined voltage value range; a conversion circuit configured to convert the digital voltage into an analog voltage; and a second generation circuit configured to generate a signal based on the analog voltage and having a frequency corresponding to the value of the analog voltage.

[0007] A switching control circuit according to the present disclosure includes a signal generating circuit having the above-described configuration, and is configured to switch a switching element based on the signal.

[0008] A switching power supply device according to the present disclosure includes the switching control circuit configured as described above and the switching element, and is configured to generate an output voltage from an input voltage by switching the switching element.

[0009] A vehicle according to the present disclosure includes the switching power supply device having the above-described configuration. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a configuration diagram of a switching device according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram showing the relationship between a plurality of voltages and a plurality of signals in the first pattern. [Figure 3] FIG. 3 is a diagram showing the relationship between a plurality of voltages and a plurality of signals in the second pattern. [Figure 4] FIG. 4 is a diagram showing the waveform of an analog voltage according to the first reference example. [Figure 5] FIG. 5 is a diagram showing the waveform of an analog voltage according to the second reference example. [Figure 6] FIG. 6 is a diagram showing frequency spectra of noise according to the first and second reference examples. [Figure 7] FIG. 7 is a diagram showing the waveform of an analog voltage according to the first embodiment. [Figure 8] FIG. 8 is a diagram showing the frequency spectrum of switching noise according to the second embodiment. [Figure 9] FIG. 9 is a diagram showing the waveform of an analog voltage according to the second embodiment. [Figure 10] FIG. 10 is a configuration diagram of a switching power supply device according to an embodiment of the present disclosure. [Figure 11] FIG. 11 is an external perspective view of a vehicle according to an embodiment of the present disclosure.

[0011] [Detailed explanation] <Switching device configuration> 1 is a configuration diagram of a switching device X1 according to an embodiment of the present disclosure. The switching device X1 includes a digital voltage generating circuit 1, a digital to analog converter (DAC) 2, a signal generating circuit 3, a switching control circuit 4, and a switching transistor 5.

[0012] The signal generating circuit X2 includes a digital voltage generating circuit 1, a DAC 2, and a signal generating circuit 3. The switching control circuit X3 includes a signal generating circuit X2 and a switching control circuit 4.

[0013] The digital voltage generating circuit 1 generates and outputs a digital voltage VD that periodically increases and decreases within a predetermined voltage value range and skips a specific range that is part of the predetermined voltage value range.

[0014] The DAC2 converts the digital voltage VD into an analog voltage VA and outputs the analog voltage VA.

[0015] The signal generating circuit 3 generates and outputs a signal S1 having a frequency according to the value of the analog voltage VA based on the analog voltage VA. The value of the analog voltage VA and the frequency of the signal S1 have, for example, a linear relationship.

[0016] The signal generating circuit 3 includes a reference voltage generating circuit 31 , a ramp voltage generating circuit 32 , and a comparison circuit 33 .

[0017] The reference voltage generating circuit 31 generates a reference voltage V REF Generates and outputs the reference voltage V REF The ramp voltage generating circuit 32 generates a ramp voltage V that fluctuates within a predetermined voltage range at a frequency corresponding to the value of the analog voltage VA. RAMP The analog voltage VA and the lamp voltage V are generated and output. RAMP The frequency of the reference voltage V REFand lamp voltage V RAMP is input to the comparison circuit 33. The comparison circuit 33 compares the reference voltage V REF and lamp voltage V RAMP is compared with the reference voltage V REF and lamp voltage V RAMP The switching control circuit 4 generates and outputs a signal S1, which is a comparison result signal indicating the level relationship between the voltages. The signal S1 is input to a switching control circuit 4. The switching control circuit 4 switches the switching transistor 5 based on the signal S1. The switching of the switching transistor 5 switches the state of the switching transistor 5 between an on state and an off state.

[0018] In FIG. 1, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is shown as the switching transistor 5. However, the switching transistor 5 may be any type of transistor. That is, the switching transistor 5 may be either an N-channel MOSFET or a P-channel MOSFET. The switching transistor 5 may also be a bipolar transistor, a junction FET, or an IGBT (Insulated Gate Bipolar Transistor). In the following description of the present embodiment, the switching transistor 5 is considered to be an N-channel MOSFET. The switching control circuit 4 can turn the switching transistor 5 on or off by controlling the gate potential of the switching transistor 5 (in other words, by controlling the gate-source voltage of the switching transistor 5).

[0019] The signal S1 is a binary signal (digital signal) that takes on a value of "0" or "1." Here, it is assumed that positive logic is applied to the signal S1. Therefore, the signal S1 takes on either a low level or a high level, with a low level signal S1 indicating a value of "0" and a high level signal S1 indicating a value of "1." However, a modification in which negative logic is applied to the signal S1 is also possible.

[0020] In the switching device X1, the following first or second pattern can be adopted.

[0021] <First pattern> Figure 2 shows the reference voltage V REF and lamp voltage V RAMP 2 also shows the relationship between the signal S1 and the signal S2, which will be described later.

[0022] The comparison circuit 33 according to the first pattern is RAMP is the reference voltage V REF When the signal S1 is at a low level (i.e., the signal S1 has a value of "0"), the ramp voltage V RAMP is the reference voltage V REF When the ramp voltage V is higher than the ramp voltage V, the signal S1 is set to a high level (i.e., the signal S1 has a value of "1"). RAMP is the reference voltage V REF lower than (i.e., “V RAMP <V REF " state) to the reference voltage V REF higher than (i.e., “V RAMP >V REF When the state of the reference voltage V REF and lamp voltage V RAMP When they exactly match, the signal S1 goes to a low level or a high level.

[0023] The ramp voltage generating circuit 32 according to the first pattern repeatedly executes the following first ramp unit operation to generate the ramp voltage V RAMP In the first ramp unit operation, the ramp voltage generating circuit 32 generates the ramp voltage V RAMP to the predetermined lower limit voltage V L_RAMP Starting from the state where the lamp voltage V RAMP The lower limit voltage V L_RAMP From the given increasing slope U _RAMP The lamp voltage V RAMPAfter a half-cycle of RAMP The direction of change of is reversed from increasing to decreasing, and then the ramp voltage V RAMP The lower limit voltage V L_RAMP A predetermined decreasing slope D _RAMP In the i-th first ramp unit operation, the lamp voltage V RAMP is the lower limit voltage V L_RAMP When the voltage drops to , the ramp voltage generating circuit 32 ends the i-th first ramp unit operation and subsequently starts the (i+1)-th first ramp unit operation. _RAMP and the decreasing slope D _RAMP is constant. Here, i represents any natural number. The increasing slope U _RAMP and the decreasing slope D _RAMP are the same size as each other.

[0024] By repeating the first ramp unit operation in the first pattern, the ramp voltage V RAMP is the reference voltage V REF A rising edge occurs in signal S1 every time "V RAMP >V REF After the signal S1 becomes high level due to the establishment of "V RAMP >V REF " to "V RAMP <V REF " state, the length of the high level period of the signal S1 is very short. That is, after the rising edge of the signal S1, a very short time passes and then a falling edge occurs in the signal S1.

[0025] In the switching device X1 according to the first pattern (for example, in the switching control circuit 4), the signal S1 and the lamp voltage V RAMP 2 may be generated based on the signal S2 shown in FIG. 2. The signal S2 has a low or high signal level, similar to the signal S1. In the first pattern, a rising edge occurs in the signal S2 in synchronization with the rising edge of the signal S1, and then the ramp voltage V RAMP The lamp voltage V RAMP is the lower limit voltage V L_RAMPWhen the voltage drops to 0 V, a down edge occurs in the signal S2.

[0026] <Second pattern> Figure 3 shows the reference voltage V REF and lamp voltage V RAMP 3 also shows the relationship between the signal S1 and the signal S2, which will be described later.

[0027] The comparison circuit 33 according to the second pattern is RAMP is the reference voltage V REF When the signal S1 is at a low level (i.e., the signal S1 has a value of "0"), the ramp voltage V RAMP is the reference voltage V REF When the ramp voltage V is lower than the ramp voltage V, the signal S1 is set to a high level (i.e., the signal S1 has a value of "1"). RAMP is the reference voltage V REF higher than (i.e., “V RAMP >V REF " state) to the reference voltage V REF lower than (i.e., “V RAMP <V REF When the state of the reference voltage V REF and lamp voltage V RAMP When they exactly match, the signal S1 goes to a low level or a high level.

[0028] The ramp voltage generating circuit 32 according to the second pattern repeatedly executes the following second ramp unit operation to generate the ramp voltage V shown in FIG. RAMP In the second ramp unit operation, the ramp voltage generating circuit 32 generates the ramp voltage V RAMP to a predetermined upper limit voltage V H_RAMP Starting from the state where the lamp voltage V RAMP The upper limit voltage V H_RAMP from a predetermined decreasing slope D _RAMP The lamp voltage V RAMPAfter a half cycle has elapsed, the ramp voltage V RAMP The direction of change of is reversed from decreasing to increasing, and then the ramp voltage V RAMP The upper limit voltage V H_RAMP A given increasing slope U _RAMP In the i-th second ramp unit operation, the ramp voltage V RAMP is the upper limit voltage V H_RAMP When the second ramp unit operation reaches the i-th time, the ramp voltage generating circuit 32 ends the i-th second ramp unit operation and subsequently starts the (i+1)-th second ramp unit operation.

[0029] By repeating the second ramp unit operation in the second pattern, the ramp voltage V RAMP is the reference voltage V REF A rising edge occurs in signal S1 every time the voltage drops to "V RAMP <V REF After the signal S1 becomes high level due to the establishment of "V RAMP <V REF " to "V RAMP >V REF " state, the length of the high level period of the signal S1 is very short. That is, after the rising edge of the signal S1, a very short time passes and then a falling edge occurs in the signal S1.

[0030] In the switching device 1 according to the second pattern (for example, in the switching control circuit 4), the signal S1 and the lamp voltage V RAMP 3 may be generated based on the signal S2 shown in FIG. 3. The signal S2 has a low or high signal level, similar to the signal S1. In the second pattern, a rising edge occurs in the signal S2 in synchronization with the rising edge of the signal S1, and then the ramp voltage V RAMP The lamp voltage V RAMP is the upper limit voltage V H_RAMP When the signal S2 reaches this value, a down edge occurs in the signal S2.

[0031] <Switching control circuit operation> The operation of the switching control circuit 4 is common to the first and second patterns. The switching control circuit 4 turns on or off the switching transistor 5 in response to a rising edge of the signal S1 (in other words, in synchronization with the rising edge of the signal S1).

[0032] When the switching transistor 5 is turned on in response to a rising edge of the signal S1, the switching control circuit 4 subsequently turns off the switching transistor 5 in response to the satisfaction of a predetermined condition. When the switching transistor 5 is turned off in response to a rising edge of the signal S1, the switching control circuit 4 subsequently turns on the switching transistor 5 in response to the satisfaction of a predetermined condition. In this manner, the switching control circuit 4 changes the state of the switching transistor 5 from one of the on and off states to the other in response to a specific change in the signal S1 (a change in the value of the signal S1 from "0" to "1"), and then performs a switching operation to return the state of the switching transistor 5 from the other state to the one state in response to the satisfaction of a predetermined condition. This switching operation is performed each time the above-mentioned specific change occurs. Therefore, this switching operation is repeatedly performed at intervals equal to the reciprocal of the frequency of the signal S1.

[0033] Any condition can be set as the predetermined condition. For example, the predetermined condition may be satisfied when the value of a predetermined digital signal generated separately from the signal S1 changes from "0" to "1." This digital signal may be generated within the switching control circuit 4 or supplied to the switching control circuit 4 from a circuit not shown. Alternatively, the predetermined condition may be satisfied when a falling edge occurs in the signal S2. Furthermore, the predetermined condition may be satisfied when a predetermined time Δt has elapsed since the timing of the rising edge of the signal S1.

[0034] <Analog voltage> The analog voltage VA is a voltage converted from the digital voltage VD by the DAC 2. Therefore, when observed in detail, the analog voltage VA is a voltage that changes in steps.

[0035] Prior to describing the embodiments of the analog voltage VA, reference examples of the analog voltage VA will be described. Fig. 4 is a diagram showing the waveform of the analog voltage VA according to the first reference example. Fig. 5 is a diagram showing the waveform of the analog voltage VA according to the first reference example. The horizontal axis of each of Figs. 4 and 5 represents time, and the vertical axis of each of Figs. 4 and 5 represents the voltage value (value of the analog voltage VA). Fig. 5 shows the waveform of one cycle of the analog voltage VA.

[0036] The voltage range V1 of the analog voltage VA corresponds to the frequency band B1 of the signal S1. For example, when the value of the analog voltage VA is at the lower limit of the voltage range V1, the frequency of the signal S1 is at the lower limit of the frequency band B1. For example, when the value of the analog voltage VA is at the upper limit of the voltage range V1, the frequency of the signal S1 is at the upper limit of the frequency band B1.

[0037] The voltage range V2 of the analog voltage VA corresponds to the frequency band B2 of the signal S1. For example, when the value of the analog voltage VA is at the lower limit of the voltage range V2, the frequency of the signal S1 is at the lower limit of the frequency band B2. For example, when the value of the analog voltage VA is at the upper limit of the voltage range V2, the frequency of the signal S1 is at the upper limit of the frequency band B2.

[0038] The voltage range V3 of the analog voltage VA corresponds to the frequency band B3 of the signal S1. For example, when the value of the analog voltage VA is at the lower limit of the voltage range V3, the frequency of the signal S1 is at the lower limit of the frequency band B3. For example, when the value of the analog voltage VA is at the upper limit of the voltage range V3, the frequency of the signal S1 is at the upper limit of the frequency band B3.

[0039] In the first reference example, the analog voltage VA is fixed to a constant voltage value within the voltage range V1. Since the analog voltage VA is a constant voltage value, the ramp voltage V RAM The frequency of the signal S1 does not change. Therefore, in the first reference example, the signal S1 is not spectrum-spread.

[0040] In the second reference example, the analog voltage VA varies within a voltage range V1 to V3. RAM The frequency of the signal S1 varies within the frequency bands B1 to B3. Therefore, in the second reference example, the signal S1 is spectrum spread.

[0041] Fig. 6 is a diagram showing frequency spectra of switching noise according to the first and second reference examples. The horizontal axis of Fig. 6 represents frequency, and the vertical axis of Fig. 6 represents intensity. In the example shown in Fig. 6, the allowable noise level LV1 for frequency band B2 is set stricter than the allowable noise levels LV1 for frequency bands B1 and B3.

[0042] The switching noise N1 according to the first reference example has large peaks at the frequency and harmonics of the signal S1. The switching noise N1 according to the first reference example is equal to or less than the allowable noise level LV1.

[0043] In the switching noise N2 according to the second reference example, the peak is reduced by the spectrum spreading of the signal S1, but the frequency band in which relatively large noise occurs is widened. As a result, the switching noise N2 according to the second reference example exceeds the allowable noise level LV1 in part of the frequency band B2.

[0044] Fig. 7 is a diagram showing the waveform of the analog voltage VA according to the first embodiment. The horizontal axis of Fig. 7 represents time, and each vertical axis of Fig. 7 represents a voltage value (the value of the analog voltage VA). Fig. 7 shows the waveform of the analog voltage VA for one cycle.

[0045] In the first embodiment, the analog voltage VA skips over voltage range V2 and only momentarily passes through the difference between the transitions between voltage range V1 and voltage range V3. The time length of the first steps, which are the steps immediately before and after the skip of the analog voltage VA, is longer than the time length of the second steps, which are steps other than the first step of the analog voltage VA. Note that the skip period of the analog voltage VA coincides with the skip period of the digital voltage VD if the signal delay is considered to be zero.

[0046] Fig. 8 is a diagram showing the frequency spectrum of switching noise according to the second embodiment. The horizontal axis of Fig. 8 represents frequency, and the vertical axis of Fig. 8 represents intensity. In the example shown in Fig. 8, similar to Fig. 6, the allowable noise level LV1 for frequency band B2 is set stricter than the allowable noise levels LV1 for frequency bands B1 and B3. Note that Fig. 8 also shows switching noise N1 according to the first reference example as a comparison target for switching noise N3 according to the first embodiment.

[0047] In the first embodiment, the switching noise N3 is diffused over a wide band and the switching noise in the frequency band B2 is suppressed. Therefore, the switching noise N3 according to the first embodiment is equal to or less than the allowable noise level LV1.

[0048] FIG. 9 is a diagram showing the waveform of the analog voltage VA according to the second embodiment. The horizontal axis of FIG. 9 represents time, and each vertical axis of FIG. 9 represents a voltage value (the value of the analog voltage VA). FIG. 9 shows the waveform of the analog voltage VA for one cycle. In the second embodiment, the time length of each step SP of the analog voltage VA is constant. This makes it possible to suppress an increase in switching noise in a certain frequency band (near the upper limit of the frequency band B1 in the first embodiment).

[0049] It is preferable that the digital voltage generating circuit 1 is configured to be able to change the voltage range V2 to be skipped, thereby enabling it to accommodate various settings for the allowable noise level.

[0050] <Switching power supply> 10 is a configuration diagram of a switching power supply device Y1 according to an embodiment of the present disclosure. The switching power supply device Y1 receives an input voltage V IN By converting the input voltage V IN Output voltage V OUT It is configured as a step-down DC / DC converter that generates an input voltage V IN and output voltage V OUT is a positive DC voltage. The switching power supply Y1 has an input voltage V IN is applied to the input terminal IN, and the output voltage V OUT The output terminal OUT to which the voltage is applied, the ground terminal GND having the ground potential, and the switch voltage V SW The ground terminal GND and the switch terminal SW are provided on the lower potential side than the input terminal IN.

[0051] The switching power supply Y1 includes the signal generating circuit X2 described above, as well as an output stage circuit 210, a switching control circuit 220, a rectifying and smoothing circuit 230, and a feedback voltage generating circuit 240. The signal generating circuit X2 in the switching power supply Y1 is the same as the signal generating circuit X2 in the switching device X1 (see FIG. 1). The switching control circuit Y2 includes the signal generating circuit X2 and the switching control circuit 220.

[0052] The output stage circuit 210 includes a half-bridge circuit formed of a series circuit of a high-side transistor 211 and a low-side transistor 212. The rectifying and smoothing circuit 2 includes an inductor 231 and an output capacitor 232.

[0053] The switching power supply Y1 performs DC-DC conversion by synchronous rectification using transistors 211 and 212. The transistors 211 and 212 are configured as N-channel MOSFETs. Note that a modification is also possible in which the transistor 211 is configured as a P-channel MOSFET. Furthermore, the transistor 212 can be replaced with a diode, in which case the switching power supply Y1 performs DC-DC conversion by asynchronous rectification.

[0054] The drain of the transistor 211 is connected to the input terminal IN, and therefore the input voltage V IN The source of the transistor 211 and the drain of the transistor 212 are commonly connected at a switch terminal SW. The source of the transistor 212 is connected to the ground terminal GND (i.e., connected to the ground). The voltage applied to the switch terminal SW is called the switch voltage and is represented by the symbol "V SW The switch terminal SW is connected to one end of the inductor 231, and the other end of the inductor 231 is connected to the output terminal OUT. OUT An output capacitor 232 is connected between the output terminal OUT and the ground.

[0055] In Fig. 10, "LD" represents a load connected between the output terminal OUT and the ground. The load LD is the output voltage V OUT The current flowing through the inductor 231 is called the inductor current and is represented by the symbol "I L " is expressed as

[0056] The feedback voltage generating circuit 240 generates an output voltage V using a series circuit of multiple resistors arranged between the output terminal OUT and the ground. OUT The divided voltage is generated and fed back to the feedback voltage V FB to the switching control circuit 220. However, the output voltage V OUT The feedback voltage V FB In this case, the feedback voltage generating circuit 240 is removed from the switching power supply device Y1.

[0057] The switching control circuit 220 controls and sets the state of the output stage circuit 210 to one of an output high state, an output low state, and a both-off state. In the output high state, the transistor 211 is on and the transistor 212 is off. In the output low state, the transistor 211 is off and the transistor 212 is on. In the both-off state, the transistors 211 and 212 are both off. The transistors 211 and 212 are never both on.

[0058] The switching control circuit 220 controls the output voltage V OUT information (i.e., feedback voltage V FB ) and the inductor current I L Based on this information, the transistors 211 and 212 are alternately turned on and off (i.e., the state of the output stage circuit 210 is switched between the output high state and the output low state), thereby controlling the output voltage V OUT to a predetermined target voltage V TG That is, the switching control circuit 220 can drive the transistors 211 and 212 by a so-called current mode control method. For example, the current flowing through the transistor 211 during the ON period of the transistor 211 is stabilized as an inductor current I L In the switching control by the switching control circuit 220, the transistors 211 and 212 are alternately turned on and off, which is a concept including the presence of both off states in consideration of dead time, etc., between the transition between the output low state and the output high state.

[0059] The above switching control effectively reduces the input voltage V IN The voltage V is a square wave whose level fluctuates between the ground level and the ground level. SW The switch voltage V SW is rectified and smoothed by the rectifying and smoothing circuit 230 to produce a DC output voltage V OUT is obtained.

[0060] The switching control circuit 220 determines the switching frequency of the transistors 211 and 212 based on the signal S1 output from the signal generation circuit X2. Specifically, the switching control circuit 220 switches the state of the output stage circuit 210 from the output low state to the output high state in synchronization with the rising edge of the signal S1 (i.e., the value of the signal S1 switches from "0" to "1"), and then repeats switching control to switch the state of the output stage circuit 210 from the output high state to the output low state based on another signal (not shown). The switching control circuit 220 uses the other signal to determine the output voltage V OUT information (i.e., feedback voltage V FB ) and inductor current I L and other information. That is, the switching frequency of the transistors 211 and 212 is controlled based on the signal S1, and the output duty is controlled based on the other signals. The output duty represents the ratio of the period during which the output stage circuit 210 is in the output high state to the sum of the period during which the output stage circuit 210 is in the output high state and the period during which the output stage circuit 210 is in the output low state. Therefore, the switching control of the switching control circuit 220 corresponds to PWM control (pulse width modulation control).

[0061] Switching control circuit 220 is an example of switching control circuit 4 in Fig. 1. In other words, switching control circuit 220 includes switching control circuit 4 in Fig. 1. If we note that transistor 211 is turned on by switching control circuit 220 in synchronization with the rising edge of signal S1, transistor 211 corresponds to switching transistor 5 in Fig. 1, and the switching operation of transistor 211 is realized under PWM control by switching control circuit 220. If we note that transistor 212 is turned off by switching control circuit 220 in synchronization with the rising edge of signal S1, transistor 212 corresponds to switching transistor 5 in Fig. 1, and the switching operation of transistor 212 is realized under PWM control by switching control circuit 220.

[0062] Here, the output voltage V OUT information (i.e., feedback voltage VFB ) and inductor current I L However, the inductor current I L Without referring to the information of the output voltage V OUT information (i.e., feedback voltage V FB ) may be adopted in the switching control circuit 220 to control the state of the output stage circuit 210 based on the

[0063] Furthermore, although the switching power supply Y1 configured as a step-down DC / DC converter has been taken as an example, the switching power supply Y1 can also be configured as a step-up DC / DC converter or a step-up / step-down DC / DC converter.

[0064] <Application to vehicles> Low noise is strongly required for a power supply device that generates a power supply voltage for an on-board radar device. In particular, large noise in the low-frequency band (e.g., a band around 100 kHz) can adversely affect various capabilities (e.g., detection accuracy) of the on-board radar device. For this reason, the switching power supply device Y1 is suitable as a power supply device for the on-board radar device mounted on the vehicle Z1 shown in Fig. 11. In other words, the load LD in Fig. 10 may be the on-board radar device.

[0065] However, in the present disclosure, the load LD is not limited to an on-vehicle radar device. For example, the load LD may be various sensor devices that are not classified as radar devices, or any electronic device. In particular, the switching power supply device Y1 is useful as a power supply device for any load LD that requires low noise (especially low noise in the low frequency band, for example).

[0066] <Other> The above-described embodiments should be considered to be illustrative in all respects and not restrictive. The technical scope of the present disclosure is indicated by the claims, not by the description of the above-described embodiments, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0067] <Additional Notes> A supplementary note will be provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0068] The signal generation circuit (X2) of the present disclosure has a configuration (first configuration) including a first generation circuit (1) configured to generate a digital voltage (VD) that periodically increases and decreases within a predetermined voltage value range and skips a specific range that is part of the predetermined voltage value range, a conversion circuit (2) configured to convert the digital voltage into an analog voltage (VA), and a second generation circuit (3) configured to generate a signal (S1) based on the analog voltage and having a frequency corresponding to the value of the analog voltage.

[0069] According to the signal generating circuit of the first configuration, noise can be diffused over a wide band, and noise in a specific frequency band can be suppressed.

[0070] The signal generating circuit of the first configuration may be configured (second configuration) such that the time length of each step of the digital voltage is constant.

[0071] In the signal generating circuit of the first configuration, the time length of a first step, which is at least one of the steps immediately before and after the skip of the digital voltage, may be longer than the time length of a second step, which is a step other than the first step of the digital voltage (third configuration).

[0072] In the signal generating circuit of any one of the first to third configurations, the first generating circuit may be configured to be able to change the specific range (fourth configuration).

[0073] The switching control circuit (X3, Y2) of the present disclosure has a configuration (fifth configuration) that includes a signal generating circuit of any one of the first to fourth configurations and is configured to switch the switching elements (5, 211, 212) based on the signal.

[0074] The switching power supply device (Y1) of the present disclosure has a configuration (sixth configuration) that includes the switching control circuit of the fifth configuration and the switching element, and is configured to generate an output voltage from an input voltage by switching the switching element.

[0075] A vehicle (Z1) of the present disclosure has a configuration (seventh configuration) that includes the switching power supply device of the sixth configuration. [Explanation of symbols]

[0076] 1 Digital voltage generation circuit 2 DAC 3 Signal generation circuit 4 Switching control circuit 5 Switching Transistors 31 Reference voltage generation circuit 32 Lamp voltage generation circuit 33 Comparison circuit 210 Output stage circuit 211 High-side transistor 212 Low-side transistor 220 Switching control circuit 230 Rectifier smoothing circuit 231 Inductor 232 output capacitor 240 Feedback voltage generation circuit GND Ground terminal IN input terminal LD load OUT output terminal SW Switch terminal X1 Switching Device X2 signal generation circuit X3 Switching control circuit Y1 Switching Power Supply Z1 vehicle

Claims

1. a first generating circuit configured to generate a digital voltage that periodically increases and decreases within a predetermined voltage value range and skips a specific range that is a part of the predetermined voltage value range; a conversion circuit configured to convert the digital voltage to an analog voltage; a second generating circuit configured to generate a signal having a frequency corresponding to the value of the analog voltage based on the analog voltage; A signal generating circuit comprising:

2. The signal generating circuit of claim 1 , wherein the time length of each step of the digital voltage is constant.

3. 2. The signal generating circuit according to claim 1, wherein a time length of a first step, which is at least one of a step immediately before a skip of the digital voltage and a step immediately after the skip, is longer than a time length of a second step, which is a step other than the first step of the digital voltage.

4. The signal generating circuit according to claim 1 , wherein the first generating circuit is configured to be able to change the specific range.

5. The signal generating circuit according to any one of claims 1 to 4 is provided, a switching control circuit configured to switch a switching element based on the signal;

6. a switching control circuit according to claim 5; the switching element; Equipped with A switching power supply configured to generate an output voltage from an input voltage by switching the switching element.

7. A vehicle comprising the switching power supply device according to claim 6.

Images