Manufacturing method of silicon carbide crystal, manufacturing method of silicon carbide substrate, manufacturing method of epitaxial substrate, and manufacturing method of semiconductor device

Abstract

To provide a manufacturing method of a silicon carbide crystal capable of suppressing a generation of a heterogeneous ply type, a manufacturing method of a silicon carbide substrate, a manufacturing method of an epitaxial substrate, and a manufacturing method of a semiconductor device.SOLUTION: A manufacturing method of a silicon carbide crystal includes the steps of: arranging a silicon carbide raw material, a vanadium supply source and a seed crystal in a crucible; and growing the silicon carbide crystal on the seed crystal by sublimating the silicon carbide raw material and the vanadium supply source in a state where the silicon carbide raw material faces the seed crystal. A span value of a silicon carbide particle is calculated as a value obtained by dividing a value obtained by subtracting a 10% particle diameter from a 90% particle diameter, by a 50% particle diameter. The span value is 1.25 or more.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a silicon carbide crystal, a method for manufacturing a silicon carbide substrate, a method for manufacturing an epitaxial substrate, and a method for manufacturing a semiconductor device. [Background technology]

[0002] JP-A No. 2003-500321 (Patent Document 1) discloses a silicon carbide single crystal that has a resistivity of at least 5000 Ω·cm at room temperature and contains vanadium. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 2003-500321 (Patent Document 1) Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to provide a method for manufacturing a silicon carbide crystal, a method for manufacturing a silicon carbide substrate, a method for manufacturing an epitaxial substrate, and a method for manufacturing a semiconductor device that are capable of suppressing the generation of different polytypes. [Means for solving the problem]

[0005] A method for producing a silicon carbide crystal according to the present disclosure includes the steps of: placing a silicon carbide raw material, a vanadium supply source, and a seed crystal in a crucible; and growing a silicon carbide crystal on the seed crystal by sublimating the silicon carbide raw material and the vanadium supply source while the silicon carbide raw material and the seed crystal are positioned opposite each other. When the particle sizes at which the cumulative frequencies of silicon carbide particles constituting the silicon carbide raw material are 10%, 50%, and 90%, respectively, are defined as the 10% particle size, the 50% particle size, and the 90% particle size, respectively, the span value of the silicon carbide particles is calculated by subtracting the 10% particle size from the 90% particle size and dividing the result by the 50% particle size. The span value is 1.25 or greater. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a method for manufacturing a silicon carbide crystal, a method for manufacturing a silicon carbide substrate, a method for manufacturing an epitaxial substrate, and a method for manufacturing a semiconductor device that are capable of suppressing the generation of different polytypes. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view schematically showing the configuration of a silicon carbide substrate in accordance with this embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is a schematic plan view showing the measurement positions of the electrical resistivity. [Figure 4] FIG. 4 is a flow diagram schematically showing a method for manufacturing a silicon carbide substrate in accordance with the present embodiment. [Figure 5] FIG. 5 is a histogram showing an example of the frequency distribution of silicon carbide particles. [Figure 6] FIG. 6 shows an example of a cumulative frequency profile of particle diameters. [Figure 7] FIG. 7 is a cross-sectional view showing the configuration of a silicon carbide single crystal manufacturing apparatus according to this embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing the sublimation process. [Figure 9] FIG. 9 is a flow diagram schematically showing a method for manufacturing a semiconductor device according to this embodiment. [Figure 10] FIG. 10 is a cross-sectional view schematically illustrating a step of forming a buffer layer on a silicon carbide substrate. [Figure 11] FIG. 11 is a cross-sectional view showing a process of forming an electron transit layer and an electron supply layer. [Figure 12] FIG. 12 is a cross-sectional view showing the configuration of the semiconductor device according to this embodiment. [Figure 13]FIG. 13 shows a histogram illustrating the relationship between the particle size and frequency of the silicon carbide raw material used in the method for producing silicon carbide crystal according to Sample 1. As shown in FIG. [Figure 14] FIG. 14 shows a histogram illustrating the relationship between the particle size and frequency of the silicon carbide raw material used in the method for producing silicon carbide crystal according to Sample 2. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0009] (1) A method for producing a silicon carbide crystal according to the present disclosure includes the steps of: placing a silicon carbide raw material, a vanadium supply source, and a seed crystal in a crucible; and growing a silicon carbide crystal on the seed crystal by sublimating the silicon carbide raw material and the vanadium supply source while the silicon carbide raw material and the seed crystal are positioned opposite each other. When the particle diameters at which the cumulative frequencies of silicon carbide particles constituting the silicon carbide raw material are 10%, 50%, and 90%, respectively, are defined as the 10% particle diameter, the 50% particle diameter, and the 90% particle diameter, the span value of the silicon carbide particles is calculated by subtracting the 10% particle diameter from the 90% particle diameter and dividing the result by the 50% particle diameter. The span value is 1.25 or greater.

[0010] (2) According to the method for producing silicon carbide crystal in accordance with (1) above, when the particle sizes of silicon carbide particles constituting the silicon carbide raw material when their cumulative frequencies are 5% and 20% are defined as the 5% particle size and the 20% particle size, respectively, the value obtained by subtracting the 5% particle size from the 20% particle size and dividing the value by the 50% particle size may be 0.35 or more.

[0011] (3) According to the method for producing silicon carbide crystal in accordance with (2) above, the 50% particle size may be 300 μm or more, and the 10% particle size may be 200 μm or less.

[0012] (4) A method for manufacturing a silicon carbide substrate according to the present disclosure includes the steps of preparing a silicon carbide crystal using the method for manufacturing a silicon carbide crystal according to any one of (1) to (3) above, and cutting the silicon carbide crystal.

[0013] (5) According to the method for manufacturing a silicon carbide substrate according to (4) above, the electrical resistivity of the silicon carbide substrate at 27°C is 1×10 8 It may be Ωcm or more.

[0014] (6) According to the method for manufacturing a silicon carbide substrate according to (4) above, the silicon carbide substrate may have a maximum diameter of 150 mm or more.

[0015] (7) A method for manufacturing an epitaxial substrate according to the present disclosure includes the steps of preparing a silicon carbide substrate using the method for manufacturing a silicon carbide substrate described in (4) above, and forming a nitride epitaxial layer on the silicon carbide substrate.

[0016] (8) A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing an epitaxial substrate using the epitaxial substrate manufacturing method described in (7) above, and forming an electrode on the nitride epitaxial layer.

[0017] [Details of the embodiments of the present disclosure] Next, embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, identical or corresponding parts are designated by the same reference numerals, and their description will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. Regarding negative indices, in crystallography, a "-" (bar) is placed before the number, but in this specification, a negative sign is placed before the number.

[0018] First, the configuration of the silicon carbide substrate according to this embodiment will be described. FIG. 1 is a plan view schematically illustrating the configuration of a silicon carbide substrate 100 according to this embodiment. The silicon carbide substrate 100 according to this embodiment has a first main surface 1 and an outer peripheral surface 8. The first main surface 1 is, for example, planar. The first main surface 1 extends along each of a first direction 101 and a second direction 102. The outer peripheral surface 8 is continuous with the first main surface 1. The outer peripheral surface 8 has an orientation flat portion 6 and an arc-shaped portion 7. The arc-shaped portion 7 is continuous with the orientation flat portion 6. The orientation flat portion 6 extends along the first direction 101.

[0019] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be a direction obtained by projecting the <11-20> direction onto the first main surface 1. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> direction component.

[0020] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, a direction obtained by projecting the <1-100> direction onto the first main surface 1. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> direction component.

[0021] The first main surface 1 may be, for example, a {0001} plane, or may be a plane inclined relative to the {0001} plane. When the first main surface 1 is inclined relative to the {0001} plane, the inclination angle (off angle θ) of the first main surface 1 relative to the {0001} plane is, for example, 1° or more and 8° or less. When the first main surface 1 is inclined relative to the {0001} plane, the inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. The off angle θ may be, for example, 2° or more and 6° or less.

[0022] The diameter (maximum diameter) of the first main surface 1 is, for example, 100 mm (4 inches) or more. The diameter of the first main surface 1 may be, for example, 150 mm (6 inches) or more, or 200 mm (8 inches) or more. The diameter of the first main surface 1 may be 400 mm (16 inches) or less. When viewed in a direction from the first main surface 1 toward the second main surface 2, the diameter of the first main surface 1 is the longest linear distance between two different points on the outer peripheral surface 8.

[0023] As used herein, 4 inches means 100 mm or 101.6 mm (4 inches x 25.4 mm / inch). 6 inches means 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches means 200 mm or 203.2 mm (8 inches x 25.4 mm / inch). 16 inches means 400 mm or 406.4 mm (16 inches x 25.4 mm / inch).

[0024] Fig. 2 is a schematic cross-sectional view taken along line II-II in Fig. 1. As shown in Fig. 2, silicon carbide substrate 100 has second main surface 2. Second main surface 2 is opposite first main surface 1. Second main surface 2 is continuous with outer peripheral surface 8.

[0025] The third direction 103 is perpendicular to each of the first direction 101 and the second direction 102, and is a direction from the first main surface 1 to the second main surface 2. The third direction 103 is, for example, <0001> The third direction 103 is <0001> The direction may be inclined by an off angle θ with respect to the direction.

[0026] The silicon carbide substrate 100 contains vanadium as a dopant. The silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. The polytype of the hexagonal silicon carbide that makes up the silicon carbide substrate 100 is, for example, 4H.

[0027] <Electrical resistivity of silicon carbide substrate> The electrical resistivity of silicon carbide substrate 100 at 27° C. is, for example, 1×10 8 The electrical resistivity is, for example, 1×10 9It may be 1×10 Ωcm or more. 10 It may be 1×10 Ωcm or more. 11 The electrical resistivity may be, for example, 1×10 13 It may be Ωcm or less, or 1×10 12 It may be Ωcm or less.

[0028] A method for measuring the electrical resistivity of silicon carbide substrate 100 will be described. The electrical resistivity is measured using, for example, a COREMA-WT electrical resistivity measuring device manufactured by Semimap. Specifically, a voltage is applied using electrodes without contacting the object to be measured. As a result, the charge in the object to be measured increases over time. The charge in the portion of the object to which the voltage is applied is measured.

[0029] Specifically, the charge on the object under test immediately after the application of a voltage and the charge on the object under test a certain time after the application of the voltage are measured. The relaxation time of the charge on the part of the object under test to which the voltage is applied is measured. This allows the electrical resistivity of the object to be measured. For example, the measurement condition for measuring the electrical resistivity is a voltage of 0.75 V applied to the object under test.

[0030] Fig. 3 is a plan view schematic diagram showing the positions at which the electrical resistivity is measured. As shown in Fig. 3, on first main surface 1, a plurality of measurement points 22 are positioned in a grid pattern at intervals of, for example, 6 mm. The number of measurement points 22 is, for example, 200. The electrical resistivity is measured at each of the plurality of measurement points 22. The value obtained by dividing the sum of the electrical resistivities measured at each of the plurality of measurement points 22 by the number of measurement points 22 is taken as the electrical resistivity of silicon carbide substrate 100.

[0031] <Method for manufacturing silicon carbide substrate> Next, a method for manufacturing silicon carbide substrate 100 according to this embodiment will be described. Fig. 4 is a flow diagram schematically showing the method for manufacturing silicon carbide substrate 100 according to this embodiment. As shown in Fig. 4, the method for manufacturing silicon carbide substrate 100 according to this embodiment (S30) includes a step (S10) of manufacturing a silicon carbide crystal and a step (S20) of cutting the silicon carbide crystal.

[0032] Next, the process for producing silicon carbide crystal will be described. The process for producing silicon carbide crystal includes a preparation step (S1) and a sublimation step (S2). In the preparation step (S1), silicon carbide raw material 153 is prepared (see FIG. 7). Silicon carbide raw material 153 is composed of a large number of silicon carbide particles with different particle diameters.

[0033] The silicon carbide raw material 153 is divided into a plurality of groups. One of the plurality of groups of silicon carbide raw material 153 is placed in a silicon carbide mortar. The silicon carbide particles are ground for one minute using a silicon carbide pestle and mortar. This pulverizes the silicon carbide particles. The same pulverization operation is performed on the remaining groups of silicon carbide raw material 153. The pulverized groups of silicon carbide raw material 153 are combined into one.

[0034] Fig. 5 is a histogram showing an example of the frequency distribution of silicon carbide particles. In Fig. 5, the X-axis shows the diameter (particle diameter) of silicon carbide particles, and the Y-axis shows the frequency of silicon carbide particles. The unit of particle diameter is μm. The unit of frequency is %. As shown in Fig. 5, a histogram with the diameter of silicon carbide particles on the X-axis and the frequency of silicon carbide particles on the Y-axis has a single peak.

[0035] Silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to this embodiment has a wide particle size distribution. Specifically, silicon carbide raw material 153 contains many silicon carbide particles with small diameters.

[0036] Fig. 6 shows an example of a cumulative frequency profile of particle diameter. In Fig. 6, the X-axis shows the diameter of silicon carbide particles (particle diameter), and the Y-axis shows the cumulative frequency. The unit of particle diameter is μm. The unit of cumulative frequency is %.

[0037] The particle sizes when the cumulative frequency of silicon carbide particles constituting the silicon carbide raw material 153 is 5%, 10%, 20%, 50%, 80%, and 90% are the 5% particle size, 10% particle size, 20% particle size, 50% particle size, 80% particle size, and 90% particle size, respectively. The 5% particle size is called D5. The 10% particle size is called D10. The 20% particle size is called D20. The 50% particle size is called D50. D50 is the median. The 80% particle size is called D80. The 90% particle size is called D90.

[0038] The span value of silicon carbide particles is calculated by subtracting the 10% particle size from the 90% particle size and dividing the result by the 50% particle size, i.e., (D90-D10) / D50.

[0039] The span value of silicon carbide source material 153 of this embodiment is 1.25 or more. The span value may be 1.3 or more, or 1.4 or more. The span value may be 2 or less, or 1.5 or less.

[0040] The first particle size distribution of the silicon carbide raw material 153 of this embodiment is a value obtained by subtracting the 5% particle size from the 20% particle size and dividing the value by the 50% particle size. The first particle size distribution may be 0.35 or more, 0.36 or more, or 0.37 or more. The first particle size distribution may be 0.45 or less, or 0.40 or less.

[0041] The 50% particle size of silicon carbide raw material 153 of this embodiment may be 300 μm or more, 350 μm or more, or 400 μm or more. The 50% particle size of silicon carbide raw material 153 of this embodiment may be 700 μm or less, 650 μm or less, or 600 μm or less.

[0042] The 10% particle size of silicon carbide raw material 153 of this embodiment may be 200 μm or less, 190 μm or less, or 180 μm or less. The 10% particle size of silicon carbide raw material 153 of this embodiment may be 100 μm or more, 120 μm or more, or 150 μm or more.

[0043] Next, a method for measuring particle size distribution will be described. The size of silicon carbide particles is measured using a laser diffraction / scattering particle size distribution analyzer (model number: LA-960V2) manufactured by HORIBA Corporation. First, a liquid sample for measurement is prepared by adding silicon carbide particles to ethanol. Next, ultrasonic vibrations are applied to the liquid sample, dispersing the silicon carbide particles in the ethanol. The particle size is calculated based on the scattering pattern of the irradiated light.

[0044] The diameter of silicon carbide particles is measured in intervals ranging from 1 μm to 5000 μm. As the particle diameter increases, the width of the interval increases. For example, when particle diameter is expressed logarithmically, the interval is 1×10 n From 2 x 10 n The particle size range is divided into five intervals. n From 3 x 10 n The particle size range is divided into three intervals: 3×10 n From 4×10 n The particle size range is divided into two sections: 4×10 n From 6 x 10 n The particle size range is divided into one interval: 6×10 n From 7 x 10 n The particle size range is divided into one interval: 7×10 n From 8 x 10 n The particle size range is divided into one interval: 8×10 n From 9 x 10 n The particle size range is divided into one interval: 9×10 n From 10 x 10 nThe particle size range is divided into one interval, where n is an integer. The unit of particle size is μm.

[0045] Next, a silicon carbide crystal manufacturing apparatus according to this embodiment will be described. Fig. 7 is a cross-sectional schematic diagram showing the configuration of a silicon carbide crystal manufacturing apparatus according to this embodiment. As shown in Fig. 7, silicon carbide crystal manufacturing apparatus 300 mainly includes crucible 130, heat insulating material 145, porous carbon 160, and induction heating coil 140.

[0046] The heat insulating material 145 is arranged so as to cover the entire crucible 130. The induction heating coil 140 is arranged in a spiral shape around the outer periphery of the heat insulating material 145. When power is applied to the induction heating coil 140, the crucible 130 is heated by electromagnetic induction. The induction heating coil 140 may be movable along the third direction 103. By moving the induction heating coil 140 along the third direction 103, the heated position in the crucible 130 can be adjusted.

[0047] The crucible 130 is made of graphite. The bulk density of the graphite that makes up the crucible 130 is, for example, 1.7 g / cm 3 More than 1.9g / cm 3 The crucible 130 has a main body 132, a lid 131, and a bottom 136.

[0048] The shape of the main body 132 is, for example, annular. The lid 131 is disposed on the main body 132. The lid 131 is detachable from the main body 132. The bottom 136 is attached to the main body 132. The bottom 136 is detachable from the main body 132. The bottom 136 is opposite the lid 131 with respect to the main body 132. From another perspective, the main body 132 is between the lid 131 and the bottom 136. The direction from the lid 131 toward the bottom 136 is the third direction 103.

[0049] The main body 132 has a cylindrical portion 134 and a first screw portion 171. The cylindrical portion 134 is annular in shape. The lid portion 131 is disposed on the cylindrical portion 134. The first screw portion 171 is continuous with the cylindrical portion 134. The first screw portion 171 is provided on the opposite side of the lid portion 131 with respect to the cylindrical portion 134. The first screw portion 171 is annular in shape. An internal thread, for example, is provided on the inner circumferential surface of the first screw portion 171.

[0050] Bottom portion 136 has a base portion 137 and a second screw portion 173. Base portion 137 forms the bottom surface of crucible 130. Second screw portion 173 is continuous with base portion 137. Second screw portion 173 has an annular shape. A male thread is provided on the outer circumferential surface of second screw portion 173. Bottom portion 136 is attached to main body portion 132 by fastening second screw portion 173 and first screw portion 171 together.

[0051] The porous carbon 160 is disposed inside the main body 132. The porous carbon 160 is spaced apart from both the lid 131 and the bottom 136. The porous carbon 160 is made of a porous material. In other words, the porous carbon 160 has a large number of pores.

[0052] The bulk density of the porous carbon 160 is smaller than the bulk density of the graphite that constitutes the crucible 130. The bulk density of the porous carbon 160 is, for example, 1.36 g / cm 3 The bulk density of the porous carbon 160 is, for example, 1.3 g / cm 3 More than 1.4g / cm 3 The thickness of the porous carbon 160 is, for example, not less than 3 mm and not more than 15 mm.

[0053] 7 , in a preparation step (S1), a silicon carbide raw material 153, a vanadium supply source 154, and a seed crystal 150 are placed in a crucible 130. Specifically, the silicon carbide raw material 153 is placed on porous carbon 160. The silicon carbide raw material 153 contacts both the porous carbon 160 and the main body 132. The silicon carbide raw material 153 is spaced apart from both the lid 131 and the bottom 136.

[0054] A vanadium supply source 154 is disposed at the bottom 136. The vanadium supply source 154 is a raw material that supplies vanadium gas. Specifically, the vanadium supply source 154 supplies vanadium gas by sublimation. The vanadium supply source 154 contains vanadium. The vanadium supply source 154 contains, for example, vanadium carbide. The vanadium supply source 154 is, for example, vanadium carbide powder.

[0055] The vanadium supply source 154 is disposed, for example, opposite the silicon carbide source 153 with respect to the porous carbon 160. From another perspective, the porous carbon 160 is disposed, for example, between the silicon carbide source 153 and the vanadium supply source 154. The porous carbon 160 faces the vanadium supply source 154.

[0056] The seed crystal 150 is fixed to the lid portion 131 using, for example, an adhesive (not shown). The seed crystal 150 has a growth surface 151 and an attachment surface 152. The attachment surface 152 is on the opposite side to the growth surface 151. The growth surface 151 faces the silicon carbide raw material 153. The attachment surface 152 faces the lid portion 131. The growth surface 151 of the seed crystal 150 is arranged so as to face the surface of the silicon carbide raw material 153. The porous carbon 160 is arranged between the seed crystal 150 and the vanadium supply source 154.

[0057] Seed crystal 150 is, for example, a silicon carbide single crystal substrate having a polytype of 4H. Growth surface 151 has a diameter W of, for example, 150 mm. Diameter W of growth surface 151 may be, for example, 160 mm or more and 190 mm or less. Growth surface 151 is, for example, a plane inclined at an off angle of approximately 8° or less with respect to the {0001} plane. As described above, vanadium supply source 154, seed crystal 150, and silicon carbide raw material 153 are placed inside crucible 130.

[0058] Next, the sublimation step (S2) is carried out. Fig. 8 is a cross-sectional schematic diagram showing the sublimation step. Specifically, while the temperature of growth surface 151 of seed crystal 150 is lower than the temperature of silicon carbide raw material 153, the pressure of the atmospheric gas inside crucible 130 is reduced to, for example, 1.0 kPa. The atmospheric gas is, for example, argon gas. This causes silicon carbide raw material 153 and vanadium supply source 154 to start sublimating.

[0059] The sublimated silicon carbide gas recrystallizes on growth surface 151. Silicon carbide crystal 200 grows on growth surface 151. While silicon carbide crystal 200 is growing, the pressure inside crucible 130 is maintained at, for example, about 0.1 kPa or more and 3 kPa or less. The temperature of silicon carbide crystal 200 is, for example, 2100°C or more and 2300°C or less. By moving induction heating coil 140 along third direction 103, silicon carbide source 153 may be heated first, and then vanadium supply source 154 may be heated.

[0060] The sublimated vanadium gas passes through the pores in porous carbon 160 and the gaps between the plurality of silicon carbide particles that make up silicon carbide raw material 153, and reaches the periphery of seed crystal 150. As silicon carbide crystal 200 grows, vanadium is doped into silicon carbide crystal 200. As described above, silicon carbide crystal 200 grows on seed crystal 150 by sublimating silicon carbide raw material 153 and vanadium supply source 154.

[0061] Next, the cutting step (S20) is carried out. For example, a saw wire is used to slice the silicon carbide crystal 200 along a plane perpendicular to the central axis of the silicon carbide crystal 200. This results in a silicon carbide substrate 100 (see FIG. 1).

[0062] Although the above describes a case where silicon carbide source 153 and vanadium supply source 154 are sublimated while they are spaced apart, the method for producing silicon carbide crystal 200 according to the present disclosure is not limited to the above method. For example, silicon carbide source 153 and vanadium supply source 154 may be sublimated while vanadium supply source 154 is mixed with silicon carbide source 153.

[0063] <Method of manufacturing a semiconductor device> Next, a method for manufacturing the semiconductor device 500 according to this embodiment will be described. Fig. 9 is a flow diagram that schematically shows the method for manufacturing the semiconductor device 500 according to this embodiment. The method for manufacturing the semiconductor device 500 according to this embodiment mainly includes a step (S3) of manufacturing an epitaxial substrate and a step (S4) of forming an electrode on the epitaxial layer.

[0064] First, the step (S3) of manufacturing an epitaxial substrate is performed. The step (S3) of manufacturing an epitaxial substrate includes the step (S60) of preparing a silicon carbide substrate 100 and the step (S70) of forming an epitaxial layer. First, the step (S60) of preparing a silicon carbide substrate 100 is performed. In the step (S60) of preparing a silicon carbide substrate 100, the silicon carbide substrate 100 according to this embodiment is prepared using the method (S30) for manufacturing a silicon carbide substrate 100 described above (see FIGS. 1 and 2).

[0065] Next, the step (S70) of forming an epitaxial layer is carried out. Specifically, buffer layer 31 is formed on silicon carbide substrate 100. Fig. 10 is a cross-sectional view schematically showing the step of forming buffer layer 31 on silicon carbide substrate 100. Buffer layer 31 is formed on first main surface 1 of silicon carbide substrate 100 by epitaxial growth. Buffer layer 31 is formed by, for example, MOCVD (Metal Organic Chemical Vapor Deposition).

[0066] The buffer layer 31 is made of, for example, aluminum gallium nitride (AlGaN). The buffer layer 31 has a thickness of, for example, 150 nm. As a raw material gas for aluminum (Al), for example, TMA (trimethylaluminum) is used. As a raw material for gallium (Ga), for example, TMG (trimethylgallium) is used. As a raw material for nitrogen (N), for example, ammonia is used.

[0067] Next, the electron transit layer 32 and the electron supply layer 33 are formed. Fig. 11 is a cross-sectional view showing the process of forming the electron transit layer 32 and the electron supply layer 33. First, the electron transit layer 32 is formed on the buffer layer 31 by MOCVD. The electron transit layer 32 is made of, for example, gallium nitride (GaN). The thickness of the electron transit layer 32 is, for example, 1 µm.

[0068] Next, the electron supply layer 33 is formed on the electron transit layer 32. The electron supply layer 33 is formed by, for example, MOCVD. The electron supply layer 33 is made of, for example, AlGaN. The electron supply layer 33 has a thickness of, for example, 20 μm. Two-dimensional electron gas is generated in a portion of the electron transit layer 32 near the interface between the electron transit layer 32 and the electron supply layer 33.

[0069] As described above, the epitaxial substrate 400 is manufactured. As shown in FIG. 11 , the epitaxial substrate 400 includes a silicon carbide substrate 100 and a nitride epitaxial layer 30. The nitride epitaxial layer 30 includes a buffer layer 31, an electron transit layer 32, and an electron supply layer 33. The buffer layer 31 is provided on the silicon carbide substrate 100. The electron transit layer 32 is provided on the buffer layer 31. The electron supply layer 33 is provided on the electron transit layer 32.

[0070] Next, a step (S4) of forming electrodes on the epitaxial layer is performed. First, a source electrode 41 and a drain electrode 42 are formed. Specifically, a first resist pattern (not shown) is formed on the electron supply layer 33. In the first resist pattern, openings are formed in the regions where the source electrode 41 and the drain electrode 42 are to be formed.

[0071] Next, a first metal stacked film is formed on the first resist pattern using, for example, a vacuum deposition method. The first metal stacked film includes, for example, a titanium (Ti) film and an aluminum (Al) film. Next, the first metal stacked film formed on the first resist pattern is removed by lift-off. As a result, a source electrode 41 and a drain electrode 42 made of the first metal stacked film are formed on the electron supply layer 33.

[0072] Next, alloying annealing may be performed. Specifically, the source electrode 41 and the drain electrode 42 are annealed. The annealing temperature is, for example, 600° C. This may allow each of the source electrode 41 and the drain electrode 42 to make ohmic contact with the electron supply layer 33.

[0073] Next, the gate electrode 43 is formed. Specifically, a second resist pattern (not shown) is formed on the electron supply layer 33. In the second resist pattern, an opening is formed in a region where the gate electrode 43 is to be formed.

[0074] Next, a second metal stack film is formed on the second resist pattern using, for example, a vacuum deposition method. The second metal stack film includes, for example, a nickel (Ni) film and a gold (Au) film. Next, the second metal stack film formed on the second resist pattern is removed by lift-off. As a result, a gate electrode 43 made of the second metal stack film is formed on the electron supply layer 33.

[0075] 12 is a cross-sectional view showing a configuration of a semiconductor device 500 according to this embodiment. The semiconductor device 500 is, for example, a field-effect transistor, more specifically, a high electron mobility transistor (HEMT). The semiconductor device 500 mainly includes an epitaxial substrate 400, a gate electrode 43, a source electrode 41, and a drain electrode 42.

[0076] 12 , each of the gate electrode 43, the source electrode 41, and the drain electrode 42 is provided on an epitaxial substrate 400. Specifically, each of the gate electrode 43, the source electrode 41, and the drain electrode 42 is in contact with the electron supply layer 33. The gate electrode 43 may be located between the source electrode 41 and the drain electrode 42.

[0077] Next, the effects of the method for manufacturing silicon carbide crystal 200 according to this embodiment will be described.

[0078] In order to manufacture a silicon carbide crystal 200 with high electrical resistivity, the silicon carbide crystal 200 may be doped with vanadium. Vanadium forms deep levels in the silicon carbide crystal 200, which increases the electrical resistivity of the silicon carbide crystal 200. In order to dope the silicon carbide crystal 200 with vanadium, a vanadium supply source 154 and a silicon carbide raw material 153 are placed inside the crucible 130, and the vanadium supply source 154 and the silicon carbide raw material 153 are sublimated to grow the silicon carbide crystal 200. However, different polytypes may occur in the silicon carbide crystal 200.

[0079] The inventors conducted extensive research into the causes of the generation of different polytypes, and as a result, arrived at the following findings. As the diameter of silicon carbide crystal 200 increases, the size of crucible 130 and the heat insulating material also increases. In this case, the temperature uniformity in the radial direction deteriorates during the process of growing silicon carbide crystal 200. Specifically, the temperature difference between the center and outer periphery of crucible 130 increases.

[0080] The vapor pressure of vanadium is higher than the vapor pressure of silicon carbide. Therefore, sublimation of the vanadium supply source 154 begins earlier than sublimation of the silicon carbide raw material 153. In the central portion where the temperature is low, the vanadium supply source 154 sublimes preferentially. As a result, the grown silicon carbide crystal 200 is doped with excess vanadium. When the doped vanadium exceeds the solid solubility limit, vanadium precipitates in the silicon carbide crystal 200. When the vanadium subsequently diffuses from the silicon carbide crystal 200, voids are generated in the silicon carbide crystal 200. The heterogeneous polytypes are generated due to these voids.

[0081] The inventors have studied ways to reduce the temperature difference in the radial direction of the silicon carbide raw material 153 and have found the following solution. Specifically, the inventors focused on the particle size distribution of the silicon carbide raw material 153. The inventors used a mortar and pestle to finely crush the silicon carbide particles. This widened the size distribution of the silicon carbide particles. As a result, silicon carbide particles with smaller particle sizes enter between silicon carbide particles with larger particle sizes. This increases the density (bulk density) of the silicon carbide raw material. By reducing the gaps between the silicon carbide particles, it is possible to prevent vanadium from passing excessively between the silicon carbide particles.

[0082] Furthermore, the increased density of the silicon carbide source material improves the thermal conductivity of silicon carbide source material 153. As a result, the temperature difference in the radial direction of silicon carbide source material 153 decreases. This makes it possible to suppress excessive vanadium from being doped into silicon carbide crystal 200. As a result, the generation of voids in silicon carbide crystal 200 is suppressed. This makes it possible to suppress the generation of different polytypes in silicon carbide crystal 200.

[0083] The method for manufacturing silicon carbide crystal 200 according to this embodiment includes the steps of arranging silicon carbide source 153, vanadium supply source 154, and seed crystal 150 in crucible 130, and growing silicon carbide crystal 200 on seed crystal 150 by sublimating silicon carbide source 153 and vanadium supply source 154 while silicon carbide source 153 and seed crystal 150 are arranged facing each other. Silicon carbide source 153 has a span value of 1.25 or more. This makes it possible to suppress the generation of different polytypes in silicon carbide crystal 200. [Example]

[0084] (Sample preparation) Silicon carbide crystal 200 according to Samples 1 to 3 were prepared. Silicon carbide crystal 200 according to Samples 1 and 2 are comparative examples. Silicon carbide crystal 200 according to Sample 3 is an example.

[0085] Silicon carbide crystal 200 according to Samples 1 to 3 was produced using the method for producing silicon carbide crystal 200 shown in Fig. 4. The methods for producing silicon carbide crystal 200 according to Samples 1 to 3 differ in the particle size distribution of silicon carbide raw material 153. Table 1 shows indices of the distribution of silicon carbide particles in silicon carbide raw material 153 used in the methods for producing silicon carbide crystal 200 according to Samples 1 to 3.

[0086] [Table 1]

[0087] 13 shows a histogram illustrating the relationship between particle size and frequency of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 1. As shown in Table 1, D50 of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 1 was 337 μm, and (D90−D10) / D50 was 1.15. (D90−D10) / D50 is a span value.

[0088] 14 shows a histogram illustrating the relationship between particle size and frequency of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 2. As shown in Table 1, D50 of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 2 was 773 μm, and (D90−D10) / D50 was 0.97.

[0089] A histogram showing the relationship between particle size and frequency of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 3 is shown in Fig. 5. As shown in Table 1, D50 of silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 3 was 329 µm, and (D90-D10) / D50 was 1.25. Silicon carbide raw material 153 used in the method for manufacturing silicon carbide crystal 200 according to Sample 3 was obtained by pulverizing silicon carbide particles using a mortar and pestle.

[0090] Next, silicon carbide crystal 200 was grown on seed crystal 150 by sublimating silicon carbide raw material 153 and vanadium carbide using a high-frequency induction heating furnace. The mass ratio of silicon carbide raw material 153 to vanadium carbide was 100:0.5. The diameter of seed crystal 150 was 150 mm. The growth pressure was 100 Pa or more and 500 Pa or less. The growth temperature was 2200°C or more and 2400°C or less. The diameter of silicon carbide crystal 200 was 150 mm.

[0091] (Evaluation results) In silicon carbide crystal 200 according to Samples 1 and 2, the occurrence of numerous different polytypes was observed throughout the crystal. The origins of the different polytypes were voids that occurred in the early stages of growth of silicon carbide crystal 200. The voids are thought to be caused by the precipitation of vanadium in silicon carbide crystal 200. In silicon carbide crystal 200 according to Sample 3, the occurrence of different polytypes was not observed.

[0092] From the above results, it was confirmed that the generation of different polytypes in the silicon carbide crystal can be suppressed by setting the span value of the silicon carbide raw material to 1.25 or more.

[0093] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims rather than the above-described embodiments and examples, and it is intended to include any modifications within the scope of the claims that are equivalent to the claims. [Explanation of symbols]

[0094] 1 First main surface 2 Second main surface 6 Orientation Flat 7 Arc-shaped part 8 Outer surface 22 measurement points 30 Nitride epitaxial layer 31 Buffer layer 32 Electron transit layer 33 Electron supply layer 41 Source electrode 42 Drain electrode 43 gate electrode 100 Silicon carbide substrate 101 1st direction 102 Second direction 103 Third direction 130 Crucible 131 Lid 132 Main body 134 Cylinder part 136 Bottom 137 Base 140 Induction heating coil 145 Insulation 150 seed crystals 151 Growth aspect 152 Mounting surface 153 Silicon carbide raw material 154 Vanadium Sources 160 Porous Carbon 171 First screw part 173 Second screw part 200 Silicon carbide crystal 300 Manufacturing equipment 400 epitaxial substrate 500 Semiconductor devices W diameter

Claims

1. placing a silicon carbide raw material, a vanadium source, and a seed crystal in a crucible; and growing a silicon carbide crystal on the seed crystal by sublimating the silicon carbide source and the vanadium source while the silicon carbide source and the seed crystal are disposed opposite each other; when particle diameters at which the cumulative frequencies of silicon carbide particles constituting the silicon carbide raw material are 10%, 50%, and 90%, respectively, are defined as a 10% particle diameter, a 50% particle diameter, and a 90% particle diameter, the span value of the silicon carbide particles is calculated by subtracting the 10% particle diameter from the 90% particle diameter and dividing the result by the 50% particle diameter, The method for producing silicon carbide crystal, wherein the span value is 1.25 or greater.

2. 2. The method for producing a silicon carbide crystal according to claim 1, wherein, when particle sizes when cumulative frequencies of silicon carbide particles constituting said silicon carbide raw material are 5% and 20%, respectively, are defined as a 5% particle size and a 20% particle size, a value obtained by subtracting said 5% particle size from said 20% particle size and dividing said value by said 50% particle size is 0.35 or greater.

3. The 50% particle size is 300 μm or more, 3. The method for producing silicon carbide crystal according to claim 2, wherein the 10% particle size is 200 μm or less.

4. preparing a silicon carbide crystal using the method for producing a silicon carbide crystal according to any one of claims 1 to 3; and cutting the silicon carbide crystal.

5. The electrical resistivity of the silicon carbide substrate at 27°C is 1×10 8 The method for manufacturing a silicon carbide substrate according to claim 4 , wherein the resistivity is Ωcm or more.

6. 5. The method for manufacturing a silicon carbide substrate according to claim 4, wherein the silicon carbide substrate has a maximum diameter of 150 mm or more.

7. preparing a silicon carbide substrate by using the method for manufacturing a silicon carbide substrate according to claim 4; and forming a nitride epitaxial layer on the silicon carbide substrate.

8. preparing an epitaxial substrate using the epitaxial substrate manufacturing method according to claim 7; and forming an electrode on the nitride epitaxial layer.

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