Protective circuit for differential amplifier, and operational amplifier

Abstract

To provide a protective circuit for a differential amplifier that protects a differential amplifier of a rail-to-rail structure for switching a switch-actuated differential pair against a reverse voltage between a base and an emitter, even for an input differential pair switching structure, without affecting its characteristic.SOLUTION: The protective circuit is constituted to include: a first protective circuit which is connected between an inverse input terminal and a non-inverse input terminal of a differential amplifier of a rail-to-rail structure for selecting a differential pair of different conductive types by a switch, and clamps between the input terminals to a set arbitrary voltage when there is excessive input to either of these two input terminals; and a second protective circuit which is connected between an internal node of the first protective circuit and a common emitter node of one conductive type differential pair of the differential amplifier and can form a current path from the common emitter node to the inverse input terminal or the non-inverse input terminal when a voltage exceeding a reverse breakdown voltage is applied to either of the differential pair.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a protection circuit for a differential amplifier and an operational amplifier including the same. [Background technology]

[0002] To expand the common-mode input range of a differential amplifier, a rail-to-rail input configuration is sometimes used, in which two differential pairs of input transistors with different conductivity types are connected in parallel. This type of amplifier generally handles the full swing of the input signal between the lowest and highest power supply rails, so the output is also rail-to-rail and used as a voltage follower, making it suitable for use in buffer circuits for large-amplitude signals. To handle faster signals, vertical-structure transistors, which offer excellent high-speed response, are sometimes used. However, compared to lateral-structure bipolar transistors, these transistors have a lower reverse breakdown voltage between the base and emitter, typically only a few volts. This necessitates a protection circuit to prevent the breakdown voltage from exceeding this limit. Furthermore, in this type of amplifier, the characteristics change depending on whether the two parallel-connected differential pairs are operating simultaneously or only one is operating, so a commonly used method is to keep the transconductance gm constant by switching the input differential pairs with a switch so that they do not operate simultaneously.

[0003] The differential amplifier shown in Figure 11 includes a protection circuit that provides the above-mentioned protection, and also includes a switch for switching the input differential pair. Note that this diagram shows only the core components, omitting other passive elements. Protection circuit 1 is provided between input terminals 2 and 3, and clamps the voltage between both terminals to a preset voltage if the differential voltage between input terminals 2 and 3 exceeds the withstand voltage of input transistor 4 or 5. Protection circuit 1 can be implemented as anti-parallel-connected diodes, as shown in Figure 7.5 of Non-Patent Document 1. While this document uses one pair of diodes, it can also be configured with any number of diodes.

[0004] In the input differential pair switching configuration shown in Figure 11, protection against reverse voltage is possible for the differential pair that is primarily active (input transistors 4 and 5 in the illustrated example), but not for the other differential pair (input transistors 6 and 7 in the illustrated example). This is because, when switch 8 switches, the common emitter node 9a of the other differential pair floats, applying a reverse voltage to the base-emitter PN junction of that differential pair. This is explained using the example in Figure 12. First, when the common-mode input level switches from high to low, switch 8 detects this and becomes non-conductive, turning transistor 11 off. This causes common emitter node 9a to float, cutting off the discharge path for the charge stored in the parasitic capacitance and maintaining a constant potential. Next, when a differential voltage is applied between input terminals 2 and 3 in this state, a reverse voltage is applied to the base-emitter PN junction of input transistor 6 or 7, which is off. For example, when input terminal 2 is low and input terminal 3 is high, a reverse voltage is applied between the base and emitter of transistor 6. Therefore, if the charge on the parasitic capacitance is large, the above switching operation may cause a reverse voltage exceeding the reverse breakdown voltage to be applied to the input transistor.

[0005] One way to solve this problem is to provide a protection circuit that forms a current path between the base and emitter of the input transistor to which a reverse voltage is applied. For example, as shown in the example of Patent Document 1 in Figure 13, a current path is created by connecting protection circuits 21 and 22 made up of diodes between the base and emitters of input transistors 6 and 7, and the charge stored in the parasitic capacitance is released to the input terminal, thereby solving the problem of reverse voltage resistance. Figure 14 shows this applied to the circuit in Figure 12. Protection circuits 21 and 22 made up of series diodes are connected between the base and emitters of input transistors 6 and 7, respectively, so that the cathodes are connected to the bases. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 4146795 [Non-patent literature]

[0007] [Non-Patent Document 1] Practical Analog Design Techniques, Section7, Edited by Walt Kester, Analog Devices, 1995, ISBN-0-916550-16-8 Summary of the Invention [Problem to be solved by the invention]

[0008] However, adopting such a solution poses the problem that the parasitic capacitance of the diode connected between the base and emitter increases the capacitance connected to ground at the input terminal, affecting the stability and high-speed characteristics of the differential amplifier. Therefore, one of the objects of the present invention is to provide a protection circuit for a differential amplifier that protects against reverse voltage between the base and emitter, even in a configuration that switches the input differential pair, without affecting the characteristics. [Means for solving the problem]

[0009] According to one aspect of the present invention, there is provided a protection circuit for a differential amplifier, comprising: a first protection circuit connected between an inverting input terminal and a non-inverting input terminal of a differential amplifier having a rail-to-rail configuration that switches between differential pairs of different conductivity types using a switch, and clamping a voltage between the inverting input terminal and the non-inverting input terminal to a set arbitrary voltage when an excessively large input is applied between these two input terminals; and a second protection circuit connected between an internal node of the first protection circuit and a common emitter node of the differential pair of one conductivity type of the differential amplifier, and enabling the formation of a current path from the common emitter node to the inverting input terminal or the non-inverting input terminal when a voltage exceeding a reverse withstand voltage is applied to the differential pair of the one conductivity type. According to another aspect of the present invention, there is provided an operational amplifier comprising the differential amplifier protection circuit, wherein a current source connected to the common emitter node of the differential pair of one conductivity type of the differential amplifier is a transistor that flows a current that is a copy of a current flowing in a tail current source connected to the common emitter node of the differential pair of the other conductivity type as a reference current, and the switch is disposed between a transistor current-mirror-connected to the transistor and the current source connected to the common emitter node of the differential pair of the other conductivity type, and the differential amplifier is configured as a folded cascode differential amplifier. [Effects of the Invention]

[0010] According to one aspect of the present invention, in a rail-to-rail differential amplifier, it is possible to protect the input transistors from a reverse voltage that exceeds the reverse breakdown voltage between the base and emitter of the input transistors due to the switching operation of the input differential pair, thereby protecting the input transistors from destruction or damage.In addition, according to another aspect of the present invention, there is an advantage in that it is possible to increase the slew rate when a large amplitude input is received. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a diagram showing a differential amplifier protection circuit according to a first embodiment of the present invention; [Figure 2] FIG. 4 is a diagram showing a differential amplifier protection circuit according to a second embodiment of the present invention. [Figure 3] 3 is a graph showing the potential of the common emitter node 9a shown in FIG. 2. [Figure 4] 3 is a graph showing the base-emitter voltage of the NPN differential pair shown in FIG. 2. [Figure 5] 3 is a Bode diagram showing a phase margin of the differential amplifier shown in FIG. 2. [Figure 6] FIG. 10 is a diagram showing a modified example of the first embodiment of the present invention. [Figure 7] FIG. 10 is a diagram showing a modified example of the second embodiment of the present invention. [Figure 8]FIG. 10 is a diagram illustrating an operational amplifier according to a third embodiment of the present invention. [Figure 9] FIG. 10 is a diagram illustrating an operational amplifier according to a third embodiment of the present invention. [Figure 10] FIG. 10 is a diagram showing the characteristics of an operational amplifier according to a third embodiment of the present invention. [Figure 11] FIG. 1 is a diagram illustrating an example of a conventional protection circuit for a differential amplifier. [Figure 12] FIG. 1 is a diagram illustrating an example of a conventional protection circuit for a differential amplifier. [Figure 13] FIG. 1 is a diagram illustrating an example of a conventional protection circuit for a differential amplifier. [Figure 14] FIG. 1 is a diagram illustrating an example of a conventional protection circuit for a differential amplifier. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following embodiments, parts that are identical or equivalent to each other will be denoted by the same reference numerals.

[0013] (First embodiment) The circuit structure and operation of the first embodiment will be described in detail with reference to FIG.

[0014] <Circuit structure> 1 shows a differential amplifier with an input rail-to-rail configuration, in which a PNP differential pair consisting of PNP transistors 4 and 5 and an NPN differential pair consisting of NPN transistors 6 and 7 are connected in parallel to input terminals 2 and 3. The PNP differential pair, along with tail current source 12 and current load 14, is connected between the power rails to form a first differential amplifier section, while the NPN differential pair, along with NPN transistor 11 and current load 13, is connected between the power rails to form a second differential amplifier section. The base of NPN transistor 11 is connected to the base of NPN transistor 10, and the base and collector of NPN transistor 10 are connected in common. The collector of NPN transistor 10 is connected to tail current source 12 via switch 8. That is, NPN transistor 11 is connected in a current mirror configuration with NPN transistor 10, and when switch 8 is conductive, it functions as a current source that uses the current flowing through tail current source 12 as a reference current and flows a replicated current to the common emitter node 9a of the NPN differential pair in the second differential amplifier section. Since the tail current source 12 is directly connected to the common emitter of the PNP transistor pair of the first differential amplifier section, the PNP differential pair of the first differential amplifier section is the main operating circuit.

[0015] On the other hand, the first protection circuit 1 is connected between the non-inverting input terminal 2 and the inverting input terminal 3, and the second protection circuit 30 is connected between an internal node of the first protection circuit 1 and the common emitter node 9a of the NPN differential pair of the second differential amplifier section.

[0016] <Circuit operation> First, the basic operation of the circuit will be explained. The first differential amplifier section operates when the input signal is low, below a predetermined voltage value, and the second differential amplifier section operates when the input signal is high, above a predetermined voltage value. Switch 8 is adjusted so that it is conductive when the input signal is high and non-conductive when the input signal is low. This circuit configuration enables the differential amplifier in Figure 1 to perform rail-to-rail operation, switching between the first and second differential amplifier sections depending on the signal input level.

[0017] Next, we will explain how the protection circuit works. When the differential voltage between input terminals 2 and 3 becomes excessive, first protection circuit 1 clamps the voltage between input terminals 2 and 3 to a preset voltage. At this time, the potential of the common emitter node 9b of the PNP transistors is determined through the PN junction between the base and emitter of one of the PNP transistors. A reverse voltage is applied between the base and emitter of the other PNP transistor, but by limiting the differential voltage between input terminals 2 and 3, this voltage is kept below the emitter-base reverse breakdown voltage of the input transistor. For NPN transistors, when they are in a steady state of operation, the potential of the common emitter node 9a is determined through the PN junction between the base and emitter of one of the NPN transistors, providing protection from reverse breakdown voltage in the same way as the PNP transistor. However, as mentioned above, when the input transistors are switched by switch 8, the common emitter node 9a is floating, and there is a period when the NPN input transistor is not operating.

[0018] When the common emitter node 9a is floating, the charge stored in the parasitic capacitance is cut off and cannot be discharged, so it remains at a constant potential. Therefore, when either input terminal is low, the potential relationship between the common emitter node 9a of the NPN differential pair and the input terminal is reversed, creating a reverse bias between the base and emitter, resulting in a reverse voltage. The second protection circuit 30 then releases the charge stored in the parasitic capacitance from the common emitter node 9a to the input terminal via an internal node of the first protection circuit, thereby suppressing the reverse voltage to a level that can be tolerated even by vertical-structure bipolar transistors with a base-emitter reverse breakdown voltage of only a few volts. As described above, while PNP transistors can be protected from reverse voltage by protection circuit 1, there are periods when protection circuit 1 alone is insufficient for NPN transistors, and protection can only be achieved by protection circuit 30. This effect can be achieved without affecting the characteristics, as the parasitic capacitance attached to the input terminal does not increase.

[0019] (Second embodiment) A second embodiment will be described with reference to FIG. 2. Like FIG. 1, FIG. 2 is a diagram showing a differential amplifier with an input rail-to-rail configuration, and illustrates the specific structures of the first protection circuit 1 and the second protection circuit 30 in FIG. 1. The first protection circuit 1 is an anti-parallel diode circuit consisting of six diodes in total, with three series-connected diodes connected in anti-parallel between the non-inverting input terminal 2 and the inverting input terminal 3. The second protection circuit, on the other hand, consists of two diodes 31 and 32, whose anodes are connected to a common emitter node 9a and whose cathodes are connected to an internal node of the first protection circuit 1. The cathode of diode 31 is connected to the anode of the diode whose cathode is connected to the non-inverting input terminal 2, and the cathode of diode 32 is connected to the anode of the diode whose cathode is connected to the inverting input terminal 3. Because the diodes of the first protection circuit 1 and the diodes 31 and 32 of the second protection circuit are all the same diode, the clamp voltage can be adjusted by changing the number of diodes. That is, since the voltage is clamped to a voltage determined by multiplying the forward voltage of the series-connected diodes by the number of diodes, adjusting the number of diodes makes it possible to suppress the voltage applied to the input terminal to a level that does not exceed the withstand voltage of the input transistor. In this embodiment, since there are three series-connected diodes, if the forward voltage of one diode is 0.7 V, the voltage can be clamped to a voltage of 2.1 V.

[0020] Figure 3 is a graph showing the potential of the common emitter node 9a versus the input signal when the inverting output terminal 3 of the circuit in Figure 2 is connected to the output to form a voltage follower. As shown in this figure, the potential of the common emitter node 9a, indicated by the dotted line, becomes a constant potential when floating and does not follow the input signal, indicated by the thin line. Therefore, as shown by the dotted line in Figure 4, when the non-inverting input terminal 2 goes low, the potential relationship between the common emitter node 9a of the NPN differential pair and the non-inverting input terminal 2 reverses, causing the base-emitter of transistor 6 to become reverse-biased and a reverse voltage to be applied. Also, because this is a voltage follower, the output and input have the same potential, and when the inverting input terminal 3 also goes low, a reverse voltage is applied to transistor 7 as well. Figure 4 is a graph showing the base-emitter voltages of the transistors that make up the NPN differential pair. The horizontal axis represents transition time, and the vertical axis represents voltage.

[0021] In this embodiment, the diodes 31 and 32 of the second protection circuit form a current path that drains the charge stored in the parasitic capacitance from the common emitter node 9a to an internal node of the first protection circuit 1, and then from the internal node to the input terminal via one of the diodes constituting the protection circuit 1. The voltage between the input terminal and the common emitter node is clamped to the sum of the forward voltages of the two diodes. As a result, as shown by the solid line in FIG. 4, the reverse voltage can be suppressed to less than 2 V. Furthermore, as shown by the bold line in FIG. 3, the potential of the common emitter node 9a can also track the input signal. Because the cathodes of the diodes 31 and 32 of the second protection circuit are connected to the internal node of the first protection circuit 1, there is no increase in parasitic capacitance at the input terminal due to junctions, compared to the conventional diodes in which the cathodes are connected to the input terminal as shown in FIG. 14. Therefore, as shown in the Bode diagram in FIG. 5, the phase margin, which is an indicator of stability, does not deteriorate in this embodiment. In FIG. 5, the horizontal axis represents the logarithm of frequency, and the vertical axis represents gain or phase margin, with the dotted line representing the conventional characteristics (FIG. 14) and the solid line representing the characteristics of this embodiment. It can be seen that in this embodiment, the phase margin at a gain of 0 dB is larger than in the conventional case. Furthermore, by connecting the cathodes of diodes 31 and 32 of the second protection circuit to an internal node of the first protection circuit 1, the number of diodes required to configure the protection circuit 30 can be reduced compared to the conventional case, enabling the protection function to be achieved in a smaller area.

[0022] (Variation) Fig. 6 is a diagram showing a differential amplifier in which the configuration mainly consisting of a PNP differential pair in Fig. 1 has been changed to a configuration mainly consisting of an NPN differential pair, and Fig. 7 is a diagram showing a differential amplifier in which the configuration mainly consisting of a PNP differential pair in Fig. 2 has been changed to a configuration mainly consisting of an NPN differential pair. In both cases, the common emitter node that is in a floating state has been changed to the PNP differential pair side (reference numeral 9b), and the tail current source 12 has been changed to the NPN differential pair side. Even in such cases, the same effects as those of the protection circuit in the first and second embodiments can be obtained.

[0023] (Third embodiment) A third embodiment will be described with reference to FIG. 8. In FIG. 8, PNP transistors 15 and 16, NPN transistors 17 and 18, and current loads 13 and 14 are added to the differential amplifier with an input rail-to-rail configuration in FIG. 2 to form a folded-cascode differential amplifier. The signal is amplified by amplifier 20, and output terminal 23 is connected to inverting input terminal 3 to form a voltage follower. Switch 8 is formed by a PNP transistor with a predetermined bias applied to its base, and is placed between transistor 10, which is current-mirror connected to transistor 11, and current source 12. 19 denotes a phase compensation capacitor. The differential amplifier of this embodiment is configured so that a PNP differential pair primarily operates.

[0024] When a rising pulse is input and the PNP differential pair is in an operating state and the NPN differential pair is in an inoperable state, current I1 from tail current source 12 should normally flow entirely through one of the transistors, so the current flowing to the PNP differential pair's current load 14 is (I1 + I2). The maximum value of current I3 discharged by the internal phase compensation capacitor 19 (capacitance Cc) is limited by I1, and the slew rate can be expressed as I1 / Cc. 8, the potential of the common emitter node 9a of the NPN differential pair is determined by the anti-parallel diode of the first protection circuit 1 and the second protection circuit 30, which is composed of diodes 31 and 32, and the NPN differential pair momentarily enters an active state, causing current I2' to flow. As a result, the current flowing to current load 14 of the PNP differential pair becomes (I1 + I2 - I2'), and the current I3 discharged from the capacitor becomes (I1 + I2'). Therefore, the slew rate can be expressed as (I1 + I2') / Cc, which is higher than in the conventional case. When a falling pulse is input, the maximum value of the current I3 that charges the internal phase compensation capacitor 19 (capacitance Cc) is normally limited by I1, and the slew rate can be expressed as I1 / Cc. However, in the case of the circuit in Figure 9, the current I3 charged by the capacitor is (I1+I2'), and the slew rate is expressed as (I1+I2') / Cc, just like in the case of a rising pulse.

[0025] Figure 10 is a graph showing the circuit's slew rate, with the thin line representing the input pulse, the thick line representing the output waveform of the circuit in Figure 8, and the dotted line representing the output waveform of the circuit in Figure 8 minus the second protection circuit. As shown in the figure, in the range of approximately 3V to 7V (labeled "Slew Boost" in the figure) before and after the active differential pair switches, the slope of the solid line is steeper than the slope of the dotted line, indicating that the second protection circuit improves the slew rate. However, because a VBE sufficient to turn on the NPN differential pair is required, a large-amplitude input is required so that this range is at least several volts. Furthermore, this effect can be achieved without increasing current consumption in the steady state.

[0026] Although the preferred embodiments of the present invention have been described in detail above, various modifications and variations of the present invention can be made within the scope of the present invention. In some embodiments, only diodes are used as the second protection circuit. However, the protection circuit may also be configured with diodes and resistors connected in series with the diodes. In this case, the resistors connected in series in the current path limit the current, thereby preventing large currents from flowing between the base and emitter of the differential pair. The resistors may be inserted between the common emitter node and the anodes of the diodes, or between the cathodes of the diodes and an internal node of the first protection circuit. One of the resistors may have one end connected to the common emitter node, and the other end connected commonly to the anodes of the two diodes in the second protection circuit.

[0027] Furthermore, although the third embodiment has been described using a voltage follower as an example, it is also applicable to various other circuits as an operational amplifier using a rail-to-rail folded cascode differential amplifier. In some embodiments, the first protection circuit includes six diodes and the second protection circuit includes two diodes. However, these numbers may be arbitrary. However, while the first protection circuit forms a current path between the input terminals using series-connected diodes, the other current path between the input terminals also passes through the base-emitter junctions of the differential pair, the common emitter node, the second protection circuit, and a portion of the first protection circuit. Therefore, if the total number of diodes forming the current path from the common emitter node to the input terminal is equal to the number of series-connected anti-parallel diodes of the first protection circuit minus one, the number of diodes (including equivalent diodes) forming the current paths between the two input terminals can be made equal. This allows the clamp voltages of the first protection circuit and the second protection circuit to be set equal, preventing the second protection circuit from turning on first and excessive current from flowing between the bases and emitters of the differential pair, thereby avoiding damage to the differential pair transistors and preventing degradation of the differential amplifier's characteristics. [Explanation of symbols]

[0028] 1: first protection circuit, 2: non-inverting input terminal, 3: inverting input terminal, 4, 5, 10', 11', 15, 16: PNP transistor, 6, 7, 10, 11, 17, 18: NPN transistor, 8: switch, 9a, 9b: common emitter node, 12: current source, 13, 14: current load, 20: amplifier, 21, 22: protection circuit, 23: output terminal, 30: second protection circuit, 31, 32: diode

Claims

1. a first protection circuit connected between an inverting input terminal and a non-inverting input terminal of a rail-to-rail differential amplifier that switches between differential pairs of different conductivity types using a switch, and that clamps the voltage between the inverting input terminal and the non-inverting input terminal to a set arbitrary voltage when excessive input is applied to these two input terminals; a second protection circuit connected between an internal node of the first protection circuit and a common emitter node of the differential pair of one conductivity type of the differential amplifier, and capable of forming a current path from the common emitter node to the inverting input terminal or the non-inverting input terminal when a voltage exceeding a reverse breakdown voltage is applied to the differential pair of the one conductivity type; A protection circuit for a differential amplifier, comprising:

2. the first protection circuit is composed of an anti-parallel diode in which a series connection circuit of a plurality of diodes is connected in anti-parallel between the non-inverting input terminal and the inverting input terminal; The second protection circuit comprises at least one diode having one terminal connected to the common emitter node of the differential pair of one conductivity type and the other terminal connected to an internal node of the anti-parallel diode.

2. The protection circuit for a differential amplifier according to claim 1.

3. When a voltage exceeding a reverse breakdown voltage is applied to either of the differential pairs, a part of the anti-parallel diode of the first protection circuit and the diode of the second protection circuit can form a current path from the common emitter node to the inverting input terminal or the non-inverting input terminal.

3. The protection circuit for a differential amplifier according to claim 2.

4. the differential amplifier mainly switches a PNP differential pair that is one of the differential pairs of different conductivity types, The anode of the diode of the second protection circuit is connected to the common emitter of the NPN differential pair that is the other of the differential pairs of different conductivity types, and the cathode of the diode is connected to the internal node of the anti-parallel diode of the first protection circuit.

4. The protection circuit for a differential amplifier according to claim 3.

5. the differential amplifier mainly switches an NPN differential pair that is one of the differential pairs of different conductivity types, The cathode of the diode of the second protection circuit is connected to the common emitter of the PNP differential pair that is the other of the differential pairs of different conductivity types, and the anode of the diode is connected to the internal node of the anti-parallel diode of the first protection circuit.

4. The protection circuit for a differential amplifier according to claim 3.

6. when a voltage exceeding a reverse breakdown voltage is applied to either of the differential pairs, a part of the anti-parallel diode of the first protection circuit and the diode of the second protection circuit form a current path from the common emitter node to the inverting input terminal or the non-inverting input terminal; The total number of the part of the anti-parallel diodes of the first protection circuit that form the current path and the diodes of the second protection circuit is equal to the number of the anti-parallel diodes of the first protection circuit that are connected in series minus 1.

4. The protection circuit for a differential amplifier according to claim 3.

7. a current source that supplies a tail current is connected to each common emitter node of the differential pairs of different conductivity types; the current source connected to the common emitter node of the differential pair of one conductivity type is a transistor that uses a current flowing in a current source connected to the common emitter node of the differential pair of the other conductivity type as a reference current and flows a current that is a copy of the reference current in a current mirror; the switch is disposed between a transistor current-mirror-connected to the transistor and a current source connected to a common emitter node of the differential pair of the other conductivity type; The differential amplifier is configured as a folded cascode type differential amplifier.

7. An operational amplifier comprising the protection circuit for a differential amplifier according to claim 1.

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