MANUFACTURING METHOD FOR SiGe SUBSTRATE, AND SiGe SUBSTRATE

Abstract

To provide a manufacturing method for a SiGe substrate with a reverse inclination buffer structure, in which a cross-hatch defect is reduced while the deterioration such as film separation of a buffer layer or dust emission is suppressed, and also provide the SiGe substrate.SOLUTION: A manufacturing method for a SiGe substrate for forming a SiGe layer on a silicon substrate by epitaxial growth includes the steps of: forming a Si1-xGex layer (0.3<x≤0.7) as a first SiGe layer on the silicon substrate; forming a Si1-yGey layer (0<y<0.04) as a second SiGe layer on the first SiGe layer; and forming a Si1-zGez layer (0<z<1) as a third SiGe layer on the second SiGe layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a SiGe substrate and a SiGe substrate. [Background technology]

[0002] SiGe and Ge are materials widely used in various devices such as electronic, optical, and RF devices. In particular, SiGe is a material that plays an important role in the manufacturing processes of GAA (Gate All Around) and CFET (Complementary Field Effect Transistor), which stacks NMOS and CMOS, proposed for next-generation semiconductors, replacing the fin structure currently used in logic ICs (Non-Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-178975 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-053545 [Patent Document 3] Japanese Patent Application Laid-Open No. 2000-021783 [Non-patent literature]

[0004] [Non-Patent Document 1] The Japan Society of Applied Physics Industry-Academia Collaboration Committee on Semiconductor Crystal Growth, Processing, and Evaluation, 1st Workshop "Crystal Technology Supporting the Revival of Semiconductors" [Non-patent document 2] Yonenaga, "Growth of high-quality SiGe crystals and elucidation of their fundamental properties," Material, 47(1), 3(2008) [Non-patent document 3] Sato, "Fundamentals and Challenges of Heteroepitaxy: 1st Workshop on 3C-SiC Technology for IoT in Harsh Environments" (2019) [Non-patent document 4] Wong, LH “Strain relaxation in SiGe / Si heteroepitaxy.” Doctoral thesis, Nanyang Technological University, Singapore, (2007). [Non-Patent Document 5] EAFitgerald, et.al., “Totally relaxed GexSi1-x layers with low threading dislocation densities grows on Si substrares”, App. Phys. Lett., 59, 811 (1991). [Non-patent document 6] FKLeGeues, et.al., “Mechanism and conditions for anomalous strain relaxation in graded thin films and superlattices”, App.Phys.Lett., 71, 4230 (1992). [Non-Patent Document 7] T.Taniguchi,et.al.,Abst.of SAP Spring Meeting.,17a-F102-9(2018). [Non-patent document 8] T.Taniguchi,et.al.,Abst.of JSAP Autumn Meeting.,20p-234-10(2018). [Non-Patent Document 9] VAShah,et.al.,J.Appl.Phys.,107,064304(2010). Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the equilibrium phase diagram, the liquidus and solidus of SiGe are far apart, and the distribution coefficient is 2 to 5, which is greater than 1, making it known that it is prone to polycrystallization. Even if single crystals can be grown, the growth rate is slow and it is difficult to grow them consistently (Non-Patent Document 2).

[0006] Therefore, for semiconductor devices, SiGe is grown on Si substrates, sometimes referred to as virtual SiGe substrates. In this SiGe growth (heteroepitaxial), the key issue is how to mitigate the difference in lattice constants between Si and Ge. The lattice constant of Si crystals is 0.5431 nm, while that of Ge crystals is 0.56754 nm, resulting in a difference of approximately 4.5%. To mitigate this difference in lattice constants, SiGe uses a SiGe alloy. If the Ge composition ratio is x, the lattice constant of the SiGe alloy is 0.5431 nm + x × 0.02 nm + x squared × 0.0027 nm. For example, if x is 0.3, the lattice constant is 0.5493 ​​nm, resulting in a minimal lattice mismatch of 0.14%. This lattice mismatch can cause dislocations and defects to develop in the subsequently grown epitaxial layer, resulting in degradation of quality. However, it is believed that there is a critical thickness, and even if there is lattice mismatch, defects will not occur unless the critical thickness is exceeded (Non-Patent Document 3).

[0007] Therefore, various intermediate layers have been proposed that utilize this critical thickness to form a buffer layer. For example, there is a method in which the Ge concentration is varied from the silicon substrate to a SiGe layer with a predetermined Ge concentration, which is called a graded buffer layer (Non-Patent Documents 4, 5, 6). Another method has been proposed, which involves stacking multiple layers with thicknesses below the critical thickness, called a superlattice buffer layer (Non-Patent Documents 6, 7, 8).

[0008] In addition to these techniques, a reverse-graded buffer structure has also been proposed (Non-Patent Document 9). This is the opposite of the above-mentioned graded buffer layer, in that SiGe (or Ge) with a high Ge composition is grown on a Si substrate, and then the concentration is decreased toward the surface. This reverse-graded buffer structure is a method in which point defects are introduced at the interface between the silicon and SiGe layer by a high-concentration Ge layer, and these defects cause lattice relaxation.

[0009] In Patent Document 1, "a first Si is formed on a substrate whose surface is made of silicon. 1-α Ge αfilm, a first cap film, and a second Si 1-β Ge β A first Si film (β<α≦1) and a second cap Si film are formed in this order. 1-α Ge α The film is a second Si 1-β Ge β "A semiconductor device characterized in that it has a lattice-relaxed lattice constant in the horizontal plane direction equivalent to that of the film" (Claim 1 of Patent Document 1) is disclosed.

[0010] Patent Document 2 states that "multiple Si layers with stepwise different lattice constants are formed on a P-type or N-type Si substrate. 1-x Ge x A semiconductor layer (where 0≦x≦0.95; the same applies below) is laminated on the Si substrate and the plurality of Si 1-x Ge x Si for stepwise matching of the lattice constant of the semiconductor layer 1-x Ge x a buffer layer forming step of forming a buffer layer; 1-x Ge x Si that generates compressive strain stress on the buffer layer 1-x Ge x a strain inversion layer forming step of forming a strain inversion layer; 1-x Ge x Si is placed on the semiconductor layer to absorb external light and generate carriers. 1-x Ge x and a light absorbing layer forming step of forming a light absorbing layer, wherein a single-crystal SiGe layer is produced on the Si substrate, in which the buffer layer, the strain inversion layer, and the light absorbing layer, each of which has the same conductivity type as the Si substrate, are stacked" (Claim 1 of Patent Document 2).

[0011] Furthermore, Patent Document 3 discloses a method for forming a non-doped Ge transition conversion layer having an uneven surface on a p-type Si substrate, the layer being approximately 1 nm thick, and a relaxed non-doped Si 0.7 Ge 0.3 Buffer layer (50 nm), n-type Si 0.7 Ge 0.3 Carrier supply layer, non-doped Si 0.7 Ge 0.3Spacer layer, undoped strained Si channel layer 10 nm, undoped Si 0.7 Ge 0.3 A method for manufacturing a substrate having a cap layer 20 nm and an undoped strained Si cap layer 2 nm sequentially laminated thereon and a strained semiconductor layer to which tensile strain or compressive strain is applied is described.

[0012] Thus, various methods for forming a SiGe epitaxial film on a silicon substrate have been studied. However, in an inverse-inclined buffer structure having a high-concentration Ge composition on the Si substrate side, first, the high-concentration Ge causes problems in subsequent processes. Particularly when the Ge composition is close to 100%, it is etched by an alkaline composition solution such as SC1 cleaning, resulting in film peeling from this buffer portion and becoming a dust generation source.

[0013] <00\\00192>The present invention has been made to solve the above problems, and in a method for manufacturing a SiGe substrate having an inverse-inclined buffer structure, while suppressing deterioration such as film peeling and dust generation of the buffer layer, it aims to provide a method for manufacturing a SiGe substrate that reduces cross-hatch defects generated due to the difference in lattice constants between a silicon substrate and a SiGe film, and a SiGe substrate.

Means for Solving the Problems

[0014] The present invention has been made to achieve the above object, and is a method for manufacturing a SiGe substrate in which a SiGe layer is formed by epitaxial growth on a silicon substrate. A Si 1-x Ge x layer (0.3 < x ≤ 0.7) is formed as a first SiGe layer on the silicon substrate, and a Si 1-y Ge y layer (0 < y < 0.04) is formed as a second SiGe layer on the first SiGe layer, and a Si 1-z Ge z layer (0 < z < 1) is formed as a third SiGe layer on the second SiGe layer. A method for manufacturing a SiGe substrate characterized by having these steps is provided.

[0015] According to such a method for manufacturing a SiGe substrate, it is possible to reduce cross-hatch defects while suppressing deterioration such as film peeling or dust generation of the buffer layer (SiGe layer).

[0016] At this time, the thicknesses of the first and second SiGe layers can be set to 1 nm or more and 100 nm or less.

[0017] Thereby, more point defects necessary for relaxing the lattice constant difference between the Si substrate and the SiGe layer can be introduced by the first SiGe layer having a high Ge composition.

[0018] At this time, as the second SiGe layer, a Si 1-y Ge y layer (0 < y < 0.02) can be formed.

[0019] Thereby, cross-hatch defects on the surface of the SiGe layer can be further reduced.

[0020] At this time, as the third SiGe layer, a Si 1-z Ge z layer (0.1 ≤ z ≤ 0.35) can be formed.

[0021] Thereby, a SiGe substrate suitable for semiconductor devices can be manufactured.

[0022] At this time, the warp of the first SiGe substrate manufactured by the method for manufacturing the SiGe substrate is measured, and a second SiGe substrate having the same structure as the first SiGe substrate is manufactured using a silicon substrate warped in the direction opposite to the direction of the warp.

[0023] Thereby, a SiGe substrate with reduced cross-hatch defects and relaxed warp can be manufactured.

[0024] Further, the present invention is made to achieve the above object, and includes a silicon substrate and a composition formula on the silicon substrate being Si 1-x Ge xa first SiGe layer where (0.3 < x ≤ 0.7), and Si with a composition formula on the first SiGe layer 1-y Ge y a second SiGe layer where (0 < y < 0.04), and Si with a composition formula on the second SiGe layer 1-z Ge z and a third SiGe layer where (0 < z < 1), provided is a SiGe substrate characterized by having these layers.

[0025] According to such a SiGe substrate, deterioration such as film peeling and dust generation of the buffer layer (SiGe layer) and cross-hatch defects are reduced.

[0026] At this time, the thicknesses of the first and second SiGe layers can be set to be 1 nm or more and 100 nm or less.

[0027] As a result, the first SiGe layer with a high Ge composition contains more point defects necessary for relaxing the lattice constant difference between the Si substrate and the SiGe layer.

[0028] At this time, the composition formula of the second SiGe layer can be set to be Si 1-y Ge y (0 < y < 0.02).

[0029] As a result, the cross-hatch defects on the surface of the SiGe layer are further reduced.

[0030] At this time, the composition formula of the third SiGe layer can be set to be Si 1-z Ge z (0.1 ≤ z ≤ 0.35).

[0031] As a result, it becomes a SiGe substrate suitable for semiconductor devices. <​​​​​As described above, according to the method for manufacturing a SiGe substrate of the present invention, it is possible to reduce cross-hatch defects while suppressing deterioration such as film peeling and dust generation in the buffer layer, thereby enabling the production of a high-quality SiGe substrate. Further, according to the SiGe substrate of the present invention, deterioration such as film peeling and dust generation in the buffer layer and cross-hatch defects are reduced, thereby resulting in a high-quality SiGe substrate.

Brief Description of the Drawings

[0033] [Figure 1] A schematic diagram of an example of a SiGe substrate according to the present invention is shown. [Figure 2] Observation views of the SiGe substrate surface of the example results ((a) example, (b) comparative example) are shown.

Modes for Carrying Out the Invention

[0034] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0035] As described above, in the method for manufacturing a SiGe substrate having an inverse-tapered buffer structure, there has been a demand for a method for manufacturing a SiGe substrate and a SiGe substrate that can reduce cross-hatch defects while suppressing deterioration such as film peeling and dust generation in the buffer layer.

[0036] As a result of intensive studies on the above problems, the present inventors have found a method for manufacturing a SiGe substrate in which a SiGe layer is formed by epitaxial growth on a silicon substrate, and a Si 1-x Ge x layer (0.3 < x ≤ 0.7) is formed as the first SiGe layer on the silicon substrate, and a Si 1-y Ge y layer (0 < y < 0.04) is formed as the second SiGe layer on the first SiGe layer, and a Si 1-z Ge zA method for manufacturing a SiGe substrate, comprising a step of forming a layer (0 < z < 1), has been found to be capable of reducing cross-hatch defects while suppressing deterioration such as film peeling and dust generation of a buffer layer, and the present invention has been completed.

[0037] As a result of intensive studies on the above problems, the present inventors have also found that a silicon substrate and a first SiGe layer having a composition formula of Si 1-x Ge x (0.3 < x ≤ 0.7) on the silicon substrate, a second SiGe layer having a composition formula of Si 1-y Ge y (0 < y < 0.04) on the first SiGe layer, and a third SiGe layer having a composition formula of Si 1-z Ge z (0 < z < 1) on the second SiGe layer. A SiGe substrate having such a structure has been found to reduce deterioration such as film peeling and dust generation of a buffer layer (SiGe layer) and cross-hatch defects, and the present invention has been completed.

[0038] [SiGe Substrate] Hereinafter, the SiGe substrate according to the present invention will be described with reference to FIG. 1.

[0039] As shown in FIG. 1, a SiGe substrate 1 according to the present invention includes a silicon single crystal substrate 2 and a first SiGe layer 3 having a composition formula of Si 1-x Ge x (0.3 < x ≤ 0.7) on the silicon single crystal substrate 2, a second SiGe layer 4 having a composition formula of Si 1-y Ge y (0 < y < 0.04) on the first SiGe layer 3, and a third SiGe layer 5 having a composition formula of Si 1-z Ge z (0 < z < 1) on the second SiGe layer 4. Such a SiGe substrate 1 in which a SiGe layer is formed on a silicon single crystal substrate 2 may be called a virtual SiGe substrate.

[0040] By suppressing the Ge composition ratio of the first SiGe layer 3 to 0.7 or less in this way, the SiGe substrate 1 contains point defects necessary for reducing the lattice constant difference, while suppressing deterioration such as film peeling and dust generation of the buffer layer during SC1 cleaning, etc. As a result, the SiGe substrate 1 is of high quality with reduced crosshatch defects on the surface.

[0041] When a first SiGe layer 3 with a high Ge concentration is grown on a silicon single crystal substrate 2, dislocations occur due to the influence of lattice mismatch. However, these dislocations cause lattice relaxation. Therefore, a second SiGe layer 4 with a low Ge concentration is grown on this lattice-relaxed first SiGe layer 3 to suppress dislocations.

[0042] In this case, the thickness of the first and second SiGe layers can be set to 1 nm or more and 100 nm or less. As a result, the first SiGe layer 3, which has a high Ge concentration, contains a larger number of the point defects.

[0043] At this time, the composition formula of the second SiGe layer 4 is Si 1-y Ge y (0 <y<0.02)であるものとすることができる。 This further reduces crosshatch defects on the surface of the SiGe layer.

[0044] At this time, the composition formula of the third SiGe layer 5 is Si 1-z Ge z It can be assumed that (0.1≦z≦0.35). This makes the SiGe substrate more suitable for semiconductor devices.

[0045] The specifications of the silicon single crystal substrate 2 are not particularly limited, but for example, a substrate having a diameter of 300 mm, a plane orientation of {100}, P-type (boron doped), and a resistivity of 10 Ω·cm can be used.

[0046] [SiGe substrate manufacturing method] Next, a method for producing a SiGe substrate according to the present invention will be described. The method for manufacturing a SiGe substrate according to the present invention is a method for manufacturing a SiGe substrate 1 in which a SiGe layer is formed by epitaxial growth using a CVD apparatus, and Si as a first SiGe layer 3 is formed on a silicon single crystal substrate 2 1-x Ge x layer (0.3 < x ≤ 0.7), a step of forming a Si 1-y Ge y layer (0 < y < 0.04) as a second SiGe layer 4 on the first SiGe layer 3, and a step of forming a Si 1-z Ge z layer (0 < z < 1) as a third SiGe layer 5 on the second SiGe layer 4.

[0047] By thus suppressing the Ge composition ratio of the first SiGe layer 3 to 0.7 or less, it is possible to manufacture a SiGe substrate 1 that suppresses deterioration such as film peeling and dust generation of the buffer layer during SC1 cleaning while introducing point defects necessary for relaxing the lattice constant difference. As a result, it becomes possible to manufacture a high-quality SiGe substrate 1 with reduced cross-hatch defects on the surface.

[0048] When growing the third SiGe layer, a SiGe layer with a predetermined concentration may be grown immediately, or it may be grown stepwise or continuously as a graded composition. It is also possible to take a superlattice structure.

[0049] At this time, the thicknesses of the first and second SiGe layers can be set to 1 nm or more and 100 nm or less. Thereby, more point defects necessary for relaxing the lattice constant difference between the Si substrate and the SiGe layer can be introduced by the first SiGe layer 3 having a high Ge composition.

[0050] At this time, a Si 1-y Ge y layer (0 < y < 0.02) can be formed as the second SiGe layer. Thereby, the cross-hatch defects on the surface of the SiGe layer can be further reduced.

[0051] At this time, the third SiGe layer is Si 1-z Ge z A layer (0.1≦z≦0.35) can be formed. This makes it possible to fabricate a SiGe substrate that is more suitable for semiconductor devices.

[0052] The SiGe layer can be grown under the following conditions and with the following apparatus. Equipment: Low-pressure CVD equipment compatible with 300mm diameter wafers Pressure: 1~100 Torr Raw materials: monosilane or dichlorosilane as the Si source, monogermane or germanium tetrachloride as the Ge source ·Temperature: 600~800℃

[0053] The method using a reverse gradient buffer structure, such as the SiGe substrate fabrication method according to the present invention, introduces point defects into the interface between the silicon substrate and the SiGe layer (the first SiGe layer 3, which has a high Ge concentration) using a high-concentration Ge layer, and causes lattice relaxation through these defects, which can result in significant warping of the wafer.

[0054] Therefore, it is preferable to mitigate the problem of warpage by first fabricating a SiGe substrate with a desired structure, determining the amount of warpage, preparing a substrate warped in an inverse shape, and then depositing a film of the same structure on the substrate. In other words, the warpage of a first SiGe substrate fabricated by the SiGe substrate fabrication method described above can be measured, and a second SiGe substrate having the same structure as the first SiGe substrate can be fabricated using a silicon substrate warped in the opposite direction to the warpage. This makes it possible to fabricate a SiGe substrate with reduced crosshatch defects and less warpage.

[0055] When growing the SiGe substrate in this way, the amount of warpage of the starting Si substrate is measured in advance, and the difference between this and the warpage of the wafer after growth can be calculated to determine the amount of warpage due to film formation. Furthermore, when fabricating a SiGe substrate, the problem of warpage due to the reverse gradient buffer layer can be avoided by preparing a substrate that is warped in the opposite direction to the warpage direction and then forming films on it. [Example]

[0056] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0057] (Example) A boron-doped single-crystal silicon substrate with a (100) crystal plane orientation, a diameter of 300 mm, and a resistivity of 10 Ω·cm was prepared. The warpage was measured to be −3 μm beforehand, and the silicon substrate was then placed in a low-pressure CVD reactor.

[0058] SiH2Cl2 gas was supplied to the silicon substrate at 500 sccm and GeH4 gas at 1500 sccm, and a 100 nm Si film was grown at a growth temperature (substrate temperature) of 610°C under 1333 Pa (10 Torr). 1-x Ge x A layer (x=0.7) was grown.

[0059] Next, SiH2Cl2 gas was supplied at 1900 sccm and GeH4 gas at 50 sccm, and a 100 nm Si substrate was grown at a growth temperature (substrate temperature) of 610°C under 1333 Pa (10 Torr). 1-y Ge y A layer (y=0.02) was grown.

[0060] Subsequently, SiH2Cl2 gas and GeH4 gas were supplied at 1000 sccm each, and the growth temperature (substrate temperature) was kept at 610 °C for 60 min at 1333 Pa (10 Torr). 1-z Ge z A layer (z=0.3) was grown on the SiGe substrate.

[0061] The warpage of the fabricated SiGe substrate was measured and found to be -50 μm.

[0062] Therefore, next, the silicon substrate was ground to a shape that was in line with the warp of the SiGe substrate by +55 μm in the opposite direction.

[0063] In a low-pressure CVD apparatus, SiH2Cl2 gas was supplied to the silicon substrate at 500 sccm and GeH4 gas at 1500 sccm, and a 100 nm Si film was grown at a growth temperature (substrate temperature) of 610°C under 1333 Pa (10 Torr). 1-x Ge x A layer (x=0.7) was grown.

[0064] Next, SiH2Cl2 gas was supplied at 1900 sccm and GeH4 gas at 50 sccm, and a 100 nm Si substrate was grown at a growth temperature (substrate temperature) of 610°C under 1333 Pa (10 Torr). 1-y Ge y A layer (y=0.02) was grown.

[0065] Subsequently, SiH2Cl2 gas and GeH4 gas were supplied at 1000 sccm each, and the pressure was 1333 Pa (10 Torr) and the growth temperature (substrate temperature) was 610 °C, and the temperature was maintained for 60 minutes to grow a 100 nm Si film. 1-z Ge z A layer (z=0.3) was grown on the SiGe substrate.

[0066] When the substrate surface was photographed using an optical microscope, it was found that crosshatch defects had been reduced, as shown in Figure 3(a). In addition, when the warpage of the fabricated SiGe substrate was measured, it was found to be controlled to +5 μm.

[0067] (Comparative Example) A single-crystal silicon substrate with a surface crystal orientation of (100), a diameter of 300 mm, doped with boron, and a resistivity of 10 Ω·cm was prepared. Using a low-pressure CVD apparatus, SiH2Cl2 gas and GeH4 gas were supplied to the silicon substrate at 1000 sccm each, and the substrate was kept at 1333 Pa (10 Torr) and a growth temperature (substrate temperature) of 610 °C for 60 minutes to grow a 100 nm Si substrate. 1-zGe z A SiGe layer (z = 0.3) was grown to fabricate a SiGe substrate.

[0068] When the surface of the fabricated SiGe substrate was imaged by an optical microscope, as shown in Fig. 3(b), there were a very large number of cross-hatch defects.

[0069] As described above, according to the embodiment of the present invention, the cross-hatch defects of the fabricated SiGe substrate could be reduced. Also, a high-quality SiGe substrate with warpage suppressed could be fabricated.

[0070] This specification includes the following aspects. [1]: A method for fabricating a SiGe substrate in which a SiGe layer is formed by epitaxial growth on a silicon substrate, the method including a step of forming a Si 1-x Ge x layer (0.3 < x ≤ 0.7) as a first SiGe layer on the silicon substrate, a step of forming a Si 1-y Ge y layer (0 < y < 0.04) as a second SiGe layer on the first SiGe layer, and a step of forming a Si 1-z Ge z layer (0 < z < 1) as a third SiGe layer on the second SiGe layer. [2]: The method for fabricating a SiGe substrate according to [1] above, including setting the thicknesses of the first and second SiGe layers to be 1 nm or more and 100 nm or less. [[ID=3,2]]][3]: The method for fabricating a SiGe substrate according to [1] or [2] above, including forming a Si 1-y Ge y layer (0 < y < 0.02) as the second SiGe layer. [4]: The method for fabricating a SiGe substrate according to [1], [2], or [3] above, including forming a Si 1-z Ge z layer (0.1 ≤ z ≤ 0.35) as the third SiGe layer. [5]: Measure the warp of the first SiGe substrate fabricated by the method for fabricating an SiGe substrate of [1], [2], [3], or [4] above, and use a silicon substrate warped in the direction opposite to the direction of the warp to fabricate a second SiGe substrate having the same structure as the first SiGe substrate, which is included in the method for fabricating an SiGe substrate of [1], [2], [3], or [4] above. [6]: A silicon substrate and a first SiGe layer having a composition formula of Si 1-x Ge x (0.3 < x ≤ 0.7) on the silicon substrate, and a second SiGe layer having a composition formula of Si 1-y Ge y (0 < y < 0.04) on the first SiGe layer, and a third SiGe layer having a composition formula of Si 1-z Ge z (0 < z < 1) on the second SiGe layer, which includes an SiGe substrate having the above. [7]: The SiGe substrate of [6] above, wherein the thicknesses of the first and second SiGe layers are 1 nm or more and 100 nm or less. [8]: The SiGe substrate of [6] or [7] above, wherein the composition formula of the second SiGe layer is Si 1-y Ge y (0 < y < 0.02). [9]: The SiGe substrate of [6], [7], or [8] above, wherein the composition formula of the third SiGe layer is Si 1-z Ge z (0.1 ≤ z ≤ 0.35).

[0071] Note that the present invention is not limited to the above embodiments. The above embodiments are examples, and any configuration that has substantially the same structure as the technical idea described in the claims of the present invention and exhibits the same operational effects is included in the technical scope of the present invention.

Explanation of Reference Numerals

[0072] 1... SiGe substrate (virtual SiGe substrate), 2... single crystal silicon substrate, 3... first SiGe layer, 4... second SiGe layer, 5... third SiGe layer.

Claims

1. A method for manufacturing a SiGe substrate, which comprises forming a SiGe layer on a silicon substrate by epitaxial growth, the method comprising: A first SiGe layer is formed on the silicon substrate. １－ｘ Ge ｘ forming a layer (0.3<x≦0.7); A second SiGe layer is formed on the first SiGe layer. １－ｙ Ge ｙ forming a layer (0<y<0.04); A third SiGe layer is formed on the second SiGe layer. １－ｚ Ge ｚ and forming a layer (0<z<1) on the SiGe substrate.

2. 2. The method for producing a SiGe substrate according to claim 1, wherein the thickness of the first and second SiGe layers is set to 1 nm or more and 100 nm or less.

3. The second SiGe layer is Si １－ｙ Ge ｙ 2. The method for producing a SiGe substrate according to claim 1, further comprising forming a layer (0<y<0.02).

4. The third SiGe layer is Si １－ｚ Ge ｚ 2. The method for producing a SiGe substrate according to claim 1, further comprising forming a layer (0.1≦z≦0.35).

5. 5. The method for producing a SiGe substrate according to claim 1, further comprising measuring the warpage of a first SiGe substrate produced by the method for producing a SiGe substrate according to claim 1, and producing a second SiGe substrate having the same structure as the first SiGe substrate using a silicon substrate warped in a direction opposite to the direction of the warpage.

6. A silicon substrate; The composition formula on the silicon substrate is Si １－ｘ Ge ｘ a first SiGe layer (0.3<x≦0.7); The composition formula on the first SiGe layer is Si １－ｙ Ge ｙ a second SiGe layer (0<y<0.04); The composition formula on the second SiGe layer is Si １－ｚ Ge ｚ and a third SiGe layer (0<z<1).

7. 7. The SiGe substrate according to claim 6, wherein the first and second SiGe layers have a thickness of 1 nm to 100 nm.

8. The composition formula of the second SiGe layer is Si １－ｙ Ge ｙ 7. The SiGe substrate according to claim 6, wherein y satisfies the relationship 0<y<0.

02.

9. The composition formula of the third SiGe layer is Si １－ｚ Ge ｚ 9. The SiGe substrate according to claim 6, wherein z satisfies the relationship (0.1≦z≦0.35).

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