Semiconductor light-emitting element

Abstract

To provide a semiconductor light-emitting element of low consumption power even at a high-temperature operation.SOLUTION: A semiconductor light-emitting element includes a first semiconductor layer 12 disposed over a substrate 11 and including a nitride semiconductor of a first conductivity type, an active layer 15 disposed over the first semiconductor layer and including a nitride semiconductor containing Ga or In, an electron barrier layer 18 of a second conductivity type, which is different from the first conductivity type, disposed over the active layer 15 and including a nitride semiconductor containing at least Al, and a second semiconductor layer 19 disposed over the electron barrier layer 18 and including a nitride semiconductor of the second conductivity type. The electron barrier layer 18 includes an Al composition ratio increase region in which the Al composition ratio increases monotonically as getting closer to the second semiconductor layer. The impurity concentration maximum position of the second conductivity type in the electron barrier layer 18 is close to the active layer 15 than an intermediate position of the electron barrier layer 18 on the active layer 15 side and the position where the Al composition ratio of the electron barrier layer is the maximum in the Al composition ratio increase region.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor light emitting devices. [Background technology]

[0002] Recently, welding light sources and in-vehicle laser headlight light sources using semiconductor light emitting elements such as semiconductor laser elements as light sources have been attracting attention.

[0003] Metals such as gold and copper have a large absorption coefficient for light in the blue-violet to blue region with a wavelength of 405 nm to 450 nm, so a laser light source in the blue-violet to blue region is suitable as a light source for laser welding processing equipment that processes these metals.

[0004] Furthermore, if yellow light can be obtained by exciting a phosphor with blue laser light, it will be possible to obtain an ultra-high output white light source as a whole.

[0005] For these reasons, there is a demand for a nitride-based ultra-high power semiconductor laser device as a light source that can emit laser light in the blue-violet to blue wavelength range of 405 nm to 450 nm.

[0006] Here, semiconductor laser devices for the above applications are required to have long-term reliability of, for example, about 10,000 hours or more when operating at a high output of 3 watts or more.

[0007] To realize such a highly reliable ultra-high power semiconductor laser device, it is necessary to suppress self-heating during laser oscillation as much as possible, and therefore ultra-high power semiconductor laser devices must be able to operate at low operating current and voltage with ultra-low power consumption.

[0008] To achieve a low operating current, it is important to suppress the reactive current (i.e., leakage current) that occurs when electrons injected into the active layer are thermally excited due to self-heating of the device during high-temperature or ultra-high-power operation, and leak from the active layer to the p-type cladding layer.

[0009] As shown in Patent Documents 1 and 2, a configuration in which an electron barrier layer having a higher bandgap energy than the p-type cladding layer is disposed between the p-type cladding layer and the active layer is effective in suppressing the generation of leakage current. With such a configuration, even if electrons injected into the active layer are thermally excited, it becomes difficult for them to overcome the electron barrier layer with a high bandgap energy, making it possible to suppress the generation of leakage current. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-270971 [Patent Document 2] International Publication No. 2017 / 195502 Summary of the Invention [Problem to be solved by the invention]

[0011] For example, the structure of a semiconductor light-emitting device disclosed in Patent Document 1 will be described with reference to FIGS. 28A and 28B. FIG. 28A is a schematic diagram showing the layered structure of the semiconductor light-emitting device disclosed in Patent Document 1. FIG. 28B is a graph showing the band structure of the semiconductor light-emitting device disclosed in Patent Document 1. As shown in FIGS. 28A and 28B, in the semiconductor light-emitting device disclosed in Patent Document 1, an active layer 212 is sandwiched between an n-type layer 211 and a p-type layer 213. The n-type layer 211 has an n-side first nitride semiconductor layer 231b, an n-side second nitride semiconductor layer 232b, and a lower cladding layer 225. The p-type layer 213 has a p-side electron confinement layer 228, a p-side first nitride semiconductor layer 231a, a p-side second nitride semiconductor layer 232a, and an upper cladding layer 230. The active layer 212 includes well layers 201a and 201b and barrier layers 202a, 202b, and 202c.

[0012] 28B, a p-side electron confinement layer 228, which corresponds to an electron barrier layer and has a bandgap energy higher than that of the upper cladding layer 230, is disposed between the active layer 212 and the upper cladding layer 230. With this structure, even during high-temperature operation, electrons injected into the active layer 212 are less likely to leak into the upper cladding layer 230 due to the energy barrier of the p-side electron confinement layer 228 made of AlGaN.

[0013] However, an energy barrier formed on the valence band side of the p-side electron confinement layer 228 makes it difficult for holes to flow from the upper cladding layer 230 to the active layer 212, resulting in an increase in operating voltage.

[0014] Next, the semiconductor light-emitting device disclosed in Patent Document 2 will be described with reference to FIG. 29. FIG. 29 is a schematic diagram showing the bandgap energy distribution of the semiconductor light-emitting device disclosed in Patent Document 2. The semiconductor light-emitting device disclosed in Patent Document 2 includes an n-type AlGaN cladding layer 412, a second optical guiding layer 413, a third optical guiding layer 414, a multiple quantum well active layer 415, a first optical guiding layer 416, a GaN intermediate layer 417, an electron barrier layer 418, and a p-type AlGaN cladding layer 419. As shown in FIG. 29, Patent Document 2 gradually changes the Al composition ratio at the interface of the AlGaN electron barrier layer 418 on the active layer 415 side. This allows polarization charges formed at the interface due to the piezoelectric effect to be dispersed to the region where the Al composition ratio changes, thereby reducing changes in the band structure due to the polarization charges in the electron barrier layer 418 and achieving a lower operating voltage.

[0015] Here, by gradually increasing the Al composition ratio on the n-type cladding layer side of the electron barrier layer 418 from the active layer side toward the p-type AlGaN cladding layer 419 side, it is possible to gradually change the polarization charge and the band gap. At this time, if the change in the band structure of the valence band due to the polarization charge can be offset with the change in band gap energy, it is possible to increase the energy barrier for electrons while suppressing the increase in the energy barrier for holes in the electron barrier layer 418. Therefore, it is possible to suppress the increase in operating voltage caused by using the electron barrier layer 418.

[0016] However, as mentioned above, there is a demand for ultra-high-power semiconductor laser elements capable of long-term operation of 10,000 hours or more at high temperatures and high power output for laser welding processing light sources and vehicle headlight light sources, and it is therefore necessary to reduce their power consumption as much as possible.

[0017] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor light-emitting device that consumes low power even when operated at high temperatures and high power outputs. [Means for solving the problem]

[0018] In order to solve the above problems, a semiconductor light-emitting element according to one aspect of the present disclosure includes: a first semiconductor layer disposed above a substrate and including a nitride-based semiconductor of a first conductivity type; an active layer disposed above the first semiconductor layer and including a nitride-based semiconductor containing Ga or In; an electron barrier layer disposed above the active layer and including a nitride-based semiconductor containing at least Al; and a second semiconductor layer disposed above the electron barrier layer and including the nitride-based semiconductor of the second conductivity type, wherein the electron barrier layer has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer, and a position of maximum concentration of the second conductivity type impurity in the electron barrier layer is closer to the active layer than an intermediate position between a position in the Al composition ratio increasing region where the Al composition ratio of the electron barrier layer is maximum and an interface of the electron barrier layer on the active layer side.

[0019] In the semiconductor light-emitting device according to the present disclosure, the surface density of polarization charges formed in the electron barrier layer gradually increases from the interface with the active layer toward the second semiconductor layer up to the position where the Al composition ratio is maximum. In this case, since the magnitude of polarization charges per unit volume is proportional to the rate of change of the surface density of polarization charges, positive polarization charges are formed in the electron barrier layer, the magnitude of which increases in accordance with the rate of change of the Al composition ratio of the electron barrier layer, from the interface with the active layer toward the second semiconductor layer.

[0020] On the other hand, in an electron barrier layer with a constant Al composition ratio in the stacking direction, the surface density of polarization charge changes stepwise at the interface of the electron barrier layer on the active layer side, and the polarization charge density formed at this interface converted to a value per unit volume is an extremely large delta function-like value.

[0021] In the electron barrier layer according to the present disclosure, the Al composition ratio monotonically increases in the stacking direction from the active layer side to the position where it reaches a maximum, which reduces the volume density of positive polarization charges generated at the interface between the electron barrier layer and the active layer. Electrons are attracted to the interface of the electron barrier layer on the active layer side to satisfy the electrical neutrality condition.

[0022] Furthermore, in the electron barrier layer according to the present disclosure, the position where the concentration of the second conductivity type impurity in the electron barrier layer is maximum is closer to the active layer than the midpoint between the position where the Al composition ratio of the electron barrier layer is maximum in the Al composition ratio increased region and the interface of the electron barrier layer on the active layer side.

[0023] For example, when the electron barrier layer is a p-type semiconductor layer, the distribution of negative charges due to ionized acceptors generated by doping with impurities becomes larger on the interface side of the active layer.

[0024] The negative charge of these ionized acceptors neutralizes the positive polarization charge at the interface of the electron barrier layer on the active layer side, reducing the concentration of electrons electrically induced at the interface. If the concentration of electrons electrically induced at the interface is high, the band potential in this region decreases, lowering the band potential of the valence band of the electron barrier layer and increasing the potential barrier against holes, resulting in an increase in operating voltage.

[0025] The structure of the present disclosure has the effect of reducing the concentration of electrons electrically induced at this interface, making it possible to suppress an increase in the operating voltage of the semiconductor light emitting device.

[0026] Furthermore, since the potential drop in the band structure in the valence band of the electron barrier layer can be suppressed, the conduction band relatively increases, and the generation of electrons leaking from the active layer to the second conductivity type (p-type) layer side across the electron barrier layer can be suppressed. This makes it possible to suppress leakage current even when the semiconductor light-emitting device is operated at high temperatures and high power output. In other words, the temperature characteristics of the semiconductor light-emitting device are improved.

[0027] The effect of neutralizing the polarization charge at the interface of the electron barrier layer on the active layer side by the ionized acceptors can be obtained by making the total doping amount of the impurities in the electron barrier layer the same as the total doping amount when the electron barrier layer is uniformly doped with impurities and relatively increasing the doping amount on the interface side of the electron barrier layer on the active layer side, by using the following distribution shape: That is, in the Al composition ratio increased region, the impurity concentration maximum position is located on the active layer side with respect to the midpoint between the position where the Al composition ratio of the electron barrier layer is maximum and the interface of the electron barrier layer on the active layer side.

[0028] This allows for low operating voltage characteristics to be obtained without increasing free carrier loss due to impurity doping in the electron barrier layer. It also effectively suppresses the phenomenon in which thermally excited electrons leak into the second semiconductor layer (i.e., electron overflow) during high-temperature, high-power operation.

[0029] As a result, compared to conventional semiconductor light-emitting devices, a semiconductor light-emitting device with a lower operating voltage and smaller leakage current can be realized. Furthermore, the total doping amount of impurities in the electron barrier layer can be made approximately the same as the total doping amount of the electron barrier layer in the case of a doping profile in which impurities are uniformly doped within the electron barrier layer (Comparative Example 2, described later), thereby suppressing an increase in waveguide loss. Therefore, the semiconductor light-emitting device according to the present disclosure can achieve low operating voltage characteristics while suppressing an increase in waveguide loss. This reduces self-heating of the semiconductor light-emitting device, thereby enabling a semiconductor light-emitting device with low power consumption even during high-temperature, high-output operation. [Effects of the Invention]

[0030] According to the present disclosure, it is possible to provide a semiconductor light emitting device that consumes low power even when operated at high temperatures and high power outputs. [Brief explanation of the drawings]

[0031] [Figure 1A] FIG. 1A is a schematic cross-sectional view showing a schematic configuration of a semiconductor light emitting device according to a first embodiment. [Figure 1B] FIG. 1B is a graph showing the conduction band energy distribution in the stacking direction of the active layer according to the first embodiment. [Figure 2] FIG. 2 is a schematic diagram showing the configuration of the electron barrier layer of the semiconductor light emitting device according to Comparative Example 1. As shown in FIG. [Figure 3] FIG. 3 is a schematic diagram showing the configuration of the electron barrier layer of the semiconductor light emitting devices according to the first embodiment and the second comparative example. [Figure 4] FIG. 4 is a schematic diagram showing the configuration of the electron barrier layer of the semiconductor light emitting device according to the second embodiment. [Figure 5] FIG. 5 is a diagram showing the results of a simulation of the band structure and charge distribution in the electron barrier layer according to the comparative example. [Figure 6] FIG. 6 is a diagram showing the results of a simulation of the band structure and charge distribution in the electron barrier layer according to the first embodiment. [Figure 7]FIG. 7 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio in the electron barrier layer according to the comparative example is made uniform in the stacking direction. [Figure 8] FIG. 8 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio in the electron barrier layer monotonically increases toward the second semiconductor layer in the stacking direction. [Figure 9] FIG. 9 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the film thickness of the electron barrier layer is 10 nm. [Figure 10] FIG. 10 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a first region and a second region. [Figure 11] FIG. 11 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a first region and a second region and has a film thickness of 10 nm. [Figure 12] FIG. 12 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio distribution in the electron barrier layer is upwardly convex. [Figure 13] FIG. 13 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio distribution in the electron barrier layer is upwardly convex. [Figure 14] FIG. 14 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the impurity concentration of the low impurity concentration region of the second semiconductor layer is changed. [Figure 15] FIG. 15 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the impurity concentration of the low impurity concentration region of the second semiconductor layer is changed. [Figure 16] FIG. 16 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a constant Al composition ratio region. [Figure 17] FIG. 17 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a constant Al composition ratio region and the increasing Al composition ratio region has a first region and a second region. [Figure 18]FIG. 18 is a diagram showing the relationship between the waveguide loss and the operating voltage and the impurity concentration and film thickness of the low impurity concentration region of the second semiconductor layer. [Figure 19] Figure 19 is a diagram showing the relationship between the waveguide loss and confinement factor of the semiconductor light-emitting element of embodiment 2 when the In composition ratio of the second optical guide layer and the third optical guide layer is 3%, and the film thickness of the second optical guide layer and the third optical guide layer. [Figure 20] Figure 20 is a diagram showing the relationship between the waveguide loss and confinement factor of the semiconductor light-emitting element of embodiment 2 when the In composition ratio of the second optical guide layer and the third optical guide layer is 5%, and the film thickness of the second optical guide layer and the third optical guide layer. [Figure 21] FIG. 21 is a diagram showing current-light output characteristics and current-voltage characteristics of the semiconductor light emitting device according to the first embodiment. [Figure 22A] FIG. 22A is a schematic cross-sectional view showing a schematic configuration of a semiconductor light emitting device according to the third embodiment. [Figure 22B] FIG. 22B is a graph showing the conduction band energy distribution in the stacking direction of the active layer according to the third embodiment. [Figure 23] FIG. 23 is a schematic diagram showing a band structure in a region near the well layer according to the third embodiment. [Figure 24] FIG. 24 is a diagram showing the relationship between the band structure and wave function of the semiconductor light emitting device according to the third embodiment and the film thickness of the composition gradient layer. [Figure 25] FIG. 25 is a graph showing the relationship between the In composition ratio of the barrier layer according to the third embodiment and the cross-correlation between the electron wave function and the hole wave function. [Figure 26A] FIG. 26A is a schematic cross-sectional view showing a schematic configuration of a semiconductor light emitting device according to the fourth embodiment. [Figure 26B] FIG. 26B is a graph showing the conduction band energy distribution in the stacking direction of the active layer according to the fourth embodiment. [Figure 27A] FIG. 27A is a schematic diagram showing the band structure and the state of carriers in the vicinity of the active layer of a semiconductor light emitting device according to a comparative example. [Figure 27B]FIG. 27B is a schematic diagram showing the band structure and the state of carriers in the vicinity of the active layer of the semiconductor light emitting device according to the fourth embodiment. [Figure 28A] FIG. 28A is a schematic diagram showing a layered structure of the semiconductor light emitting device disclosed in Patent Document 1. As shown in FIG. [Figure 28B] FIG. 28B is a graph showing the band structure of the semiconductor light-emitting device disclosed in Patent Document 1. [Figure 29] FIG. 29 is a schematic diagram showing the band gap energy distribution of the semiconductor light emitting device disclosed in Patent Document 2. In FIG. DETAILED DESCRIPTION OF THE INVENTION

[0032] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, and the arrangement and connection of the components shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Therefore, among the components in the following embodiments, components that are not described in the independent claims that represent the highest concept of the present disclosure will be described as optional components.

[0033] Furthermore, each figure is a schematic diagram and is not necessarily an exact representation. Therefore, the scales and the like do not necessarily match in each figure. In each figure, the same reference numerals are used to denote substantially the same components, and redundant explanations will be omitted or simplified.

[0034] In this specification, the terms "above" and "below" do not refer to the upward direction (vertically upward) and downward direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. Furthermore, the terms "above" and "below" are applied not only to cases where two components are arranged with a gap between them and another component exists between the two components, but also to cases where two components are arranged in contact with each other.

[0035] (Embodiment 1) [1-1. Overall Structure] The overall structure of the semiconductor light-emitting device according to Embodiment 1 will be described with reference to FIG. 1A. FIG. 1A is a schematic cross-sectional view showing the schematic structure of the semiconductor light-emitting device 100 according to the present embodiment.

[0036] The semiconductor light-emitting device 100 according to the present embodiment is a nitride-based semiconductor laser device. FIG. 1A shows a cross-section perpendicular to the resonance direction of the semiconductor light-emitting device 100.

[0037] As shown in FIG. 1A, the semiconductor light-emitting device 100 includes a substrate 11, a first semiconductor layer 12, an active layer 15, an electron barrier layer 18, and a second semiconductor layer 19. In the present embodiment, the semiconductor light-emitting device 100 further includes a first optical guide layer 13, a second optical guide layer 14, a third optical guide layer 16, an intermediate layer 17, a contact layer 20, a current blocking layer 30, an n-side electrode 31, and a p-side electrode 32.

[0038] The substrate 11 is a plate-like base on which each semiconductor layer of the semiconductor light-emitting device 100 is stacked. When the atomic composition ratio of In is x and the atomic composition ratio of Ga is y, the substrate 11 is x Ga y Al 1-x-y N (0 ≦ x < 1, 0 < y ≦ 1, 0 ≦ 1 - x - y ≦ 1). In the present embodiment, the substrate 11 is a GaN substrate.

[0039] The first semiconductor layer 12 is disposed above the substrate 11 and is a layer containing a nitride-based semiconductor of the first conductivity type. In the present embodiment, the first conductivity type is n-type. The first semiconductor layer 12 is composed of an n-type AlGaN layer with a film thickness of 1.5 μm.

[0040] The first optical guide layer 13 is disposed above the first semiconductor layer 12 and is an optical guide layer having a refractive index higher than that of the first semiconductor layer 12. In the present embodiment, the first optical guide layer 13 is a semiconductor layer of the first conductivity type composed of n-type GaN with a film thickness of 100 nm.

[0041] The second optical guiding layer 14 is a first-conductivity-side optical guiding layer containing In, and is disposed between the active layer 15 and the first semiconductor layer 12. In this embodiment, the second optical guiding layer 14 is disposed above the first optical guiding layer 13, and is a layer made of InGaN with a film thickness of 185 nm.

[0042] The active layer 15 is disposed above the first semiconductor layer 12 and is a layer including a nitride-based semiconductor containing Ga or In. In this embodiment, the active layer 15 includes an undoped multiple quantum well disposed above the second optical guiding layer 14.

[0043] The third optical guiding layer 16 is disposed between the active layer 15 and the electron barrier layer 18, and is a second-conductivity-side optical guiding layer containing In. In this embodiment, the third optical guiding layer 16 is disposed above the active layer 15, and is a layer made of InGaN with a film thickness of 90 nm. The third optical guiding layer 16 has a gradient composition ratio region in which the In composition ratio decreases toward the electron barrier layer 18. The gradient composition ratio region is disposed in a region of the third optical guiding layer 16 on the second semiconductor layer 19 side (the intermediate layer 17 side).

[0044] The intermediate layer 17 is disposed between the electron barrier layer 18 and the active layer 15 and is a layer containing a nitride-based semiconductor. In this embodiment, the intermediate layer 17 is disposed between the electron barrier layer 18 and the second-conductivity-side optical guide layer (third optical guide layer 16) and is a layer containing a second-conductivity-type Ga 1-x In x The intermediate layer 17 is made of N (0≦x<1) and has a smaller In composition ratio than the second-conductivity-side light guide layer (third light guide layer 16). More specifically, the intermediate layer 17 contains GaN of the second conductivity type with a thickness of 3 nm. The second conductivity type is a conductivity type different from the first conductivity type, and is p-type in this embodiment.

[0045] By providing the intermediate layer 17, the semiconductor light emitting device 100 can reduce stress that occurs at the interface due to the difference in lattice constant between the electron barrier layer 18 and the second-conductivity-side light guiding layer, thereby suppressing the occurrence of crystal defects in the semiconductor light emitting device 100. Furthermore, by making the conductivity type of the intermediate layer 17 p-type, the operating voltage of the semiconductor light emitting device 100 can be reduced.

[0046] The electron barrier layer 18 is disposed above the active layer 15 and is a second conductivity type layer including a nitride-based semiconductor containing at least Al. In this embodiment, the electron barrier layer 18 is disposed between the intermediate layer 17 and the second semiconductor layer 19 and is made of p-type AlGaN. In this embodiment, the average lattice constant of the electron barrier layer 18 is smaller than the average lattice constant of the substrate 11. Furthermore, the average lattice strain generated in the electron barrier layer 18 in a direction parallel to the major surface of the substrate 11 is tensile strain. The detailed configuration of the electron barrier layer 18 will be described later.

[0047] The second semiconductor layer 19 is disposed above the electron barrier layer 18 and is a semiconductor layer containing a nitride-based semiconductor of a second conductivity type different from the first conductivity type. In this embodiment, the second semiconductor layer 19 is a p-type AlGaN cladding layer with a thickness of 660 nm.

[0048] The contact layer 20 is disposed above the second semiconductor layer 19 and is a layer containing a second conductivity type nitride-based semiconductor. In this embodiment, the contact layer 20 is made of p-type GaN with a film thickness of 0.05 μm.

[0049] The current blocking layer 30 is disposed above the second semiconductor layer 19 and is an insulating layer that is transparent to light from the active layer 15. In this embodiment, the current blocking layer 30 is made of SiO2.

[0050] The n-side electrode 31 is a conductive layer disposed below the substrate 11. The n-side electrode 31 is, for example, a single layer film or a multilayer film formed of at least one of Cr, Ti, Ni, Pd, Pt, and Au.

[0051] The p-side electrode 32 is a conductive layer disposed above the contact layer 20. In this embodiment, the p-side electrode 32 is disposed above the contact layer 20 and the current blocking layer 30. The p-side electrode 32 is a single-layer film or a multilayer film formed of at least one of Cr, Ti, Ni, Pd, Pt, and Au, for example.

[0052] A ridge is formed in the second semiconductor layer 19 of the semiconductor light emitting device 100. In this embodiment, the ridge width W is approximately 30 μm. As shown in FIG. 1A, the distance between the bottom end of the ridge and the active layer 15 is designated as dp. The distance between the bottom end of the ridge and the top end of the ridge is designated as H. The cavity length of the semiconductor light emitting device 100 according to this embodiment is approximately 1200 μm.

[0053] In this embodiment, in order to confine light in a direction perpendicular to the active layer 15 (the normal direction to the main surface of the substrate 11), the Al composition ratio of the first semiconductor layer 12 made of an n-type AlGaN layer and the second semiconductor layer 19 made of a p-type AlGaN layer is set to 0.035 (3.5%). As a result, the refractive indexes of the first semiconductor layer 12 and the second semiconductor layer 19 are smaller than the effective refractive index in the light distribution region of the semiconductor light emitting element 100, so the first semiconductor layer 12 and the second semiconductor layer 19 function as cladding layers.

[0054] Increasing the Al composition ratio of the first semiconductor layer 12 made of n-type AlGaN and the second semiconductor layer 19 made of p-type AlGaN increases the refractive index difference between the active layer 15 and the first and second semiconductor layers 12 and 19 that function as cladding layers. This enables strong light confinement in the stacking direction of the active layer 15 (i.e., the direction perpendicular to the major surface of the substrate 11) and reduces the oscillation threshold current. However, due to the difference in thermal expansion coefficient between the AlGaN layer and the substrate 11, if the Al composition ratio of the first and second semiconductor layers 12 and 19 made of AlGaN is too high, lattice defects will occur, leading to reduced reliability. Therefore, in this embodiment, the Al composition ratio of the first and second semiconductor layers 12 and 19 is set to 0.05 (i.e., 5%) or less.

[0055] Next, the active layer 15 according to this embodiment will be described with reference to FIG. 1B. FIG. 1B is a graph showing the conduction band energy distribution in the stacking direction of the active layer 15 according to this embodiment. In order to obtain laser oscillation with a wavelength of 450 nm, the active layer 15 has a DQW (Double Quantum Well) structure including two well layers 15b and 15d and three barrier layers 15a, 15c, and 15e, as shown in FIG. 1B. Each of the two well layers 15b and 15d is disposed between two adjacent barrier layers among the three barrier layers 15a, 15c, and 15e.

[0056] The well layers 15b and 15d are made of InGaN with a thickness of 3 nm and an In composition ratio of 0.16 (i.e., 16%). The barrier layers 15a, 15c, and 15e are made of InGaN with an In composition ratio of 0.04 (i.e., 4%). The barrier layers 15a, 15c, and 15e are made of InGaN with a thickness of 7 nm, 7 nm, and 5 nm, respectively, and an In composition ratio of 0.04 (i.e., 4%). The well layers require a high In composition ratio of 15% or more to generate laser light in the 450 nm band. In this case, the lattice mismatch between the well layer and the substrate 11 is 1.7% or more, and if the well layer is made too thick, lattice defects will occur. Conversely, if the well layer is made too thin, the optical confinement coefficient in the stacking direction of the well layer will decrease, increasing the oscillation threshold and operating carrier density, leading to an increase in leakage current during high-temperature operation. Therefore, in this embodiment, the well layer thickness is, for example, 2 nm to 3.3 nm.

[0057] Furthermore, if the In composition ratio of the well layer is set to 0.23 (23%) to reduce the band gap energy of the well layer, laser oscillation light with a wavelength in the 467 nm band can be obtained.

[0058] Furthermore, the second optical guide layer 14 and the third optical guide layer 16 contain In, and thus have a higher refractive index than the first semiconductor layer 12 made of n-type AlGaN and the second semiconductor layer 19 made of p-type AlGaN. This increases the effective refractive index for the light distribution propagating through the waveguide corresponding to the ridge, and enhances the confinement effect of the first semiconductor layer 12 and the second semiconductor layer 19 in the stacking direction of the light distribution. Therefore, the waveguide loss in the semiconductor light emitting device 100 can be reduced.

[0059] Here, if the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is small, the optical confinement effect in the stacking direction of the well layer is reduced, resulting in a high oscillation threshold and operating carrier density. This results in an increase in leakage current during high-temperature operation. Conversely, if the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is large, lattice mismatch with the substrate 11 increases, making lattice defects more likely to occur. Therefore, in order to increase the optical confinement coefficient in the stacking direction (vertical direction) of the well layer without generating lattice defects, in this embodiment, the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is, for example, 0.03 (i.e., 3%) or more and 0.06 (i.e., 6%) or less. In this embodiment, the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is set to 0.03 (i.e., 3%), thereby suppressing the occurrence of lattice defects and increasing the optical confinement coefficient in the stacking direction of the well layer.

[0060] The first optical guiding layer 13 is a GaN layer having a lattice constant between the lattice constants of the first semiconductor layer 12 and the second optical guiding layer 14, and having a forbidden band energy between the forbidden band energies of the first semiconductor layer 12 and the second optical guiding layer 14. This makes it possible to suppress spike-like deformation of the band structure due to polarization charges generated at the interface, compared to when the second optical guiding layer 14 is formed directly on the first semiconductor layer 12 made of AlGaN. This therefore facilitates the conduction of electrons to the active layer 15.

[0061] The intermediate layer 17 is a GaN layer having a lattice constant between the lattice constants of the electron barrier layer 18 and the third optical guiding layer 16, and having a forbidden band energy between the forbidden band energy of the electron barrier layer 18 and the third optical guiding layer 16.

[0062] Furthermore, if the second optical guide layer 14 containing In and having compressive lattice strain, the active layer 15, and the third optical guide layer 16 are stacked in this order, and then the electron barrier layer 18 made of an AlGaN layer having tensile lattice strain is stacked directly on top of them, the stress generated at the interface increases, which may cause crystal defects. If the intermediate layer 17 is made of GaN with a thickness of 3 nm, the stress at the interface can be alleviated.

[0063] Furthermore, if the intermediate layer 17 is too thick, the second semiconductor layer 19, which has a low refractive index, will be separated from the active layer 15, weakening the light confinement effect in the stacking direction of the active layer 15. Therefore, the thickness of the intermediate layer 17 is set to be as thin as possible, equal to or less than 10 nm. In the semiconductor light emitting device according to this embodiment, the thickness of the intermediate layer 17 is set to 3 nm.

[0064] In addition, in the semiconductor light-emitting device 100 according to this embodiment, a dielectric current blocking layer 30 made of SiO2 and having a thickness of 0.1 μm is formed on the side surfaces of the ridge. In this structure, the current injected from the contact layer 20 flows only to the ridge portion due to the current blocking layer 30. Therefore, the current injection is concentrated in the region of the active layer 15 located below the ridge bottom. As a result, the carrier population inversion required for laser oscillation is achieved with a relatively small injection current of approximately 100 mA. Light generated by the recombination of carriers consisting of electrons and holes injected into the active layer 15 is confined in the stacking direction of the active layer 15 by the second optical guide layer 14, the third optical guide layer 16, the first semiconductor layer 12, and the second semiconductor layer 19. On the other hand, in the direction parallel to the active layer 15 (the direction perpendicular to the stacking direction; hereinafter also referred to as the horizontal direction), the refractive index of the current blocking layer 30 is lower than that of the first semiconductor layer 12 and the second semiconductor layer 19, enabling light confinement. In addition, the current blocking layer 30 has low optical absorption for laser oscillation light, so a low-loss waveguide can be realized. In addition, the light distribution propagating through the waveguide can largely permeate into the current blocking layer 30, so a 10-nm waveguide suitable for high-output operation can be realized. -3 Furthermore, by adjusting the distance dp between the current blocking layer 30 and the active layer 15, it is possible to precisely realize a ΔN (difference in the effective refractive index in the stacking direction inside and outside the ridge) of the order of 10. -3 Therefore, it is possible to obtain a semiconductor light emitting device 100 with a low operating current while precisely adjusting the light distribution. In this embodiment, ΔN is set to 4.8×10 -3 The distance dp etc. is adjusted so that

[0065] The electron barrier layer 18 is formed on the intermediate layer 17 made of p-type GaN, and the energy of the band gap of the electron barrier layer 18 is larger than that of the second semiconductor layer 19 made of p-type AlGaN. This increases the potential of the conduction band of the electron barrier layer 18, forming an energy barrier. As a result, the phenomenon in which electrons injected into the active layer 15 are thermally excited and leak into the second semiconductor layer 19 (i.e., electron overflow) can be suppressed, thereby improving the high-temperature operating characteristics of the semiconductor light-emitting element 100.

[0066] Here, the bandgap energy of the layer made of AlGaN increases in proportion to the Al composition ratio. Therefore, in this embodiment, the Al composition ratio of the electron barrier layer 18 is higher than the Al composition ratio of the second semiconductor layer 19 made of p-type AlGaN, and is, for example, 0.15 (i.e., 15%) or more.

[0067] In this embodiment, of the layers immediately above the third optical guide layer 16 made of InGaN, the region that does not contain Al is the intermediate layer 17. Of the regions immediately above the intermediate layer 17 that contain Al, the region below the second semiconductor layer 19 is the electron barrier layer 18. In the electron barrier layer 18, the Al composition ratio gradually increases from bottom to top, and reaches a maximum value of 15% or more. In the electron barrier layer 18, the Al composition ratio decreases from the position where it has the maximum value toward the top, and at the interface on the second semiconductor layer 19 side, it matches the Al composition ratio of the second semiconductor layer 19. The Al composition ratio and the distribution shape of the impurity concentration of the electron barrier layer 18 will be described in detail later.

[0068] [1-2. Configuration of Electron Barrier Layer According to Comparative Example 1] Next, before describing the function and effect of the electron barrier layer 18 according to the present embodiment, the configuration of the electron barrier layer according to Comparative Example 1 will be described with reference to Fig. 2. Fig. 2 is a schematic diagram showing the configuration of the electron barrier layer 18A of the semiconductor light-emitting device according to Comparative Example 1. Schematic diagrams (a), (b), (c), (d), (e), and (f) shown in Fig. 2 respectively show the bandgap energy distribution of the semiconductor light-emitting device according to Comparative Example 1, the polarization charge surface density distribution, impurity concentration distribution, charge distribution, electric field distribution, and band structure of the electron barrier layer 18A.

[0069] The semiconductor light-emitting device according to Comparative Example 1 differs from the semiconductor light-emitting device 100 according to the present embodiment in the configuration of the electron barrier layer 18A. The electron barrier layer 18A of the semiconductor light-emitting device according to Comparative Example 1 will be described below, focusing on the differences from the electron barrier layer 18 according to the present embodiment. As shown in the schematic diagram (a) of FIG. 2, the semiconductor light-emitting device according to Comparative Example 1 has a composition gradient region 16a similar to that of the semiconductor light-emitting device 100 according to the present embodiment.

[0070] In the electron barrier layer 18A according to Comparative Example 1, the distribution of the Al composition ratio is uniform in the stacking direction, and accordingly, the band gap energy is constant in the stacking direction of the electron barrier layer 18A, as shown in the schematic diagram (a) of FIG.

[0071] Next, the surface density of polarization charges in the electron barrier layer 18A will be described using the schematic diagram (b) in FIG. 2. The surface density of polarization charges formed in a nitride semiconductor depends on the sum of the piezoelectric polarization component due to strain associated with its constituent layers and the spontaneous polarization component determined by the atomic composition. Therefore, the surface density of polarization charges formed in each layer is composed of the sum of the piezoelectric polarization component due to strain and the spontaneous polarization component. The magnitude of strain and the magnitude of spontaneous polarization formed in each layer are both proportional to the atomic composition. Therefore, the surface density of polarization charges formed in the AlGaN layer is proportional to the Al composition of the AlGaN layer. Therefore, the surface density of polarization charges formed in the electron barrier layer 18A of Comparative Example 1, which has a constant Al composition ratio, is constant.

[0072] 2(c), the impurity (Mg) concentration distribution in the electron barrier layer 18A decreases with increasing distance from the active layer. The total doping amount of the impurity in the electron barrier layer 18A is the same as the total doping amount of the impurity in the electron barrier layer 18 according to the present embodiment.

[0073] Furthermore, the magnitude of the polarization charge volume density is proportional to the rate of change of the polarization charge surface density. Therefore, at the interface of the electron barrier layer 18A where the polarization charge surface density changes stepwise as shown in the schematic diagram of FIG. 2(b), the polarization charge volume density is distributed in a Δ-function shape as shown in the schematic diagram of FIG. 2(d). Positive polarization charges (σ+) are formed at the interface of the electron barrier layer 18A on the active layer 15 side, and negative polarization charges (σ-) are formed at the interface of the electron barrier layer 18A on the second semiconductor layer 19 side. Accordingly, carriers of opposite polarity are attracted to both interfaces to satisfy the electrical neutrality condition. That is, electrons are attracted to the interface of the electron barrier layer 18A on the active layer 15 side, and holes are attracted to the interface of the electron barrier layer 18A on the second semiconductor layer 19 side.

[0074] The electron barrier layer 18A is doped with an impurity (Mg) that acts as an acceptor. Therefore, when the impurity is activated and functions as an acceptor, an ionized acceptor having a negative charge is formed. The concentration of the ionized acceptor that is formed depends on the concentration of the doping impurity.

[0075] Furthermore, in an AlGaN layer, the higher the Al composition ratio, the lower the Mg activation rate. Furthermore, the higher the band potential, the lower the acceptor activation rate. In the electron barrier layer 18A according to Comparative Example 1, the band of the electron barrier layer 18A changes so that the potential on the second semiconductor layer 19 side becomes higher due to the influence of piezoelectric polarization. At this time, the energy difference (Efa-Ev) between the potential (Ev) of the valence band on the second semiconductor layer 19 side of the electron barrier layer 18A and the Fermi level (Efa) of holes becomes smaller, thereby lowering the impurity activation rate on the p-type layer side of the electron barrier layer 18A. Therefore, even when the maximum impurity concentration position is closer to the interface on the active layer 15 side than the interface on the second semiconductor layer 19 side, or closer to the interface on the second semiconductor layer 19 side than the interface on the active layer 15 side, or even when the impurity concentration distribution is uniform, the concentration of ionized acceptors in the electron barrier layer 18A on the side closer to the second semiconductor layer 19 of the electron barrier layer 18A decreases.

[0076] From the above, the charge distribution in the vicinity of the electron barrier layer 18A, that is, the distribution of the piezoelectric polarization charge, carriers, and ionized acceptors, is as shown in the schematic diagram (d) of FIG.

[0077] Because the polarization charge density at the interface of the electron barrier layer 18A in Comparative Example 1 on the active layer 15 side is very large, the concentration of electrons electrically attracted to the interface of the electron barrier layer 18A on the active layer 15 side is large. When the electron concentration in this region is high, an electric field is formed in the stacked structure in a direction that reduces the band potential, as shown in the schematic diagram (e) of FIG. 2 . As a result, the potential of the valence band of the electron barrier layer 18A decreases, and the potential barrier of the electron barrier layer 18A against holes increases. At the same time, the potential of the conduction band of the electron barrier layer 18A also decreases, thereby reducing the potential barrier of the electron barrier layer 18A against electrons injected into the active layer 15. This makes it easier for electrons injected into the active layer 15 to leak over the electron barrier layer 18A into the second semiconductor layer 19.

[0078] The schematic diagram (f) of FIG. 2 shows the change in band potential near the electron barrier layer 18A when the maximum position of the impurity concentration distribution in the electron barrier layer 18A is set at the interface with the active layer 15 using the electron barrier layer 18A of FIG.

[0079] As described above, since a large amount of electrons accumulate at the interface of the electron barrier layer 18A on the active layer 15 side and the band potential drops significantly, the potential barrier (ΔEc) for electrons is small and the potential barrier for holes is large, resulting in a decrease in temperature characteristics and an increase in operating voltage.

[0080] As described above, in the electron barrier layer 18A having a constant Al composition ratio according to Comparative Example 1, even if the maximum impurity concentration position in the electron barrier layer 18A is at the interface with the active layer 15, the piezoelectric polarization charge density at the interface of the electron barrier layer 18A on the active layer 15 side of the electron barrier layer 18A is very large, so that the effect on the ionized acceptor distribution in the electron barrier layer 18A is small and there is little effect on the increase in operating voltage and the deterioration of temperature characteristics due to piezoelectric polarization in the electron barrier layer 18A. In the following explanation, an electron barrier layer having a constant Al composition ratio and having an impurity concentration distribution regardless of the maximum impurity concentration position will be referred to as Comparative Example 1.

[0081] [1-3. Configuration of Electron Barrier Layer According to First Embodiment] Next, the configuration of the electron barrier layer 18 according to this embodiment will be described with reference to FIG. 3. FIG. 3 is a schematic diagram showing the configuration of the electron barrier layer 18 of the semiconductor light-emitting device 100 according to this embodiment. Schematic diagrams (a), (b2), (c2), (d2), (e2), and (f) shown in FIG. 3 respectively show the bandgap energy distribution of the semiconductor light-emitting device 100 according to this embodiment, the polarization charge surface density distribution of the electron barrier layer 18, the impurity concentration distribution, the charge distribution, the electric field distribution, and the band structure. Note that FIG. 3 also shows the configuration of the electron barrier layer according to Comparative Example 2. Schematic diagrams (b1), (c1), (d1), and (e1) in FIG. 3 respectively show the polarization charge surface density distribution, the impurity concentration distribution, the charge distribution, and the electric field distribution of the electron barrier layer according to Comparative Example 2. Furthermore, in schematic diagram (f) of FIG. 3, the band structures according to this embodiment and Comparative Example 2 are shown by solid and dashed lines, respectively.

[0082] The electron barrier layer 18 according to this embodiment has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer 19. Here, the configuration in which the Al composition ratio monotonically increases includes a configuration in which there is a region in which the Al composition ratio is constant in the stacking direction. For example, it also includes a configuration in which the Al composition ratio increases stepwise. In the electron barrier layer 18 according to this embodiment, the entire electron barrier layer 18 is an Al composition ratio increasing region, and the Al composition ratio increases at a constant rate in the stacking direction. The electron barrier layer according to Comparative Example 2 also has the same Al composition ratio distribution as the electron barrier layer 18 according to this embodiment.

[0083] The position where the second conductivity type impurity concentration is maximum in the electron barrier layer 18 is closer to the active layer 15 than the midpoint between the position where the Al composition ratio of the electron barrier layer 18 is maximum in the Al composition ratio increasing region and the interface of the electron barrier layer 18 on the active layer 15 side. In this embodiment, the position where the Al composition ratio of the electron barrier layer 18 is maximum is the interface of the electron barrier layer 18 on the second semiconductor layer 19 side, and as shown in the schematic diagram (c2) of FIG. 3 , the position where the second conductivity type impurity concentration is maximum in the electron barrier layer 18 is the interface of the electron barrier layer 18 on the active layer 15 side. In the electron barrier layer 18, the impurity concentration monotonically decreases toward the second semiconductor layer 19. Here, a configuration where the impurity concentration monotonically decreases also includes a configuration where there is a region where the impurity concentration is constant in the stacking direction. For example, a configuration where the impurity concentration decreases stepwise is also included. In the electron barrier layer 18 according to this embodiment, the impurity concentration decreases at a constant rate in the stacking direction.

[0084] On the other hand, in the electron barrier layer according to Comparative Example 2, the concentration of the impurity (Mg) is uniform in the stacking direction, as shown in the schematic diagram (c1) of Fig. 3. The total doping amount of the second conductivity type impurity in the electron barrier layer according to Comparative Example 2 is the same as the total doping amount of the second conductivity type impurity in the electron barrier layer 18 according to the present embodiment. In the following description, an electron barrier layer having an increased Al composition ratio region and a uniform impurity concentration distribution will be referred to as Comparative Example 2.

[0085] The surface density of polarization charges formed in the electron barrier layer 18 according to this embodiment increases as the Al composition ratio increases, as shown in the schematic diagram (b2) of FIG.

[0086] Since the magnitude of the polarization charge volume density is proportional to the rate of change of the polarization charge surface density, the polarization charge volume density formed is constant within the electron blocking layer 18, as shown in the schematic diagrams (d1) and (d2) in Figure 3.

[0087] The electron barrier layer 18 is doped with an impurity (Mg) that acts as an acceptor. When the impurity is activated and functions as an acceptor, an ionized acceptor with a negative charge is formed. The concentration of the ionized acceptor that is formed depends on the concentration of the doping impurity.

[0088] Furthermore, in an AlGaN layer, the higher the Al composition ratio, the lower the activation rate of Mg. Furthermore, due to the influence of piezoelectric polarization, the band of the electron barrier layer 18 changes so that the potential on the second semiconductor layer 19 side of the second conductivity type becomes higher. At this time, the energy difference (Efa - Ev) between the potential (Ev) of the valence band on the second semiconductor layer 19 side of the electron barrier layer 18 and the Fermi level (Efa) of holes becomes smaller, so the activation rate of impurities on the second semiconductor layer 19 side of the electron barrier layer 18 decreases. Therefore, even when the maximum impurity concentration position is closer to the interface on the active layer 15 side of the electron barrier layer 18 than the interface on the second semiconductor layer 19 side, or closer to the interface on the second semiconductor layer 19 side than the interface on the active layer 15 side, or even when the impurity concentration distribution is uniform, the concentration of ionized acceptors in the electron barrier layer 18 on the side closer to the second semiconductor layer 19 of the electron barrier layer 18 decreases.

[0089] The distributions of charges (i.e., piezoelectric polarization charge (volume density), ionized acceptors, and carriers) near the electron barrier layer in Comparative Example 2 and the present embodiment are shown in the schematic diagrams (d1) and (d2) of FIG. 3 , respectively. Because the polarization charge volume density of the electron barrier layer in both Comparative Example 2 and the present embodiment is smaller than that of Comparative Example 1, the effect of compensating for the positive polarization charge with the negative charge resulting from the ionized acceptors is achieved. In particular, when the impurity concentration of the electron barrier layer 18 is higher on the active layer 15 side, as in the electron barrier layer 18 of the present embodiment, the polarization charge compensation effect on the active layer 15 side of the electron barrier layer 18 is maximized. More specifically, the polarization charge compensation effect is maximized when the position of the maximum impurity concentration in the electron barrier layer 18 is closer to the active layer than the intermediate position between the position where the Al composition ratio of the electron barrier layer 18 is maximized in the Al composition ratio increasing region and the interface of the electron barrier layer 18 on the active layer 15 side. As a result, as shown in the schematic diagrams (e1) and (e2) of Fig. 3, the electron barrier layer 18 according to this embodiment has a lower concentration of electrons attracted to the region near the interface on the active layer 15 side than the electron barrier layer according to Comparative Example 2. Because the electron concentration in this region is low, the electric field formed in the stacking direction and in a direction that reduces the potential of the band is also smaller in the electron barrier layer 18 according to this embodiment than in the electron barrier layer according to Comparative Example 2, as shown in the schematic diagrams (e1) and (e2) of Fig. 3.

[0090] 3(f), the electron barrier layer 18 according to this embodiment has a smaller drop in the potential of the valence band than the electron barrier layer according to Comparative Example 2, and therefore the potential barrier of the electron barrier layer 18 against holes is smaller. At the same time, the drop in the potential of the conduction band of the electron barrier layer 18 is also smaller, and therefore the potential barrier against electrons is larger. This makes it possible to suppress the generation of leakage current, which is the leakage of electrons injected into the active layer 15 across the electron barrier layer 18 into the second semiconductor layer 19.

[0091] As described above, the electron accumulation amount at the interface of the electron barrier layer 18 on the active layer 15 side according to this embodiment is small, and the drop in band potential is also small, so the potential barrier (ΔEc) for electrons is large. Also, the potential barrier for holes is small. Therefore, the semiconductor light emitting device 100 according to this embodiment can achieve improved temperature characteristics and reduced operating voltage. Furthermore, if doping is performed so that the maximum impurity concentration position is located closer to the active layer 15 in the electron barrier layer 18, the drop in band potential is further reduced, and the above-mentioned effect is enhanced.

[0092] As described above, in the electron barrier layer 18 in which the Al composition ratio increases monotonically, the piezoelectric polarization charge density formed in the electron barrier layer 18 can be reduced by positioning the maximum position of the impurity concentration distribution in the electron barrier layer 18 on the active layer 15 side. Therefore, the ionized acceptors in the electron barrier layer 18 can compensate for the positive piezoelectric polarization charge with the negative ionized acceptors. As a result, the electron concentration attracted to the interface of the electron barrier layer 18 on the active layer 15 side is reduced, thereby realizing a reduction in operating voltage and an improvement in temperature characteristics.

[0093] Here, by making the total amount of impurities doped into the electron barrier layer 18 the same as the total amount of doping into the electron barrier layer when the impurities are uniformly doped into the electron barrier layer shown in Comparative Example 2 and positioning the maximum position of the impurity concentration distribution in the electron barrier layer 18 on the active layer 15 side, it is possible to reduce the operating voltage and improve the temperature characteristics without increasing the free carrier loss due to impurity doping.

[0094] Furthermore, by making the total amount of impurities doped into the electron barrier layer 18 less than the total amount of doping into the electron barrier layer when the impurities are uniformly doped into the electron barrier layer shown in Comparative Example 2 and positioning the maximum impurity concentration position in the electron barrier layer 18 closer to the active layer 15, it is possible to reduce the free carrier loss due to impurity doping, while also achieving a reduction in operating voltage and an improvement in temperature characteristics.

[0095] When using the electron barrier layer 18 according to this embodiment and arranging the position with the maximum impurity concentration in the electron barrier layer 18 closer to the active layer 15, as shown in the schematic diagram (f) of FIG. 3, the decrease in the potential of the valence band is suppressed and the potential of the conduction band is increased. As a result, it becomes possible to reduce the potential barrier for holes and increase the potential barrier for electron leakage, so that it is possible to reduce the operating voltage and improve the temperature characteristics.

[0096] When the electron barrier layer 18 is formed of an AlGaN layer and the average strain of the lattice in the direction parallel to the main surface of the substrate 11 generated in the electron barrier layer 18 due to the lattice mismatch with the substrate 11 is tensile strain, the piezo polarization component due to the strain generated in the electron barrier layer 18 and the natural polarization component determined by the atomic composition of the electron barrier layer 18 made of the AlGaN layer reinforce each other because the directions of the polarization electric fields are the same. Therefore, the influence of the piezo effect becomes large. Further, if the average strain generated in the electron barrier layer 18 is tensile strain, the piezo polarization component due to the lattice mismatch generated in the entire electron barrier layer 18 and the natural polarization component of the electron barrier layer 18 determined by the atomic composition reinforce each other, and the influence of the piezo effect becomes large.

[0097] In contrast, the structure of the electron barrier layer 18 in which the above-described Al composition ratio increases monotonically and arranging the position with the maximum impurity concentration distribution closer to the active layer 15 are effective in suppressing the influence of the piezo effect and realizing the reduction of the operating voltage and the improvement of the temperature characteristics.

[0098] Further, as the substrate 11, not only a GaN substrate or an AlGaN substrate having a lattice constant larger than the average lattice constant of the electron barrier layer, but also an In x Ga <000001A>Al <000001B>N substrate (0 ≦ x < 1, 0 < y ≦ 1, 0 ≦ 1 - x - y ≦ 1) can also obtain the above effects.

[0099] (Embodiment 2) Note: In the original text, there seems to be a formatting issue in lines 12 - 18 where some parts might be split in an unexpected way. I've tried to make sense of it in the translation. Also, the tags <000001A> and <000001B> in the translation are based on the assumption of what might be missing in the original for proper continuity. If there's a specific format these tags are supposed to follow, please let me know for a more accurate translation.A semiconductor light emitting device according to embodiment 2 will be described. The semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 100 according to embodiment 1 in the distribution of the Al composition ratio in the electron barrier layer. The electron barrier layer of the semiconductor light emitting device according to this embodiment will be described below with reference to FIG.

[0100] [2-1. Structure of the electron barrier layer] Fig. 4 is a schematic diagram showing the configuration of the electron barrier layer 118 of the semiconductor light-emitting device according to this embodiment. Schematic diagrams (a), (b), (c), (d), (e), and (f) shown in Fig. 4 respectively show the band gap energy distribution of the semiconductor light-emitting device according to this embodiment, the polarization charge surface density distribution of the electron barrier layer 118, the impurity concentration distribution, the charge distribution, the electric field distribution, and the band structure.

[0101] The electron barrier layer 118 according to the present embodiment, like the electron barrier layer 18 according to the first embodiment, has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer 19. The maximum concentration position of the second conductivity type impurity in the electron barrier layer 118 is closer to the active layer 15 than the intermediate position between the position in the Al composition ratio increasing region where the Al composition ratio of the electron barrier layer 118 is maximum and the interface of the electron barrier layer 118 on the active layer 15 side. In the present embodiment, as shown in the schematic diagram (c) of FIG. 4 , the position where the Al composition ratio of the electron barrier layer 118 is maximum is the interface of the electron barrier layer 118 on the second semiconductor layer 19 side, and the maximum concentration position of the second conductivity type impurity in the electron barrier layer 118 is the interface of the electron barrier layer 118 on the active layer 15 side. In the electron barrier layer 118, the impurity concentration monotonically decreases toward the second semiconductor layer 19.

[0102] 4A, the Al composition ratio increasing region has a first region 118a in which the Al composition ratio changes at a first rate of change and a second region 118b disposed between the first region 118a and the second semiconductor layer 19 in which the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. In other words, the rate of change of the Al composition ratio in the stacking direction changes from a smaller value to a larger value toward the second semiconductor layer 19. In addition, in the present embodiment, the first rate of change and the second rate of change are constant in the first region 118a and the second region 118b, respectively, but they do not necessarily have to be constant.

[0103] The polarization charge surface density formed in the electron barrier layer 118 increases with an increase in the Al composition ratio, as shown in the schematic diagram (b) of Fig. 4. Since the magnitude of the polarization charge volume density is proportional to the rate of change of the polarization charge surface density, the amount of polarization charge volume density formed is greater in the second region 118b than in the first region 118a, as shown in the schematic diagram (d) of Fig. 4. In this embodiment, the polarization charge volume density is constant in both the first region 118a and the second region 118b.

[0104] 4(c), the electron barrier layer 118 according to this embodiment is also doped with impurities in the same concentration distribution as the electron barrier layer 18 according to embodiment 1. Therefore, ionized acceptors are formed in the electron barrier layer 118, similar to the electron barrier layer 18 according to embodiment 1.

[0105] The distribution of charges (piezoelectric polarization charge (volume density), ionized acceptors, and carriers) near the electron barrier layer 118 is as shown in the schematic diagram (d) of FIG. 4. As shown in the schematic diagram (d) of FIG. 4, the polarization charge volume density on the active layer 15 side of the electron barrier layer 118 is even smaller than that of the electron barrier layer 18 according to the first embodiment. This increases the effect of compensating for the polarization charge of the positive charge on the active layer 15 side with the negative charge caused by the ionized acceptors.

[0106] When the impurity concentration is increased on the active layer 15 side of the electron barrier layer 118, the effect of compensating for the polarization charge on the active layer 15 side is maximized. As a result, the concentration of electrons attracted to the region near the interface on the active layer 15 side of the electron barrier layer 118 is smaller than that of the electron barrier layer 18 according to the first embodiment. Because the electron concentration in this region is low, the electric field formed in the stacking direction and in a direction that reduces the potential of the band is also smaller.

[0107] Accordingly, the amount of drop in the potential of the valence band of the electron barrier layer 118 becomes even smaller than that of the electron barrier layer 18 according to the first embodiment, and the potential barrier of the electron barrier layer 118 against holes also becomes smaller.

[0108] At the same time, the amount of drop in the potential of the conduction band of the electron barrier layer 118 also becomes smaller, thereby increasing the potential barrier against electrons. This further reduces the occurrence of leakage current, which is the leakage of electrons injected into the active layer 15 across the electron barrier layer 118 into the second semiconductor layer 19.

[0109] 4(f) shows a change in the band potential near the electron barrier layer 118 when the electron barrier layer 118 according to this embodiment is used and the maximum impurity concentration position in the electron barrier layer 118 is located closer to the active layer 15. For comparison, the band structure in the case where the total doping amount of impurities in the electron barrier layer is the same as that of the electron barrier layer 118 according to this embodiment and the impurities are uniformly distributed in the electron barrier layer is shown by a broken line in the schematic diagram of FIG.

[0110] 4(f), the amount of electrons accumulated at the interface of the electron barrier layer 118 on the active layer 15 side is even smaller than that of the electron barrier layer 18 according to the first embodiment, and the drop in band potential is also even smaller. As a result, the potential barrier (ΔEc) for electrons becomes larger and the potential barrier for holes becomes even smaller, thereby achieving further improvement in temperature characteristics and reduction in operating voltage.

[0111] Furthermore, if the electron barrier layer 118 is doped so that the maximum impurity concentration position is located closer to the active layer 15, the amount of decrease in the band potential becomes smaller, and the above effect is enhanced.

[0112] As described above, in the electron barrier layer 118 in which the rate of change of the Al composition ratio changes from small to large as it approaches the second semiconductor layer 19, by positioning the maximum impurity concentration position in the electron barrier layer 118 closer to the active layer 15, it is possible to reduce the piezoelectric polarization charge density formed in the electron barrier layer 118 near the interface on the active layer 15 side. This increases the effect of the ionized acceptors in the electron barrier layer 118 compensating for the positive piezoelectric polarization charges distributed near the interface on the active layer 15 side with the negative ionized acceptors. As a result, the concentration of electrons attracted to the region of the electron barrier layer 118 near the interface on the active layer 15 side becomes smaller, thereby achieving a further reduction in operating voltage and an improvement in temperature characteristics.

[0113] [2-2. Simulation results] Next, the results of simulations of the semiconductor light emitting devices according to the first and second embodiments will be described.

[0114] [2-2-1. Band structure and charge distribution of comparative example] First, the simulation results of the band structure and charge distribution in the electron barrier layer according to the comparative example will be described with reference to Fig. 5. Fig. 5 is a diagram showing the simulation results of the band structure and charge distribution in the electron barrier layer according to the comparative example. Fig. 5 shows the simulation results when the Al composition ratio is uniformly distributed in the stacking direction in the electron barrier layer, as in the schematic diagram (a) of Fig. 2. Graphs (a1), (a2), and (a3) ​​in Fig. 5 show the simulation results when the impurity Mg is introduced into the electron barrier layer at a concentration of 1.5 × 10 19 cm -3 Graphs (b1), (b2), and (b3) in FIG. 5 show the potential distribution of the conduction band, the potential distribution of the valence band, and the charge distribution when the impurity Mg concentration in the electron barrier layer is uniformly doped with 2.8×10 at the interface on the active layer 15 side. 19 cm -3The figure shows the potential distribution of the conduction band, the potential distribution of the valence band, and the charge distribution when the Mg impurity concentration monotonically decreases from the interface on the active layer 15 side toward the interface on the second semiconductor layer 19 side and is doped so that the Mg impurity concentration at the interface on the second semiconductor layer 19 side is the same as the Mg impurity concentration in the second semiconductor layer 19 (Comparative Example 1). In this case, the average Mg impurity concentration in the electron barrier layer is 1.5×10 19 cm -3 5, the graphs (c1), (c2), and (c3) show that the concentration of the impurity Mg in the electron barrier layer increases linearly and monotonically from the undoped state, which is the concentration at the interface on the active layer 15 side, toward the interface on the second semiconductor layer 19 side, and reaches a maximum value of 2.8×10 19 cm -3 In this case, the average concentration of the impurity Mg in the electron barrier layer is 1.5×10 19 cm -3 The horizontal axis of each graph indicates the position in the stacking direction, with the 0 nm position corresponding to the interface between the electron barrier layer and the active layer 15 and the 5 nm position corresponding to the interface between the electron barrier layer and the second semiconductor layer 19. In addition, the Fermi level is also shown by a dashed line in (a1), (a2), (b1), (b2), (c1), and (c2) of Figure 5. In (a3), (b3), and (c3) of Figure 5, the distributions of electrons, holes, and ionized acceptors are shown by a solid line, a dashed line, and a dashed-dotted line, respectively.

[0115] As shown in Figure 5, even if the distribution shape of the impurity concentration is changed, the electron concentration at the interface of the electron barrier layer remains at 1 × 10 19 cm -3 As a result, the band structures are almost the same. In addition, since the piezoelectric polarization charge at the interface of the electron barrier layer is large, the compensation effect of the ionized acceptors for the piezoelectric polarization charge is small.

[0116] [2-2-2. Band structure and charge distribution of embodiment 1] Next, the simulation results of the band structure and charge distribution in the electron barrier layer 18 according to the first embodiment will be described with reference to Fig. 6. Fig. 6 is a diagram showing the simulation results of the band structure and charge distribution in the electron barrier layer 18 according to the first embodiment. Fig. 6 shows the simulation results in the case where the Al composition ratio in the electron barrier layer increases linearly as it approaches the second semiconductor layer 19, similar to the schematic diagram (a) in Fig. 3. Graphs (a1), (a2), and (a3) ​​in Fig. 6 show the results of the simulation in the case where the impurity Mg is added to the electron barrier layer at a concentration of 1.5 × 10 19 cm -3 6 shows the potential distribution of the conduction band, the potential distribution of the valence band, and the charge distribution when the electron barrier layer 18 is uniformly doped with Mg. Graphs (b1), (b2), and (b3) in FIG. 6 are graphs showing the simulation results of the electron barrier layer 18 according to the first embodiment. Graphs (b1), (b2), and (b3) in FIG. 6 show the results when the concentration of the impurity Mg in the electron barrier layer 18 reaches a maximum value of 2.8×10 at the interface on the active layer 15 side. 19 cm -3 The potential distribution of the conduction band, the potential distribution of the valence band, and the charge distribution are shown when the doping is performed so that the concentration at the interface on the second semiconductor layer 19 side is the same as the impurity Mg concentration in the second semiconductor layer 19. In this case, the average concentration in the electron barrier layer is 1.5×10 19 cm -3 6, the graphs (c1), (c2), and (c3) show that the concentration of the impurity Mg in the electron barrier layer increases linearly and monotonically from the undoped state, which is the concentration at the interface on the active layer 15 side, toward the interface on the second semiconductor layer 19 side, and reaches a maximum value of 2.8×10 19 cm -3 The potential distribution of the conduction band, the potential distribution of the valence band, and the charge distribution are shown in the figure when doping is performed so that the average concentration of the impurity Mg in the electron barrier layer is 1.5 × 10 19 cm -3The horizontal axis of each graph indicates the position in the stacking direction, with the 0 nm position corresponding to the interface between the electron barrier layer and the active layer 15 and the 5 nm position corresponding to the interface between the electron barrier layer and the second semiconductor layer 19. Also, in (a1), (a2), (b1), (b2), (c1), and (c2) of FIG. 6, the Fermi level is also shown by a dashed line. In (a3), (b3), and (c3) of FIG. 6, the distributions of electrons, holes, and ionized acceptors are shown by a solid line, a dashed line, and a dashed-dotted line, respectively.

[0117] As shown in graph (b3) of FIG. 6, when impurities are doped so that the concentration is maximum at the interface of the electron barrier layer 18 on the active layer 15 side, the electron concentration at the interface of the electron barrier layer 18 is 1×10 18 cm -3 The change in band structure is smaller than that shown in graphs (a3) ​​and (c3) of FIG.

[0118] Furthermore, since the piezoelectric polarization charge in the electron barrier layer 18 can be compensated for by the piezoelectric polarization charge of the ionized acceptors, the concentration of electrons attracted to the electron barrier layer 18 in the vicinity of the interface on the active layer 15 side is reduced. As a result, the potential barrier (ΔEc) for electrons increases and the potential barrier for holes decreases, thereby improving the temperature characteristics and reducing the operating voltage.

[0119] [2-2-3. Operating voltage (when Al composition ratio is uniform in the stacking direction)] Next, the results of a simulation regarding the relationship between the Al composition ratio distribution and impurity concentration distribution in the electron barrier layer and the operating voltage of the semiconductor light emitting device will be described with reference to FIGS.

[0120] First, the simulation results when the Al composition ratio in the electron barrier layer is uniform in the stacking direction will be described with reference to FIG.

[0121] Fig. 7 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio in the electron barrier layer according to the comparative example is uniform in the stacking direction. Graph (a) in Fig. 7 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19. The horizontal axis of graph (a) in Fig. 7 represents the position in the stacking direction.

[0122] Graphs (b), (c), and (d) in Fig. 7 are graphs showing the relationship between the operating voltage (Vop) and the maximum impurity concentration position (maximum Mg concentration position) at 300 mA operation for semiconductor light-emitting devices having maximum Al composition ratios in the electron barrier layer of 20%, 30%, and 35%, respectively. Graphs (b), (c), and (d) in Fig. 7 also show simulation results when the maximum impurity concentration (maximum Mg concentration) is changed as a parameter. In this simulation, the maximum impurity concentration position is changed from the interface on the active layer 15 side to the interface on the second semiconductor layer 19 side. The impurity concentration is also changed linearly.

[0123] The dotted line, dashed line, one-dot chain line, and two-dot chain line in each graph represent the electron barrier layer with a uniform impurity concentration (Mg concentration) of 5 × 10 18 cm -3 , 1×10 19 cm -3 , 1.5×10 19 cm -3 and 2 x 10 19 cm -3 The simulation results for the case where the maximum impurity concentration is 0.8×10 are shown. The black circles, white circles, black squares, and white squares in each graph represent the cases where the maximum impurity concentration is 0.8×10 19 cm -3 , 1.8×10 19 cm -3 , 2.8×10 19 cm -3 and 3.8 × 10 19 cm -3 Under these conditions, the average impurity concentration of the electron barrier layer is 5×10 when the maximum impurity concentration position is at the interface on the active layer 15 side. 18 cm-3 , 1×10 19 cm -3 , 1.5×10 19 cm -3 and 2 x 10 19 cm -3 The average impurity concentration of the electron barrier layer is 4×10 when the maximum impurity concentration position is at the interface on the second semiconductor layer 19 side. 18 cm -3 , 0.9×10 19 cm -3 , 1.4×10 19 cm -3 and 1.9 × 10 19 cm -3 7 and FIGS. 8 to 17 described later show simulation results in the case where Mg is used as the second conductivity type impurity. The conditions for the impurity concentration in the graphs (b) to (d) of FIGS. 8 to 13, 16 and 17 described later, and the graph (b) of FIGS. 14 and 15 are the same as the conditions for the impurity concentration in the graphs (b) to (d) of FIG. 7.

[0124] In this simulation, as shown in graph (a) of FIG. 7, the second conductivity type impurity concentration in the electron barrier layer monotonically decreases from the maximum impurity concentration position toward the second semiconductor layer. The second semiconductor layer 19 has a low impurity concentration region disposed adjacent to the electron barrier layer, and a high impurity concentration region disposed farther from the electron barrier layer than the low impurity concentration region and having a higher second conductivity type impurity concentration than the low impurity concentration region. The Al composition ratio in the second semiconductor layer is constant and lower than the Al composition ratio in the electron barrier layer. In this simulation, the film thickness of the low impurity concentration region is 170 nm, and the impurity concentration is 2×10 18 cm -3 It states that:

[0125] 7 to 17, the peak impurity concentration is higher than that in the case of uniform doping, but the total doping amount in the electron barrier layer can be made equal to or less than that in the case of uniform doping. Therefore, under the simulation conditions shown in FIGS. 7 to 17, the increase in free carrier loss due to impurity doping can be suppressed compared to the case of uniform doping.

[0126] In the electron barrier layer structure according to the comparative example, as shown in graph (a) of FIG. 7 , when the Al composition ratio of the electron barrier layer is constant in the stacking direction, the operating voltage at 300 mA operation remains almost unchanged even when the maximum impurity concentration is changed, regardless of whether the Al composition ratio of the electron barrier layer is 20%, 30%, or 35%. Furthermore, changing the maximum impurity concentration position does not have any effect on reducing the operating voltage. This is because, as described above, in the electron barrier layer 18 with a constant Al composition ratio, even if the maximum impurity concentration position in the electron barrier layer 18 is the interface with the active layer 15, the piezoelectric polarization charge density at the interface of the electron barrier layer 18 on the active layer 15 side is very large, so the effect on the ionized acceptor distribution in the electron barrier layer 18 is small, and there is little effect in suppressing an increase in operating voltage or a deterioration in temperature characteristics due to piezoelectric polarization in the electron barrier layer 18.

[0127] [2-2-4. Operating voltage (when Al composition ratio increases monotonically)] Next, similar to the first embodiment, a simulation result in which the Al composition ratio in the electron barrier layer monotonically increases toward the second semiconductor layer 19 in the stacking direction will be described with reference to FIG. 8 . FIG. 8 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position in the case in which the Al composition ratio in the electron barrier layer monotonically increases toward the second semiconductor layer 19 in the stacking direction. Graph (a) in FIG. 8 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in FIG. 7 . Graphs (b), (c), and (d) in FIG. 8 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position at 300 mA operation for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively, similar to graphs (b), (c), and (d) in FIG. 7 . The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in FIG. 7 .

[0128] As shown in graphs (b) to (d) of Figure 8, when the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region of the electron barrier layer, the operating voltage is reduced compared to the case where the impurity is uniformly doped (Comparative Example 2). This makes it possible to achieve a lower operating voltage without increasing the total doping amount of the impurity compared to the case where the impurity is uniformly doped. In addition, an increase in waveguide loss can also be suppressed.

[0129] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0130] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0131] The maximum impurity concentration is 2.5 × 10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0132] [2-2-5. Operating voltage (when the film thickness of the electron barrier layer is 10 nm)] Next, the simulation results when the thickness of the electron barrier layer is 10 nm will be described with reference to FIG. 9. FIG. 9 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the thickness of the electron barrier layer is 10 nm. Graph (a) in FIG. 9 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in FIG. 7. Graphs (b), (c), and (d) in FIG. 9 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively, similar to graphs (b), (c), and (d) in FIG. 7. In this simulation, the Al composition ratio of the electron barrier layer monotonically increases toward the second semiconductor layer 19 in the stacking direction, similar to the example shown in FIG. 8. The configuration of the second semiconductor layer 19 is the same as that used in the simulation shown in FIG. 7.

[0133] 9, even when the thickness of the electron barrier layer is 10 nm, if the maximum impurity concentration position is located closer to the interface of the electron barrier layer on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region, the operating voltage is reduced compared to the case where the impurity is doped uniformly (Comparative Example 2).In addition, the increase in waveguide loss can also be suppressed.

[0134] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0135] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 Since the effect of lowering the operating voltage occurs in the above range, the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0136] The maximum impurity concentration is 2.5 × 10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0137] [2-2-6. Operating voltage (when the electron barrier layer has the first region and the second region (film thickness 5 nm))] Next, the simulation results for the case where the electron barrier layer has a first region and a second region will be described with reference to FIG. 10 . FIG. 10 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a first region and a second region. Graph (a) in FIG. 10 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in FIG. 7 . Graphs (b), (c), and (d) in FIG. 10 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively, similar to graphs (b), (c), and (d) in FIG. 7 . The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in FIG. 7 .

[0138] In this simulation, the Al composition ratio increasing region of the electron barrier layer has a first region where the Al composition ratio changes at a first rate of change and a second region located between the first region and the second semiconductor layer 19 where the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. In other words, the Al composition ratio of the electron barrier layer monotonically increases at two rates, the first rate of change and the second rate of change being greater than the first rate, as it approaches the second semiconductor layer 19 in the stacking direction. A graph showing the Al composition ratio distribution in the electron barrier layer is downwardly convex, as shown by the solid line in the schematic diagram (a) of FIG. 10, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio.

[0139] In this simulation, the electron barrier layer is 5 nm thick, the first region is 2.5 nm thick, and the Al composition ratio in the first region increases linearly from 0% to 5%. The second region is also 2.5 nm thick, and the Al composition ratio in the second region increases linearly from 5% to the maximum Al composition ratio (20%, 30%, or 35%).

[0140] When the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage is reduced compared to the case where the impurity is uniformly doped (Comparative Example 2), and the increase in waveguide loss can also be suppressed.

[0141] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0142] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0143] The maximum impurity concentration is 2.5 × 10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0144] [2-2-7. Operating voltage (when the electron barrier layer has the first region and the second region (film thickness 10 nm))] Next, the simulation results for the case where the electron barrier layer has a first region and a second region and a thickness of 10 nm will be described with reference to FIG. 11 . FIG. 11 shows the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a first region and a second region and a thickness of 10 nm. Graph (a) in FIG. 11 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in FIG. 7 . Graphs (b), (c), and (d) in FIG. 11 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when the semiconductor light-emitting device is operated at 300 mA, similar to graphs (b), (c), and (d) in FIG. 7 , in which the maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively. The configuration of the second semiconductor layer 19 is the same as that used in the simulation shown in FIG. 7 .

[0145] In this simulation, the Al composition ratio increasing region of the electron barrier layer has a first region where the Al composition ratio changes at a first rate of change, and a second region located between the first region and the second semiconductor layer 19 and where the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. As shown by the solid line in the schematic diagram (a) of Figure 11, a graph showing the Al composition ratio distribution in the electron barrier layer is downwardly convex, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio.

[0146] In this simulation, the electron barrier layer is 10 nm thick, the first region is 5 nm thick, and the Al composition ratio in the first region increases linearly from 0% to 5%. The second region is also 5 nm thick, and the Al composition ratio in the second region increases linearly from 5% to the maximum Al composition ratio (20%, 30%, or 35%).

[0147] When the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage is reduced compared to the case where the impurity is uniformly doped (Comparative Example 2), and the increase in waveguide loss can also be suppressed.

[0148] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0149] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0150] The maximum impurity concentration is 2.5×10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0151] [2-2-8. Operating voltage (when the Al composition ratio distribution of the electron barrier layer is upward convex (film thickness 5 nm))] Next, the simulation results for the case where the Al composition ratio distribution in the electron barrier layer is upwardly convex will be described with reference to FIG. 12 . FIG. 12 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the Al composition ratio distribution in the electron barrier layer is upwardly convex. Graph (a) in FIG. 12 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in FIG. 7 . Graphs (b), (c), and (d) in FIG. 12 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively, similar to graphs (b), (c), and (d) in FIG. 7 . The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in FIG. 7 .

[0152] In this simulation, the Al composition ratio increasing region of the electron barrier layer has a first region where the Al composition ratio changes at a first rate of change and a second region located between the first region and the second semiconductor layer 19 where the Al composition ratio changes at a second rate of change, the second rate of change being smaller than the first rate of change. In other words, the Al composition ratio of the electron barrier layer monotonically increases at two rates, the first rate of change and the second rate of change being smaller than the first rate of change, as it approaches the second semiconductor layer 19 in the stacking direction. A graph showing the Al composition ratio distribution in the electron barrier layer is upwardly convex, as shown by the solid line in the schematic diagram (a) of FIG. 12, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio.

[0153] In this simulation, the electron barrier layer is 5 nm thick, the first region is 2.5 nm thick, and the Al composition ratio in the first region increases linearly from 0% to an Al composition ratio 5% lower than the maximum Al composition ratio. The second region is also 2.5 nm thick, and the Al composition ratio in the second region increases linearly from an Al composition ratio 5% lower than the maximum Al composition ratio toward the maximum Al composition ratio (20%, 30%, or 35%).

[0154] When the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage is reduced compared to the case where the impurity is uniformly doped (Comparative Example 2). Furthermore, the increase in waveguide loss can also be suppressed. However, these effects are smaller than when the electron barrier layer has a linear Al composition ratio distribution as shown in FIG.

[0155] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0156] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0157] The maximum impurity concentration is 2.5 × 10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0158] [2-2-9. Operating voltage (when the Al composition ratio distribution of the electron barrier layer is upward convex (film thickness 10 nm))] Next, a simulation result in which the Al composition ratio distribution of the electron barrier layer is upwardly convex and the film thickness of the electron barrier layer is 10 nm will be described with reference to FIG. 13 . FIG. 13 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position in the case where the Al composition ratio distribution of the electron barrier layer is upwardly convex. Graph (a) of FIG. 13 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) of FIG. 7 . Graphs (b), (c), and (d) of FIG. 13 are graphs showing the relationship between the operating voltage and the maximum impurity concentration position in a semiconductor light-emitting device operating at 300 mA, in which the maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively, similar to graphs (b), (c), and (d) of FIG. 7 . The configuration of the second semiconductor layer 19 is the same as that used in the simulation shown in FIG. 7 .

[0159] In this simulation, the Al composition ratio increasing region of the electron barrier layer has a first region where the Al composition ratio changes at a first rate of change and a second region located between the first region and the second semiconductor layer 19 where the Al composition ratio changes at a second rate of change, the second rate of change being smaller than the first rate of change. In other words, the Al composition ratio of the electron barrier layer monotonically increases at two rates, the first rate of change and the second rate of change being smaller than the first rate of change, as it approaches the second semiconductor layer 19 in the stacking direction. A graph showing the Al composition ratio distribution in the electron barrier layer is upwardly convex, as shown by the solid line in the schematic diagram (a) of FIG. 13, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio.

[0160] In this simulation, the electron barrier layer is 10 nm thick, the first region is 5 nm thick, and the Al composition ratio in the first region increases linearly from 0% to an Al composition ratio 5% lower than the maximum Al composition ratio. The second region is also 5 nm thick, and the Al composition ratio in the second region increases linearly from an Al composition ratio 5% lower than the maximum Al composition ratio toward the maximum Al composition ratio (20%, 30%, or 35%).

[0161] When the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage is reduced compared to the case where the impurity is uniformly doped (Comparative Example 2). Furthermore, the increase in waveguide loss can be suppressed. However, these effects are smaller than when the electron barrier layer has a linear Al composition ratio distribution as shown in FIG.

[0162] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0163] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0164] The maximum impurity concentration is 2.5×10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0165] [2-2-10. Operating voltage (when changing the impurity concentration in the low impurity concentration region)] Next, simulation results when the impurity concentration of the low impurity concentration region of the second semiconductor layer 19 is changed will be described with reference to FIG. 14 . FIG. 14 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the impurity concentration of the low impurity concentration region of the second semiconductor layer 19 is changed. Graph (a) of FIG. 14 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) of FIG. 7 . Graph (a) of FIG. 14 shows two examples of impurity (Mg) concentration distribution, indicated by a dashed line and a broken line. Graph (b) of FIG. 14 is a graph showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA, similar to graph (c) of FIG. 7 , of a semiconductor light-emitting device having a maximum Al composition ratio of 30% in the electron barrier layer. The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in FIG. 7 .

[0166] In this simulation, the Al composition ratio increasing region of the electron barrier layer has a first region where the Al composition ratio changes at a first rate of change and a second region located between the first region and the second semiconductor layer 19 where the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. A graph showing the Al composition ratio distribution in the electron barrier layer, as shown by the solid line in the schematic diagram (a) of FIG. 14, is convex downward, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio. The thickness of the electron barrier layer is 5 nm, and the thickness of the first region is 2.5 nm. In the first region, the Al composition ratio increases linearly from 0% to 5%. The thickness of the second region is also 2.5 nm, and in the second region, the Al composition ratio increases linearly from 5% to the maximum Al composition ratio (30%).

[0167] In this simulation, the maximum impurity concentration is set to 2.8×10 19 cm -3 The maximum impurity concentration position is varied from the interface on the active layer 15 side to the interface on the second semiconductor layer 19 side.

[0168] The film thickness of the low impurity concentration region is set to 170 nm, and the impurity concentration of the low impurity concentration region is set to 5×10 17 cm -3 , 1×1018 cm -3 , 2 × 10 18 cm -3 and 5 x 10 18 cm -3 In addition, the graph (b) in Fig. 14 shows the results when the impurity concentration in the electron barrier layer is uniform and the concentration in the low impurity concentration region is 5 × 10 17 cm -3 , 1×10 18 cm -3 , 2 × 10 18 cm -3 and 5 x 10 18 cm -3 The operating voltages when the voltage is changed are also shown by the dotted line, dashed line, one-dot chain line, and two-dot chain line, respectively (Comparative Example 2).

[0169] As shown in graph (b) of FIG. 14, the impurity concentration in the low impurity concentration region is set to 1×10 18 cm -3 In this way, it is possible to suppress a sudden increase in the operating voltage. Furthermore, if the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage can be reduced compared to the case where the impurity is doped uniformly in the electron barrier layer.

[0170] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0171] [2-2-11. Operating voltage (when the maximum impurity concentration position is in the middle layer)] Next, the simulation results for the case where the intermediate layer 17 contains impurities of the second conductivity type and the maximum impurity concentration position in the intermediate layer 17 and the electron barrier layer is located in the intermediate layer 17 will be described with reference to Fig. 15. Fig. 15 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the impurity concentration in the low impurity concentration region of the second semiconductor layer 19 is changed.

[0172] Graph (a) in Fig. 15 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19. Graph (a) in Fig. 15 also shows the Al composition ratio in the intermediate layer 17. Graph (b) in Fig. 15, like graph (c) in Fig. 7, is a graph showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for a semiconductor light-emitting device in which the maximum Al composition ratio in the electron barrier layer is 30%. The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in Fig. 7.

[0173] In this simulation, the Al composition ratio of the electron barrier layer monotonically increases as it approaches the second semiconductor layer 19 in the stacking direction. The thickness of the electron barrier layer is 5 nm, and the Al composition ratio increases linearly from 0% to 30%. The maximum Al composition ratio is 30%, and the maximum impurity concentration is 2.8×10 19 cm -3 In the simulation shown in FIG. 15, the dotted line, dashed line, and dashed-dotted line indicate the operating voltages of Comparative Example 2, where the dotted region of the intermediate layer and the electron barrier layer have uniform impurity concentrations and the doping start position (i.e., the end position of the dotted region of the intermediate layer on the active layer 15 side) is 5 nm, 2.5 nm, and 0 nm from the interface between the intermediate layer 17 and the electron barrier layer (i.e., the interface position).

[0174] As shown in graph (b) of Figure 15, when the doping start position of the impurity into the electron barrier layer is set at a position 5 nm from the interface between the intermediate layer 17 and the electron barrier layer, the operating voltage can be reduced by about 0.02 V compared to when the doping start position is set at the interface between the intermediate layer 17 and the electron barrier layer.

[0175] Furthermore, if the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage can be reduced compared to when impurities are doped uniformly only in the electron barrier layer.

[0176] Note that placing the impurity doping start position too close to the active layer 15 leads to increased waveguide loss. Since the effect of lowering the operating voltage is not significantly different whether the impurity doping start position is 2.5 nm or 5 nm from the interface between the intermediate layer 17 and the electron barrier layer, the distance from the interface between the electron barrier layer and intermediate layer 17 to the impurity doping start position may be 5 nm or less in order to achieve a lower operating voltage without increasing waveguide loss.

[0177] Furthermore, the doping start position of the electron barrier layer is set to a position within 1 nm from the interface of the electron barrier layer on the active layer 15 side in the stacking direction, and the position of maximum impurity concentration is set to a position closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, thereby enabling a lower operating voltage.

[0178] [2-2-12. Operating voltage (when the electron barrier layer has a constant Al composition ratio region)] Next, the simulation results for the case where the electron barrier layer has a constant Al composition ratio region, where the Al composition ratio is constant, between the increased Al composition ratio region and the second semiconductor layer 19 will be described with reference to Fig. 16. Fig. 16 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position when the electron barrier layer has a constant Al composition ratio region.

[0179] Graph (a) in Fig. 16, like graph (a) in Fig. 7, is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19. Graphs (b), (c), and (d) in Fig. 16, like graphs (b), (c), and (d) in Fig. 7, are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively. The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in Fig. 7.

[0180] In this simulation, the electron barrier layer has a thickness of 8 nm. The electron barrier layer has a 5 nm-thick increasing Al composition ratio region where the Al composition ratio increases linearly from 0 to a maximum Al composition ratio (20%, 30%, or 35%), and a 3 nm-thick constant Al composition ratio region that is disposed between the increasing Al composition ratio region and the second semiconductor layer 19 and where the Al composition ratio is constant at the maximum Al composition ratio.

[0181] 16, when the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage can be reduced compared to the case where the impurity is doped uniformly (Comparative Example 2), and the increase in waveguide loss can also be suppressed.

[0182] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0183] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0184] The maximum impurity concentration is 2.5×10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0185] Even if the electron barrier layer has a 3-nm-thick constant Al composition ratio region on the second semiconductor layer side of the increased Al composition ratio region, the band potential in this constant Al composition ratio region is increased due to the piezoelectric effect of the electron barrier layer, resulting in a low impurity activation rate and a small effect on fluctuations in operating voltage. If the constant Al composition ratio region is made too thick, the series resistance experienced by holes passing through the electron barrier layer increases, but if the thickness of the constant Al composition ratio region is 5 nm or less, a significant increase in operating voltage will not occur. The thickness of the constant Al composition ratio region may be 3 nm or less. This further suppresses a significant increase in operating voltage.

[0186] Furthermore, as shown by the dashed line in graph (a) of FIG. 16 , a decreasing Al composition ratio region may be provided between the constant Al composition ratio region and the second semiconductor layer 19, in which the Al composition ratio monotonically decreases with increasing distance from the second semiconductor layer 19. The Al composition ratio is smaller than the Al composition ratio distribution shown by the solid line in graph (a) of FIG. 16 , resulting in a higher impurity activation rate and a relatively large number of holes being generated, resulting in a lower operating voltage. Therefore, if the Al composition ratio is reduced to the same as the average Al composition ratio in the high impurity concentration region at a distance of 5 nm or less from the position where the Al composition ratio of the electron barrier layer is maximum, the increase in operating voltage can be suppressed. Alternatively, the Al composition ratio may be reduced to the same as the average Al composition ratio in the high impurity concentration region at a distance of 3 nm or less from the position where the Al composition ratio of the electron barrier layer is maximum. This further suppresses the increase in operating voltage.

[0187] [2-2-13. Operating voltage (when the electron barrier layer has a constant Al composition ratio region and the increasing Al composition ratio region has a first region and a second region)] Next, the simulation results for the case where the electron barrier layer has a constant Al composition ratio region and the increasing Al composition ratio region has a first region and a second region will be described with reference to Fig. 17. Fig. 17 is a diagram showing the relationship between the operating voltage and the maximum impurity concentration position for the case where the electron barrier layer has a constant Al composition ratio region and the increasing Al composition ratio region has a first region and a second region.

[0188] Graph (a) in Fig. 17, like graph (a) in Fig. 7, is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19. Graphs (b), (c), and (d) in Fig. 17, like graphs (b), (c), and (d) in Fig. 7, are graphs showing the relationship between the operating voltage and the maximum impurity concentration position when operated at 300 mA for semiconductor light-emitting devices whose maximum Al composition ratios in the electron barrier layer are 20%, 30%, and 35%, respectively. The configuration of the second semiconductor layer 19 is the same as the configuration used in the simulation shown in Fig. 7.

[0189] In this simulation, the Al composition ratio increasing region of the electron barrier layer includes a first region where the Al composition ratio changes at a first rate of change and a second region located between the first region and the second semiconductor layer 19 where the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. A graph showing the Al composition ratio distribution in the electron barrier layer, as shown by the solid line in the schematic diagram (a) of FIG. 17 , is convex downward, with the horizontal axis representing the position in the stacking direction and the vertical axis representing the Al composition ratio. The thickness of the electron barrier layer is 8 nm, and the thickness of the first region is 2.5 nm. In the first region, the Al composition ratio increases linearly from 0% to 5%. The thickness of the second region is also 2.5 nm, and in the second region, the Al composition ratio increases linearly from 5% to the maximum Al composition ratio (20%, 30%, or 35%). The electron barrier layer further has a constant Al composition ratio region with a thickness of 3 nm, which is disposed between the increased Al composition ratio region and the second semiconductor layer 19 and in which the Al composition ratio is constant at the maximum Al composition ratio.

[0190] 17, when the maximum impurity concentration position is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region in the electron barrier layer, the operating voltage can be reduced compared to the case where the impurity is doped uniformly (Comparative Example 2), and the increase in waveguide loss can also be suppressed.

[0191] The effect of lowering the operating voltage is greater when the position of the maximum impurity concentration is as close as possible to the interface on the active layer 15 side, and can be further increased by setting the distance from the interface on the active layer 15 side to within 25% of the film thickness of the Al composition ratio increased region.

[0192] When the Al composition ratio is 20% or more and 35% or less, the maximum impurity concentration is 1.8 × 10 19 cm -3 In the above cases, the effect of lowering the operating voltage is achieved, so the maximum impurity concentration is 2×10 19 cm -3 As a result, a low operating voltage can be achieved without increasing waveguide loss.

[0193] The maximum impurity concentration is 2.5 × 10 19 cm -3 This can further increase the effect of lowering the operating voltage while suppressing an increase in waveguide loss.

[0194] As described above, even if the electron barrier layer has a 3-nm-thick constant Al composition ratio region on the second semiconductor layer side of the increased Al composition ratio region, the effect on fluctuations in operating voltage is small. Furthermore, if the constant Al composition ratio region is too thick, the series resistance experienced by holes passing through the electron barrier layer increases. However, if the thickness of the constant Al composition ratio region is 5 nm or less, a significant increase in operating voltage is not caused. The thickness of the constant Al composition ratio region may be 3 nm or less. This further suppresses a significant increase in operating voltage.

[0195] Furthermore, as shown by the dashed line in graph (a) of FIG. 17 , a decreasing Al composition ratio region may be provided between the constant Al composition ratio region and the second semiconductor layer 19, in which the Al composition ratio monotonically decreases with increasing distance from the second semiconductor layer 19. This reduces the operating voltage, as described above. Therefore, if the Al composition ratio is reduced to the same as the average Al composition ratio of the high impurity concentration region at a distance of 5 nm or less from the position where the Al composition ratio of the electron barrier layer is maximum, the increase in operating voltage can be suppressed. Alternatively, the Al composition ratio may be reduced to the same as the average Al composition ratio of the high impurity concentration region at a distance of 3 nm or less from the position where the Al composition ratio of the electron barrier layer is maximum. This further suppresses the increase in operating voltage.

[0196] [2-2-14. Waveguide loss and operating voltage] Next, the relationship between the waveguide loss and operating voltage and the impurity concentration and film thickness of the low impurity concentration region of the second semiconductor layer will be described with reference to Fig. 18. Fig. 18 is a diagram showing the relationship between the waveguide loss and operating voltage and the impurity concentration and film thickness of the low impurity concentration region of the second semiconductor layer.

[0197] Graph (a) in Fig. 18 is a graph showing the Al composition ratio distribution and the impurity concentration distribution in the electron barrier layer and the second semiconductor layer 19, similar to graph (a) in Fig. 7. Graph (b) in Fig. 18 is a graph showing the relationship between the waveguide loss and the impurity (Mg) concentration in the low impurity concentration region. Graph (b) in Fig. 18 shows graphs showing simulation results when the film thickness of the low impurity concentration region is set to 50 nm, 150 nm, 170 nm, 270 nm, and 370 nm.

[0198] Graph (c) in Fig. 18 is a graph showing the relationship between the operating voltage of the semiconductor light-emitting device when operated at 300 mA and the impurity (Mg) concentration in the low impurity concentration region. Similar to graph (b), graph (c) in Fig. 18 also shows graphs showing simulation results when the film thickness of the low impurity concentration region is set to 50 nm, 150 nm, 170 nm, 270 nm, and 370 nm.

[0199] In this simulation, the thickness of the electron barrier layer is 5 nm. The electron barrier layer has a 5 nm thick Al composition ratio increasing region where the Al composition ratio increases linearly from 0 to the maximum Al composition ratio (30%). The maximum impurity concentration in the electron barrier layer is 2.8 × 10 19 cm -3 The maximum impurity concentration position is the interface of the electron barrier layer on the active layer 15 side. The impurity concentration in the high impurity concentration region of the second semiconductor layer 19 is 1×10 19 cm -3 It states that:

[0200] As shown in graphs (b) and (c) of FIG. 18, the impurity concentration in the low impurity concentration region is set to 1.5×10 18 cm -3 That's it, 3 x 10 18 cm -3 By setting the film thickness to 150 nm or more and 270 nm or less, the impurity concentration in the high impurity concentration region is 1×10 without providing a low impurity concentration region. 19 cm -3 Compared to the case where the operating voltage is kept constant at 4cm, the significant increase in the operating voltage is suppressed. -1 It is possible to achieve a low waveguide loss of 3.5 cm or less. The thickness of the low impurity concentration region may be set to 170 nm or more and 270 nm or less. This further suppresses the increase in operating voltage while achieving a low waveguide loss of 3.5 cm or less. -1 The following low waveguide loss can be achieved:

[0201] Although Fig. 18 shows the simulation results when the maximum Al composition ratio in the electron barrier layer is 0.3 (i.e., 30%), the same effect can be obtained even if the maximum Al composition ratio is 0.2 (i.e., 20%) or more and 0.35 (i.e., 35%) or less. Also, Fig. 18 shows the results when the maximum impurity concentration in the electron barrier layer is 2.8 × 10 19 cm -3 The simulation results for the case where the maximum impurity concentration in the electron barrier layer is 2 × 10 19 cm -3 The same effect can be obtained with the above.

[0202] [2-2-15. Waveguide loss and waveguide loss] Next, the relationship between the waveguide loss of the semiconductor light emitting device according to the second embodiment and the film thicknesses of the second optical guide layer 14 and the third optical guide layer 16 will be described with reference to FIG. 19 . FIG. 19 is a diagram showing the relationship between the waveguide loss and the confinement factor of the semiconductor light emitting device according to the second embodiment and the film thicknesses of the second optical guide layer 14 and the third optical guide layer 16 when the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is 3%. Graph (a) in FIG. 19 shows simulation results of the waveguide loss and the confinement factor versus the film thickness of the second optical guide layer 14 (horizontal axis) and the film thickness of the third optical guide layer 16 (vertical axis) when the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is 3%. Schematic diagram (b) in FIG. 19 is a diagram showing the distribution of the forbidden band width Eg of the semiconductor light emitting device according to the second embodiment. In schematic diagram (b), portions corresponding to the second optical guide layer 14 and the third optical guide layer 16 are hatched.

[0203] In this simulation, the electron barrier layer 118 is 5 nm thick, the first region is 2.5 nm thick, and the Al composition ratio in the first region increases linearly from 0% to 5%. The second region is also 2.5 nm thick, and the Al composition ratio in the second region increases linearly from 5% to the maximum Al composition ratio (30%).

[0204] The maximum impurity concentration is located at the interface of the electron barrier layer 118 on the active layer 15 side, and the maximum impurity concentration is set to 2×10 19 cm -3 It states that:

[0205] The second semiconductor layer 19 is disposed adjacent to the electron barrier layer 118 and has an impurity concentration of 2×10 18 cm -3 and has a low impurity concentration region with a thickness of 170 nm.

[0206] In this structure, graph (a) in FIG. 19 shows simulation results of the waveguide loss, the effective refractive index difference (ΔN) inside and outside the ridge, and the optical confinement factor in the stacking direction to the active layer 15 when the film thicknesses of the second optical guiding layer 14 and the third optical guiding layer 16 made of InGaN are changed and the ridge width W is set to 30 μm.

[0207] ΔN refers to the difference (N1-N2) between the effective refractive index in the stacking direction (N1) determined by the stacking structure of the region inside the ridge and the effective refractive index in the stacking direction (N2) determined by the stacking structure of the region outside the ridge. If ΔN is large, the lateral light confinement effect in the horizontal direction of the waveguide becomes greater, and the light confinement effect in the horizontal direction of the light distribution becomes greater. When a semiconductor light emitting device has a single ridge structure with a ridge width W of 20 μm or more, ΔN is 1×10 -3 If this is not the case, the effect of confining light within the ridge will be small, making it impossible to obtain stable horizontal transverse mode oscillation.

[0208] 19, increasing the total thickness of the second optical guide layer 14 and the third optical guide layer 16 increases the effect of confining the light distribution propagating through the waveguide to the active layer 15 in the stacking direction. In this case, the proportion of the light distribution in the active layer 15, the second optical guide layer 14, and the third optical guide layer 16 that are not doped with impurities increases, thereby reducing the effect of free carrier loss. As a result, the waveguide loss decreases.

[0209] For example, if the thickness of the second optical guide layer 14 is 180 nm and the thickness of the third optical guide layer 16 is 120 nm, ΔN is 4.8×10 -3 , the waveguide loss is 3.5cm -1 This results in stable horizontal transverse mode operation and a 4cm -1 As a result, the current-optical output characteristic becomes nearly linear, and a high slope efficiency is obtained. The slope efficiency is the ratio (ΔP / ΔI) of the increase in optical output (ΔP) to the injected current (ΔI) after laser oscillation.

[0210] Furthermore, from the graph (a) of FIG. 19, when the total film thickness of the second optical guide layer 14 and the third optical guide layer 16 is 350 nm, ΔN is 1.1×10 -3 In this case, the waveguide loss is 1.8 cm -1 Furthermore, when the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is 300 nm, ΔN can be reduced to 2×10 -3 In this case, the waveguide loss is 2.6 cm -1 It can be seen that it can be reduced to a certain extent.

[0211] Therefore, if the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is set to 300 nm or more and 350 nm or less, ΔN can be set to 1×10 -3 By setting the value to above, stable horizontal transverse mode operation can be obtained, and the waveguide loss is 2.6 cm -1 The following low loss waveguides can be realized:

[0212] Next, the relationship between the waveguide loss of the semiconductor light emitting device according to the second embodiment when the In composition ratio of the second light guiding layer 14 and the third light guiding layer 16 is 5% and the film thickness of the second light guiding layer 14 and the third light guiding layer 16 will be described with reference to FIG. 20 . FIG. 20 is a diagram showing the relationship between the waveguide loss and the confinement factor of the semiconductor light emitting device according to the second embodiment when the In composition ratio of the second light guiding layer 14 and the third light guiding layer 16 is 5% and the film thickness of the second light guiding layer 14 and the third light guiding layer 16. Graph (a) in FIG. 20 shows simulation results of the waveguide loss and the confinement factor versus the film thickness of the second light guiding layer 14 (horizontal axis) and the film thickness of the third light guiding layer 16 (vertical axis) when the In composition ratio of the second light guiding layer 14 and the third light guiding layer 16 is 5%. Schematic diagram (b) in FIG. 20 is a diagram showing the distribution of the forbidden band width Eg of the semiconductor light emitting device according to the second embodiment. In the schematic diagram (b), the portions corresponding to the second light guide layer 14 and the third light guide layer 16 are hatched.

[0213] In this simulation, the simulation was performed under the same conditions as those described with reference to FIG. 19, except that the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 was set to 5%.

[0214] In this structure, graph (a) in FIG. 20 shows simulation results of the waveguide loss, the effective refractive index difference (ΔN) inside and outside the ridge, and the optical confinement factor in the stacking direction to the active layer 15 when the film thicknesses of the second optical guiding layer 14 and the third optical guiding layer 16 made of InGaN are changed and the ridge width W is set to 30 μm.

[0215] 20, the increase in the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 increases the effect of confining the light distribution propagating through the waveguide to the active layer 15 in the stacking direction. In this case, the abundance ratio of the light distribution in the active layer 15, the second optical guide layer, and the third optical guide layer, which are not doped with impurities, increases, thereby reducing the effect of free carrier loss. As a result, the waveguide loss decreases.

[0216] For example, if the thickness of the second optical guide layer 14 is 180 nm and the thickness of the third optical guide layer 16 is 120 nm, ΔN is 3.9×10 -3 , the waveguide loss is 2cm -1 This results in stable horizontal transverse mode operation and a 2cm -1 As a result, the current-optical output characteristic becomes nearly linear, and high slope efficiency is obtained.

[0217] Furthermore, from the graph (a) of FIG. 20, when the total film thickness of the second optical guide layer 14 and the third optical guide layer 16 is 350 nm, ΔN is 1.1×10 -3 In this case, the waveguide loss is 1.2 cm -1 Furthermore, when the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is 300 nm, ΔN can be reduced to 2×10 -3 In the case of a waveguide loss of about 1.7 cm -1 It can be seen that it can be reduced to a certain extent.

[0218] Furthermore, if the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is 250 nm, ΔN is 3.5×10 -3 At this level, the waveguide loss is 2 cm -1 It can be seen that it can be reduced to a certain extent.

[0219] Therefore, if the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is set to 300 nm or more and 350 nm or less, ΔN can be set to 1×10 -3 By setting the value to above, stable horizontal transverse mode operation can be obtained, and the waveguide loss is 1.7 cm -1 The following low loss waveguides can be realized:

[0220] Furthermore, if the total thickness of the second optical guide layer 14 and the third optical guide layer 16 is set to 250 nm or more and 350 nm or less, ΔN can be set to 1×10 -3 By setting the value to above, stable horizontal transverse mode operation can be obtained, and the waveguide loss is 2cm -1 The following low loss waveguides can be realized:

[0221] From the above, when the In composition ratio range of each optical guide layer made of InGaN on the first conductive side (n-side) and the second conductive side (p-side) is 3% or more and 5% or less, if the total film thickness of the second optical guide layer 14 and the third optical guide layer 16 is 300 nm or more and 350 nm, the waveguide loss is 2.6 cm -1 While suppressing it to below 1 × 10 -3 The above ΔN can be realized.

[0222] [2-2-16. Current-light output characteristics and current-voltage characteristics] Next, the current-light output characteristics and current-voltage characteristics of the semiconductor light-emitting element according to embodiment 1 will be described with reference to Fig. 21. Fig. 21 is a diagram showing the current-light output characteristics and current-voltage characteristics of the semiconductor light-emitting element according to embodiment 1. Graphs (A), (B), (C), and (D) in Fig. 21 respectively show the current-light output characteristics at 25°C, the current-light output characteristics at 85°C, the current-voltage characteristics at 25°C, and the current-voltage characteristics at 85°C of the semiconductor light-emitting element.

[0223] Curve (a) in each graph shows the characteristics of a semiconductor light-emitting device according to a comparative example, which has the same configuration as the semiconductor light-emitting device according to the first embodiment except for the electron barrier layer. In this comparative example, the Al composition ratio distribution in the 5-nm-thick electron barrier layer is uniform, and the Al composition ratio is 30%. In addition, the electron barrier layer contains an impurity (Mg) at a concentration of 1.5×10 19 cm -3 It is uniformly doped with

[0224] Curve (b) in each graph shows the characteristics of a semiconductor light-emitting device according to another comparative example, which has the same configuration as the semiconductor light-emitting device according to embodiment 1 except for the electron barrier layer. In this comparative example 2, the Al composition ratio in the electron barrier layer has a distribution that linearly increases from 0% to 30% as it approaches the second semiconductor layer 19 in the stacking direction. In addition, the electron barrier layer contains an impurity (Mg) at a concentration of 1.5×10 19 cm -3 It is uniformly doped with

[0225] Curve (c) in each graph shows the characteristics of the semiconductor light emitting device 100 according to the first embodiment. In the semiconductor light emitting device 100, the Al composition ratio in the electron barrier layer 18 has a distribution that linearly increases as it approaches the second semiconductor layer 19 in the stacking direction. The Al composition ratio is 0% at the interface of the electron barrier layer 18 on the active layer 15 side, and is 30% at the interface on the second semiconductor layer 19 side. Furthermore, the impurity (Mg) concentration in the electron barrier layer 18 has a distribution that linearly decreases as it approaches the second semiconductor layer 19 in the stacking direction. The impurity concentration is 2.8×10 at the interface of the electron barrier layer 18 on the active layer 15 side. 19 cm -3 The average impurity concentration in the electron barrier layer 18 is 1.5×10 19 cm -3 is.

[0226] As can be seen from the graphs in FIG. 21 , the semiconductor light-emitting device according to the first embodiment can achieve a lower operating voltage and improved temperature characteristics by grading the Al composition ratio in the electron barrier layer 18 and positioning the maximum impurity concentration position close to the interface on the active layer 15 side.

[0227] (Embodiment 3) A semiconductor light emitting device according to embodiment 3 will be described. The semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 100 according to embodiment 1 in the configuration of the active layer, but is the same in other respects. The semiconductor light emitting device according to this embodiment will be described below with reference to FIGS. 22A and 22B, focusing on the differences from embodiment 1.

[0228] 22A is a schematic cross-sectional view showing a schematic configuration of a semiconductor light emitting device 100b according to the present embodiment. FIG. 22A shows a cross section perpendicular to the resonance direction of the semiconductor light emitting device 100b. As shown in FIG. 22A, the semiconductor light emitting device 100b according to the present embodiment includes a substrate 11, a first semiconductor layer 12, an active layer 15B, an electron barrier layer 18, and a second semiconductor layer 19, similar to the semiconductor light emitting device 100 according to the first embodiment. The semiconductor light emitting device 100b further includes a first light guiding layer 13, a second light guiding layer 14, a third light guiding layer 16, an intermediate layer 17, a contact layer 20, a current blocking layer 30, an n-side electrode 31, and a p-side electrode 32.

[0229] Active layer 15B according to this embodiment will be described with reference to Fig. 22B, which is a graph showing the conduction band energy distribution in the stacking direction of active layer 15B according to this embodiment.

[0230] 22B, the active layer 15B has a DQW structure including two well layers 15b and 15d and three barrier layers 15a, 15c, and 15e, similar to the active layer 15 according to the first embodiment. Each of the two well layers 15b and 15d is disposed between two adjacent barrier layers among the three barrier layers 15a, 15c, and 15e. In the present embodiment, the active layer 15B further includes four composition-graded layers 21a to 21d.

[0231] Each of the four graded-composition layers 21a-21d is disposed between one of the two well layers 15b and 15d and one of the three barrier layers 15a, 15c, and 15e adjacent to that well layer. The In composition ratio of each of the four graded-composition layers 21a-21d continuously changes from the In composition ratio of the corresponding well layer to the In composition ratio of the corresponding barrier layer. In other words, the In composition ratio of each of the four graded-composition layers 21a-21d at the interface with the adjacent well layer is the same as that of the adjacent well layer, and at the interface with the adjacent barrier layer is the same as that of the adjacent barrier layer. The In composition ratio of each of the four graded-composition layers 21a-21d monotonically decreases from the interface with the adjacent barrier layer to the interface with the adjacent well layer.

[0232] Next, the active layer 15B according to this embodiment will be described in more detail with reference to Fig. 23. Fig. 23 is a schematic diagram showing the band structure of the region near the well layer 15b according to this embodiment. Fig. 23 shows the band structures of the well layer 15b, the barrier layers 15a and 15c, and the composition-graded layers 21a and 21b.

[0233] In this structure, the film thicknesses of the compositionally graded layer 21a and the compositionally graded layer 21b are designated X1 and X2, respectively. In this case, the well layer 15b is positioned closer to the substrate 11 than the midpoint between the barrier layer 15a and the barrier layer 15c when X1-X2<0, is positioned at the midpoint when X1-X2=0, and is positioned closer to the second semiconductor layer 19 when X1-X2>0.

[0234] Similarly, the film thicknesses of the compositionally graded layer 21c and the compositionally graded layer 21d are designated X3 and X4, respectively (not shown). In this case, the well layer 15d is positioned closer to the substrate 11 than the midpoint between the barrier layer 15c and the barrier layer 15e when X3-X4<0, is positioned at the midpoint when X3-X4=0, and is positioned closer to the second semiconductor layer 19 (i.e., the p-type layer) when X3-X4>0.

[0235] Here, the results of calculating the band structure and the ground-state wave functions of carriers when the thicknesses of the compositionally graded layers 21a and 21b in the active layer 15B in the semiconductor light-emitting device 100b according to this embodiment are changed will be described with reference to FIG. 24 . FIG. 24 is a diagram showing the relationship between the band structure and wave function of the semiconductor light-emitting device 100b according to this embodiment and the thickness of the compositionally graded layers. Graphs (a) and (b) in FIG. 24 are graphs showing the band structures of the conduction band and the valence band and the ground-state wave functions of electrons and holes, respectively, when X1 is 0 nm, X2 is 1.6 nm, and the thickness of the well layer 15b is 2.8 nm. Graphs (c) and (d) in FIG. 24 are graphs showing the band structures of the conduction band and the valence band and the ground-state wave functions of electrons and holes, respectively, when X1 is 0.8 nm, X2 is 0.8 nm, and the thickness of the well layer 15b is 2.8 nm. Graphs (e) and (f) in Fig. 24 are graphs showing the band structures of the conduction band and valence band and the ground-state wave functions of electrons and holes when X1 is 1.6 nm, X2 is 0 nm, and the film thickness of the well layer 15b is 2.8 nm. The horizontal axis of graphs (a) to (f) in Fig. 24 represents the position in the stacking direction, and the vertical axis represents the potential. In graphs (a) to (f) in Fig. 24, the wave functions, band structures, and ground-level energies of carriers are shown by dotted lines, dashed lines, and solid lines, respectively. The solid lines in graphs (a), (c), and (e) in Fig. 24 represent the ground-level energy potential of electrons formed in the conduction band, and the solid lines in graphs (b), (d), and (f) represent the ground-level energy potential of holes formed in the valence band.

[0236] Fig. 24 also shows the relationship between the film thickness of well layer 15b and the cross-correlation between the electron wave function and the hole wave function. Graph (g) in Fig. 24 shows the relationship between the difference (X1-X2) between X1 and X2 and the cross-correlation when the film thickness of well layer 15b is 2 nm. Graph (h) in Fig. 24 shows the relationship between the difference (X1-X2) between X1 and X2 and the cross-correlation when the film thickness of well layer 15b is 2.8 nm. Graphs (g) and (h) in Fig. 24 show the calculation results of the cross-correlation when the sum of X1 and X2 is 0.8 nm, 1.6 nm, or 2.4 nm.

[0237] When the wave functions of the electron and hole are φe and φh, respectively, the cross-correlation between the electron wave function and the hole wave function is expressed by the following equation 1.

[0238]

number

[0239] In a semiconductor laser element in which a nitride semiconductor is stacked on the (0001) plane of the substrate 11, the graph showing the band potential of the well layer 15b is tilted so that the second semiconductor layer 19 (p-type layer) side is lower due to the piezoelectric effect. As a result, the electron wave function is biased toward the second semiconductor layer 19 side, and the hole wave function is biased toward the substrate 11 side. Furthermore, the electron wave function spreads more outward from the well layer 15b than the hole wave function, and is therefore more susceptible to the influence of the composition gradient layer.

[0240] When the graded composition layer 21a is disposed between the well layer 15b and the barrier layer 15a (i.e., when the graded composition layer 21a is disposed on the substrate 11 side of the well layer 15b), the electron wave function tends to spread toward the substrate 11 side, increasing the cross-correlation with the hole wave function. Furthermore, when the film thickness X1 of the graded composition layer 21a on the substrate 11 side of the well layer 15b is made thicker than the film thickness X2 of the graded composition layer 21b on the second semiconductor layer 19 side, the cross-correlation between the electron wave function and the hole wave function increases.

[0241] By disposing the compositionally graded layer 21a on the substrate 11 side of the well layer 15b, the bias of the electron wave function is reduced, and the cross-correlation between the electron wave function and the hole wave function is increased. The increased cross-correlation increases the probability of radiative recombination and improves the amplification gain in the active layer 15B, thereby reducing the oscillation threshold current and operating carrier density, and enabling reductions in leakage current and operating current.

[0242] Next, the relationship between the In composition ratio of the barrier layers 15a and 15c and the cross-correlation between the electron wave function and the hole wave function will be described with reference to FIG. 25. FIG. 25 is a graph showing the relationship between the In composition ratio of the barrier layers 15a and 15c according to this embodiment and the cross-correlation between the electron wave function and the hole wave function. Graphs (a) and (b) of FIG. 25 show the calculation results of the cross-correlation when the In composition ratio of the barrier layers 15a and 15c is 0.04 (i.e., 4%). Graphs (c) and (d) of FIG. 25 show the calculation results of the cross-correlation when the In composition ratio of the barrier layers 15a and 15c is 0. Graphs (a) and (c) of FIG. 25 show the relationship between the difference (X1-X2) between X1 and X2 and the cross-correlation when the film thickness of the well layer 15b is 2 nm. Graphs (b) and (d) in Fig. 25 show the relationship between the difference (X1-X2) between X1 and X2 and the cross-correlation when the film thickness of well layer 15b is 2.8 nm. Each graph in Fig. 25 shows the calculation results of the cross-correlation when the sum of X1 and X2 is 0.8 nm, 1.6 nm, or 2.4 nm.

[0243] When the graded composition layer according to this embodiment is provided, the electrons have a smaller effective mass than the holes, so the wave function spreads more outside the well layer 15b and is more susceptible to the influence of the graded composition layer. Therefore, increasing the In composition ratio of the barrier layers 15a and 15c has a greater effect on improving the cross-correlation.

[0244] When the thickness X1 of the composition gradient layer 21 a on the substrate 11 side of the well layer 15 b is relatively thicker than the thickness X2 of the composition gradient layer 21 b on the second semiconductor layer 19 side, the electron wave function tends to be distributed toward the center position in the stacking direction of the well layer 15 b, and the cross-correlation between the electron wave function and the hole wave function increases.

[0245] If the well layer 15b is too thin, the optical confinement in the stacking direction in the well layer 15b decreases, leading to an increase in the oscillation threshold current value. Conversely, if the well layer 15b is too thick, a high In composition ratio of 15% or more is required in the well layer 15b to obtain blue laser light in the 450 nm band. Therefore, the piezoelectric field in the well layer 15b increases, the band slope also increases, and the cross-correlation between the electron wave function and the hole wave function decreases. Therefore, the well layer 15b cannot be made too thick.

[0246] As shown in FIGS. 24 and 25, for example, the well layer has a thickness of 2 nm or more and 2.8 nm or less, the combined thickness (X1+X2) of the two adjacent compositionally graded layers to the well layer is 0.8 nm or more and 2.4 nm or less, and the In composition ratio of the barrier layer is 0% or more and 4% or less. The first conductivity type is n-type, and the second conductivity type is p-type. Of the multiple compositionally graded layers, the compositionally graded layer adjacent to one well layer on the substrate 11 side may be thicker than the compositionally graded layer adjacent to the electron barrier layer 18 side of the well layer. This configuration increases the cross-correlation without reducing the optical confinement in the well layer 15b. This reduces the oscillation threshold current and operating current, thereby suppressing increases in power consumption during high-temperature, high-output operation. This ensures the reliability of the semiconductor light-emitting device during long-term operation.

[0247] (Fourth embodiment) A semiconductor light-emitting device according to embodiment 4 will be described. The semiconductor light-emitting device according to this embodiment differs from the semiconductor light-emitting device 100b according to embodiment 3 in that the active layer has a single well layer, but is the same in other respects. The semiconductor light-emitting device according to this embodiment will be described below with reference to FIGS. 26A and 26B, focusing on the differences from the semiconductor light-emitting device 100b according to embodiment 3.

[0248] 26A is a schematic cross-sectional view showing a schematic configuration of a semiconductor light emitting device 100c according to the present embodiment. FIG. 26A shows a cross section perpendicular to the resonance direction of the semiconductor light emitting device 100c. As shown in FIG. 26A, the semiconductor light emitting device 100c according to the present embodiment includes a substrate 11, a first semiconductor layer 12, an active layer 15C, an electron barrier layer 18, and a second semiconductor layer 19, similar to the semiconductor light emitting device 100b according to the third embodiment. The semiconductor light emitting device 100c further includes a first light guiding layer 13, a second light guiding layer 14, a third light guiding layer 16, an intermediate layer 17, a contact layer 20, a current blocking layer 30, an n-side electrode 31, and a p-side electrode 32.

[0249] Active layer 15C according to this embodiment will be described with reference to Fig. 26B, which is a graph showing the conduction band energy distribution in the stacking direction of active layer 15C according to this embodiment.

[0250] 26B, the active layer 15C has one well layer 15b and two barrier layers 15a and 15b. That is, the active layer 15C has a single quantum well structure with one well layer. The active layer 15C further has composition gradient layers 21a and 21b. The composition gradient layers 21a and 21b have the same configuration as the composition gradient layers 21a and 21b according to the third embodiment.

[0251] The effects of the semiconductor light emitting device 100c according to the present embodiment will be described in comparison with a comparative example using Fig. 27A and Fig. 27B. Fig. 27A and Fig. 27B are schematic diagrams showing band structures and carrier states near the active layers of the semiconductor light emitting device according to the comparative example and the present embodiment, respectively. The semiconductor light emitting device according to the comparative example shown in Fig. 27A differs from the semiconductor light emitting device 100c according to embodiment 4 in that the Al composition ratio of the electron barrier layer is uniform, but is the same in other respects.

[0252] In the semiconductor light-emitting device according to the comparative example, the electron barrier layer is made of an AlGaN layer with a uniform Al composition ratio, and the potential of the valence band of the electron barrier layer decreases due to the piezoelectric effect occurring in the electron barrier layer (see the dashed line in FIG. 27A), thereby increasing the potential barrier against holes.

[0253] In an active layer with a single quantum well structure, the optical confinement factor in the stacking direction of the well layer is small, which tends to increase the oscillation threshold, the operating carry current, and the operating carrier density. Therefore, during high-temperature, high-power operation, electrons injected into the active layer are thermally excited and tend to leak into the second semiconductor layer.

[0254] Because the potential barrier for holes in the electron barrier layer is also high, a high operating voltage is required to inject holes into the active layer, resulting in increased power consumption. Increased power consumption leads to increased self-heating of the semiconductor light-emitting device. Thus, the use of an active layer with a single quantum well structure increases the likelihood of leakage current, increasing the operating current and operating carrier density during high-temperature, high-power operation, and resulting in thermal saturation of the optical output during high-temperature, high-power operation. This can result in reduced reliability during long-term operation at high temperatures and high power.

[0255] On the other hand, in the electron barrier layer 18 of the semiconductor light emitting device 100c according to this embodiment, the Al composition ratio gradually increases in the stacking direction toward the second semiconductor layer 19. Furthermore, Mg as an impurity is doped so as to have a maximum value at a position closer to the interface on the active layer 15C side than the middle position in the stacking direction of the Al composition ratio increased region.

[0256] As a result, the potential barrier of the electron barrier layer 18 against holes can be reduced without increasing waveguide loss, thereby achieving a low operating voltage.

[0257] In the active layer 15C, the In composition ratio is graded by arranging a graded composition layer 21a on the substrate 11 side of the well layer 15b, which increases the cross-correlation between the electron wave function and the hole wave function and reduces the hole barrier in the electron barrier layer 18.

[0258] As a result, in the semiconductor light emitting device 100c according to this embodiment, leakage current generation can be suppressed in the active layer 15C having a single quantum well structure, and the operating current can be reduced. Therefore, by using the single quantum well structure and the electron barrier layer structure according to this embodiment, the semiconductor light emitting device 100c using the active layer having a single quantum well structure can ensure reliability during long-term operation at high temperatures and high power outputs.

[0259] (Modification of the fourth embodiment) A modified example of the semiconductor light-emitting element according to the fourth embodiment will be described. In the above embodiments, the semiconductor light-emitting element that emits blue laser light with an oscillation wavelength in the 450 nm band has been described, but the wavelength band of the laser light emitted by the semiconductor light-emitting element is not limited to this. In this modified example, a semiconductor light-emitting element that emits blue-violet laser light with an oscillation wavelength of 405 nm will be described as an example of a semiconductor light-emitting element having an oscillation wavelength other than the 450 nm band, focusing on the differences from the semiconductor light-emitting element 100c according to the fourth embodiment.

[0260] The semiconductor light emitting device according to this modification has a layer configuration similar to that of the semiconductor light emitting device 100c according to embodiment 4 shown in Figures 26A and 26B. That is, the semiconductor light emitting device according to this modification includes a substrate 11, a first semiconductor layer 12, an active layer 15C, an electron barrier layer 18, and a second semiconductor layer 19. The semiconductor light emitting device according to this modification further includes a first light guiding layer 13, a second light guiding layer 14, a third light guiding layer 16, an intermediate layer 17, a contact layer 20, a current blocking layer 30, an n-side electrode 31, and a p-side electrode 32.

[0261] The first semiconductor layer 12 according to this modification is an n-type AlGaN layer with a thickness of 3.0 μm. The first optical guiding layer 13 is an n-type GaN layer with a thickness of 130 nm. The second optical guiding layer 14 is an InGaN layer with a thickness of 170 nm. The third optical guiding layer 16 is an InGaN layer with a thickness of 40 nm. The intermediate layer 17 is a p-type GaN layer with a thickness of 3 nm. The electron barrier layer 18 is a p-type AlGaN layer. The second semiconductor layer 19 is a p-type AlGaN cladding layer with a thickness of 660 nm. The contact layer 20 is a p-type GaN layer with a thickness of 50 nm. The current blocking layer 30, the n-side electrode 31, and the p-side electrode 32 have the same configurations as those of the semiconductor light emitting device 100c according to embodiment 4 (and the semiconductor light emitting device 100 according to embodiment 1). In this modification, the ridge width W is also about 30 μm. The cavity length of the semiconductor light emitting device is about 1200 μm.

[0262] In this modification, in order to confine light in the stacking direction in the active layer 15C, the Al composition ratio of the first semiconductor layer 12 made of an n-type AlGaN layer and the second semiconductor layer 19 made of a p-type AlGaN layer is set to 0.026 (2.6%). As a result, the refractive indexes of the first semiconductor layer 12 and the second semiconductor layer 19 are smaller than the effective refractive index in the light distribution region of the semiconductor light emitting element, and therefore they function as cladding layers.

[0263] The active layer 15C according to this modification has a single quantum well structure, including a single well layer 15b and two barrier layers 15a and 15c. The well layer 15b is made of undoped InGaN with a thickness of 7.5 nm and an In composition ratio of 0.066 (6.6%) to obtain laser oscillation with a wavelength of 405 nm. The barrier layers 15a and 15c are InGaN layers with an In composition ratio of 0.008 (0.8%) and are 20 nm and 18 nm thick, respectively.

[0264] The active layer 15C further includes graded composition layers 21a and 21b. The graded composition layer 21a is disposed between the barrier layer 15a and the well layer 15b, has a thickness of 0.8 nm, and has an In composition ratio that varies continuously from 0.8% to 6.6% in the stacking direction. The graded composition layer 21b is disposed between the barrier layer 15c and the well layer 15b, has a thickness of 0.2 nm, and has an In composition ratio that varies continuously from 6.6% to 0.8% in the stacking direction.

[0265] To achieve laser oscillation in the 400 nm wavelength band, the well layer 15b may have a thickness of 4 nm to increase the energy between quantum levels formed in the well layer 15b. Alternatively, the In composition ratio of the well layer 15b may be set to 0.056 (5.6%) to increase the bandgap energy of the well layer 15b itself. In this case, the In composition ratio of the graded composition layer 21a changes from 0.8% to 5.6% as it approaches the well layer 15b in the stacking direction, and the In composition ratio of the graded composition layer 21b changes from 5.6% to 0.8% as it moves away from the well layer 15b in the stacking direction. Alternatively, the barrier layers 15a and 15c may be GaN layers to increase the energy between quantum levels formed in the well layer 15b. In this case, the In composition ratio of the graded composition layers 21a and 21b changes from 0% to the In composition ratio of the well layer as it approaches the well layer 15b in the stacking direction.

[0266] Furthermore, the second optical guide layer 14 and the third optical guide layer 16 contain In, and thus have a higher refractive index than the first semiconductor layer 12 made of n-type AlGaN and the second semiconductor layer 19 made of p-type AlGaN. This increases the effective refractive index for the light distribution propagating through the waveguide corresponding to the ridge, and improves the light confinement effect of the first semiconductor layer 12 and the second semiconductor layer 19 in the stacking direction of the light distribution. This therefore reduces waveguide loss in the semiconductor light emitting device.

[0267] Furthermore, in the 405 nm wavelength band, the difference in refractive index between AlGaN and InGaN at the same composition ratio is greater than in the 450 nm wavelength band, and the light confinement effect in the stacking direction of the light distribution in the active layer 15C can be improved without forming the second optical guiding layer 14. For this reason, in this modification, it is not necessarily necessary to form the second optical guiding layer 14 made of InGaN.

[0268] Here, if the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is small, the optical confinement effect in the stacking direction of the well layer is reduced, resulting in a high oscillation threshold and operating carrier density. This results in an increase in leakage current during high-temperature operation. Conversely, if the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is large, optical absorption loss occurs for laser light with a wavelength of 405 nm. Therefore, the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 may be set to 0.001 (0.1%) or more and 0.008 (0.8%) or less. In this modification, the In composition ratio of the second optical guide layer 14 and the third optical guide layer 16 is set to 0.003 (0.3%), thereby increasing the optical confinement coefficient in the stacking direction of the well layer.

[0269] Furthermore, if the In composition ratio of the second optical guide layer 14 is set to 0.008 (0.8%), which is higher than the In composition ratio of the third optical guide layer 16, the optical distribution of the waveguide can be positioned closer to the first semiconductor layer 12. 18 cm -3 From 1×10 18 cm -3 The resistance of the first semiconductor layer 12 can be reduced by doping with n-type impurities at a concentration of 1×10 19 cm -3 This impurity concentration is lower than that of the second semiconductor layer 19, which is doped with an impurity at a concentration of about 1000 . Therefore, by shifting the light distribution closer to the first semiconductor layer 12, it is possible to reduce free carrier loss and therefore waveguide loss.

[0270] The first optical guiding layer 13 is a GaN layer having a lattice constant and bandgap energy between those of the first semiconductor layer 12 and the second optical guiding layer 14. This reduces spike-like deformation of the band structure due to the piezoelectric effect at the interface compared to when the second optical guiding layer 14 is formed directly on the first semiconductor layer 12 made of AlGaN. This facilitates electrical conduction of electrons to the active layer 15C.

[0271] The intermediate layer 17 is a GaN layer having a lattice constant and a forbidden band energy between those of the electron barrier layer 18 made of AlGaN and those of the third optical guiding layer 16 made of InGaN.

[0272] Furthermore, if the second optical guide layer 14 containing In and having compressive lattice strain, the active layer 15C, and the third optical guide layer 16 are stacked in this order, and then the electron barrier layer 18 made of an AlGaN layer having tensile lattice strain is stacked directly on top of them, the stress generated at the interface will increase, and crystal defects may occur. On the other hand, if the intermediate layer 17 is a GaN layer with a thickness of 3 nm, the stress applied between the third optical guide layer 16 and the electron barrier layer 18 can be alleviated.

[0273] Furthermore, the third light guide layer 16 may have a composition gradient region 16a on its intermediate layer 17 side, in which the In composition ratio gradually changes in the stacking direction from the In composition ratio at the interface between the third light guide layer 16 and the active layer 15C to the In composition ratio of the intermediate layer 17. This makes it possible to disperse polarization charges due to the piezoelectric effect at the interface between the third light guide layer 16 and the intermediate layer 17 in the composition gradient region 16a. This makes it possible to suppress spike-like deformation of the band potential formed at the interface between the third light guide layer 16 and the intermediate layer 17, and reduce the operating voltage.

[0274] Furthermore, if intermediate layer 17 becomes too thick, the distance between second semiconductor layer 19, which has a low refractive index, and active layer 15C increases, weakening the light confinement effect in the stacking direction of active layer 15C. For this reason, intermediate layer 17 may be as thin as possible, less than 10 nm. In this modification, intermediate layer 17 has a thickness of 3 nm.

[0275] In addition, in the semiconductor light-emitting device according to this modification, a dielectric current blocking layer 30 made of SiO2 and having a thickness of 0.1 μm is formed on the ridge sidewalls. In this structure, the current injected from the contact layer 20 flows only to the ridge portion due to the current blocking layer 30. Therefore, the current injection is concentrated in the region of the active layer 15C located below the ridge bottom. This allows the carrier population inversion required for laser oscillation to be achieved with a relatively small injection current of approximately 100 mA. Light emitted by the recombination of carriers consisting of electrons and holes injected into the active layer 15C is confined in the stacking direction of the active layer 15C by the second optical guide layer 14, the third optical guide layer 16, the first semiconductor layer 12, and the second semiconductor layer 19. In the direction perpendicular to the stacking direction (horizontal direction), optical confinement occurs because the refractive index of the current blocking layer 30 is lower than that of the first semiconductor layer 12 and the second semiconductor layer 19. Furthermore, the current blocking layer 30 exhibits low optical absorption of laser oscillation light, thereby achieving a low-loss waveguide. In addition, the distribution of light propagating through the waveguide can penetrate significantly into the current blocking layer, achieving a 1×10 -3 Furthermore, by adjusting the distance dp between the current blocking layer 30 and the active layer 15C, it is possible to precisely realize a ΔN of the order of 10 -3 Therefore, it is possible to obtain a semiconductor light emitting device with a high output and a low operating current while precisely adjusting the light distribution. In this modification, ΔN is 3×10 -3 The distance dp etc. is adjusted so that

[0276] The electron barrier layer 18 is formed on the intermediate layer 17 made of p-type GaN, and the energy of the band gap of the electron barrier layer 18 is larger than that of the second semiconductor layer 19 made of p-type AlGaN. This increases the potential of the conduction band of the electron barrier layer 18, forming an energy barrier. As a result, the phenomenon in which electrons injected into the active layer 15C are thermally excited and leak into the second semiconductor layer 19 can be suppressed, thereby improving the high-temperature operating characteristics of the semiconductor light-emitting device.

[0277] In this modification, the electron barrier layer 18 has a thickness of 5 nm. The electron barrier layer 18 has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer 19. The Al composition ratio increasing region has a first region with a thickness of 2.5 nm in which the Al composition ratio changes at a first rate of change, and a second region with a thickness of 2.5 nm located between the first region and the second semiconductor layer 19 in which the Al composition ratio changes at a second rate of change, the second rate of change being greater than the first rate of change. In the first region, the Al composition ratio increases linearly from 0% to 5%, and in the second region, the Al composition ratio increases linearly from 5% to 30%.

[0278] The maximum impurity concentration of Mg in the electron barrier layer 18 is 2×10 19 cm -3 The maximum impurity concentration position in the stacking direction is located closer to the interface on the active layer 15 side than the middle position in the stacking direction of the Al composition ratio increased region of the electron barrier layer 18.

[0279] The low impurity concentration region of the second semiconductor layer 19 has a film thickness of 170 nm and an impurity concentration of 2×10 18 cm -3 This achieves both low waveguide loss and low operating voltage.

[0280] In the semiconductor light-emitting element according to this modification, by using the Al composition ratio distribution shape of the electron barrier layer 18, the impurity doping profile, and the gradient structure of the composition ratio at the heterointerface described above, it is possible to realize a 405 nm blue-violet laser element with excellent temperature characteristics and a low operating voltage, similar to a 450 nm band blue laser element.

[0281] Furthermore, in the semiconductor light emitting device according to this modification, if the ridge width W is set to 30 μm or more, an ultra-high output laser device capable of operating at a high output of the watt class can be realized.

[0282] (Variations, etc.) Although the semiconductor light emitting device according to the present disclosure has been described above based on the respective embodiments, the present disclosure is not limited to the above-described respective embodiments.

[0283] For example, in the above embodiments, a blue laser element with an oscillation wavelength of 450 nm and a blue-violet laser element with an oscillation wavelength of 405 nm have been described, but the present disclosure can also be applied to nitride-based laser elements using nitrides in other wavelength bands.

[0284] Furthermore, in each of the above semiconductor light-emitting devices, the number of well layers in the active layer is one or two, but the number of well layers is not limited to these. The number of well layers may be one or more. In other words, the active layer may have multiple barrier layers and one or more well layers.

[0285] The number of compositionally graded layers may also be determined appropriately depending on the number of well layers. That is, the active layer may have a plurality of barrier layers containing at least Ga, one or more well layers, and a plurality of compositionally graded layers. Each of the one or more well layers may be disposed between two adjacent barrier layers of the plurality of barrier layers, and each of the plurality of compositionally graded layers may be disposed between one well layer of the one or more well layers and one barrier layer of the plurality of barrier layers adjacent to the one well layer.

[0286] In addition, in each of the above embodiments, the semiconductor light emitting element includes the first optical guide layer, the second optical guide layer, the third optical guide layer, and the intermediate layer, but these layers are not essential components.

[0287] In addition, although the above-described embodiments have been described with reference to examples in which the semiconductor light-emitting element is a semiconductor laser element, the semiconductor light-emitting element is not limited to a semiconductor laser element. For example, the semiconductor light-emitting element may be a superluminescent diode.

[0288] Furthermore, in the semiconductor light-emitting devices according to the above-described embodiments and their modifications, current confinement is achieved using a ridge structure, but the means for achieving current confinement is not limited to this, and an electrode stripe structure, a buried structure, or the like may also be used.

[0289] This disclosure also includes forms obtained by applying various modifications to the above-mentioned embodiments that a person skilled in the art would conceive, and forms realized by arbitrarily combining the components and functions of the above-mentioned embodiments within the scope of the present disclosure. [Industrial Applicability]

[0290] The semiconductor light emitting element of the present disclosure can be applied to, for example, an in-vehicle headlight light source as a light source with low power consumption even when operated at high temperatures. [Explanation of symbols]

[0291] 11 Circuit Board 12 First semiconductor layer 13 First optical guide layer 14 Second optical guide layer 15, 15B, 15C active layer 15a, 15c, 15e Barrier layers 15b, 15d well layer 16 Third optical guide layer 16a Composition gradient region 17 Middle Class 18, 18A, 118 Electron barrier layer 19 Second semiconductor layer 20 Contact layer 21a, 21b, 21c, 21d Composition gradient layer 30 Current Blocking Layer 31 n-side electrode 32 p side electrode 100, 100b, 100c Semiconductor light emitting element 118a 1st area 118b Second area 201a, 201b Well layer 202a, 202b, 202c barrier layers 211 n-type layer 212 Active layer 213 p-type layer 225 Lower cladding layer 228 p-side electron confinement layer 230 Upper cladding layer 231b First nitride semiconductor layer 232b Second nitride semiconductor layer 412 Cladding layer 413 Second optical guide layer 414 Third optical guide layer 415 Active layer 416 First optical guide layer 417 Middle Class 418 Electron Barrier Layer 419 Cladding Layer

Claims

1. a first semiconductor layer disposed above the substrate and including a first conductivity type nitride-based semiconductor; an active layer disposed above the first semiconductor layer and including a nitride-based semiconductor containing Ga or In; an electron barrier layer of a second conductivity type different from the first conductivity type, the electron barrier layer being disposed above the active layer and including a nitride-based semiconductor containing at least Al; a second semiconductor layer disposed above the electron barrier layer and including the second conductivity type nitride-based semiconductor; a first conductive-side optical guide layer made of InGaN and disposed between the active layer and the first semiconductor layer; a second conductive-side optical guiding layer made of InGaN, disposed between the active layer and the electron barrier layer; the electron barrier layer has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer, The maximum concentration position of the second conductivity type impurity in the electron barrier layer is in an Al composition ratio increased region of the electron barrier layer. Semiconductor light emitting element.

2. a first semiconductor layer disposed above the substrate and including a first conductivity type nitride-based semiconductor; an active layer disposed above the first semiconductor layer and including a nitride-based semiconductor containing Ga or In; an electron barrier layer of a second conductivity type different from the first conductivity type, the electron barrier layer being disposed above the active layer and including a nitride-based semiconductor containing at least Al; a second semiconductor layer disposed above the electron barrier layer and including the second conductivity type nitride-based semiconductor; the electron barrier layer has an Al composition ratio increasing region in which the Al composition ratio monotonically increases toward the second semiconductor layer, a distribution of the concentration of the second conductivity type impurity in the stacking direction of the electron barrier layer has a maximum value peak on the inside of the electron barrier layer from the interface of the electron barrier layer on the active layer side and on the inside of the electron barrier layer from the interface of the electron barrier layer on the second semiconductor layer side, The active layer is a plurality of barrier layers containing at least Ga; one or more well layers; a plurality of composition gradient layers; each of the one or more well layers is disposed between two adjacent barrier layers among the plurality of barrier layers; Each of the plurality of compositionally graded layers includes one well layer among the one or more well layers, and disposed between the one well layer and one adjacent barrier layer among the plurality of barrier layers, The In composition ratio of each of the plurality of composition-graded layers changes continuously from the In composition ratio of one of the well layers to the In composition ratio of one of the barrier layers. Semiconductor light emitting element.

3. The active layer is a plurality of barrier layers containing at least Ga; one or more well layers; a plurality of composition gradient layers; each of the one or more well layers is disposed between two adjacent barrier layers among the plurality of barrier layers; each of the plurality of compositionally graded layers is disposed between one well layer of the one or more well layers and one barrier layer of the plurality of barrier layers adjacent to the one well layer; The In composition ratio of each of the plurality of composition-graded layers changes continuously from the In composition ratio of one of the well layers to the In composition ratio of one of the barrier layers. The semiconductor light emitting device according to claim 1 .

4. the first conductivity type is n-type, the second conductivity type is p-type, Among the plurality of compositionally graded layers, the compositionally graded layers adjacent to each other on the substrate side of one of the well layers are thicker than the compositionally graded layers adjacent to each other on the electron barrier layer side of the one of the well layers. The semiconductor light-emitting device according to claim 2 or 3.

5. The total thickness of two of the plurality of composition gradient layers adjacent to one well layer is 0.8 nm or more and 2.4 nm or less. The semiconductor light-emitting element according to any one of claims 2 to 4.

6. The number of the one or more well layers is 1. The semiconductor light emitting device according to claim 5 .

7. The average lattice constant of the electron barrier layer is smaller than the average lattice constant of the substrate. The semiconductor light emitting device according to any one of claims 1 to 6.

8. The average lattice strain generated in the electron barrier layer in a direction parallel to the principal surface of the substrate is tensile. The semiconductor light emitting device according to any one of claims 1 to 6.

9. The substrate has an In atomic composition ratio of x and a Ga atomic composition ratio of y. ｘ Ga ｙ Al １－ｘ－ｙ N (0≦x<1, 0<y≦1, 0≦1-x-y≦1) The semiconductor light-emitting device according to claim 7 or 8.

10. The impurity concentration of the second conductivity type in the electron barrier layer monotonically decreases from the maximum impurity concentration position toward the second semiconductor layer. The semiconductor light-emitting device according to claim 1 or 3.

11. a second conductive-side optical guide layer containing In disposed between the active layer and the electron barrier layer; The semiconductor light emitting device according to claim 2 .

12. a first conductive-side optical guide layer that is disposed between the active layer and the first semiconductor layer and contains In; The total thickness of the first conductive side light guide layer and the second conductive side light guide layer is 250 nm or more. The semiconductor light emitting device according to claim 11 .

13. the second conductivity type Ga １－ｘ In ｘ N (0≦x<1) intermediate layers; The intermediate layer has a smaller In composition ratio than the second conductive side light guide layer. The semiconductor light-emitting element according to claim 1 , 3 , 11 , or 12 .

14. the second conductivity type Ga １－ｘ In ｘ N (0≦x<1) intermediate layers; the intermediate layer has a smaller In composition ratio than the second conductive-side light guide layer, the intermediate layer contains impurities of the second conductivity type, The maximum concentration position of the second conductivity type impurity in the intermediate layer and the electron barrier layer is located in the intermediate layer. The semiconductor light-emitting device according to claim 11 or 12.

15. the Al composition ratio increasing region has a first region in which the Al composition ratio changes at a first rate of change, and a second region disposed between the first region and the second semiconductor layer and in which the Al composition ratio changes at a second rate of change; The second rate of change is greater than the first rate of change. The semiconductor light-emitting element according to any one of claims 1 to 14.

16. The second semiconductor layer has a low impurity concentration region disposed adjacent to the electron barrier layer, and a high impurity concentration region disposed farther from the electron barrier layer than the low impurity concentration region and having a higher impurity concentration of the second conductivity type than the low impurity concentration region. The semiconductor light-emitting element according to any one of claims 1 to 15.

17. the maximum value of the Al composition ratio of the electron barrier layer is 0.35 or less; The maximum value of the second conductivity type impurity concentration of the electron barrier layer is 2×10 １９ cm －３ That's all, The impurity concentration of the low impurity concentration region of the second semiconductor layer is 1.5×10 １８ cm －３ That's it, 3 x 10 １８ cm －３ is as follows: The thickness of the low impurity concentration region of the second semiconductor layer is 150 nm or more and 270 nm or less. The semiconductor light emitting device according to claim 16 .

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