Power converter
The power converter with parallel stages and optical fiber communication addresses power handling limitations by enhancing switching coordination and reducing interference, improving power conversion efficiency.
Patent Information
- Application Number
- JP2025078134
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-05-14
- Filing Date
- 2025-05-08
- Publication Date
- 2025-11-27
AI Technical Summary
Power converters have limited power handling capabilities, and parallel power stages require precise time-controlled switching to avoid interference, necessitating complex connections and communication channels.
A power converter with multiple electrically parallel power stages uses a single uplink and downlink plastic optical fiber for each stage, employing serializers and deserializers to convert multiple parallel signals into a single serial data stream, reducing connections and interference.
This configuration enhances power handling capacity and reduces interference by using plastic optical fibers for robust communication, allowing efficient power conversion between DC voltages.
Smart Images

Figure 2025173483000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to power converters, and more particularly to power converters having multiple power stages. Introduction
[0002] Electrical power systems whose power source is comprised of one or more battery modules are commonly used to provide power in vehicles, boats, small aircraft, and other modes of transportation, as well as in industrial applications such as mining vehicles and equipment. The flexibility of such systems also makes them attractive as power banks for home and industrial use. In all of these systems, it is often desirable to convert the native DC voltage output from one or more battery modules to a different DC voltage required by the power unit in the vehicle or other load units in the home and industrial systems.
[0003] FIG. 1 is a schematic diagram of a vehicle 1, such as a car, truck, or truck tractor unit, powered by a battery 2 comprising multiple battery modules. Power from the battery is supplied via a power chain to a motor 3 for providing drive to the wheels of the vehicle. Typically, the motor is an AC motor, and in such cases, an inverter in the power chain converts battery DC power to AC power for driving the AC motor. A control unit 4 may control the motor 3 based on driver requirements, etc., and also controls the power supplied by the battery.
[0004] FIG. 2 is a block diagram illustrating in more detail some of the interactions between power system components of a suitable power chain that may be used in the vehicle of FIG. 1 or other application areas. Battery 11 provides DC power to power converter 12. Power converter 12 provides DC-DC conversion from the battery's first voltage to a second voltage used by an inverter. In a vehicle, the first voltage is typically higher than the second voltage, and the voltage conversion is performed by carefully controlled switching action of power semiconductors such as MOSFETs. Inverter 13 converts the DC second voltage output provided by the power converter to an AC voltage for supplying motor 14 for powering the vehicle. Often, the inverter and power converter may be configured to operate in both directions, either using battery power to provide motive power or using the vehicle's motion to charge the battery.
[0005] A battery management unit (BMU) monitors the battery modules and controls power delivery to the power chain, thereby optimizing battery life, power delivery, and charging. A power converter driver (PCD) unit 17 controls the power converters so that power is delivered from the battery to the motor in the desired manner, for example as requested by a driver or control unit. The battery management unit 16 and the power converter driver 17 may be co-located, such as in the combined controller 15, or may be located separately. For example, the power converter driver may be located in the power converter, and the battery management unit may be located with the battery modules.
[0006] It would be desirable to address the problems and limitations of the prior art. Summary of the Invention
[0007] Power converters may have limited power handling capabilities. To increase power handling capabilities, multiple power stages may be arranged in parallel within the power converter. In such parallel arrangements, it is important that each power stage operates in a carefully time-controlled manner relative to the other power stages. For example, if the parallel power stages use pulse-width modulation for switching, it is desirable that the switching be time-correlated with the other power stages to avoid switching periods slightly out of phase with the desired phase relationship. This places demands on the connections and communication channels to each power stage, at least in terms of physically managing multiple cables to avoid interference between such cables, which are likely to be arranged close to each other, and avoiding the weight and complexity challenges of electrical shielding required to avoid such interference.
[0008] The present invention provides an apparatus including a power converter unit having multiple electrically parallel power stages, each power stage configured to convert power in either direction between a first DC voltage and a second DC voltage. The power converter is split into multiple power stages to increase power handling capacity. Because MOSFETs, other power converter switching components, or transistors may have limited power handling capacity, splitting the power conversion across multiple parallel stages increases power handling.
[0009] Each power stage includes one or more MOSFET modules and one or more gate drive units configured to deliver gate drive signals to MOSFETs in the MOSFET modules to cause power conversion through MOSFET switching. Each power stage includes a plurality of sensors configured to measure physical parameters of the power stage. In embodiments, the MOSFETs may alternatively be other power switching components or other types of transistors, and the gate drive units may be switching control units or base control / drive units, respectively.
[0010] The apparatus further comprises a control unit remote from the power converter unit, the control unit being arranged to receive one or more control signals from the power stage indicative of the required power conversion characteristics, e.g., the first and second DC voltages, and the measured physical parameters, and to generate gate drive signals for use by the gate drive unit in controlling the MOSFETs.
[0011] Each power stage is coupled to the control unit via a single uplink plastic optical fiber provided to carry the measured physical parameter to the control unit for use in generating the gate drive signal, and a single downlink plastic optical fiber provided to carry the gate drive signal from the control unit to the power stage for use in delivering the gate drive signal to the MOSFET module.
[0012] Each power stage further comprises an uplink optical interface and a serializer configured to serialize the measured physical parameters via the uplink optical interface over an uplink plastic optical fiber for transmission to a control unit. The control unit comprises, for each power stage, a downlink optical interface and a serializer configured to serialize gate drive signals for that power stage via the downlink optical interface over the downlink optical fiber. Using only a single uplink optical fiber and a single downlink optical fiber reduces the number of connections to each power stage. This is made possible by using serializers and deserializers to convert multiple parallel signals into a single upstream and a single downstream serial data stream for each power stage. Plastic optical fiber is used to provide increased robustness over conventional glass or silica fiber.
[0013] Each power stage may further comprise a downlink optical interface and a deserializer arranged to deserialize gate drive signals received from the downlink optical interface and provide the gate drive signals to the gate drive unit for controlling the MOSFETs. The control unit may further comprise an uplink optical interface and a deserializer arranged to deserialize measured physical parameters received from the uplink optical interface for use in generating the gate drive signals.
[0014] Each power stage preferably includes a separate serializer IC from the other power stages, and each power stage preferably includes a separate deserializer IC from the other power stages. The serializer and deserializer ICs for a given power stage may be provided as a single combined serializer / deserializer IC.
[0015] The serializer may be configured, for example, to use 8b / 10b encoding or a similar encoding in which several bits of data are encoded as symbols.
[0016] The gate drive signal may include a PWM control signal.
[0017] The measured physical parameters may include one or more of voltage, current, and temperature measured at each power stage.
[0018] Each power stage preferably has a single gate drive unit configured to receive a gate drive signal and deliver the gate drive signal to two MOSFET modules, a first of the two MOSFET modules being disposed on a first side of the power converter bridge and a second of the two MOSFET modules being disposed on a second side of the power converter bridge.
[0019] Each gate drive unit may include a first gate drive circuit and a second gate drive circuit, the first gate drive circuit may be configured to send a gate drive signal to the first MOSFET module, and the second gate drive circuit may be configured to send a gate drive signal to the second MOSFET module.
[0020] For each power stage, the serializer of the control unit may be configured to serialize gate drive signals for one or more MOSFETs in the first MOSFET module with gate drive signals for one or more MOSFETs in the second MOSFET module, and the downlink optical interface is configured to transmit the serialized gate drive signals over the downlink plastic optical fiber to the gate drive unit of the respective power stage.
[0021] The apparatus may further comprise, in each gate drive unit, a digital isolator arranged to provide isolation between the gate drive signals for the first MOSFET module and the second MOSFET module.
[0022] The MOSFETs may be arranged in a buck-boost configuration. Four MOSFETs may be provided to form the buck-boost configuration for each power stage. Of the four MOSFETs, two may be provided in a first MOSFET module and two may be provided in a second MOSFET module. The first MOSFET module may be on the input or battery side of the power converter unit, and the second MOSFET module may be on the output or inverter / motor side of the power converter unit. A reactance component may be provided between the two MOSFET modules.
[0023] The uplink plastic optical fiber and the downlink plastic optical fiber may be configured as duplex optical links such that the control unit communicates with the power stages by a respective duplex optical link to each power stage. Preferably, only one duplex optical link may be provided to each power stage.
[0024] The electrically parallel power stages may be configured to output a voltage in the range of 0 to 2000 V or 5000 V, such as 0 to 2500 V, or in the range of 100 to 2000 V or 5000 V, such as 1500 to 2500 V. The apparatus may be configured such that the combined converted power output of the multiple power stages is in the range of hundreds of kW to tens of MW. Alternatively, the battery voltage may be on the order of hundreds of volts, with the power stages stepping down the voltage to tens of volts.
[0025] The plastic optical fiber to each power stage may be at least 0.5 or 1 meter long, and up to 5 or 10 meters long.
[0026] The present invention provides a vehicle comprising an apparatus as described herein, a battery formed of one or more battery modules, and an electric drive unit or motor. The apparatus provides power conversion in either direction between the one or more battery modules and the electric drive unit. The vehicle may be a wheeled vehicle.
[0027] The present invention further provides a method for controlling a power converter with multiple power stages, the method including: receiving, in a control unit, one or more control signals and measured physical parameters from the multiple power stages indicating characteristics of required power conversion (such as first and second DC voltages); generating gate drive signals for use by gate drive units in controlling MOSFETs of the one or more power stages based on the received one or more control signals and the measured physical parameters; serializing the gate drive signals for each power stage; transmitting the serialized gate drive signals over downlink optical fibers via a downlink optical interface to an optical interface in each power stage; receiving the serialized gate drive signals at the power stages and deserializing the gate drive signals in a deserializer for each power stage; and delivering the gate drive signals to MOSFETs of one or more MOSFET modules to cause power conversion by MOSFET switching.
[0028] The method may further include measuring one or more physical parameters at each power stage, serializing the measured one or more physical parameters, transmitting the serialized measured one or more physical parameters to a control unit via an uplink plastic optical fiber, and deserializing the measured one or more physical parameters at the control unit.
[0029] The present disclosure may further provide an apparatus comprising a power converter unit comprising a plurality of electrically parallel power stages, each power stage arranged to convert power in either direction between a first DC voltage and a second DC voltage, the power converter unit comprising one or more MOSFET modules, one or more gate drive units arranged to deliver gate drive signals to MOSFETs in the MOSFET modules to cause power conversion by MOSFET switching, a control unit remote from the power converter unit arranged to receive one or more control signals indicative of characteristics of the power conversion required and to generate gate drive signals for use by the gate drive units in controlling the MOSFETs; each power stage is coupled to the control unit via a single downlink plastic optical fiber provided to carry gate drive signals from the control unit to the power stage for use in delivering the gate drive signals to the MOSFET modules; The control unit comprises, for each power stage, a downlink optical interface and a serializer arranged to serialize the gate drive signals for that power stage via the downlink optical interface for transmission over the downlink optical fiber.
[0030] The apparatus may further comprise, in each of the power stages, a plurality of sensors arranged to measure a physical parameter of the power stage, and a single uplink plastic optical fiber arranged to carry the measured physical parameter to the control unit for use in generating the gate drive signal, and each power stage may comprise an uplink optical interface and a serializer arranged to serialize the measured physical parameter for transmission via the uplink optical interface over the uplink plastic optical fiber to the control unit. [Brief explanation of the drawings]
[0031] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
[0032] [Figure 1] FIG. 1 is a schematic diagram of a vehicle powered by a battery.
[0033] [Figure 2] FIG. 2 is a block diagram illustrating in more detail the interactions between power system components of a battery electric vehicle's power chain.
[0034] [Figure 3] FIG. 3 is a block diagram of a power converter with multiple stages arranged in parallel.
[0035] [Figure 4] FIG. 4 is a detailed schematic diagram of the connections between the controller unit and the multiple power stages of the power converter.
[0036] [Figure 5] FIG. 5 shows a circuit configuration for a power converter based on a buck-boost converter.
[0037] [Figure 6] FIG. 6 is a schematic block diagram showing in detail how control and measurement signals are transmitted between the control unit and the gate drive unit.
[0038] [Figure 7] FIG. 7 is a table showing the control signals and measurement signals sent and received by the serializer / deserializer in the control unit. DETAILED DESCRIPTION OF THE INVENTION
[0039] 3 is a schematic high-level diagram of a power converter with multiple power stages arranged in parallel. The diagram shows five power stages, labeled 21 through 25. While other numbers of power stages, such as more than five or less than five, may be provided, preferably at least two power stages are provided. The power stages receive an input DC voltage V, such as received from a battery comprising one or more battery modules. DCIN and outputs DC voltage V to an inverter to supply power to an AC motor. DCOUT . Each of the power stages 21-25 of the power converter is controlled by a DC-DC controller 26. Communication between the DC-DC controller 26 and the power stages 21-25 occurs along optical fiber 27. A separate optical fiber or fiber optic cable is used to communicate with each power stage. For example, communication from the DC-DC controller 26 to power stage 21 occurs along optical fiber 27a, communication from the DC-DC controller 26 to power stage 22 occurs along optical fiber 27b, and so on. Thus, the optical fibers 27a-27e or fiber optic cables may be considered to be arranged in a star configuration or a point-to-multipoint configuration. The DC-DC controller may be located remotely or at a distance from the power stages 21-25. For example, the DC-DC controller may be located near the vehicle main controller. FIG. 3 illustrates that the optical fibers or cables may be located near each other as they are routed from the DC-DC controller 26 to the power stages. Unlike electrical cables, optical fibers are much less susceptible to interference when placed in close proximity together, and relatively high speed (eg, MHz) signals can be transmitted along optical fibers.
[0040] It is particularly preferred that the optical fiber be a plastic optical fiber because it offers additional durability over conventional glass optical fibers. Furthermore, because the signals are being sent over relatively short distances, such as 1-5 meters or 1-10 meters, and the signals are in MHz, the higher dispersion and signal attenuation of plastic optical fibers are not an issue.
[0041] FIG. 3 shows optical fibers 27a-27e or fiber optic cables from the DC-DC controller 26 connecting to the power stages 21-25. The optical fibers may be duplex optical fibers or fiber optic cables for transmitting uplink and downlink signals. For example, the downlink signal may be used to control aspects of the power stage, such as converter switching and / or the power settings, while the uplink signal may be a measured parameter related to the power stage, such as voltage, current, or temperature. Duplexing is preferably provided by a pair of duplex optical fibers, one for the uplink and one for the downlink. The two fibers may also be provided within a single cable. Other duplex arrangements are possible, such as using two communications over a single optical fiber. However, the use of an optical fiber for the uplink and another optical fiber for the downlink is not supported by plastic optical fibers due to material dispersion limitations.
[0042] In an embodiment, the optical transceiver may be a Broadcom ABFR type transceiver, the MOSFET may be a SiC module available from various manufacturers, and the optical fiber may be any general-purpose plastic optical fiber compatible with the transceiver.
[0043] Also shown in Figure 3 are the electrical connections for connecting the power stages in parallel. Each power stage is connected in parallel by connection 28a to an input voltage line or rail and an output voltage line or rail 28b. Each of the power stages is also connected to a ground rail or line by connection 28c.
[0044] Figure 4 is a detailed schematic diagram of the connections between the controller unit 102 and some of the power stages, similar to that of Figure 3, but shown in greater detail. Figure 5 shows an example circuit configuration for some of the power stages, namely for using a buck-boost converter. Figure 4 relates to communication between the controller unit or control unit and the power stages, which may be used to control MOSFETs or other power converter or switching components within the power stages.
[0045] Referring specifically to Figure 4, power converter 12' includes five power stages 21, 22, 23, 24, and 25 similar to those of Figure 3. As previously mentioned, the number of power stages is preferably two or more. While the embodiment of Figure 4 shows five power stages similar to Figure 3, other numbers of power stages may be provided. Controller unit 102 may be similar to or include DC-DC controller 26 of Figure 3.
[0046] The controller unit 102 of Figure 3 comprises a processor such as an FPGA arranged to receive control signals C. These control signals C may be received from a main vehicle controller which receives input from the driver, such as to increase or decrease speed. Such a main vehicle controller may include a simulation or prediction of the voltage required to provide the required amount of torque or power to the wheels. Similar arrangements and considerations would apply if the invention were implemented as a power converter for domestic or industrial applications, but also if the power demand is derived from domestic or industrial requirements.
[0047] The FPGA 104 of the controller 102 is programmed with a control algorithm 104a for controlling the multiple power stages. The control algorithm uses signals from the power stage sensors and a control signal C to set the power converter components within the power stages to the correct operating points, thereby efficiently achieving the desired power output. The FPGA outputs relatively fast switching signals to control the power conversion, for example, by using pulse-width modulation or by setting the control signals for PWM. The controller unit 102 further includes communication circuit boards 121-125, units, or ICs. One communication board may be provided for each power stage. Each communication board includes a serializer S1 and a deserializer DS1, along with two optical transceivers O1 and O4. The optical transceivers O1 and O4 are connected to duplex plastic optical fiber links formed by fiber F1 for the downlink and fiber F2 for the uplink, respectively. As will be described further, each power stage has multiple power converter components that require control. Therefore, multiple control signals must be sent simultaneously to each power stage. The present invention achieves sending multiple control signals by using serialization and optical transceiver O1 to send signals along an optical fiber. The signals are then received and deserialized by the optical transceiver at the other end of the optical fiber. In one embodiment, the power stage includes a buck-boost converter containing four MOSFETs, each requiring a control signal at its gate. Therefore, the control signals for the gates must be serialized and sent along the downlink fiber F1. Similarly, measurement signals are generated from power stages 21-25. Multiple measurement signals are sent from the power stages and received over the uplink fiber at optical transceiver O4, where they are deserialized by deserializer DS1 in the control unit.
[0048] Although the serializer, deserializer, and optical transceiver have been described as being located on a communications board or IC, other arrangements are possible. For example, all serializers, deserializers, and optical transceivers for transmitting to and receiving from all power stages may be located on a single board, which may be the same board as the FPGA or processor. However, using a separate communications board for each power stage is preferred because this means the power system can be easily scaled if more or fewer power stages are needed. In addition, interference between signals may be reduced if the serializer, deserializer, and optical transceiver for each power stage are located on separate boards, as in the arrangement shown in FIG. 4.
[0049] Now, let us consider power stages 21-25 in FIG. 4. Each power stage receives a first voltage and outputs a second voltage. These are generally indicated by "A" and "B," respectively. For example, the first voltage may be 1500 V DC and the second voltage may be 2100 V DC. The power stages are connected in parallel, so they are all connected to the same voltage. Generally, one side of a power stage may be considered an input side, receiving power from a battery or the like, and the other side may be considered an output side, receiving power from a load such as an AC motor or inverter. However, the power converters described herein are considered bidirectional, as indicated by the bidirectional arrows adjacent to "A" and "B." Power may also be transmitted in the opposite direction. For example, power may be regenerated from the motion of the vehicle and returned to recharge the battery.
[0050] Each power stage includes a gate drive unit 131. The gate drive unit 131 includes optical transceivers O2 and O3 for receiving signals from the downlink optical fiber F1 and transmitting signals along the uplink optical fiber F2, respectively. The gate drive unit further includes a deserializer DS2, a serializer S2, and one or more gate drive circuits. In FIG. 4, two gate drive circuits 135a and 135b are shown on a gate drive board 134. The gate drive board 134 also includes one or more digital isolators 136. The power stage further includes power converter components. As shown in FIG. 4, the power converter components are MOSFETs provided as two MOSFET modules 141 and 142. The MOSFET module 141 may be used on the low-voltage side (or battery side) of the power converter, and the MOSFET module 142 may be used on the high-voltage side (or inverter on the AC motor side) of the power converter. The power converters may be configured as bridge circuits and / or buck-boost converters, as described above. Thus, MOSFET modules may be configured on both sides of the bridge or converter. Signals received along the downlink optical fiber F1 are received by transceiver O2, where they are converted from the optical domain to the electrical domain. The electrical signals are then sent to deserializer DS1, which deserializes the signals into parallel signal streams. Preferably, the signals are passed through digital isolator 136 before being sent to gate drive circuits 135a and 135b. The gate drive circuits send signals to the MOSFET modules to control the gates within the modules. By having separate gate drive circuits for the high-side and low-side MOSFET modules, the two gate drive circuits can be galvanically isolated from each other. Galvanic isolation between the two circuits can be further improved by sending digital signals through a digital isolator. In the case of a four-MOSFET buck-boost converter, two signals may be sent to MOSFET module 141 to control the gates of two transistors on one side of the bridge or converter, such as the low-voltage side.Two other signals are sent to MOSFET module 142 to control the gates for the other two transistors on the other side of the bridge or converter, such as the high-voltage side. While described as having four MOSFETs divided into pairs of two per MOSFET module, this is the preferred arrangement, and in other embodiments, only one MOSFET may be provided per module, or up to four MOSFETs may be provided per module, so that four or only one MOSFET module is required. However, to minimize noise and interference, it is preferable to have the MOSFETs on each side of the bridge in different modules.
[0051] Power stages 121 also include sensors M for measuring physical parameters at each power stage. The physical parameters may include voltage, current, and temperature. Measurement signals received from sensors M are sent to gate drive boards 134. FIG. 4 shows three sensors M. The gate drive boards send the measurement signals as parallel signals to serializer S2, which serializes the measurement signals and passes them to optical transceiver O3 for transmission in the optical domain along uplink fiber F2 to the controller unit.
[0052] While two gate drive circuits 135a, 135b are described as communicating with a controller unit via a duplex fiber link and controlling two MOSFET modules for each power stage, the power stages may alternatively be arranged with their gate drive circuits on separate gate drive boards. A first gate drive circuit may be provided on a first gate drive board controlling a first MOSFET module 141 on one side of the bridge or converter, and a second gate drive circuit may be provided on a second gate drive board controlling a second MOSFET module 142 on the other side of the bridge or converter. Correspondingly, the first gate drive circuit on the first gate drive board also receives measurements from sensors on one side of the bridge or converter, and the second gate drive circuit on the second gate drive board receives measurements from sensors on the other side of the bridge. With this arrangement and the described duplex fiber link, an intermediate communication unit is required to split communications to and from the fiber link between the respective first and second gate drive circuits. This may include a digital isolator. This two board arrangement is less preferred due to the additional complexity in directing signals, and for any measurement signals received that are not associated with the two MOSFET modules, the measurement signal must be transmitted by one of the gate drive boards.
[0053] 4 shows five power stages, each controlled by a controller unit with a duplex fiber link. The five (or other number) power stages are substantially identical to each other.
[0054] Next, we will refer to the circuit diagram of FIG. 5, which shows the gate driver circuits 135a, 135b, MOSFET modules 141 and 142, and the circuit of the buck-boost converter. As mentioned above, the buck-boost converter may be a four-MOSFET buck-boost converter. Other power converter components or switching units, such as other types of transistors, may be used instead of MOSFETs. However, for the applications described herein, MOSFETs are preferred, and SiC MOSFETs in particular are preferred because they switch faster than Si MOSFETs, leading to higher power transfer efficiency. In FIG. 5, the four MOSFETs are identified by reference numerals 152, 153, 154, and 155. The other main component of the buck-boost converter is the reactance component, which in FIG. 5 is inductor 160. Two gate driver circuits 135a, 135b are shown in the diagram.
[0055] Gate drive circuit 135a sends signals to a first MOSFET module 141, which includes a MOSFET module circuit board 141a and a pair of MOSFETs 152 and 153, together designated by reference numeral 141b. Gate drive circuit 135b sends signals to a second MOSFET module 142, which includes a MOSFET module circuit board 142a and a pair of MOSFETs 154 and 155, together designated by reference numeral 142b. The MOSFETs in each pair of MOSFETs are connected in series. One side of inductor 160 is connected to a first node n1 between the two MOSFETs 152 and 153 of the first MOSFET module. The other side of the inductor is connected to a second node n2 between the two MOSFETs 154 and 155 of the second MOSFET module.
[0056] The buck-boost converter configuration is configured to convert a first voltage V1, shown as the voltage on the upper left power rail / line on the left side of FIG. 5, to a second voltage V2, shown as the voltage on the upper right power rail / line on the right side of FIG. 5. MOSFET 152 is configured with its source terminal connected to the V1 voltage and its drain terminal connected to node n1, which is in turn connected to the source of MOSFET 153. The drain of MOSFET 153 is connected to ground rail / line 180. As previously mentioned, the gates of MOSFETs 152 and 153 are controlled by signals from gate drive circuit 135a provided via MOSFET module circuit board 141a. On the left side of the schematic is capacitor C3, connected between the V1 voltage rail and ground rail 180. Capacitor C3 is an output smoothing capacitor that smooths out ripple in the voltage on the V1 rail, particularly when power is returned to the V1 rail. In addition, a capacitor C1 is connected from the source terminal of MOSFET 152 to the drain terminal of MOSFET 153. Capacitor C1 is a snubber capacitor that suppresses voltage spikes and ringing that may occur when the MOSFET is turned on and off. Sensors 171 and 172 are also provided on the V1 side of the circuit in FIG. 5. Sensor 171 is a voltage monitor that is arranged to monitor the voltage on voltage rail V1. Sensor 172 is a temperature monitor that is provided on MOSFET module board 141 and monitors the temperature to prevent overheating of the MOSFET, which is capable of passing a large current.
[0057] A sensor 173 may be located near the inductor 160 connected between nodes n1 and n2. The sensor 173 may be a temperature sensor, such as a thermistor, and is located to monitor the temperature at the inductor.
[0058] The right side of Figure 5 is a partial mirror image of the left side. As previously mentioned, MOSFET module 142 includes MOSFETs 154 and 155. MOSFET 154 is configured with its source terminal connected to the V2 voltage and its drain terminal connected to node n2, which in turn is connected to the source of MOSFET 155. The drain terminal of MOSFET 155 is connected to ground rail / line 180. As previously mentioned, the gates of MOSFETs 154 and 155 are controlled by signals from gate drive circuit 135b provided via MOSFET module circuit board 142a. At the far right of the schematic is capacitor C4, connected between the V2 voltage rail and ground rail 180. Capacitor C4 is an output smoothing capacitor that smooths voltage ripple on the V2 rail when power is applied to the V2 rail. Additionally, capacitor C2 is connected from the source terminal of MOSFET 154 to the drain terminal of MOSFET 155. Capacitor C2 is also a snubber capacitor to suppress voltage spikes and ringing that can occur when the MOSFET is turned on and off. Similar to the V1 side of the circuit, on the V2 side of the circuit are sensors 175 and 176. Sensor 175 is a voltage monitor located to monitor the voltage on voltage rail V2. Sensor 176 is a temperature monitor located on MOSFET module board 142 to monitor the temperature of the MOSFET.
[0059] A current monitor 174 is provided between nodes n1 and n2, which are connected in series with the inductor 160, to monitor the current passing through the inductor 160. The measurement signal from the current monitor is sent to the gate drive circuit. In fact, the measurement signals from all of the sensors 171-176 are sent to the gate drive board 134.
[0060] FIG. 5 also shows a fiber link 27 connected to the gate drive circuitry for receiving signals from the controller unit 102 and sending measurement signals to the controller unit.
[0061] The operation of a buck-boost converter will now be described. The MOSFETs are turned on in pairs. When MOSFETs 152 and 155 are turned on, a voltage V1 is applied across inductor 160 and energy is stored in the inductor. Following the on-state, current flows and increases; current flows through MOSFET 152, inductor 160, and MOSFET 155. During this time, MOSFETs 153 and 154 are turned off. The switching of the MOSFET pairs is complementary, such that MOSFETs 153 and 154 are turned on when MOSFETs 152 and 155 are subsequently turned off. When this occurs, the energy stored in the inductors causes current to flow through MOSFETs 153 and 154. After switching MOSFETs 153 and 154 on (and switching MOSFETs 152 and 155 off), the current will slowly decrease. This and other switch operations allow the buck-boost converter to operate similarly to a switched-mode power supply and can be used to increase or decrease voltage. In particular, the operation is that of a buck-boost bidirectional converter, which may operate in voltage, current, or power control mode.
[0062] The converter arrangement of Figure 5 can be used to output a voltage on the V2 rail that is higher or lower than the voltage on the input voltage rail V1 (i.e., stepping up or stepping down), and power can flow in either direction. Exemplary voltages for V1 and V2 may be 1500V and 2100V, or 1500V and 700V. Multiple stages may be configured to handle hundreds of kW to 10 MW, such as 600 kW or 3 MW peak power.
[0063] In one embodiment, the MOSFET is a SiC MOSFET module and the MOSFET module substrate was designed by the applicant.
[0064] As previously mentioned, the present invention uses serialization and a fiber optic link to send control signals between the controller unit 102 and the power stage gate drive unit 131. Figure 6 shows more details of how the signals are sent and how the corresponding measurement signals are returned.
[0065] FIG. 6 provides a system-on-chip 225 including a microprocessor 210 and an FPGA core 220 connected by an AXI interface 215. The microprocessor is programmed with a control algorithm that uses voltage and current measurement signals to determine operational settings. The microprocessor may also receive control signals (such as C shown in FIG. 4) from the vehicle's main processor, such as those controlled by a driver. The FPGA core obtains the operational settings determined by the microprocessor and generates / processes the operational settings to generate digital signals for controlling the power stage. In FIG. 4, the microprocessor and FPGA core are combined as FPGA 102. The FPGA core generates signals as LVCMOS digital signals 230, which are sent to a serializer / deserializer IC 235. While the serializer / deserializer IC 235 is shown as a single IC, separate chips or units for the serializer and deserializer, such as the Analog Devices MAX 9205 serializer and MAX 9206 deserializer, may also be used. This serializer / deserializer pair may operate at a clock speed on the order of 10 MHz, such as 16-40 MHz. The serializer takes a parallel stream of signals and converts them into a serial stream of signals. Serialization may be in the form of a SerDes (Serializer Descriptor System) or may use 8b / 10b SerDes encoding. Such encoding takes an 8-bit stream and encodes it to form 10-bit symbols. 8b / 10b encoding has the advantages of achieving DC balance, bounded disparity, and sufficient state transitions to allow clock recovery. Alternatively, other similar encodings that achieve the same function may be used, such as encoding several bits as a bit symbol. Once serialized, the signal is sent to optical transceiver 245 as a low-voltage differential digital signal (LVDS) 240. Serializer / deserializer 235 in FIG. 6 corresponds to serializer S1 and deserializer DS1 in FIG. 4. Optical transceiver 245 corresponds to optical transceivers O1 and O4 in FIG. 4.The system-on-chip 225, serializer / deserializer 235, and optical transceiver 245 may all be provided on a control PCB 201 that is separate or remote from the gate drive unit or PCB 202. The optical transceiver 245 transmits control signals along an optical fiber link 250, such as a duplex plastic optical fiber, which is received by an optical transceiver 255 on the gate drive unit 202, corresponding to the gate drive unit 131 in FIG. 4. The optical transceiver 255 outputs an LVDS signal 260 to a serializer / deserializer 265, also on the gate drive unit 202. The serializer / deserializer 265 outputs transistor control signals 270a for controlling the gates of the power stage transistors. For example, the transistor control signals may include two sets of control signals, one for each of the two MOSFET modules 280. Returning measurement data from the sensor is largely the reverse of sending the control data. The serializer / deserializer 265 receives measurement data, which may include voltage, current, or temperature measurement signals from sensors such as sensors 171-176. Fault signals, such as those generated by the MOSFET module, may also be received by the serializer / deserializer 265. The measurement data and fault signals are shown at 270b in FIG. 6. Sending the measurement data includes serializing and providing the data as an LVDS signal to the optical transceiver 255. The optical signal is sent by the transceiver along optical fiber 250 to the optical transceiver 245. The optical transceiver sends the measurement signal as an LVDS signal to the serializer / deserializer 235, and the measurement data is provided to the system-on-chip as an LVCMOS digital signal. The serializer / deserializer 265 and the optical transceiver 255 are provided on the gate drive unit, while the MOSFET module 280 may be on a different board or circuit. The MOSFET module 280 corresponds to the MOSFET modules 141 and 142 in FIG. 4.
[0066] Feedback provided from the sensors to the FPGA control unit is used to control the switching of the MOSFETs to control the PWM and power transfer. The measurement signal and control may be considered as closed-loop feedback or may use PI loop feedback.
[0067] FIG. 7 is a table providing more information regarding the signals and voltages input to and output from the serializer / deserializer 235 of FIG. 6. The top half of the table shows the inputs to the serializer, which are a combination of control signals for the gate drive circuitry and control signals for the serializer itself. Starting with the last three entries in the top half of the table, labeled CTRL0, CTRL1, and CTRL2, respectively, these provide a SYNC signal, an enable / disable signal for serial data output, and a clock signal, all of which are provided for the operation of the serializer. As explained, the clock signal may be a clock signal operating at 10 to 40 MHz, such as 16 or 19.2 MHz. Next, turning to the top ten entries listed in the table, these are the data or control signals D0 through D9 sent by the serializer to the gate drive circuitry. Data D0 through D9 include data for controlling the two MOSFET modules 141 and 142 and for operating the sensor M on the gate drive board. Data D0 is a clock signal sent to the gate driver circuit to drive the analog-to-digital converter on the gate driver board. The ADC measures the voltage, current, and temperature on the gate driver board. Data D1 and D4 are logic signals to initiate ADC conversions for the measurement sensors. Data D2 and D6 are signals used to turn on the upper and lower MOSFETs in the bridge. D3 and D7 are inverted signals used to improve the DC balance of the signal on the optical link and to check for errors in D2 and D6. Data D5 is a data signal to reset the gate driver's fault logic if a fault is reported. D8 is an enable signal for the overcurrent detection system, and D9 is an odd parity bit calculated in the transmit controller. The bits are regenerated and checked on the gate driver circuit or board to detect single-bit errors.
[0068] The bottom half of the table shows the data received at the deserializer from the gate driver circuit or gate driver board. As can be seen, various data D0-D9 are measurement data, such as voltage, temperature, and current measurements, as previously described. For example, D0 is the ADC conversion result of a high-voltage measurement, such as the output voltage V2 in FIG. 5. D1 is the ADC conversion result of a current measurement, such as that from current sensor 174 in FIG. 5. D2 is the ADC conversion result of a temperature measurement. D3 is an inverted signal used to improve the DC balance of the signal on the optical link and check for errors in D2. D4 is unused. D5 is a fault logic signal with multiple fault logic signals multiplexed onto D5. D6 is another ADC-converted temperature measurement. D7 is an inverted signal used to improve the DC balance of the signal on the optical link and check for errors in D5. D8 is a loopback of the TxData signal D1, which is used by the FPGA to align the timing of the received ADC measurement conversion results. D9 is an odd parity bit calculated by the gate driver for the transmitted data. This bit is regenerated and checked on the FPGA to detect single-bit errors. Additionally, some control signals related to the deserializer itself, such as those related to the clock recovered from the deserializer, are also included at the bottom of the table.
[0069] While the above describes a four-MOSFET buck-boost converter providing bidirectional power conversion, alternative converters may be provided that are unidirectional and have only two MOSFETs. Such a converter may be similar to that shown in FIG. 5 but may not include MOSFETs 154 and 155. The output from the inductor may be connected directly to the output voltage rail V2 across a smoothing capacitor C4. This type of converter is sometimes known as a buck converter. The unidirectional nature of the two MOSFET converter means that power conversion is provided toward a second voltage rail V2. The use of a buck converter also reduces the voltage at V2 compared to V1.
[0070] Although particular embodiments of the present invention have been described with reference to the drawings, those skilled in the art will recognize that variations and modifications may be applied to these embodiments without departing from the scope of the invention as defined in the claims. [Explanation of symbols]
[0071] 1...vehicle, 2...battery, 3...motor, 4...control unit, 11...battery, 12, 12'...power converter, 13...inverter, 14...motor, 15...combined controller, 16...battery management unit (BMU), 17...power converter driver (PCD) unit, 21...power stage, 22...power stage, 23...power stage, 24...power stage, 25...power stage, 26...DC-DC controller, 27...optical fiber, fiber link, 27a...optical fiber, 27b...optical fiber, 27c...optical fiber, 27d...optical fiber, 27e...optical fiber, 28a...connection, 28b... Output voltage line or rail, 28c...connection, 102...controller unit, FPGA, 104...FPGA, 104a...control algorithm, 121...communication circuit board, 122...communication circuit board, 123...communication circuit board, 124...communication circuit board, 125...communication circuit board, 131...gate drive unit, 134...gate drive board, 135a...gate drive circuit, gate driver circuit, 135b...gate drive circuit, gate driver circuit, 136...digital isolator, 141...MOSFET module board, 141a...MOSFET module circuit board, 141b...pair MOSFETs 152 and 153, 142...MOSFET module, MOSFET module board, 142a...MOSFET module circuit board, 142b...pair of MOSFETs 154 and 155, 152...MOSFET, 153...MOSFET, 154...MOSFET, 155...MOSFET, 160...inductor, 171...sensor, 172...sensor, 173...sensor, 174...current monitor, current sensor, 175...sensor, 176...sensor, 180...ground rail, 201...control PCB, 202...gate drive unit or PCB, 210...microphone processor, 215...AXI interface, 220...FPGA core, 225...system on chip, 230...LVCMOS digital signal, 235...serializer / deserializer IC, 240...Low-Voltage Differential Digital Signal (LVDS), 245...optical transceiver, 250...optical fiber link, 255...optical transceiver, 260...LVDS signal, 265...serializer / deserializer, 270a...transistor control signal, 270b...measurement data and fault signal, 280...MOSFET module, C...control signal, C1...capacitor, C2...capacitorC3...capacitor, C4...capacitor, D0...control signal, D1...control signal, D2...control signal, D3...control signal, D4...control signal, D5...control signal, D6...control signal, D7...control signal, D8...control signal, D9...control signal, DS1...deserializer, DS2...deserializer, F1...downlink optical fiber, F2...uplink optical fiber, M...sensor, n1...first node, n2...second node, O1...optical transceiver, O2...optical transceiver, O3...optical transceiver, O4...optical transceiver, S1...serializer, S2...serializer, V1...first voltage, input voltage rail, V2...second voltage, second voltage rail, output voltage rail,
Claims
1. 1. An apparatus comprising: a power converter unit comprising a plurality of electrically parallel power stages, each power stage adapted to convert power in either direction between a first DC voltage and a second DC voltage; Each power stage is one or more MOSFET modules; one or more gate drive units configured to deliver gate drive signals to MOSFETs in the MOSFET module to cause the power conversion through MOSFET switching; and a plurality of sensors arranged to measure physical parameters of said power stage; a power converter unit comprising: a control unit remote from the power converter unit, the control unit adapted to receive one or more control signals from the power stage indicative of required power conversion characteristics and the measured physical parameters, and to generate gate drive signals for use by the gate drive unit in controlling the MOSFETs; Equipped with Each power stage is a single respective uplink plastic optical fiber provided to carry the measured physical parameter to the control unit for use in generating the gate drive signal; and a single respective downlink plastic optical fiber provided to carry the gate drive signals from the control unit to the power stage for use in delivering the gate drive signals to the MOSFET modules; coupled to the control unit via Each power stage is an uplink optical interface; a serializer arranged to serialize the measured physical parameter for transmission over the uplink plastic optical fiber via the uplink optical interface to the control unit; Equipped with The control unit, for each power stage: a downlink optical interface; a serializer arranged to serialize the gate drive signal for that power stage for transmission over the downlink plastic optical fiber via the downlink optical interface; An apparatus comprising:
2. each power stage further comprising a downlink optical interface and a deserializer; the deserializer is configured to deserialize the gate drive signal received from the downlink optical interface and provide the gate drive signal to the gate drive unit for controlling the MOSFET; 2. The apparatus of claim 1, wherein the control unit further comprises an uplink optical interface and a deserializer, the deserializer being arranged to deserialize the measured physical parameter received from the uplink optical interface for use in generating the gate drive signal.
3. 3. The apparatus of claim 1, wherein each power stage comprises a serializer IC that is separate from the other power stages.
4. 4. Apparatus according to any one of claims 1 to 3, wherein each power stage comprises a deserializer IC that is separate from the other power stages.
5. The apparatus of any one of claims 1 to 4, wherein the serializer is configured to use 8b / 10b encoding.
6. The apparatus of any preceding claim, wherein the gate drive signal comprises a PWM control signal.
7. The apparatus of any one of claims 1 to 6, wherein the measured physical parameters include one or more of voltage, current, and temperature measured at each power stage.
8. each power stage having a single gate drive unit configured to receive the gate drive signals and deliver the gate drive signals to two MOSFET modules; a first MOSFET module of the two MOSFET modules disposed on a first side of a power converter bridge; The apparatus of any one of claims 1 to 7, wherein a second of the two MOSFET modules is disposed on a second side of the power converter bridge.
9. the gate drive unit comprises a first gate drive circuit and a second gate drive circuit, the first gate drive circuit being configured to send a gate drive signal to the first MOSFET module; 9. The apparatus of claim 8, wherein the second gate drive circuit is configured to provide a gate drive signal to the second MOSFET module.
10. for each power stage, the serializer of the control unit is configured to serialize the gate drive signals for one or more MOSFETs in the first MOSFET module with the gate drive signals for one or more MOSFETs in the second MOSFET module; 10. The apparatus of claim 8 or 9, wherein the downlink optical interface is configured to transmit the serialized gate drive signals over the downlink plastic optical fiber to the gate drive units of the respective power stages.
11. 11. The apparatus of claim 8, further comprising, in each gate drive unit, a digital isolator arranged to provide isolation between the gate drive signals for the first MOSFET module and the second MOSFET module.
12. An apparatus according to any preceding claim, wherein the MOSFETs are arranged in a buck-boost configuration.
13. the first MOSFET module comprises two MOSFETs; The apparatus of any one of claims 1 to 12, wherein the second MOSFET module comprises two MOSFETs.
14. 14. The apparatus of claim 1, wherein the uplink plastic optical fiber and the downlink plastic optical fiber are configured as duplex optical links such that the control unit communicates with the power stages by respective duplex optical links to each power stage.
15. the electrically parallel power stages comprising: in the range of 0-2000V or 0-5000V, such as 0-2500V; Within the range of 100 to 2000V or 100 to 5000V, such as 1500 to 2500V 15. The apparatus of any one of claims 1 to 14, configured to output a voltage of
16. 16. The apparatus of any one of claims 1 to 15, wherein the combined converted power output of the multiple power stages is in the range of tens of kW to 10 MW.
17. 17. Apparatus according to any one of the preceding claims, wherein the plastic optical fibre to each power stage is up to 5 or 10 metres long.
18. The apparatus of any one of claims 1 to 17, wherein the data rate of the serializer and deserializer is between 10 and 40 MHz.
19. 19. A vehicle comprising the apparatus of any one of claims 1 to 18, one or more battery modules, and an electric drive unit, wherein the apparatus provides power conversion in either direction between the one or more battery modules and the electric drive unit.
20. 1. A method for controlling a power converter having multiple power stages, the method comprising: receiving, at a control unit, one or more control signals and measured physical parameters from the plurality of power stages indicative of required power conversion characteristics; generating, based on the received one or more control signals and the measured physical parameters, respective gate drive signals for use by a gate drive unit in controlling one or more power stage MOSFETs; serializing the gate drive signals for each power stage; transmitting the serialized gate drive signals over a downlink optical fiber via a downlink optical interface to an optical interface in the respective power stage; receiving the serialized gate drive signals at the power stages and deserializing the gate drive signals with a deserializer for the respective power stages; delivering the gate drive signals to MOSFETs of one or more MOSFET modules to cause the power conversion by MOSFET switching; A method comprising:
21. The method comprises: measuring one or more physical parameters at each of the power stages; serializing the measured one or more physical parameters and transmitting the serialized measured one or more physical parameters to the control unit via an uplink plastic optical fiber; deserializing the measured one or more physical parameters in the control unit; 21. The method of claim 20, further comprising: