Multilayer wiring structure with support

The multilayer wiring structure with constricted electrodes and layered insulating support addresses the challenge of high connection reliability in semiconductor devices, enhancing stability and reducing short circuits.

JP2025174078APending Publication Date: 2025-11-28TOPPAN HOLDINGS INC
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Patent Information

Application Number
JP2024080128
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-16
Publication Date
2025-11-28

AI Technical Summary

Technical Problem

Existing semiconductor device mounting methods face challenges in achieving high connection reliability due to variations in bonding conductor height and the risk of short circuits between electrodes as the number of terminals increases.

Method used

A multilayer wiring structure with a support is developed, featuring constricted electrodes and a layered insulating structure that includes conductive layers and release layers, ensuring stable electrode connections and reducing the risk of short circuits.

Benefits of technology

The solution enhances connection reliability by stabilizing electrode connections and preventing short circuits, thereby improving the integrity of semiconductor device mounting.

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Abstract

To provide a technique capable of achieving high connection reliability.SOLUTION: A multilayer wiring structure 300 with a support comprises: a multilayer structure 20 composed of two or more layers 200 each including a wiring layer 2001 and a first insulating layer 2000 in which the wiring layer 2001 is embedded; a multilayer wiring structure 25 including a plurality of first electrodes 21 provided on one face of the multilayer structure 20 and a second insulating layer 22 in which the plurality of first electrodes 21 is embedded; and a support 60 which supports the multilayer wiring structure 25 on a first principal surface of the multilayer wiring structure 25 on the side of the second insulating layer 22. Each of the plurality of first electrodes 21 includes a first face which is opposed with the support 60 and a second face on the opposite side to the first face. In each of the plurality of first electrodes 21, a cross section which is in parallel to a height direction includes one or more constriction parts 210 between the first face and the second face.SELECTED DRAWING: Figure 11
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Description

[Technical Field]

[0001] The present invention relates to a multilayer wiring structure with a support. [Background technology]

[0002] As semiconductor devices become more highly integrated and multifunctional, the number of terminals, i.e., electrodes, provided on semiconductor chips tends to increase. In response to this trend, a mounting method using a ball grid array (BGA) has been adopted as a method for mounting semiconductor devices on wiring boards, replacing the mounting method using a lead frame. In a mounting method using a BGA, a semiconductor device having a mounting surface with multiple electrodes arranged in a grid pattern is connected to a wiring board using a bonding conductor such as solder. For example, Patent Document 1 discloses an example in which a conductive bump formed by plating and a solder layer covering the conductive bump are used as the bonding conductor. When the bonding conductor is formed by plating, the height of the bonding conductor is less likely to vary. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2004-140248 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a technique that can achieve high connection reliability. [Means for solving the problem]

[0005] According to one aspect of the present invention, there is provided a multilayer wiring structure with a support, comprising: a multilayer structure consisting of two or more layers, each layer including a wiring layer and a first insulating layer in which the wiring layer is embedded; a plurality of first electrodes provided on one surface of the multilayer structure; and a second insulating layer in which the plurality of first electrodes are embedded; and a support that supports the multilayer wiring structure on a first main surface of the multilayer wiring structure on the second insulating layer side, wherein each of the plurality of first electrodes has a first surface facing the support and a second surface opposite the first surface, and each of the plurality of first electrodes has a first cross section parallel to its height direction that has one or more constrictions between the first surface and the second surface.

[0006] According to another aspect of the present invention, there is provided a multilayer wiring structure with a support according to the above aspect, wherein the multilayer wiring structure further comprises a conductive layer between the support and the second insulating layer.

[0007] According to yet another aspect of the present invention, there is provided the support-attached multilayer wiring structure according to the above aspect, further comprising a release layer between the support and the conductive layer.

[0008] According to yet another aspect of the present invention, there is provided a multilayer wiring structure with a support according to any of the above aspects, wherein the second insulating layer includes a resist layer provided on the support side and a third insulating layer facing the support with the resist layer sandwiched therebetween, and the shortest distance from the first main surface to the one or more constrictions is shorter than the shortest distance from the first main surface to the third insulating layer.

[0009] According to yet another aspect of the present invention, there is provided a multilayer wiring structure with a support according to the above aspect, wherein the second insulating layer further includes a protective layer containing metal between the resist layer and the third insulating layer.

[0010] According to yet another aspect of the present invention, there is provided a multilayer wiring structure with a support according to any of the above aspects, wherein the multilayer wiring structure further comprises a number of second electrodes provided on the other side of the multilayer structure, each of the plurality of second electrodes including a third surface facing the first insulating layer and a fourth surface opposite the third surface, and each of the plurality of second electrodes has a second cross section parallel to its height direction having one or more constrictions between the third surface and the fourth surface.

[0011] According to yet another aspect of the present invention, there is provided a packaged device comprising: a multilayer structure consisting of two or more layers, each layer including a wiring layer and a first insulating layer in which the wiring layer is embedded; a multilayer wiring substrate including a plurality of first electrodes provided on one side of the multilayer structure, a second insulating layer in which the plurality of first electrodes are embedded, and a plurality of second electrodes provided on the other side of the multilayer structure; and a first electronic component connected to the plurality of second electrodes, wherein each of the plurality of first electrodes includes a second side facing the multilayer structure and a first side opposite the second side, and each of the plurality of first electrodes has a first cross section parallel to its height direction, which has one or more constricted portions between the first side and the second side, and each of the plurality of first electrodes protrudes from the second insulating layer so that the one or more constricted portions are exposed.

[0012] According to yet another aspect of the present invention, there is provided a packaged device according to the above aspect, wherein the first electronic component is a functional device or a wiring board.

[0013] Here, a "functional device" refers to a device that operates when supplied with at least one of power and an electrical signal, a device that outputs at least one of power and an electrical signal in response to an external stimulus, or a device that operates when supplied with at least one of power and an electrical signal and outputs at least one of power and an electrical signal in response to an external stimulus. The functional device may be in the form of a chip, such as a semiconductor chip or a chip in which circuits and elements are formed on a substrate made of a material other than a semiconductor, such as a glass substrate. The functional device may include, for example, one or more of a large-scale integrated circuit (LSI), a memory, an imaging element, a light-emitting element, and a MEMS (Micro Electro Mechanical Systems). The MEMS may include, for example, one or more of a pressure sensor, an acceleration sensor, a gyro sensor, a tilt sensor, a microphone, and an acoustic sensor. According to one example, the functional device is a semiconductor chip including an LSI.

[0014] According to yet another aspect of the present invention, there is provided a module comprising: a packaged device according to any of the above aspects; a second electronic component provided on a first main surface of the multilayer wiring board on the second insulating layer side; and a junction conductor connecting the packaged device and the second electronic component.

[0015] According to yet another aspect of the present invention, a resist layer is formed on a structure including a support and an electrode provided on the support, the resist layer burying a lower portion of the electrode on the support side; forming a third insulating layer on the resist layer, the third insulating layer burying an upper portion of the electrode; A method for manufacturing a multilayer wiring structure with a support is provided, which includes forming a multilayer structure consisting of two or more layers on the third insulating layer, each layer including a wiring layer and a first insulating layer in which the wiring layer is embedded.

[0016] According to yet another aspect of the present invention, there is provided a method for manufacturing a multilayer wiring structure with a support according to the above aspect, further comprising forming a protective layer containing metal between the resist layer and the third insulating layer.

[0017] According to yet another aspect of the present invention, there is provided a method for manufacturing a multilayer wiring structure with a support according to any of the above aspects, wherein the electrode includes a first surface facing the support and a second surface opposite the first surface, a first cross section of the electrode parallel to its height direction has one or more constricted portions between the first surface and the second surface, and the resist layer is formed so that the one or more constricted portions are located below its upper surface. [Effects of the Invention]

[0018] The present invention provides a technique that can achieve high connection reliability. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a schematic diagram illustrating a module according to an embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view showing a cross section taken along line II-II of the module shown in FIG. [Figure 3] FIG. 4 is a cross-sectional view schematically showing a first conductive layer forming step in the method for manufacturing a module according to one embodiment of the present invention. [Figure 4] 5A to 5C are cross-sectional views schematically showing a resist layer forming step in the module manufacturing method according to the embodiment of the present invention. [Figure 5] FIG. 4 is a cross-sectional view schematically showing a second conductive layer forming step in the method for manufacturing a module according to one embodiment of the present invention. [Figure 6] 5A to 5C are cross-sectional views schematically showing a resist layer removal step in the module manufacturing method according to the embodiment of the present invention. [Figure 7] 5A to 5C are cross-sectional views schematically showing a step of forming a first electrode and a conductive layer in a manufacturing method of a module according to one embodiment of the present invention. [Figure 8] FIG. 4 is a diagram showing widths W1, W2, and CW of a first electrode. [Figure 9] 5A and 5B are cross-sectional views schematically showing a step of forming a second insulating layer and a wiring layer in the method for manufacturing a module according to one embodiment of the present invention. [Figure 10]FIG. 4 is a cross-sectional view schematically showing a second electrode forming step in the method for manufacturing a module according to one embodiment of the present invention. [Figure 11] FIG. 10 is a cross-sectional view schematically showing a fourth insulating layer forming step in the method for manufacturing a module according to one embodiment of the present invention. [Figure 12] 5A to 5C are cross-sectional views schematically showing a bonding step in the manufacturing method of the module according to the embodiment of the present invention. [Figure 13] 10A and 10B are cross-sectional views schematically showing a support member removing step in the manufacturing method of the module according to the embodiment of the present invention. [Figure 14] 5A and 5B are cross-sectional views schematically showing a conductive layer and second insulating layer removal step in the method for manufacturing a module according to one embodiment of the present invention. [Figure 15] FIG. 10 is a cross-sectional view schematically showing another example of the step of forming a fourth insulating layer in the method for manufacturing a module according to one embodiment of the present invention. [Figure 16] FIG. 10 is a cross-sectional view schematically showing another example of the step of forming a second electrode in the method for manufacturing a module according to one embodiment of the present invention. [Figure 17] FIG. 10 is a schematic diagram illustrating a packaged device according to another embodiment of the present invention. [Figure 18] 18 is a cross-sectional view showing the packaged device shown in FIG. 17 along line XVIII-XVIII. [Figure 19] FIG. 10 is a cross-sectional view schematically showing a module according to a comparative example. [Figure 20] FIG. 10 is a cross-sectional view schematically showing a module according to another comparative example. [Figure 21] FIG. 10 is a cross-sectional view schematically showing a module according to another comparative example. [Figure 22] FIG. 10 is a cross-sectional view schematically showing a first electrode according to a comparative example. [Figure 23] FIG. 10 is a cross-sectional view schematically showing a first electrode according to another comparative example. [Figure 24] FIG. 10 is a cross-sectional view schematically showing a first electrode according to a modified example. [Figure 25] FIG. 10 is a cross-sectional view schematically showing a first electrode according to another modified example. [Figure 26]FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 27] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 28] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 29] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 30] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 31] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 32] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 33] FIG. 10 is a cross-sectional view schematically showing a first electrode according to yet another modified example. [Figure 34] FIG. 10 is a cross-sectional view schematically showing a second insulating layer according to a modified example. [Figure 35] FIG. 10 is a cross-sectional view schematically showing a second insulating layer according to another modified example. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments described below are more specific embodiments of any of the above aspects. Elements having the same or similar functions are given the same reference numerals, and redundant explanations will be omitted. It should be noted that the drawings are schematic, and the relationship between the dimension in the thickness direction and the dimension in the direction perpendicular to the thickness direction, i.e., the in-plane direction, and the relationship between the dimensions in the thickness direction of multiple layers may differ from the actual ones. Therefore, specific dimensions should be determined with reference to the following explanation. It should also be noted that the dimensional relationship between two or more components may differ between multiple drawings.

[0021] The following embodiments are examples that embody the technical idea of ​​the present invention, and the technical idea of ​​the present invention is not limited to the materials, shapes, structures, and arrangements of the components described below. Various modifications can be made to the technical idea of ​​the present invention within the technical scope defined by the claims.

[0022] In this disclosure, the terms are defined as follows: The term "forward tapered" is used for a structure that does not have a substance, such as an opening, to describe a shape that tapers from the opening toward the back, i.e., a shape that tapers from the surface side toward the base side. The term "forward tapered" is used for a structure that has a substance, such as a first conductive layer, to describe a shape that tapers from the bottom surface toward the top surface, i.e., a shape that tapers from the base side toward the surface side.

[0023] Furthermore, in this disclosure, the expression "AA on BB" is used regardless of the direction of gravity. The state specified by the expression "AA on BB" includes a state in which AA is in contact with BB. The expression "AA on BB" does not exclude the presence of one or more other components between AA and BB.

[0024] <module> FIG. 1 is a schematic diagram illustrating a module according to one embodiment of the present invention. FIG. 2 is a cross-sectional view of the module shown in FIG. 1 taken along line II-II. Module 100A includes packaged device 100B, second electronic component 3, bonding conductor 4 connecting these, and sealing resin 5. In FIG. 2, the cross section of module 100A is parallel to its height direction. For example, the center of gravity of the first surface or the center of gravity of the second surface of first electrode 21 is located on this cross section. First electrode 21 will be described later.

[0025] The packaged device 100B includes a first electronic component 1 and a multilayer wiring board 2. The first electronic component 1 is, for example, the above-mentioned functional device or wiring board. Preferably, the first electronic component 1 is a semiconductor chip.

[0026] The first electronic component 1 includes a first electronic component body 10, an insulating layer 11, and a plurality of electrodes 12. The first electronic component body 10 has the same structure as the first electronic component 1 except for the insulating layer 11 and the plurality of electrodes 12. The insulating layer 11 is a layer provided on the first electronic component body 10 and has one or more through holes. Each of the plurality of electrodes 12 is provided at the position of a through hole in the insulating layer 11. Each of the plurality of electrodes 12 faces a second electrode 23, which will be described later. The plurality of electrodes 12 are arranged, for example, in a lattice pattern. The first electronic component body 10 is connected to the multilayer wiring substrate 2 via the electrodes 12. Note that FIG. 2 shows one of the plurality of electrodes 12.

[0027] The multilayer wiring board 2 includes a multilayer structure 20, a plurality of first electrodes 21, a second insulating layer 22, a plurality of second electrodes 23, and a fourth insulating layer 24. The multilayer wiring board 2 is, for example, an interposer.

[0028] The multi-layer structure 20 is made up of two or more layers 200. Each of the two or more layers 200 includes a first insulating layer 2000 and a wiring layer 2001. The first insulating layer 2000 has a through hole. The first insulating layer 2000 embeds a wiring layer 2001 at the position of the through hole. Specifically, the first insulating layer 2000 embeds a wiring layer 2001 included in a layer 200 including the first insulating layer 2000, and a wiring layer 2001 included in the second electrode 23 or a layer 200 adjacent to the first insulating layer 200. The first insulating layer 2000 is, for example, an insulating resin layer.

[0029] The wiring layer 2001 is made of, for example, a metal such as copper or an alloy.

[0030] A plurality of first electrodes 21 are provided on one surface of the multilayer structure 20. The first electrodes 21 are used, for example, for connection to the second electronic component 3. As shown in FIG. 2 , the first electrodes 21 protrude from the second insulating layer 22.

[0031] The multiple first electrodes 21 are connected to the wiring layers 2001 included in the adjacent layers 200. The multiple first electrodes 21 are arranged, for example, in a lattice pattern. In order to provide as many first electrodes 21 as possible on the multilayer wiring substrate 2, it is preferable that the distance between two adjacent first electrodes 21 is small.

[0032] The first electrode 21 is conductive. The first electrode 21 is made of, for example, copper, tin, nickel, chromium, titanium, gold, or an alloy containing one or more of these. The shape of the first electrode 21 will be described later. Note that FIG. 2 shows one of the multiple first electrodes 21.

[0033] The second insulating layer 22 has a through-hole. A part of the wiring layer 2001 included in the layer 200 adjacent to the second insulating layer 22 and the first electrode 21 are buried in the through-hole. The second insulating layer 22 is, for example, an insulating resin layer.

[0034] A plurality of second electrodes 23 are provided on the other surface of the multilayer structure 20. The plurality of second electrodes 23 are used, for example, for connection to the first electronic component 1. The plurality of second electrodes 23 are connected to the wiring layer 2001 included in the layer 200 adjacent thereto. A portion of the second electrodes 23 is embedded in a through hole of the adjacent first insulating layer 2000. The plurality of second electrodes 23 are arranged, for example, in a lattice pattern. In order to provide as many second electrodes 23 as possible on the multilayer wiring substrate 2, it is preferable that the distance between two adjacent second electrodes 23 is small. Note that FIG. 2 shows one of the plurality of second electrodes 23.

[0035] The fourth insulating layer 24 has a through-hole. The through-hole is filled with the second electrode 23. The fourth insulating layer 24 is, for example, an insulating resin layer.

[0036] The second electronic component 3 is provided on the main surface (hereinafter referred to as the first main surface) of the multilayer wiring substrate 2 on the second insulating layer 22 side. The second electronic component 3 is, for example, the above-mentioned functional device or wiring substrate. Preferably, the second electronic component 3 is a semiconductor chip.

[0037] The second electronic component 3 includes a second electronic component body 30 and a plurality of electrodes 31 provided on the second electronic component body 30. The second electronic component body 30 has the same structure as the second electronic component 3 except for the plurality of electrodes 31. Each of the plurality of electrodes 31 faces the first electrode 21. The plurality of electrodes 31 are arranged, for example, in a lattice pattern. The second electronic component body 30 is connected to the multilayer wiring board 2 via the electrodes 31. Note that FIG. 2 shows one of the plurality of electrodes 31.

[0038] The joining conductor 4 electrically connects the second electronic component 3 and the packaged device 100B. Specifically, the joining conductor 4 electrically connects the second electronic component 3 and the multilayer wiring board 2. At least a portion of the joining conductor 4 is interposed between the first electrode 21 and the electrode 31 that face each other. The melting point of the joining conductor 4 is lower than the melting points of the first electrode 21 and the electrode 31. The material of the joining conductor 4 is, for example, solder. For example, a metal or alloy containing tin can be used as the solder.

[0039] The sealing resin 5 is an insulating resin that is filled between the second electronic component 3 and the multilayer wiring substrate 2. The sealing resin 5 protects the first electrode 21 and the electrode 31 from the external environment. The sealing resin 5 may be made of, for example, epoxy resin.

[0040] It should be noted that two or more electronic components may be mounted on each of the two main surfaces of the multilayer wiring board 2.

[0041] <Manufacturing method of packaged device> An example of a method for manufacturing the above-mentioned module will now be described with reference to Figures 3 to 14. In this method, first, a multilayer wiring structure with a support is obtained by the following method.

[0042] First, a support 60 is prepared. The support 60 supports the multilayer wiring structure 25, which will be described later. The material of the support 60 is, for example, glass, polycarbonate, acrylic, or silicon. The support 60 is preferably in the form of a plate, sheet, or film. The support 60 is, for example, rectangular.

[0043] Next, as shown in FIG. 3, a first conductive layer 61 is formed on the support 60. The same materials as those exemplified as the materials for the first electrode 21 can be used as the material for the first conductive layer 61. The first conductive layer 61 can be formed by, for example, plating, sputtering, vapor deposition, or applying a metal paste. The first conductive layer 61 may be made up of multiple layers.

[0044] 4, a resist layer 62 is formed in a pattern on the first conductive layer 61. Here, the resist layer 62 is provided with one or more openings each having a forward tapered cross-sectional shape.

[0045] 5, a second conductive layer 63 is filled in the openings of the resist layer 62. The material of the second conductive layer 63 can be the same as the material exemplified for the first electrode 21. The material of the second conductive layer 63 is preferably the same as the material of the first conductive layer 61. The second conductive layer 63 can be formed by, for example, plating, sputtering, vapor deposition, or applying a metal paste.

[0046] 6, the resist layer 62 is removed. The resist layer 62 is removed by, for example, wet etching or dry etching.

[0047] Next, as shown in FIG. 7, a portion of the first conductive layer 61 is removed to obtain the first electrode 21 and the conductive layer 64. The first conductive layer 61 can be removed by, for example, wet etching or dry etching. The first conductive layer 61 is preferably removed by isotropic etching. For example, if the second conductive layer 63 is formed to have a reverse tapered cross-sectional shape, isotropic etching of the first conductive layer 61 results in the first conductive layer 61 having a forward tapered cross-sectional shape. The first electrode 21 is columnar.

[0048] Each of the multiple first electrodes 21 includes a first surface S1 facing the support 60 and a second surface S2 opposite the first surface S1. The first surface S1 and the second surface S2 are each, for example, circular. The diameter of the circle circumscribing the outline of the first surface S1 and the diameter of the circle circumscribing the outline of the second surface S2 are each, for example, 10 μm or more and less than 500 μm. Each of these diameters is preferably in the range of 10 μm to 200 μm, and more preferably in the range of 10 μm to 100 μm.

[0049] Each of the multiple first electrodes 21 has a first cross section that has one or more constricted portions 210 between the first surface S1 and the second surface S2. Here, the first cross section is a cross section parallel to the height direction of the multiple first electrodes 21. The first cross section is selected, for example, so that the center of gravity of the first surface or the center of gravity of the second surface is located on the first cross section.

[0050] The height of the first electrode 21 is preferably in the range of 5 μm to 500 μm, and more preferably in the range of 30 μm to 200 μm.

[0051] The cross section of the first electrode 21, which is perpendicular to the height direction of the first electrode 21 and includes the constricted portion 210 (hereinafter referred to as the constricted portion cross section), is circular. However, this shape does not have to be circular.

[0052] The cross-sectional area of ​​the constricted portion is smaller than the areas of the first surface S1 and the second surface S2. At least one of the one or more cross-sectional areas of the constricted portion has the smallest area SS1 among the cross-sectional areas perpendicular to the height direction of the first electrode 21.

[0053] The ratio SS1 / SS2 of the area SS1 to the area SS2, which is the smaller of the area of ​​the first surface S1 and the area of ​​the second surface S2, is preferably 0.5 or more, more preferably 0.7 or more, and even more preferably 0.9 or more.

[0054] 7 indicates the outline of the circumscribing rectangle having the smallest area among the rectangles circumscribing the outline of first electrode 21. As shown in FIG. 7, in the first cross section, the area A1 of this circumscribing rectangle is preferably larger than the area A2 of first electrode 21.

[0055] The ratio A2 / A1 of the area A2 to the area A1 is preferably in the range of 0.70 to 0.99, and more preferably in the range of 0.75 to 0.9. If this ratio is too small, the strength of the first electrode 21 is likely to be reduced. If this ratio is too large, a short circuit may occur between two adjacent first electrodes 21.

[0056] The center-to-center distance between two adjacent first electrodes 21 is preferably within a range of 1.5 to 5 times, and more preferably within a range of 2 to 3 times, the diameter of the circle that has the smallest area among the circles circumscribing the outline of the first surface S1. For example, the center-to-center distance between two adjacent first electrodes 21 is within a range of 15 μm to 2500 μm. The shapes of the first surface S1 and the second surface S2 may be the same or different.

[0057] 8 is a diagram showing widths W1, W2, and CW of the first electrode 21. Width W1 is the dimension in the width direction perpendicular to the height direction of a first portion P1 of the outline of the first cross section that corresponds to the first surface S1. Width W2 is the dimension in the width direction perpendicular to the height direction of a second portion P2 of the outline of the first cross section that corresponds to the second surface S2. Width CW is the width of the constricted portion 210.

[0058] The width CW is preferably in the range of 0.7 to 0.99 times the widths W1 and W2, and more preferably in the range of 0.75 to 0.9 times. If this ratio is too small, the strength of the first electrode 21 is likely to be reduced. If this ratio is too large, a short circuit may occur between two adjacent first electrodes 21.

[0059] The ratio W2 / W1 of width W2 to width W1 is preferably in the range of 0.7 to 1.3, and more preferably in the range of 0.8 to 1.2. If this ratio is too small, for example, when mounting second electronic component 3, when force is applied to the edge of the first surface of first electrode 21, cracks may occur in first electrode 21 or first electrode 21 may fall over.

[0060] For example, when a release layer (described later) is formed between the conductive layer 64 and the support 60, the conductive layer 64 prevents the material of the release layer from mixing with the material of the second insulating layer. The thickness of the conductive layer 64 is preferably in the range of 0.001 μm to 100 μm, and more preferably in the range of 0.01 μm to 10 μm.

[0061] Next, as shown in FIG. 9, a second insulating layer 22 is formed with the first electrode 21 embedded therein. The second insulating layer 22 has a through-hole at the position of the first electrode 21. Then, as shown in FIG. 9, a wiring layer 2001 is formed at the position of the through-hole in the second insulating layer 22. The wiring layer 2001 protrudes from the second insulating layer 22. A typical lamination process in the manufacturing process of a wiring substrate can be used to form the second insulating layer 22. For example, a photosensitive insulating resin can be used as the material for the second insulating layer 22. For example, a semi-additive method can be used to form the wiring layer 2001. The material for the wiring layer 2001 is preferably the same as the material for the first conductive layer 61.

[0062] Next, a first insulating layer 2000 with a wiring layer 2001 embedded therein is formed on the second insulating layer 22. The first insulating layer 2000 has through holes at the positions of the wiring layer 2001. In this manner, a layer 200 including the first insulating layer 2000 and the wiring layer 2001 is obtained.

[0063] Next, the step of forming the layer 200 including the first insulating layer 2000 and the wiring layer 2001 is carried out twice, thereby obtaining the multilayer structure 20.

[0064] 10, a plurality of second electrodes 23 are formed at the positions of the through holes provided in the first insulating layer 2000. The second electrodes 23 protrude from the first insulating layer 2000. The same materials as those exemplified as the materials for the first electrodes 21 can be used as the materials for the second electrodes 23. The second electrodes 23 can be formed by a method similar to the method for forming the wiring layer 2001.

[0065] 11, a fourth insulating layer 24 is formed on the first insulating layer 2000. Here, as an example, the fourth insulating layer 24 is formed so that the upper surface of the fourth insulating layer 24 is flush with the upper surface of the second electrode 23. The material of the fourth insulating layer 24 may be the same as the material exemplified for the first insulating layer 2000. In this manner, a multilayer wiring structure 25 is formed. By the above method, a multilayer wiring structure 300 with a support body is obtained.

[0066] Next, the first electronic component 1 described above is prepared. Next, as shown in FIG. 12, the resulting support-attached multilayer wiring structure 300 and the first electronic component 1 are connected. Specifically, the second electrode 23 and the electrode 12 are connected. In FIG. 12, the second electrode 23 and the electrode 12 are directly connected. The method for connecting the second electrode 23 and the electrode 12 is not particularly limited. For example, an anisotropic conductive resin may be used to connect the second electrode 23 and the electrode 12, or the above-described bonding conductor may be used.

[0067] Next, as shown in FIG. 13, the support 60 is peeled off from the multilayer wiring structure 25. The support 60 is peeled off, for example, by a mechanical method or a chemical method. In one example, the support 60 can be peeled off by inserting a blade between the support 60 and the conductive layer 64. In another example, the support 60 can be peeled off by dissolving it. In yet another example, the support 60 can be peeled off by utilizing a peeling layer provided between the support 60 and the conductive layer 64. The peeling layer will be described later. Note that the structure shown in FIGS. 13 and 14 is upside down compared to the structure shown in FIGS. 3 to 12.

[0068] 14, a portion of the second insulating layer 22 and the conductive layer 64 are removed. The conductive layer 64 is removed by, for example, wet etching using an etching solution or dry etching. Like the conductive layer 64, the second insulating layer 22 can also be removed by wet etching or dry etching.

[0069] Here, the second insulating layer 22 is formed on each of the multiple first electrodes 21 so that one or more constricted portions 210 are exposed and protrude from the second insulating layer 22. Forming the second insulating layer 22 in this manner can prevent the first electrode 21 from tipping over or from being detached from the multilayer wiring substrate 2. Furthermore, forming the second insulating layer 22 in this manner allows the first electrode 21 to accommodate the joining conductor 4 at the position of the constricted portion 210, as will be described later.

[0070] For example, if the distance from the second surface S2 to the constricted portion 210 is 50% of the height of the first electrode 21, it is preferable that 55% to 95% of the height of the first electrode 21 protrudes from the second insulating layer. In this way, a packaged device 100B is obtained.

[0071] Next, the above-mentioned second electronic component 3 is prepared. Next, the second electronic component 3 is mounted on the packaged device 100B. Specifically, the packaged device 100B and the second electronic component 3 are bonded via a bonding conductor 4. Specifically, first, the bonding conductor 4 is placed on at least one of the surfaces of the electrodes 31 and the first electrodes 21 of the second electronic component 3. Next, the second electronic component 3 and the packaged device 100B are brought into contact with each other via the bonding conductor 4 so that the electrodes 31 and the first electrodes 21 face each other. Next, the bonding conductor 4 is heated to melt it, and then cooled to electrically connect the electrodes 31 and the first electrodes 21.

[0072] When the joining conductor 4 is melted, as shown in Fig. 2, on the first electrode 21, which is close to the electrode 31, a part of the joining conductor 4 interposed between the first electrode 21 and the electrode 31 protrudes from the gap therebetween and moves to the side of the first electrode 21. Then, the joining conductor 4 that has moved to the side is accommodated within the region surrounded by the circumscribed rectangle described above, particularly at the position of the constricted portion 210. In this way, the constricted portion 210 restricts the joining conductor 4 from moving to another position.

[0073] Next, the above-mentioned sealing resin 5 is filled between the second electronic component 3 and the packaged device 100B. In this way, the second electronic component 3 is fixed to the packaged device 100B. In this way, the module 100A shown in FIGS. 1 and 2 is obtained.

[0074] In the above-described method, the step of forming the fourth insulating layer described with reference to Fig. 11 may be omitted. In the step described with reference to Fig. 11, an insulating layer may be formed as the fourth insulating layer 24, in which the second electrode 23 is embedded and which has a through-hole at the position of the second electrode 23, as shown in Fig. 15.

[0075] In the above-described method, the fourth insulating layer 24 is formed after the second electrode 23 is formed. However, the second electrode 23 may be formed after the fourth insulating layer 24 is formed. In the process described with reference to FIG. 10 , a conductive layer 26 and a second electrode 23 having a constricted portion may be formed as shown in FIG. 16 . The conductive layer 26 and the second electrode 23 may be formed integrally. For example, among the multiple second electrodes 23, those with a small distance between adjacent electrodes preferably have the same shape as the first electrode 21. Furthermore, among the multiple second electrodes 23, those with a large distance between adjacent electrodes may adopt the structure shown in FIG. 10 . The electrodes 12 and 31 may have the same shape as the first electrode 21.

[0076] <Other examples of packaged devices> Fig. 17 is a schematic diagram illustrating a packaged device according to another embodiment of the present invention. Fig. 18 is a cross-sectional view of the packaged device shown in Fig. 17 taken along line XVIII-XVIII. Note that Fig. 18 partially omits the structure of multilayer wiring substrate 2. Packaged device 100B shown in Fig. 18 is similar to packaged device 100B shown in Fig. 14 except that second electrode 23 has the constricted portion described above, second electrode 23 protrudes from fourth insulating layer 24 so that the constricted portion is exposed, second electrode 23 and electrode 12 are connected via bonding conductor 7, and sealing resin 8 is filled between first electronic component 1 and multilayer wiring substrate 2.

[0077] Each of the plurality of second electrodes 23 includes a third surface facing the adjacent first insulating layer 2000 and a fourth surface opposite the third surface. Each of the plurality of second electrodes 23 has a second cross section parallel to its height direction, which has one or more constricted portions between the third and fourth surfaces. Here, the second cross section is a cross section parallel to the height direction of the plurality of second electrodes 23. The second cross section is selected, for example, so that the center of gravity of the third surface or the center of gravity of the fourth surface is located on the second cross section.

[0078] 18, the second electrode 23 can also accommodate the joining conductor 7 at the position of the constricted portion. This makes it difficult for the joining conductor 7 to move to another position, resulting in a short circuit. The packaged device 100B shown in FIG. 18 can be manufactured using, for example, the structure shown in FIG. 16.

[0079] <Effects> FIG. 19 is a cross-sectional view schematically illustrating a module according to a comparative example. This module has an electronic component 40 mounted on a wiring substrate included in a packaged device 9. This module employs a mounting method using a BGA. In a module 100A shown in FIG. 19, an electronic component 40 is mounted on the packaged device 9 via a bonding conductor 4. A sealing resin 5 is filled between the electronic component 40 and the packaged device 9. The electronic component 40 includes an electronic component body 400 and a solder resist layer 401 provided on the electronic component body 400. The solder resist layer 401 has openings, and the electronic component body 400 has electrodes at the positions of the openings. The packaged device 9 includes a wiring board and another electronic component provided on one side of the wiring board. The wiring board includes a wiring structure 90 and a solder resist layer 91 provided on the wiring structure 90. The solder resist layer 91 has openings, and the wiring structure 90 has electrodes at the positions of the openings. In FIG. 19, only the wiring structure 90 and the solder resist layer 91 of the packaged device 9 are shown.

[0080] In recent years, with the increasing integration density of semiconductor devices, there has been a demand for increasing the number of electrodes in a semiconductor device by reducing the area of ​​the main surfaces of the electrodes and narrowing the gap between two adjacent electrodes. However, in the mounting method shown in FIG. 19, a large amount of bonding conductor is required for bonding, and the bonding conductor 4 provided on one electrode is likely to extend into the adjacent electrode. Therefore, narrowing the gap poses the problem of short circuits between the electrodes. Therefore, in this case, it is necessary to consider the amount of bonding conductor 4.

[0081] In consideration of the above-mentioned problems, pillar-shaped electrodes 92 as shown in FIGS. 20 and 21 were used for bonding. FIGS. 20 and 21 are cross-sectional views schematically illustrating a module according to a comparative example, which includes pillar-shaped electrodes 92. The module 100A shown in FIGS. 20 and 21 is similar to the module 100A shown in FIG. 19 except that it includes pillar-shaped electrodes 92 as electrodes. The electronic component 40 shown in FIGS. 20 and 21 is similar to the electronic component 40 shown in FIG. 19 except that the electrodes 402 of the electronic component body 400 protruding from the solder resist layer 401 are illustrated, and the solder resist layer 401 is not illustrated. FIGS. 20 and 21 illustrate different regions of the same module 100A. Specifically, FIG. 20 illustrates a region away from the center of the wiring substrate (hereinafter referred to as the peripheral region), and FIG. 21 illustrates a region near the center of the wiring substrate (hereinafter referred to as the central region). The solder resist layer 91 is omitted from FIGS. 20 and 21.

[0082] In the module 100A equipped with pillar-shaped electrodes 92, the distance between the two opposing electrodes is shorter than in the module 100A shown in Fig. 19, and therefore the amount of joining conductor 4 required for joining is smaller. Therefore, in the region shown in Fig. 20, the joining conductor 4 is less likely to extend onto the adjacent electrodes. Therefore, the module 100A shown in Fig. 20 is less likely to cause the above-mentioned short circuit than the module 100A shown in Fig. 19.

[0083] When mounting electronic components 40 such as functional devices on a wiring board, the wiring board may warp. In this case, the distance between the opposing electrodes 92 located in the central region of the wiring board is different from the distance between the opposing electrodes 92 located in the peripheral region of the wiring board. Specifically, the distance between the electrodes 92 located in the peripheral region is greater than the distance between the electrodes 92 located in the central region.

[0084] For this reason, the electrode 92 located in the peripheral region requires a larger amount of joining conductor 4 for joining than the electrode 92 located in the central region. Therefore, if the electrode 92 located in the peripheral region is provided with the same amount of joining conductor 4 as the minimum amount of joining conductor 4 required for joining the electrode 92 located in the central region, there is a risk of a cold joint, i.e., a disconnection defect, occurring.

[0085] On the other hand, the electrode 92 located in the central region requires a smaller amount of joining conductor 4 for joining than the electrode 92 located in the peripheral region. Therefore, if the electrode 92 located in the central region is provided with the same amount of joining conductor 4 as the minimum amount of joining conductor 4 required for joining the electrode 92 located in the peripheral region, the joining conductor 4 is likely to protrude from the main surface of the electrode 92 in a direction perpendicular to the height direction of the electrode 92, as shown in Fig. 21. In this case, a short circuit is likely to occur.

[0086] 20 and 21, if the same amount of joining conductor is provided on each electrode, disconnection or short circuit may occur, making it difficult to reduce the distance between two adjacent electrodes 92.

[0087] In the module 100A according to the present invention, the first electrode 21 has the constricted portion 210 described above in the first cross section. As shown in FIG. 2 , the inclination of the portion of the first electrode 21 corresponding to the side surface changes significantly near the constricted portion 210. Therefore, even if the joining conductor protrudes from the first surface S1 and moves to the side surface of the first electrode 21, the first electrode 21 can accommodate the joining conductor at the position of the constricted portion 210. Therefore, the joining conductor is unlikely to move to the main surface of the multilayer wiring substrate 2. Therefore, the module 100A according to the present invention can provide a module in which the joining conductor is not present on the main surface of the multilayer wiring substrate 2, or, even if the joining conductor is present on the main surface, the joining conductor is present only in the vicinity of the first electrode 21. Therefore, the support-attached multilayer wiring structure 300 described above makes it difficult for a short circuit to occur between two adjacent electrodes.

[0088] Therefore, the above-described first electrode 21 can reduce the distance between two adjacent electrodes. Furthermore, the above-described first electrode 21 can suppress short circuits without drastically reducing the amount of bonding conductor, making the above-described disconnection defects less likely to occur. Therefore, the above-described support-attached multilayer wiring structure 300 can achieve high connection reliability during bonding.

[0089] 22 and 23 are cross-sectional views schematically illustrating a first electrode 21 according to a comparative example. FIGS. 22 and 23 illustrate a structure including a support 60 and a first electrode 21 according to a comparative example provided on the support 60. The structure illustrated in FIG. 22 is the same as the structure illustrated in FIG. 7 except that the first electrode 21 does not have a portion corresponding to the constricted portion 210 described above, the width W1 of the first surface S1 is smaller than the width W2 of the second surface S2, and the conductive layer 64 is omitted. The structure illustrated in FIG. 23 is the same as the structure illustrated in FIG. 7 except that the first electrode 21 does not have a portion corresponding to the constricted portion 210 described above, the width W1 of the first surface S1 is larger than the width W2 of the second surface S2, and the conductive layer 64 is omitted.

[0090] 22 and 23, the first electrode 21 does not have the constricted portion described above, and therefore, when the second electronic component 3 is mounted, the joining conductor that protrudes from the first surface S1 tends to move along the side surface of the first electrode 21 toward the main surface of the multilayer wiring board 2. In particular, in the structure shown in FIG. 22, the cross section of the first electrode 21 parallel to its height direction has an inversely tapered cross section, and therefore, during joining, the joining conductor tends to move toward the main surface of the multilayer wiring board 2. For this reason, these structures are prone to short circuits.

[0091] Furthermore, as described above, there is a prior art technique in which the joining conductors are formed by plating to reduce variations in the height of the joining conductors provided on each of the plurality of electrodes 92. However, even with this technique, the variations in the distance between the opposing electrodes caused by the warping described above cannot be eliminated, and therefore the disconnection and short circuit described above may still occur.

[0092] <Modification> 24 to 33 are cross-sectional views schematically showing first electrodes 21 according to modified examples. The first electrodes 21 shown in FIGS. 24 to 33 are the same as the first electrodes shown in FIG. 7 except that their shapes are different from those of the first electrodes 21 shown in FIG. 24 to 33. As shown in FIGS. 24 to 33, the shape of the side surfaces of the first electrodes 21 and the number and positions of the constricted portions 210 are not limited to those shown in FIG. 7. Note that the conductive layer 64 is omitted in FIGS. 24 to 33.

[0093] The first electrode 21 shown in Fig. 24 is similar to the first electrode 21 shown in Fig. 7 except that the distance from the first surface S1 of the constricted portion 210 is shorter than the distance in the structure shown in Fig. 7. In this case, even if the joining conductor 4 protrudes from the first surface of the first electrode 21 and moves to the side surface of the first electrode 21 during mounting, the joining conductor 4 can immediately stay in the portion corresponding to the constricted portion 210.

[0094] The first electrode 21 shown in FIG. 25 is similar to the first electrode 21 shown in FIG. 7, except that the distance from the first surface S1 to the constricted portion 210 is greater than the distance in the first electrode 21 shown in FIG.

[0095] 26 is similar to the first electrode 21 shown in Fig. 7 except that the first electrode 21 has a minimum width in the portion from the vicinity of the first surface to the vicinity of the second surface and has a substantially cylindrical shape. With this structure, it is possible to increase the amount of the joining conductor 4 that can be accommodated at the position of the constricted portion 210.

[0096] The first electrode 21 shown in Fig. 27 is similar to the first electrode 21 shown in Fig. 7 except that the width W1 is smaller than the width W2, and a pair of side surface portions corresponding to the side surfaces of the first electrode 21 in the first cross section are curved. In Fig. 27, the pair of side surface portions are hyperbolic, but they do not have to be hyperbolic. The curved lines may be, for example, parabolic.

[0097] The first electrode 21 having the curved side portions can be obtained, for example, by appropriately adjusting the composition of the etching solution and the spray pressure when spraying the etching solution in the step of removing the first conductive layer 61 described with reference to Figure 7.

[0098] The first electrode 21 shown in FIG. 28 is similar to the first electrode 21 shown in FIG. 27, except that the width W1 described above is larger than the width W2 described above.

[0099] 29 is similar to the first electrode 21 shown in FIG. 7 except that it has two constricted portions 210, i.e., constricted portions 210A and 210B. When the first electrode 21 has two or more constricted portions 210, the two or more constricted portions 210 may have different widthwise dimensions. Furthermore, at least two of the two or more constricted portions 210 may have the same widthwise dimension. Even when the first electrode 21 has two or more constricted portions 210, the side surface portions corresponding to the side surfaces of the first electrode 21 in the first cross section may be curved.

[0100] 30 is similar to the first electrode 21 shown in Fig. 7 except that in the first cross section, the side surface portion corresponding to the side surface of the first electrode 21 in the vicinity of the constricted portion 210 is curved. For example, the first electrode 21 shown in Fig. 30 can be obtained by forming the first electrode 21 shown in Fig. 7 and then performing side etching in the vicinity of the constricted portion 210.

[0101] The first electrode 21 shown in Figure 31 is similar to the first electrode 21 shown in Figure 7 except that the distance from the first surface S1 of the constricted portion 210 is greater than the above distance in the first electrode 21 shown in Figure 7, and in the first cross section, the portion of the side surface corresponding to the side of the first electrode 21 from the first surface to the constricted portion 210 is curved.

[0102] The first electrode 21 shown in FIG. 32 has two constricted portions 210, i.e., constricted portions 210A and 210B, and is similar to the first electrode 21 shown in FIG. 7 except that in the first cross section, the portion of the side surface corresponding to the side surface of the first electrode 21 between the constricted portions 210A and 210B is curved.

[0103] The structure shown in FIG. 32 can be formed, for example, by the following method. First, support 60 is prepared. Next, a first resist layer having an opening with a reverse tapered cross-sectional shape is formed on support 60. Next, a conductive layer is filled in the opening. This process obtains a portion corresponding to the portion from first surface S1 to constricted portion 210B. Next, a second resist layer is formed on the conductive layer and the first resist layer. Next, an opening with a forward tapered cross-sectional shape is formed in the second resist layer at the position of the conductive layer. Next, the conductive layer is filled in the opening. Next, a third resist layer is formed on the second resist layer and the conductive layer. Next, an opening with a reverse tapered cross-sectional shape is formed at the position of the conductive layer. Next, the conductive layer is filled in the opening. Through these processes, a portion corresponding to the portion from constricted portion 210B to constricted portion 210A is obtained. Next, a second conductive layer is formed by a method similar to that described with reference to FIGS. 4 to 6. In this manner, the structure shown in FIG. 32 is obtained.

[0104] The first electrode 21 shown in FIG. 33 has three constricted portions 210, namely constricted portions 210A, 210B, and 210C, and is similar to the first electrode 21 shown in FIG. 7 except that the side surface of the first electrode 21 is curved.

[0105] An electrode having two or more constricted portions 210, for example, the first electrode 21 shown in FIGS. 29, 32, and 33, has a plurality of locations in the first cross section where the inclination of the side surface portion corresponding to the side surface of the first electrode 21 changes significantly. Therefore, even if the joining conductor 4 adheres to the side surface of the first electrode 21, the joining conductor 4 is unlikely to migrate to the surface of the multilayer wiring substrate 2. Therefore, a short circuit caused by the joining conductor 4 migrating to the surface of the multilayer wiring substrate 2 is unlikely to occur. The above has described the first electrode 21 according to the modified example. The first electrode 21 can be formed by combining the above-mentioned methods.

[0106] Fig. 34 is a cross-sectional view schematically showing a second insulating layer according to a modified example. The structure shown in Fig. 34 is similar to the structure shown in Fig. 9 except that the structure of second insulating layer 22 is different from that of second insulating layer 22 shown in Fig. 9, peeling layer 65 is provided, and wiring layer 2001 is omitted.

[0107] The second insulating layer 22 shown in FIG. 34 includes a resist layer 220, a protective layer 221, and a third insulating layer 222.

[0108] The resist layer 220 is provided on the conductive layer 64. The material of the resist layer 220 is a material that can be removed in a resist layer 220 removal step, which will be described later. The material of the resist layer 220 may be a photosensitive resin or a non-photosensitive resin. The resist layer 220 may be a film in which an opening is provided at the position of the first electrode 21. In FIG. 34 , the height of the resist layer 220 is lower than the height from the first surface to the second surface of the first electrode 21 and higher than the height from the first surface of the first electrode 21 to the constricted portion 210.

[0109] When the distance from the second surface S2 of the constricted portion 210 is 50% of the height of the first electrode 21, the thickness of the resist layer 220 is preferably within the range of 55% to 95% of the height of the first electrode 21.

[0110] The protective layer 221 is provided between the resist layer 220 and the third insulating layer 222. The protective layer 221 is a layer containing a metal. The metal contained in the protective layer 221 is, for example, copper, tin, nickel, chromium, titanium, gold, or an alloy containing one or more of these. The protective layer 221 prevents the material of the resist layer 220 from mixing with the material of the third insulating layer 222. If these materials mix, the resist layer 220 becomes difficult to remove in the step of removing the resist layer 220, which will be described later, and there is a risk that the resist will remain as foreign matter. The material of the protective layer 221 is more difficult to remove than the material of the resist layer 220 in the step of removing the resist layer 220.

[0111] The thickness of the protective layer 221 is preferably in the range of 0.001 μm to 100 μm.

[0112] The third insulating layer 222 faces the support 60 with the resist layer 220 sandwiched therebetween. The third insulating layer 222 is, for example, an insulating resin layer. The shortest distance from the support 60 to one or more constricted portions 210 is shorter than the shortest distance from the support 60 to the third insulating layer 222.

[0113] The release layer 65 is provided between the support 60 and the conductive layer 64. The release layer 65 facilitates the release of the support 60 from the multilayer wiring structure 25. For the release layer 65, a layer that exerts a release effect when external energy is applied thereto, for example, by laser light, can be used.

[0114] 34, by removing the resist layer 220, a structure can be easily obtained in which the first electrode 21 protrudes from the second insulating layer 22 so as to expose the constricted portion 210. Furthermore, with such a structure, the portion of the first electrode 21 on the second surface side is buried in the third insulating layer 222, so that the first electrode 21 is less likely to detach even after the resist layer 220 and the like are removed.

[0115] The structure shown in FIG. 34 can be formed, for example, by the following method.

[0116] First, a laminate is prepared that includes the support 60 and the release layer 65. Next, the steps described with reference to FIGS.

[0117] Next, a resist layer 220 is formed on the conductive layer 64, burying the lower portion of the first electrode 21, i.e., the portion on the first surface side. Here, the height of the resist layer 220 is higher than the height of the constricted portion 210. In other words, the resist layer 220 is formed so that at least one of the one or more constricted portions is located below the upper surface of the resist layer 220.

[0118] Next, a protective layer 221 is formed on the resist layer 220 .

[0119] Next, a third insulating layer 222 is formed on the protective layer 221, embedding the upper part of the first electrode 21, i.e., the part on the second surface side. The third insulating layer 222 has a through-hole at the position of the first electrode 21.

[0120] In this way, the structure shown in Fig. 34 is obtained. When the structure shown in Fig. 34 is subjected to the above-mentioned step of forming layer 200 and the steps described with reference to Figs. 10 and 11, a multilayer wiring structure with a support is obtained.

[0121] Hereinafter, a method for manufacturing a packaged device 100B shown in FIG. 14 using the multilayer wiring structure with a support obtained by the above method will be described.

[0122] First, the obtained multilayer wiring structure with a support is subjected to the process described with reference to Fig. 12. Next, the support 60 is peeled off from the multilayer wiring structure 25. For example, the peeling layer 65 is irradiated with laser light to peel off the peeling layer 65 and the support 60 from the multilayer wiring structure 25.

[0123] Next, the conductive layer 64 is removed. The conductive layer 64 can be removed by the method described above.

[0124] Next, the resist layer 220 is removed. The resist layer 220 can be removed by a method such as wet etching, dry etching, plasma irradiation, or ultraviolet light irradiation, depending on the material of the resist layer 220.

[0125] Next, the protective layer 221 is removed. The protective layer can be removed by, for example, wet etching or dry etching.

[0126] In this way, the structure shown in FIG. 14 is obtained.

[0127] 35, even when an electrode 27 without a constricted portion 210 is provided in place of the first electrode 21 in the structure shown in FIG. 34, the electrode 27 is not likely to be detached even after the resist layer 220 and the like are removed, because a part of the electrode 27 is embedded in the third insulating layer 222. [Explanation of symbols]

[0128] 1...first electronic component, 2...multilayer wiring board, 3...second electronic component, 4...junction conductor, 5...encapsulating resin, 7...junction conductor, 8...encapsulating resin, 9...packaged device, 10...first electronic component body, 11...insulating layer, 12...electrode, 20...multilayer structure, 21...first electrode, 22...second insulating layer, 23...second electrode, 24...fourth insulating layer, 25...multilayer wiring structure, 26...conductive layer, 27...electrode, 30...second electronic component body, 31...electrode, 40...electronic component, 60...support, 61...first conductive layer, 62...resist layer, 63...second conductive layer, 64...conductive layer, 65...peeling layer, 9 0...wiring structure, 91...solder resist layer, 92...electrode, 100A...module, 100B...packaged device, 200...layer, 210...necked portion, 210A...necked portion, 210B...necked portion, 210C...necked portion, 220...resist layer, 221...protective layer, 222...third insulating layer, 300...multilayer wiring structure with support, 400...electronic component body, 401...solder resist layer, 402...electrode, 2000...first insulating layer, 2001...wiring layer, CR...dashed line, P1...first part, P2...second part, S1...first surface, S2...second surface, W1...width, W2...width.

Claims

1. a multilayer structure including a multilayer structure consisting of two or more layers, each of which includes a wiring layer and a first insulating layer in which the wiring layer is embedded, a plurality of first electrodes provided on one surface of the multilayer structure, and a second insulating layer in which the plurality of first electrodes are embedded; a support body supporting the multilayer wiring structure on a first main surface of the multilayer wiring structure on the second insulating layer side, Each of the plurality of first electrodes includes a first surface facing the support and a second surface opposite to the first surface, A multilayer wiring structure with a support body, wherein each of the plurality of first electrodes has a first cross section parallel to its height direction, the first cross section having one or more constricted portions between the first surface and the second surface.

2. 2. The multilayer wiring structure with a support according to claim 1, further comprising a conductive layer between the support and the second insulating layer.

3. The multilayer wiring structure with a support according to claim 2 , further comprising a release layer between the support and the conductive layer.

4. the second insulating layer includes a resist layer provided on the support body side and a third insulating layer facing the support body with the resist layer sandwiched therebetween, 2. The support-attached multilayer wiring structure according to claim 1, wherein the shortest distance from the support to the one or more constricted portions is shorter than the shortest distance from the support to the third insulating layer.

5. 5. The support-attached multilayer wiring structure according to claim 4, wherein the second insulating layer further includes a protective layer containing a metal between the resist layer and the third insulating layer.

6. the multilayer wiring structure further includes a second electrode provided on the other surface of the multilayer structure; each of the plurality of second electrodes includes a third surface facing the first insulating layer and a fourth surface opposite to the third surface; A multilayer wiring structure with a support as described in claim 1, wherein each of the plurality of second electrodes has a second cross section parallel to its height direction having one or more constricted portions between the third surface and the fourth surface.

7. a multilayer wiring substrate including a multilayer structure consisting of two or more layers, each of which includes a wiring layer and a first insulating layer in which the wiring layer is embedded, a plurality of first electrodes provided on one surface of the multilayer structure, a second insulating layer in which the plurality of first electrodes are embedded, and a plurality of second electrodes provided on the other surface of the multilayer structure; a first electronic component connected to the plurality of second electrodes, each of the plurality of first electrodes includes a second surface facing the multilayer structure and a first surface opposite the second surface; each of the plurality of first electrodes has a first cross section parallel to a height direction thereof, the first cross section having one or more constricted portions between the first surface and the second surface; A packaged device, wherein each of the plurality of first electrodes protrudes from the second insulating layer so as to expose the one or more constricted portions.

8. The packaged device according to claim 7 , wherein the first electronic component is a functional device or a wiring board.

9. 10. A module comprising: the packaged device according to claim 7; a second electronic component provided on a first main surface of the multilayer wiring substrate on the second insulating layer side; and a junction conductor connecting the packaged device and the second electronic component.

10. forming a resist layer on a structure including a support and an electrode provided on the support, the resist layer burying a lower portion of the electrode on the support side; forming a third insulating layer on the resist layer, the third insulating layer burying an upper portion of the electrode; and forming a multilayer structure consisting of two or more layers on the third insulating layer, each layer including a wiring layer and a first insulating layer in which the wiring layer is embedded.

11. The method for manufacturing a multilayer wiring structure with a support according to claim 10, further comprising forming a protective layer containing a metal between the resist layer and the third insulating layer.

12. the electrode includes a first surface facing the support and a second surface opposite the first surface; the electrode has a first cross section parallel to a height direction thereof, the first cross section having one or more constricted portions between the first surface and the second surface; The method for manufacturing a multilayer wiring structure with a support according to claim 10, wherein the resist layer is formed so that the one or more constricted portions are located below an upper surface of the resist layer.

Citation Information

Patent Citations

  • Wiring board with bump and its manufacturing method

    JP2004140248A