Method for producing group iii nitride semiconductor and seed substrate

Abstract

To provide a method for producing a Group III nitride semiconductor that enables suppression of propagation of dislocations of a seed crystal toward an upper region.SOLUTION: A method for producing a Group III nitride semiconductor includes a crystal growth step of supplying a nitrogen-containing gas to a mixed melt obtained by mixing a Group III metal and a flux to grow a Group III nitride semiconductor on a seed substrate 9, wherein the seed substrate 9 includes a substrate 1 and a plurality of seed crystals 2 made of a Group III nitride semiconductor and provided on the substrate 1, and each of the seed crystals 2 has a recess 2d at a center.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for producing a Group III nitride semiconductor and a seed substrate. [Background technology]

[0002] The Na flux method is a well-known method for producing GaN. In the Na flux method, nitrogen is dissolved in a molten mixture of Ga and Na to grow GaN in the liquid phase. In the Na flux method, a seed substrate is generally placed in the molten mixture and GaN is grown on the seed substrate.

[0003] In the Na flux method, a method using a multi-point seed (MPS) substrate as a seed substrate is known as a method for growing large-area GaN crystals with low dislocation density and warpage. An MPS substrate has many tiny dot-shaped seed crystals periodically arranged on a substrate such as sapphire.

[0004] Patent Document 1 describes that the outer shape of the seed crystal in the MPS substrate in plan view is circular or hexagonal. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-151519 Summary of the Invention [Problem to be solved by the invention]

[0006] However, it was found that when a seed crystal having a circular or hexagonal shape in plan view is formed as in Patent Document 1, dislocations in the seed crystal propagate upward.

[0007] The present invention has been made in view of the above background, and aims to provide a method for manufacturing a Group III nitride semiconductor and a seed substrate that can suppress the upward propagation of dislocations in the seed crystal. [Means for solving the problem]

[0008] One aspect of the present invention is a crystal growth step of growing a Group III nitride semiconductor on a seed substrate by supplying a nitrogen-containing gas to a mixed melt obtained by mixing a Group III metal and a flux; the seed substrate includes a substrate and a plurality of seed crystals made of a Group III nitride semiconductor provided on the substrate; The seed crystal has a recess in the center thereof.

[0009] Another aspect of the present invention is A substrate; a plurality of seed crystals made of a Group III nitride semiconductor provided on the substrate, The seed crystal rests on a seed substrate having a central depression. [Effects of the Invention]

[0010] In the above embodiment, the seed crystal has a recess in the center. As a result, the initial nucleus does not fill the recess completely, resulting in a void. This void can suppress the upward propagation of dislocations in the seed crystal.

[0011] As described above, according to the above-described aspects, it is possible to provide a method for manufacturing a Group III nitride semiconductor and a seed substrate that can suppress upward propagation of dislocations in the seed crystal. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a cross-sectional view showing the configuration of a seed substrate in a first embodiment, the cross-sectional view being perpendicular to a main surface of the substrate. [Figure 2] FIG. 1 is a plan view showing the configuration of a seed substrate in a first embodiment. [Figure 3] FIG. 2 is a cross-sectional view showing the configuration of a seed crystal, the cross-sectional view being perpendicular to the main surface of the substrate. [Figure 4] FIG. 2 is a plan view showing the configuration of a seed crystal. [Figure 5]1 is a flowchart showing a manufacturing process of a Group III nitride semiconductor according to the first embodiment. [Figure 6] 2A to 2C are diagrams showing a manufacturing process of a Group III nitride semiconductor according to the first embodiment. [Figure 7] A diagram showing the FFC process. [Figure 8] SEM image of the seed substrate viewed from an angle. [Figure 9] Enlarged SEM image of the seed crystal. [Figure 10] SEM image showing the cross section of the seed crystal. [Figure 11] An oblique overhead SEM image of the initial nucleus. [Figure 12] Fluorescence microscope image of grown crystals. [Figure 13] 1A and 1B are diagrams showing the configuration of a seed crystal in a first modified example of the first embodiment, where (a) is a cross-sectional view perpendicular to the main surface of the substrate, and (b) is a plan view. [Figure 14] 10A and 10B are diagrams showing the configuration of a seed crystal in a second modified example of the first embodiment, where (a) is a cross-sectional view perpendicular to the main surface of the substrate, and (b) is a plan view. [Figure 15] 10A and 10B are diagrams showing the configuration of a seed crystal in a third modified example of the first embodiment, where (a) is a cross-sectional view perpendicular to the main surface of the substrate, and (b) is a plan view. [Figure 16] 10A and 10B are diagrams showing the configuration of a seed crystal in a fourth modified example of the first embodiment, where (a) is a cross-sectional view perpendicular to the main surface of the substrate, and (b) is a plan view. [Figure 17] 10A and 10B are diagrams showing the configuration of a seed crystal in a fifth modified example of the first embodiment, where (a) is a cross-sectional view perpendicular to the main surface of the substrate, and (b) is a plan view. [Figure 18] FIG. 2 is a cross-sectional view showing the configuration of a seed crystal, the cross-sectional view being perpendicular to the main surface of the substrate. [Figure 19] 10 is a flowchart showing a manufacturing process of a Group III nitride semiconductor according to a second embodiment. [Figure 20] FIG. 10 is a cross-sectional view perpendicular to the main surface of the substrate, showing the configuration of a seed crystal in the second embodiment. [Figure 21] FIG. 10 is a cross-sectional view perpendicular to the main surface of the substrate, showing the configuration of a seed crystal in the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] The method for producing a Group III nitride semiconductor includes a crystal growth step of growing a Group III nitride semiconductor on a seed substrate by supplying a nitrogen-containing gas to a mixed melt obtained by mixing a Group III metal and a flux, and the seed substrate includes a substrate and a plurality of seed crystals made of a Group III nitride semiconductor provided on the substrate, each seed crystal having a recess in its center.

[0014] In the method for manufacturing a Group III nitride semiconductor, the recess may have a depth that reaches the substrate.

[0015] In the method for manufacturing a Group III nitride semiconductor, the diameter of the recess may be set so that the seed crystal has no upper surface.

[0016] In the method for manufacturing a Group III nitride semiconductor, the recess may have an uneven side surface.

[0017] In the method for producing a Group III nitride semiconductor, the seed crystal may be formed by forming a mask having openings on the substrate and selectively growing the Group III nitride semiconductor through the openings.

[0018] In the method for producing a Group III nitride semiconductor, the recesses of the seed crystal have a depth that does not reach the substrate, and further, the method may include a melt-back step, prior to the crystal growth step, of introducing the seed substrate into the mixed melt in a state where the nitrogen supersaturation in the mixed melt is lower than the value at which crystal growth of the Group III nitride semiconductor occurs, thereby melting back the bottom surface of the recesses of the seed crystal.

[0019] In the method for producing a Group III nitride semiconductor, the melt-back step may be performed until the substrate is exposed in at least a partial region of the bottom surface of the recess of the seed crystal.

[0020] In the method for producing a Group III nitride semiconductor, the melt-back step may be performed until the substrate is exposed over the entire bottom surface of the recess in the seed crystal.

[0021] In the method for producing a Group III nitride semiconductor, in the melt-back step, a plurality of pits may be formed in the bottom surface of the recess of the seed crystal, and the substrate may be exposed at the bottom surface of the pits.

[0022] The seed substrate has a substrate and a plurality of seed crystals made of a group III nitride semiconductor provided on the substrate, and each seed crystal has a recess in its center.

[0023] In the seed substrate, the depth of the recess may be deep enough to reach the substrate.

[0024] In the seed substrate, the diameter of the recess may be set so that the seed crystal has a shape that does not have an upper surface.

[0025] In the seed substrate, the side surface of the recess may have an uneven surface.

[0026] (First embodiment) 1. Overview of the flux method The first embodiment is a method for producing a Group III nitride semiconductor by the flux method, which involves supplying and dissolving a nitrogen-containing gas into a mixed melt containing an alkali metal flux and a Group III metal raw material, and epitaxially growing a Group III nitride semiconductor in the liquid phase.

[0027] The Group III metal raw material is at least one of gallium (Ga), aluminum (Al), and indium (In), and the composition of the Group III nitride semiconductor to be grown can be controlled by adjusting the ratio thereof, allowing for the growth of GaN, AlN, InN, AlGaN, InGaN, AlGaInN, etc. The present invention is particularly suitable for growing GaN.

[0028] The alkali metal used as the flux is usually sodium (Na), but potassium (K) may also be used, or a mixture of Na and K. Furthermore, lithium (Li) or an alkaline earth metal may also be mixed.

[0029] Carbon (C) may be added to the mixed melt. The addition of C can increase the crystal growth rate. Dopants other than C may also be added to the mixed melt for the purposes of controlling the conductivity type, magnetism, and other physical properties of the group III nitride semiconductor to be grown, promoting crystal growth, suppressing miscellaneous crystals, and controlling the growth direction. For example, germanium (Ge) can be used as an n-type dopant, and magnesium (Mg), zinc (Zn), calcium (Ca), and the like can be used as p-type dopants.

[0030] The nitrogen-containing gas is a gas of nitrogen molecules or a compound such as ammonia that contains nitrogen as a constituent element, or may be a mixed gas thereof, or may be a gas in which the nitrogen-containing gas is mixed with an inert gas such as a rare gas.

[0031] 2. Seed Substrate Structure In the first embodiment, a seed substrate 9 is placed in the mixed melt, and a Group III nitride semiconductor is grown on the seed substrate 9. The seed substrate 9 may be placed in the mixed melt before heating and pressurizing, but it is preferable to place the seed substrate 9 in the mixed melt after heating and pressurizing to reach the growth temperature and growth pressure. This can prevent the seed crystal 2 of the seed substrate 9 from melting back.

[0032] An MPC (multi-point seed) substrate is used as the seed substrate 9. The MPC substrate is a substrate 1 on which a plurality of dot-shaped seed crystals 2 are periodically arranged. FIG. 1 is a cross-sectional view of the seed substrate 9, which is a cross-section perpendicular to the main surface of the substrate. FIG. 2 is a plan view of the seed substrate 9 as viewed from above.

[0033] Substrate 1 can be made of a group III nitride semiconductor, sapphire, aluminum oxynitride, SiC, Si, spinel, ZnO, gallium oxide, etc. In the case of a sapphire substrate, the main surface is, for example, the c-plane or the a-plane.

[0034] A plurality of seed crystals 2 are provided on the substrate 1 via a buffer layer (not shown). The seed crystals 2 are arranged in a regular triangular lattice pattern. The buffer layer and the seed crystals 2 are made of a group III nitride semiconductor of any composition, such as GaN, AlGaN, or AlN. An appropriate material for the buffer layer is selected depending on the material of the seed crystals 2. For example, if the seed crystals 2 are made of GaN, the buffer layer is preferably made of GaN. The material for the seed crystals is usually a group III nitride semiconductor of the same composition as the group III nitride semiconductor to be grown by the flux method. The seed crystals 2 may be grown by any method, such as MOCVD, HVPE, or MBE, but MOCVD or HVPE is preferred in terms of crystallinity, growth time, etc.

[0035] As shown in FIG. 2, the seed crystals 2 are arranged in a regular triangular lattice pattern. Any periodic arrangement is possible, not limited to a regular triangular lattice pattern, but highly symmetrical patterns such as a square lattice pattern or a regular triangular lattice pattern are preferred. This allows the Group III nitride semiconductors grown from the various crystals 2 to be uniformly combined, enabling the growth of a Group III nitride semiconductor with fewer dislocations and warpage. When a regular triangular lattice pattern is used, it is preferable that the arrangement direction coincide with the a-axis direction or m-axis direction of the seed crystals 2. Here, "match" does not mean perfect match; an angular deviation of about 10 degrees is acceptable as an error. An angular deviation of 1 degree or less is preferred.

[0036] The distance L1 between the centers of adjacent seed crystals 2 is preferably 100 to 2000 μm. Within this range, a Group III nitride semiconductor with fewer dislocations and warpage can be grown. It is more preferably 200 to 1500 μm, and even more preferably 300 to 1000 μm.

[0037] Next, the shape of the seed crystal 2 will be described in detail. Fig. 3 is a cross-sectional view showing the configuration of the seed crystal 2, which is a cross-sectional view perpendicular to the main surface of the substrate. Fig. 4 is a plan view showing the configuration of the seed crystal 2. As shown in Figs. 3 and 4, the seed crystal 2 has a disk portion having a disk shape and a regular hexagonal pyramid truncated portion having a regular hexagonal pyramid truncated shape located on and in contact with a cylindrical portion, with a recess 2d provided in the center of the regular hexagonal pyramid truncated portion.

[0038] As will be described later, the seed crystal 2 is formed by selective growth using a mask, and the crystal grows laterally from the opening in the mask. The opening pattern of the mask is circular. Therefore, after removing the mask, the mask opening portion remains in the shape of a disk. This remaining portion is the disk portion.

[0039] The shape of the disk portion is equal to the shape of the mask opening used for selectively growing the seed crystal 2. Therefore, the thickness of the disk portion is approximately equal to the thickness of the mask. The diameter of the disk portion is approximately equal to the diameter of the mask opening. Furthermore, the diameter D1 of the regular hexagonal pyramid truncated portion is larger than the diameter of the disk portion. Because the disk portion is circular in plan view, stress can be dispersed when the substrate 1 is separated after growing the Group III nitride semiconductor by the flux method, and the occurrence of cracks in the grown crystal can be suppressed.

[0040] Depending on the opening pattern of the mask, the disk portion may be replaced with a regular hexagonal plate or other shape, but a disk is preferred from the viewpoint of dispersing stress as described above.

[0041] The base of the frustum of the regular hexagonal pyramid of the seed crystal is a regular hexagon. In particular, a regular hexagon with each side aligned with the m-plane of the seed crystal 2 (each side aligned with the a-axis direction) is preferred. Because Group III nitride semiconductors are hexagonal crystals, a regular hexagonal shape allows the Group III nitride semiconductors grown from the frustum of the regular hexagonal pyramid of each type of crystal 2 to be uniformly combined. However, it is not necessary to completely align the base with the a-axis, and an angle deviation of about 10 degrees is permissible. An angle deviation of 1 degree or less is preferred.

[0042] The six side faces 2a of the hexagonal truncated pyramid portion of the seed crystal 2 are (10-11) planes of the Group III nitride semiconductor. The (10-11) plane is a stable plane in the mixed melt of the Na flux method. Therefore, the Group III nitride semiconductor grows from the side faces 2a of the hexagonal truncated pyramid portion of the seed crystal 2 while maintaining the (10-11) plane. As a result, the shape of each initial nucleus 3 can be made uniform. Note that the entire side faces 2a do not need to be (10-11) planes, but it is preferable that 95% or more of the entire side faces are (10-11) planes. In addition, the (10-11) plane referred to here includes planes that form angles of -5 to 5 degrees with respect to the (10-11) plane as an error.

[0043] The diameter D1 (diameter of the circumscribed circle in plan view) of the regular hexagonal pyramid portion of the seed crystal 2 is preferably 10 to 500 μm. Within this range, a Group III nitride semiconductor with fewer dislocations and warpage can be grown. Furthermore, the area of ​​the side surface 2a of the regular hexagonal pyramid portion of the seed crystal 2 can be increased, facilitating the growth of the initial nuclei 3 from the side surface 2a. A diameter of 50 to 300 μm is more preferred, and a diameter of 100 to 200 μm is even more preferred.

[0044] Furthermore, the height H1 of the seed crystal 2 is preferably 30 μm or more. Within this range, the area of ​​the side surface 2a can be made sufficiently large, allowing crystals to grow uniformly from each side surface 2a. As a result, the shapes of the initial nuclei 3 growing from the various crystals 2 can be made uniform. However, if H1 is too high, problems such as the long time required to form the seed crystal 2 can occur, so it is preferable to set it to 100 μm or less. It is more preferably 20 to 60 μm, and even more preferably 30 to 50 μm.

[0045] For the same reasons as above, the height H1 of the seed crystal 2 is preferably 0.01 to 0.6 times the diameter D1 of the seed crystal 2, more preferably 0.1 to 0.35 times, and even more preferably 0.15 to 0.3 times.

[0046] A recess 2d is provided in the center of the seed crystal 2. Providing the recess 2d prevents the initial nuclei 3 grown from the seed crystal 2 from filling the recess 2d, forming a void 7. The formation of the void 7 prevents dislocations in the seed crystal 2 from propagating upward, enabling the growth of a high-quality Group III nitride semiconductor.

[0047] The bottom surface 2b of the recess 2d is flat and is the (0001) plane (c-plane) of the group III nitride semiconductor. The bottom surface 2b is approximately circular in plan view. The bottom surface 2b does not need to be flat and may have irregularities. The shape of the bottom surface 2b in plan view does not need to be circular.

[0048] The side surface 2c of the recess 2d has many irregularities formed thereon, and has an overall inclination similar to that of the (10-11) plane. By forming the side surface 2c in such an irregular shape, the side surface 2c becomes a starting point for crystal growth of the Group III nitride semiconductor, making it easier to fill the upper part of the seed crystal 2 with the Group III nitride semiconductor. Note that the side surface 2c may also be a flat surface.

[0049] The depth H2 of the recesses 2d is preferably 10 to 100 μm. By setting the depth H2 in this range, voids 7 are more easily formed, and a higher quality Group III nitride semiconductor can be grown. The depth H2 is more preferably 20 to 60 μm, and even more preferably 30 to 50 μm. For the same reason, the depth H2 of the recesses 2d is preferably 0.3 to 1.0 times the height H1 of the seed crystal 2, and more preferably 0.6 to 0.8 times.

[0050] The diameter of the top surface of the recess 2d is within a range such that the top surface does not exist on the seed crystal 2, and the side surface 2c of the recess 2d and the side surface 2a of the seed crystal 2 are connected at an angle. Therefore, the c-plane does not exist in the upper part of the seed crystal 2. The c-plane may be etched in the mixed melt of the Na flux method, which may cause variations in the shape of each initial nucleus 3. Furthermore, crystal growth from the c-plane may cause dislocations in the seed crystal 2 to propagate upward. Therefore, if the shape does not have a c-plane in the upper part, variations in the shape of each initial nucleus 3 can be suppressed, and the upward propagation of dislocations in the seed crystal 2 can be suppressed.

[0051] 3. Method for manufacturing seed substrate The seed substrate 9 can be fabricated, for example, as follows. First, a mask having a plurality of openings is formed on the substrate 1. The plurality of openings are arranged in a pattern of a regular triangular lattice. The openings are circular. Although shapes other than circular, such as regular hexagons, are also acceptable, circular openings are preferred as in the embodiment in order to form disk portions and suppress cracks when the substrate is peeled off. The mask may be made of any material that can suppress the growth of a Group III nitride semiconductor on the mask, such as SiO2.

[0052] Next, a buffer layer (not shown) and a seed crystal 2 are selectively grown in this order on the substrate exposed in the opening by a method such as MOCVD or HVPE. Next, the mask is removed by wet etching using hydrofluoric acid or the like. In this way, a seed substrate 9 can be produced.

[0053] Here, when the seed crystals 2 are selectively grown through the openings in the mask, facet growth of the Group III nitride semiconductor can be achieved by appropriately controlling the growth conditions, and the shape of the seed crystals 2 can be made to have the shapes shown in Figures 3 and 4. For example, the growth temperature can be set to 1120 to 1145°C and the V / III ratio to 970 to 1020. Furthermore, because the shape is determined by selective growth, the shapes of various crystals 2 can be made uniform.

[0054] 4. Method for manufacturing Group III nitride semiconductors Next, a method for manufacturing a Group III nitride semiconductor according to the first embodiment will be described with reference to Figures 5 to 7. Figure 5 is a flowchart showing the steps for manufacturing a Group III nitride semiconductor according to the first embodiment. As shown in Figure 5, the method for manufacturing a Group III nitride semiconductor according to the first embodiment includes a preparation step S1, a nucleation step S2, a planarization step S3, and a film thickening step S4.

[0055] 4-1. Preparation process First, a preparation step S1 is performed. The preparation step S1 is as follows.

[0056] First, the atmosphere inside the furnace is replaced with an inert gas, the inside of the furnace is heated, and then the furnace is evacuated to a vacuum, thereby sufficiently reducing outgas components such as oxygen inside the furnace.

[0057] Next, predetermined amounts of alkali metal and Group III metal are weighed in a glove box where the atmosphere, including oxygen and dew point, is controlled. Then, the weighed predetermined amounts of alkali metal and Group III metal are charged into the crucible 100. If necessary, an additive element such as carbon may be charged.

[0058] Next, the crucible 100 containing the raw materials and the seed substrate 9 are placed in a reaction vessel, which is then evacuated, and a gas containing nitrogen is then supplied into the reaction vessel.

[0059] When the pressure inside the reaction vessel reaches the crystal growth pressure, the temperature inside the furnace is raised to the crystal growth temperature. The crystal growth temperature is, for example, 700°C or higher and 1000°C or lower, and the crystal growth pressure is, for example, 2 MPa or higher and 10 MPa or lower. During the temperature increase process, the solid alkali metal and solid Group III metal in the crucible 100 melt and become liquid, forming a mixed melt 101. At this stage, the seed substrate 9 is not yet introduced into the mixed melt 101.

[0060] 4-2.Nucleation process When the temperature and pressure inside the reaction vessel reach the crystal growth temperature and crystal growth pressure, and the degree of supersaturation of nitrogen dissolved in the mixed melt 101 reaches or exceeds a predetermined value, the nucleation step S2 is performed. In the nucleation step S2, initial nuclei 3 are formed in the seed crystal 2. In the nucleation step S2, first, the seed substrate 9 is placed into the mixed melt 101 in the crucible 100. Because the temperature and pressure inside the reaction vessel are at the crystal growth temperature and crystal growth pressure, and the degree of supersaturation of nitrogen dissolved in the mixed melt 101 reaches or exceeds a predetermined value, crystals (initial nuclei 3) of a Group III nitride semiconductor grow from the various crystals 2 on the seed substrate 9. The growth of the initial nuclei 3 continues until adjacent initial nuclei 3 begin to coalesce (see FIG. 6(a)). Note that gaps remain between the initial nuclei 3 and the substrate 1.

[0061] Here, the (10-11) plane, which is the side surface 2a of the regular hexagonal pyramid truncated portion of the seed crystal 2, exists stably in the mixed melt 101 without being etched. In addition, the height H1 of the seed crystal 2 is 30 μm or more, and the side surface 2a has a sufficiently large area. Therefore, the initial nuclei 3 grow from the side surface 2a while maintaining the (10-11) plane. Since the shapes of the various crystals 2 are uniform and grow uniformly from the seed crystal 2 while maintaining the (10-11) plane, variation in the shape of each initial nucleus 3 can be suppressed, and the shape of each initial nucleus 3 can be made uniform.

[0062] Furthermore, since a recess 2d is formed in the center of the seed crystal 2, the initial nucleus 3 does not completely fill the recess 2d, and a void 7 is formed. The mixed melt 101 is confined within the void 7. Since the void 7 is formed in the upper part of the seed crystal 2, it is possible to prevent dislocations in the seed crystal 2 from being carried over to the upper part.

[0063] Furthermore, by making the diameter of the recess 2d large, the seed crystal 2 is shaped so that it does not have an upper surface (c-plane). The c-plane is an unstable surface that may be etched in the mixed melt 101. Because there is no crystal growth from such an unstable surface, variation in the shape of each initial nucleus 3 can be further suppressed. Furthermore, because there is no crystal growth from the c-plane, it is possible to further suppress the transfer of dislocations in the seed crystal 2 to the upper part.

[0064] 4-3. Flattening process When adjacent initial nuclei 3 begin to coalesce, a planarization step S3 is performed. In the planarization step S3, the spaces between the various crystals 2 are filled to grow flat crystals. In the planarization step S3, the crystals are grown using the FFC (flux film coat) method.

[0065] The FFC method is a method in which a seed substrate 9 is repeatedly taken out of a mixed melt 101 and put back into the mixed melt 101 at a predetermined cycle (see FIG. 7). When adjacent initial nuclei 3 begin to coalesce, depressions 4 are formed on the coalesced surfaces. When the seed substrate 9 is taken out of the mixed melt 101, the mixed melt 101 is accumulated in the depressions 4 between the adjacent initial nuclei 3. This allows a crystal 5 to grow along the depressions 4 (see FIG. 6(b)).

[0066] Here, the mixed melt 101 accumulated in the recess 4 is thin, so it is prone to nitrogen supersaturation. This can accelerate the crystal growth rate. On the other hand, because the amount of accumulated mixed melt 101 is small, the amount of Group III metal is also small, and crystal growth stops after a while. Therefore, the seed substrate 9 is again placed in the mixed melt 101 and the substrate is removed from the mixed melt 101, so that the mixed melt 101 containing the Group III metal is intermittently supplied to the recess 4. The FFC method is performed until the growth of the crystal 5 fills the recess 4. This allows the growth of a crystal with a flat c-plane.

[0067] Although it is not always necessary to perform the FFC growth step, it is preferable to perform the FFC growth step in order to further improve the flatness of the crystal and further reduce warpage.

[0068] 4-3.Thickening process Once the depressions 4 are filled and a flat crystal surface is formed, the film thickening step S4 is performed. In the film thickening step S4, the flattened crystal is grown thick. First, in the film thickening step S4, the seed substrate 9 is again placed in the mixed melt 101. Then, the Group III nitride semiconductor crystal 6 is grown and thickened (see FIG. 6(c)). Because the shape of each initial nucleus 3 is uniform, the crystal 6 can also be formed uniformly within the plane. Furthermore, because the inheritance of dislocations in the seed crystal 2 to the upper part is suppressed, the crystal 6 can be formed with high quality.

[0069] Once the crystal 6 has grown to the desired thickness, the temperature is lowered to room temperature, and the pressure is also lowered to atmospheric pressure, completing the growth of the Group III nitride semiconductor. At this point, the gap between the initial nuclei 3 and the substrate 1 remains unfilled. Therefore, the substrate 1 can naturally peel off when the temperature is lowered due to the difference in thermal expansion coefficients.

[0070] As described above, according to the method for manufacturing a Group III nitride semiconductor in the first embodiment, the side surface of the seed crystal 2 is configured as the (10-11) plane, which makes it possible to suppress variations in the shape of each initial nucleus 3, and to grow a uniform, high-quality crystal 6.

[0071] In addition, a recess 2d is provided in the center of the seed crystal 2, resulting in a shape without an upper surface. Therefore, when the initial nucleus 3 grows, the upper part of the seed crystal 2 is not filled, and a void 7 is formed. As a result, it is possible to prevent dislocations in the seed crystal 2 from propagating upward, and a high-quality crystal 6 can be grown.

[0072] Next, experimental results regarding the first embodiment will be described.

[0073] Experiment 1 A mask made of SiO2 was formed on a substrate 1 made of c-plane sapphire by CVD. The mask had a pattern of circular openings arranged in a regular triangular lattice. The center-to-center distance between adjacent openings was 550 μm, and the diameter of each opening was 175 μm. Next, a buffer layer was formed on the bottom of the openings by MOCVD, and then a seed crystal 2 made of GaN was formed on the buffer layer. The seed crystal 2 was grown at a temperature of 1140°C and a V / III ratio of 720.

[0074] Figure 8 is an SEM image of the seed crystal 2 on the substrate 1, and Figure 9 is an enlarged SEM image of the seed crystal 2. Figure 10 is a cross-sectional SEM image of the seed crystal 2. As shown in Figures 8 to 10, the seed crystal 2 has a disk portion located on the substrate 1 and a regular hexagonal pyramid portion located on the disk portion and having a recess 2d in the center, with six side surfaces 2a of the regular hexagonal pyramid portion exposed. The angle of the side surface 2a indicates that it is a (10-11) plane. Furthermore, the diameter of the recess 2d is wide, and the side surface 2c of the recess 2d and the side surface 2a of the seed crystal 2 form an apex angle. Therefore, it can be seen that the shape does not have a top surface. It can also be seen that the side surface 2c of the recess 2d has many irregularities. Furthermore, Figure 7 indicates that the shapes of the various crystals 2 are uniform and consistent.

[0075] Experiment 2 GaN crystals were grown by the Na flux method using the seed substrate 9 prepared as in Experiment 1. The growth was carried out by growing initial nuclei 3 from the seed crystal 2 until the initial nuclei 3 from adjacent seed crystals 2 coalesced.

[0076] Figure 11(a) is an SEM image of the grown initial nuclei 3, and (b) is a further enlarged SEM image. As shown in Figure 11, the initial nuclei 3 are in the shape of a regular hexagonal truncated pyramid, with the side faces being the (10-11) plane and the top face being the (0001) plane (c-plane). Also, as shown in Figure 11, it can be seen that the initial nuclei 3 grown from the various crystals 2 are uniform in shape. Therefore, it can be seen that the initial nuclei 3 can be uniformly coalesced, and flat, uniform crystals 6 can be grown on the initial nuclei 3.

[0077] Experiment 3 GaN crystals were grown by the Na flux method using seed substrates 9 prepared as in Experiment 1. Growth was continued until the initial nuclei 3 from various crystals 2 coalesced, filling the depressions 4 between the initial nuclei 3 using the FFC method, and then growing crystals 6 on the coalesced initial nuclei 3.

[0078] FIG. 12 is a fluorescent X-ray image of a cross section of the seed substrate 9 after GaN crystal growth, showing the location of oxygen. As shown in FIG. 12, it can be seen that the recesses 2d of the seed crystal 2 are not filled with the initial nuclei 3, and voids 7 are formed. The mixed molten liquid (mainly containing sodium and gallium) used in the Na flux method is confined in the voids 7. As described above, it can be seen that the use of the seed substrate 9 of the first embodiment allows the formation of voids 7, thereby preventing the propagation of dislocations toward the upper part of the seed crystal 2.

[0079] (First modified embodiment of the first embodiment) In the first embodiment, the depth of the recess 2d of the seed crystal 2 was set to a depth that did not expose the substrate 1. However, as shown in FIG. 13, the depth of the recess 2d may be set to a depth that exposes the substrate 1 at the bottom. FIG. 13 shows the shape of the seed crystal 2 in a first modified example of the first embodiment, with FIG. 13(a) being a cross-sectional view perpendicular to the substrate main surface and FIG. 13(b) being a plan view. By making the recess 2d deep in this manner, there is no region in the seed crystal 2 where the c-plane is exposed. This prevents the c-plane growth of a crystal from the seed crystal 2, and further suppresses the propagation of dislocations from the seed crystal 2 to the crystal above. Furthermore, the deeper recess 2d makes it easier to form voids 7.

[0080] In addition, in order to form the seed crystal 2 shown in Figure 13, a mask having a ring-shaped (e.g., annular) opening can be used to selectively grow the seed crystal 2 in a ring shape, thereby forming the seed crystal 2 as shown in Figure 13.

[0081] (Second Modification of the First Embodiment) In the first embodiment, a recess 2d is provided in the center of the seed crystal 2, but as shown in Fig. 14, a regular hexagonal pyramidal portion without a recess 2d may also be used. Fig. 14 shows the shape of the seed crystal 2 in a second modified embodiment of the first embodiment, with Fig. 14(a) being a cross-sectional view perpendicular to the substrate main surface and Fig. 14(b) being a plan view. Because the side surface of the regular hexagonal pyramidal portion of the seed crystal 2 is the (10-11) plane, the shape of each initial nucleus 3 can be made uniform.

[0082] (Third Modification of the First Embodiment) In the first embodiment, the seed crystal may have any shape with its side surface in the (10-11) plane. For example, as shown in FIG. 15, instead of the truncated hexagonal pyramid, a regular hexagonal pyramid with its side surface 12a in the (10-11) plane may be used. FIG. 15 shows the shape of the seed crystal 12 in a third modified embodiment of the first embodiment, with FIG. 15(a) being a cross-sectional view perpendicular to the substrate main surface and FIG. 15(b) being a plan view. Because the side surface 12a is the (10-11) plane, the shape of the initial nuclei 3 can be made uniform. Furthermore, because it is a pyramid, there is no top surface. Therefore, dislocations in the seed crystal 2 can be prevented from continuing to the upper part of the seed crystal 2.

[0083] (Fourth Modification of the First Embodiment) In the first embodiment, the seed crystal 2 may have any shape having a recess in the center. An example is shown in FIG. 16 . FIG. 16 shows the shape of a seed crystal 22 in a fourth modified embodiment of the first embodiment, where FIG. 16( a) is a cross-sectional view perpendicular to the substrate main surface, and FIG. 16( b) is a plan view. As shown in FIG. 16 , the seed crystal 22 in the fourth modified embodiment of the first embodiment has a truncated cone shape instead of the regular hexagonal pyramid shape in the first embodiment, and has a recess 22 d in the center. The bottom surface 22 b of the recess 22 d is flat. Furthermore, the side surface 22 c of the recess 22 d is uneven. Because of the recess 22 d, voids can be formed in the initial nucleus 3, as in the first embodiment. Furthermore, the recess prevents the c-plane from existing. Therefore, dislocations in the seed crystal 2 can be prevented from continuing to the upper part of the seed crystal 2.

[0084] (Fifth Modification of the First Embodiment) In the first embodiment, the seed crystal 2 has a shape in which there is no upper surface, but it may have a shape in which there is an upper surface. Fig. 17 shows the shape of the seed crystal 32 in a fifth modified embodiment of the first embodiment, Fig. 17(a) is a cross-sectional view perpendicular to the main surface of the substrate, and Fig. 17(b) is a plan view.

[0085] 17, in the seed crystal 32 in the fifth modified example of the first embodiment, the diameter of the recess 32d is small. In plan view, the outer periphery of the recess 32d is located inside the outer periphery of the upper end of the seed crystal 1. Therefore, a flat upper surface 32e is formed in the region from the outside of the outer periphery of the recess 32d to the inside of the outer periphery of the upper end of the seed crystal 1. The side surface 32a of the regular hexagonal pyramid truncated portion of the seed crystal 32 is a (10-11) plane. The bottom surface 2b of the recess 2d is flat, and the side surface 2c is uneven.

[0086] The fifth modified embodiment of the first embodiment differs from the first embodiment in that an upper surface 32 e is formed on the seed crystal 32. Because the seed crystal 32 has the upper surface 32 e, the effect of suppressing dislocation propagation toward the upper part of the seed crystal 32 is lower than in the first embodiment, but other than that, the same effects as those of the seed crystal 2 of the first embodiment can be obtained.

[0087] (Other variations of the first embodiment) Although the side surface of the seed crystal 2 may have a plane other than the (10-11) plane, it is preferable that the side surface is formed only of the (10-11) plane. Also, it is preferable that the side surface has a shape having a ridge line formed by the (10-11) planes.

[0088] In the first embodiment, the seed crystal has a disk portion located on and in contact with the substrate 1, and a regular hexagonal pyramid portion on the disk portion, but as shown in Fig. 18, the regular hexagonal pyramid portion may be in direct contact with the substrate 1 without the disk portion. The same applies to the first modified embodiment to the fifth embodiment of the first embodiment.

[0089] (Second embodiment) 19 is a flowchart showing the manufacturing process of a Group III nitride semiconductor according to the second embodiment. In the manufacturing method of a Group III nitride semiconductor according to the second embodiment, a melt-back step S20 is further added between the preparation step S1 and the nucleus formation step S2 in the first embodiment. The rest of the process is the same as in the first embodiment.

[0090] In the melt-back step S20, before the initial nuclei 3 are formed on the seed crystal 1, the seed substrate 9 is introduced into the mixed melt 101 to melt-back the seed crystal 2. The melt-back of the Group III nitride semiconductor occurs when the nitrogen supersaturation in the mixed melt 101 is lower than the value at which crystal growth of the Group III nitride semiconductor occurs. This state also includes a state in which the nitrogen in the mixed melt 101 is undersaturated.

[0091] The method for making the nitrogen supersaturation of the mixed melt 101 lower than the value at which the group III nitride semiconductor crystals grow is, for example, as follows.

[0092] First, the temperature inside the reaction vessel is increased. At a high temperature, nitrogen dissolves more easily in the mixed melt 101, but the amount of Group III nitride semiconductor dissolved also increases, making it difficult for the Group III nitride semiconductor to grow. In other words, the degree of nitrogen supersaturation decreases. For example, the temperature inside the reaction vessel is set to be 10 to 100°C higher than the growth temperature in the next nucleation step S2. Alternatively, the temperature inside the reaction vessel is set to be 800 to 950°C higher than the growth temperature in the next nucleation step S2.

[0093] Second, the pressure inside the reaction vessel is lowered. If the pressure is high, nitrogen is less likely to dissolve in the mixed melt 101, and the degree of nitrogen supersaturation decreases. For example, the pressure inside the reaction vessel is set to be 0.1 to 1.5 MPa lower than the growth temperature of the next nucleation step S2. Alternatively, the pressure inside the reaction vessel is set to be 1.5 to 3 MPa lower than the growth pressure of the next nucleation step S2.

[0094] Third, the oxygen concentration of the mixed melt 101 is increased. When the oxygen concentration of the mixed melt 101 is increased, nitrogen becomes less likely to dissolve in the mixed melt 101, and the degree of nitrogen supersaturation decreases. For example, the oxygen concentration of the mixed melt 101 is set to be 0.01 to 0.1 mol % higher than the oxygen concentration of the mixed melt 101 in the next nucleation step S2. Alternatively, the oxygen concentration of the mixed melt 101 is set to be higher than the oxygen concentration of the mixed melt 101 in the next nucleation step S2 and to be 0.01 to 0.1 mol %.

[0095] Fourth, the time required for dissolving nitrogen into the mixed melt 101 after the temperature and pressure inside the reaction vessel reach the crystal growth temperature and crystal growth pressure is shortened. If this time is shortened, the amount of nitrogen dissolved in the mixed melt 101 also decreases, and the degree of nitrogen supersaturation decreases.

[0096] Fifth, the amount of nitrogen supplied to the reaction vessel is reduced. If the amount of nitrogen supplied is reduced, the amount of nitrogen dissolved in the mixed melt 101 also decreases, and the degree of nitrogen supersaturation decreases.

[0097] Sixth, the seed substrate 9 is placed at a deep position below the liquid surface in the mixed melt 101. The nitrogen concentration in the mixed melt 101 increases as it approaches the liquid surface and decreases as it moves away from the liquid surface. Therefore, by placing the seed substrate 9 at a deep position below the liquid surface, the mixed melt 101 with a low degree of nitrogen supersaturation can be brought into contact with the seed crystal 2.

[0098] Next, the change in shape of the seed crystal 2 due to melt-back will be described with reference to FIGS.

[0099] Before the seed crystal 2 is melted back, as shown in FIG. 3, it has the same shape as the seed crystal 2 in the first embodiment. The meltback of a Group III nitride semiconductor progresses at different rates depending on the plane orientation, with the meltback progressing easily in the c-plane and progressing less in the (10-11) plane. Therefore, the bottom surface 2b of the recess 2d of the seed crystal 2 melts back preferentially, and the side surface 2a of the seed crystal 2 hardly melts back. In particular, meltback progresses quickly at positions on the bottom surface 2b where threading dislocations are present. Therefore, as shown in FIG. 20, pits 20 are generated at positions on the bottom surface 2b where threading dislocations are present. The pits 20 are recesses that have a V-shape in a cross section perpendicular to the main surface of the substrate 1. In other words, the side surfaces of the pits 20 are inclined with respect to the main surface of the substrate 1.

[0100] As the meltback progresses further, the height from the surface of the substrate 1 to the bottom surface 2b decreases. In addition, the sides of the pit 20 melt back while maintaining their inclination, and the diameter of the pit 20 increases. As the meltback of the sides of the pit 20 progresses further, the pit 20 takes on a trapezoidal shape in a cross section perpendicular to the main surface of the substrate 1, as shown in FIG. 21, and the surface of the substrate 1 is exposed at the bottom of the pit 20.

[0101] As the melt-back progresses further, the diameter of the pits 20 expands and adjacent pits 20 merge with each other. Finally, all of the Group III nitride semiconductor that existed between the surface of the substrate 1 and the bottom surface 2b of the recess 2d disappears due to the melt-back. As a result, as shown in FIG. 13, the entire surface of the substrate 1 is exposed at the bottom surface 2b of the recess 2d. The seed crystal 2 is left in a state where the c-plane is not present. In this way, by melting back the seed crystal 2 in which the surface of the substrate 1 is not exposed at the bottom surface 2b of the recess 2d, the surface of the substrate 1 can be easily exposed at the bottom surface 2b of the recess 2d.

[0102] Note that the side surface 2c of the recess 2d may melt back if a sufficiently long time has passed. The meltback of the side surface 2c of the recess 2d reduces the irregularities of the side surface 2c, making it closer to a smooth surface.

[0103] When the surface of the substrate 1 is exposed at the bottom surface 2b of the recess 2d as shown in Fig. 13, the nitrogen supersaturation of the mixed melt 101 is increased to a value at which the group III nitride semiconductor crystals grow or more. This completes the nucleation step S2. The subsequent steps are the same as those in the first embodiment.

[0104] If the seed crystal 2 is not melted back, the c-plane of the Group III nitride semiconductor is exposed at the bottom surface 2b of the recess 2d, as shown in Fig. 3. If the c-plane is present in the seed crystal 2 in this way, dislocations in the seed crystal 2 may propagate to the Group III nitride semiconductor crystal on the c-plane. In contrast, in the second embodiment, the substrate 1 is exposed at the bottom surface 2b of the recess 2d of the seed crystal 2 by melting back, so that the c-plane is not present in the seed crystal 2. Therefore, it is possible to suppress propagation of dislocations to the upper part of the seed crystal 2.

[0105] Furthermore, the substrate 1 is exposed at the bottom surface 2b of the recess 2d of the seed crystal 2, thereby reducing the contact area between the seed crystal 2 and the substrate 1. This allows the substrate 1 to be easily peeled off after the growth of the Group III nitride semiconductor crystal is completed.

[0106] (First modified example of the second embodiment) In the second embodiment, the substrate 1 is melted back until the entire bottom surface 2b of the recess 2d is exposed, but the process may proceed to the nucleation step S2 when the substrate 1 is melted back to the extent that the substrate 1 is not exposed. In this case, it is preferable to make the thickness from the surface of the substrate 1 to the bottom surface 2b as thin as possible. Since voids are likely to be formed above the bottom surface 2b, the propagation of dislocations to the upper part of the seed crystal 2 can be further suppressed.

[0107] (Second Modification of the Second Embodiment) 21 , the process may proceed to the nucleation step S2 at a stage when the substrate 1 is exposed on a part of the bottom surface 2b by the pits 20. This reduces the area of ​​the c-plane of the seed crystal 2, which further suppresses the propagation of dislocations to the upper part of the seed crystal 2. However, in order to further suppress the propagation of dislocations to the upper part of the seed crystal 2, it is preferable to proceed to the nucleation step S2 after the substrate 1 is exposed on the entire bottom surface 2b as in the second embodiment.

[0108] (Third Modification of the Second Embodiment) The shape of the seed crystal 2 before the melt-back step S20 is not limited to the shape shown in Fig. 3. Any shape may be used as long as the shape has a recess in the center and the recess is deep enough not to reach the substrate 1. For example, the second embodiment can be applied to seed crystals 2 having shapes such as those shown in Figs. 16 to 18. Preferably, the shape does not have an upper surface, as shown in Figs. 3, 16, and 18. [Explanation of symbols]

[0109] 1: Circuit board 2: Seed crystal 2a: Side 2b: Bottom 2c: Side 2d: Recess 3: Initial nucleus 4: Depression 5, 6: Crystal 9: Seed substrate

Claims

1. a crystal growth step of growing a Group III nitride semiconductor on a seed substrate by supplying a nitrogen-containing gas to a mixed melt obtained by mixing a Group III metal and a flux; the seed substrate includes a substrate and a plurality of seed crystals made of a Group III nitride semiconductor provided on the substrate; The method for producing a Group III nitride semiconductor, wherein the seed crystal has a recess in the center.

2. The method for producing a Group III nitride semiconductor according to claim 1 , wherein the recess has a depth that reaches the substrate.

3. The method for producing a Group III nitride semiconductor according to claim 1 , wherein the diameter of said recess is set so that said seed crystal has a shape that does not have an upper surface.

4. The method for producing a Group III nitride semiconductor according to claim 1 , wherein the recess has an uneven side surface.

5. 2. The method for producing a Group III nitride semiconductor according to claim 1, wherein the seed crystal is formed by forming a mask having an opening on the substrate and selectively growing the Group III nitride semiconductor through the opening.

6. the recess of the seed crystal has a depth that does not reach the substrate, 2. The method for producing a Group III nitride semiconductor according to claim 1, further comprising, before the crystal growth step, a melt-back step of setting the mixed melt in a state where a degree of nitrogen supersaturation in the mixed melt is lower than a value at which crystal growth of a Group III nitride semiconductor occurs, and then immersing the seed substrate in the mixed melt to melt back a bottom surface of the recess in the seed crystal.

7. The method for producing a Group III nitride semiconductor according to claim 6 , wherein in the melt-back step, the seed crystal is melted back until the substrate is exposed in at least a partial region of the bottom surface of the recess of the seed crystal.

8. The method for producing a Group III nitride semiconductor according to claim 7 , wherein in the melt-back step, the melt-back is performed until the substrate is exposed over the entire bottom surface of the recess of the seed crystal.

9. 7. The method for producing a Group III nitride semiconductor according to claim 6, wherein in the melt-back step, a plurality of pits are formed in the bottom surface of the recess of the seed crystal, and the substrate is exposed at the bottom surface of each pit.

10. A substrate; a plurality of seed crystals made of a Group III nitride semiconductor provided on the substrate, The seed crystal has a recess in the center.

11. The seed substrate according to claim 10 , wherein the recess has a depth that reaches the substrate.

12. The seed substrate according to claim 10 , wherein the diameter of the recess is set so that the seed crystal has no top surface.

13. The seed substrate according to claim 10 , wherein the recess has an uneven side surface.

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