Semiconductor device

The semiconductor device with a light-transmitting capacitor addresses the challenge of maintaining high aperture ratio and charge capacity in liquid crystal displays, enhancing display quality and reducing power consumption through optimized electrode and dielectric film structures.

JP2025186356APending Publication Date: 2025-12-23SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025151335
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2013-03-15
Filing Date
2025-09-11
Publication Date
2025-12-23

AI Technical Summary

Technical Problem

Existing liquid crystal displays face challenges in maintaining a high aperture ratio while increasing the charge capacity of capacitance elements, leading to reduced display quality and increased power consumption due to the use of light-shielding conductive films that overlap electrodes, which limits the area available for light transmission.

Method used

A semiconductor device is designed with a light-transmitting capacitor that utilizes a light-transmitting semiconductor film as one electrode, a light-transmitting conductive film as the other electrode, and a light-transmitting dielectric film, formed by laminating insulating oxide and nitride films, to enhance charge capacity and aperture ratio.

Benefits of technology

The solution allows for a semiconductor device with increased charge capacity and aperture ratio, improving display quality and reducing power consumption by efficiently utilizing light transmission, suitable for high-resolution displays.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a semiconductor device having a capacitative element which has an increased charge capacity without reducing an opening ratio.SOLUTION: A semiconductor device comprises: a transistor including a translucent semiconductor film; a capacitative element where a dielectric film is provided between a pair of electrodes; and a pixel electrode electrically connected with the transistor. In the capacitative element, a conductive film formed on the same surface with the translucent semiconductor film of the transistor functions as one electrode and the pixel electrode functions as the other electrode; and a nitride insulation film and a second oxide insulation film which are provided between the translucent semiconductor film and the pixel electrode function as dielectric substances.SELECTED DRAWING: Figure 3
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Description

[Technical Field]

[0001] The invention disclosed in this specification and elsewhere relates to a semiconductor device. [Background technology]

[0002] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely used. In a display device such as a flat panel display, the pixels are arranged in the row and column directions. In the pixel, a transistor which is a switching element and an electric a liquid crystal element connected in series to the liquid crystal element, and a capacitance element connected in parallel to the liquid crystal element. do.

[0003] The semiconductor material constituting the semiconductor film of the transistor is amorphous (non-crystalline) Silicon semiconductors such as silicon or polysilicon (polycrystalline) are widely used.

[0004] Metal oxides that exhibit semiconductor properties (hereinafter referred to as oxide semiconductors) are used in transistors. For example, zinc oxide or In-Ga-Zn-based oxide Techniques for fabricating transistors using nitride semiconductors have been disclosed (Patent Document 1 and Patent Document 2). See reference 2.) [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0006] The capacitance element has a pair of electrodes and a dielectric film between them. The other electrode is a gate electrode, a source electrode, a drain electrode, or the like that constitutes a transistor. In many cases, the light-shielding conductive film is used.

[0007] In addition, the larger the capacitance value of the capacitance element, the more the liquid crystal element will be deformed when an electric field is applied. The period during which the orientation of the crystal molecules can be kept constant can be extended. In a display device, the ability to extend this period reduces the number of times image data is rewritten. This allows for a reduction in power consumption.

[0008] In order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element must be increased. However, there is a way to increase the area where the pair of electrodes overlap. In a display device, a light-shielding conductive film is used to increase the area where a pair of electrodes overlap. If the area of ​​the conductive film is increased, the aperture ratio of the pixel decreases, and the display quality of the image deteriorates.

[0009] In view of the above, one aspect of the present invention is to provide a liquid crystal display device having a high aperture ratio and an increased charge capacity. An object of the present invention is to provide a semiconductor device including a capacitor that can be easily cooled. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor device including a transistor and a light-transmitting capacitor. Specifically, in the capacitor, a light-transmitting semiconductor film serves as one electrode and A light-transmitting conductive film such as a pixel electrode functions as the other electrode of the capacitor element. The insulating film having light-transmitting properties functions as a dielectric film, and the insulating film having light-transmitting properties functions as a first a semiconductor device which is an insulating film in which an insulating oxide film, an insulating nitride film, and a second insulating oxide film are laminated in this order; It is a device.

[0011] Another embodiment of the present invention is a transistor including a light-transmitting semiconductor film and a pair of electrodes. a capacitance element having a dielectric film provided therebetween, and a pixel electrode electrically connected to the transistor; In the capacitor element, a light-transmitting semiconductor film of the transistor is formed on the same surface. The light-transmitting semiconductor film functions as one electrode, and the pixel electrode functions as the other electrode. The insulating film having a light-transmitting property provided on the semiconductor film having a light-transmitting property functions as a dielectric film. The insulating film having a light-transmitting property is a first oxide insulating film, a nitride insulating film, and a second oxide insulating film. The semiconductor device is characterized in that the insulating film is an insulating film laminated in order.

[0012] The first oxide insulating film is formed by chemical vapor deposition using a deposition gas containing silicon and an oxidizing gas. The nitride insulating film is formed by chemical vapor deposition or physical vapor deposition. The second oxide insulating film is formed by the nitride insulating film deposition method using organic silane gas. This is an oxide insulating film formed by chemical vapor deposition.

[0013] An oxide insulating film is formed on the nitride insulating film by chemical vapor deposition using organosilane gas. This makes it possible to improve the flatness of the surface of the element portion where the transistor and the capacitor are provided. In addition, transistors and semiconductor devices formed by chemical vapor deposition using organosilane gas can be used. By providing a nitride insulating film between oxide insulating films, impurities such as carbon contained in the oxide insulating film can be reduced. It is possible to prevent migration of the charge to the transistor, reducing transistor variations. It is possible.

[0014] The light-transmitting semiconductor film can be formed using an oxide semiconductor. Semiconductors have a large energy gap of 3.0 eV or more, and have high transmittance to visible light. This is because it is loud.

[0015] A light-transmitting capacitor element can be manufactured by utilizing the manufacturing process of a transistor. One electrode of the quantum element can be formed by using a process for forming a light-transmitting semiconductor film of a transistor. The dielectric film of the capacitor is an insulating film provided on a light-transmitting semiconductor film of the transistor. The other electrode of the capacitor element is electrically connected to the transistor. Therefore, the process for forming the pixel electrode included in the transistor can be utilized. The light-transmitting semiconductor film and one electrode of the capacitor are formed using the same metal element.

[0016] A step of forming a light-transmitting semiconductor film of a transistor as one electrode of a capacitor element When a semiconductor film formed by the method described above is used, the conductivity of the semiconductor film may be increased. Boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony and It is preferable to add one or more elements selected from rare gas elements to the semiconductor film. The method of adding the ions to the semiconductor film includes ion implantation and ion doping. The above elements can also be added by exposing the semiconductor film to plasma containing the above elements. In this case, one electrode of the capacitance element is an n-type semiconductor film, and its conductivity is 10S / cm or more and 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less do.

[0017] With the above structure, the capacitor element has light-transmitting properties, and therefore, the transistor in the pixel Therefore, the aperture ratio can be increased. As a result, a semiconductor device having an increased charge capacity can be obtained. A semiconductor device having such a structure can be obtained.

[0018] In addition, in the capacitor element, the dielectric film is provided on the light-transmitting semiconductor film of the transistor. Since the insulating film is used, the same layer structure as the insulating film can be formed. an insulating film provided over a light-transmitting semiconductor film of a transistor; a first oxide insulating film; When the insulating film is an insulating film in which a nitride insulating film and a second oxide insulating film are laminated in this order, the dielectric constant of the capacitance element is The body film is an insulating film in which a first insulating oxide film, a nitride insulating film, and a second insulating oxide film are stacked in this order. It is possible.

[0019] In addition, in the capacitor, an insulating film provided over a light-transmitting semiconductor film of a transistor The film is an insulating film in which a first insulating oxide film, a nitride insulating film, and a second insulating oxide film are laminated in this order. In this case, only the region where the capacitance element is to be formed after forming the oxide insulating film is covered with the first oxide insulating film. By removing the insulating film, the dielectric film of the capacitance element is made into the nitride insulating film and the second oxide insulating film. In other words, the nitride insulating film can be a semiconductor that functions as a pair of electrodes of a capacitor element. The semiconductor film is made of an oxide semiconductor, so the nitride insulating film and the semiconductor film When the nitride insulating film and the semiconductor film are in contact with each other, a defect level (interface level) is formed at the interface between the nitride insulating film and the semiconductor film. Or / and, when the nitride insulating film is formed by plasma CVD or sputtering, The semiconductor film is exposed to plasma, and oxygen vacancies are generated. The nitrogen and / or hydrogen contained in the silicon dioxide moves to the semiconductor film. When hydrogen contained in the insulating film enters, electrons, which act as carriers, are generated. The conductivity of the conductive film increases, it becomes n-type, and it becomes a conductive film. It is possible to form a metal oxide film having the desired characteristics. This allows the charge capacity of the capacitance element to be increased.

[0020] From the above, by adopting a structure in which the nitride insulating film is in contact with the semiconductor film in the capacitor element, An element that increases the conductivity is added to the semiconductor film by ion implantation or ion doping. This allows the omission of additional processes, improves the yield of semiconductor devices, and reduces manufacturing costs. It is possible.

[0021] Note that the light-transmitting semiconductor film of the transistor is formed using an oxide semiconductor. The insulating film in which the oxide insulating film, the nitride insulating film, and the second oxide insulating film are stacked in this order is called the light-transmitting insulating film. When an insulating film is provided over a semiconductor film having an oxide insulating film, the oxide insulating film is permeable to nitrogen and hydrogen. It is preferable that the material has a barrier property against nitrogen, that is, a barrier property against nitrogen.

[0022] By doing so, one of nitrogen and hydrogen is added to the light-transmitting semiconductor film of the transistor. Alternatively, the diffusion of both can be suppressed, and fluctuations in the electrical characteristics of the transistor can be suppressed. do.

[0023] In the above, the semiconductor device according to one embodiment of the present invention includes a gate electrode of a transistor. A scanning line and a capacitance line extending in a direction parallel to the scanning line and provided on the same surface as the scanning line are provided. One electrode (semiconductor film) of the capacitor is connected to the source electrode or drain electrode of the transistor. The capacitor is electrically connected to the capacitor line by a conductive film that can be formed when forming the capacitor electrode. Alternatively, a capacitor line is formed using a semiconductor film included in the capacitor element.

[0024] The capacitance lines are not limited to extending in a direction parallel to the scanning lines and being provided on the same surface as the scanning lines. First, the signal line extends in a direction parallel to the signal line including the source electrode or drain electrode of the transistor. It may be provided on the same surface as the line and electrically connected to one electrode (semiconductor film) of the capacitor element. .

[0025] Furthermore, the capacitance line may be connected to each of the capacitance elements included in the adjacent pixels. In this case, a capacitance line may be provided between adjacent pixels.

[0026] In addition, a light-transmitting semiconductor film of a transistor is used as one electrode of a capacitor. When a formed semiconductor film is used, the conductive film in contact with the semiconductor film and the capacitance line is formed by the semiconductor film. The semiconductor film may be provided in contact with the edge of the film, for example, along the periphery of the semiconductor film. In this way, the conductivity of the semiconductor film can be increased. Cut.

[0027] Note that a manufacturing method of a semiconductor device according to one embodiment of the present invention can also be used. Included in. [Effects of the Invention]

[0028] According to one embodiment of the present invention, there is provided a semiconductor device having a capacitor element with an increased aperture ratio and an increased charge capacity. A body device can be provided. [Brief explanation of the drawings]

[0029] [Figure 1] 1A and 1B are a diagram illustrating a semiconductor device according to one embodiment of the present invention and a circuit diagram illustrating a pixel. [Figure 2] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 3] 1A and 1B are cross-sectional views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 7] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 8] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 9] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A and 1B are cross-sectional views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A and 1B are cross-sectional views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17]1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A and 1B are cross-sectional views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 19] 1A and 1B are top views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 20] 1A and 1B are cross-sectional views illustrating a semiconductor device according to one embodiment of the present invention. [Figure 21] 1A and 1B are a cross-sectional view and a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 22] 1A to 1C illustrate electronic devices using a semiconductor device which is one embodiment of the present invention. [Figure 23] 1A to 1C illustrate electronic devices using a semiconductor device which is one embodiment of the present invention. [Figure 24] FIG. 1 is a diagram illustrating a sample structure. [Figure 25] FIG. 1 is a diagram illustrating sheet resistance. [Figure 26] FIG. 1 is a diagram illustrating the results of SIMS measurements. [Figure 27] FIG. 1 is a diagram illustrating the results of ESR measurements. [Figure 28] FIG. 1 is a diagram illustrating the results of ESR measurements. [Figure 29] FIG. 1 is a diagram illustrating sheet resistance. [Figure 30] FIG. 1 is a diagram illustrating sheet resistance. [Figure 31] A diagram explaining the bulk model of InGaZnO4. [Figure 32] Diagram illustrating the formation energy and thermodynamic transition levels of VoH. DETAILED DESCRIPTION OF THE INVENTION

[0030] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and it is understood by those skilled in the art that various modifications may be made to the modes and details thereof. The present invention will be easily understood by reading the following description of the embodiments. It is not something that is done.

[0031] In the configuration of the present invention described below, the same parts or parts having similar functions are designated as the same. The same reference numerals are used in common among different drawings, and repeated explanations thereof will be omitted. When referring to a part that has a function, the hatch pattern is the same and no particular symbol is attached. be.

[0032] In each figure described in this specification, the size of each structure, the thickness of a film, or the area is shown for clarity. The figures may be exaggerated for illustrative purposes only and are not necessarily limited to that scale.

[0033] In this specification and elsewhere, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of steps or the order of layers. It does not indicate a specific name for the matter.

[0034] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) of a unit charge in a particle. However, in general, the potential difference between the potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, the term "potential" may be read as "voltage." , voltage may be read as potential.

[0035] In this specification, when etching is performed after photolithography, The mask formed by the photolithography process is removed.

[0036] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. explain.

[0037] <Configuration of semiconductor device> FIG. 1A shows an example of a semiconductor device. The semiconductor device shown in FIG. 1A includes a pixel portion 10 0, the scanning line driving circuit 104, and the signal line driving circuit 106 are arranged parallel or approximately parallel to each other. and m scanning lines 107 whose potentials are controlled by a scanning line driving circuit 104, are arranged in parallel or approximately parallel, and the potentials of which are controlled by a signal line driving circuit 106. and a signal line 109. Furthermore, the pixel section 100 has a plurality of The pixel 101 is arranged parallel or substantially parallel to the scanning line 107. The capacitor lines 115 are arranged along the signal lines 109 in parallel or parallel to each other. They may be arranged substantially parallel to each other.

[0038] Each scanning line 107 is connected to one of the pixels 101 arranged in m rows and n columns in the pixel section 100. The signal lines 109 are electrically connected to the n pixels 101 arranged in any one of the rows. is m pixels 101 arranged in any one of the columns among the pixels 101 arranged in m rows and n columns. 1. Both m and n are integers equal to or greater than 1. is n pixels 101 arranged in any row among the pixels 101 arranged in m rows and n columns. 1. Capacitor lines 115 are arranged along the signal line 109 in parallel or When the pixels 101 are arranged in approximately parallel rows and columns, one of the pixels 101 arranged in m rows and n columns It is electrically connected to m pixels 101 arranged in a column.

[0039] FIG. 1B is an example of a circuit diagram of a pixel 101 included in the semiconductor device shown in FIG. The pixel 101 shown in FIG. 1B is electrically connected to a scanning line 107 and a signal line 109. One electrode of the transistor 103 is electrically connected to the drain electrode of the transistor 103. The other electrode of the capacitor element 1 is electrically connected to a capacitor line 115 that supplies a constant potential. 05, and the pixel electrode is the drain electrode of the transistor 103 and one electrode of the capacitor 105. An electrode (counter electrode) provided opposite the pixel electrode supplies a counter potential. and a liquid crystal element 108 electrically connected to the wiring.

[0040] The liquid crystal element 108 is formed by a substrate on which the transistor 103 and the pixel electrode are formed and a counter electrode. The optical modulation effect of the liquid crystal sandwiched between the substrates on which the light is formed controls the transmission or non-transmission of light. The optical modulation action of the liquid crystal is controlled by the electric field applied to the liquid crystal (vertical electric field or The electric field is controlled by the electric field in the diagonal direction. When an opposing electrode (also called a common electrode) is formed on the liquid crystal, the electric field applied to the liquid crystal is a horizontal electric field. It becomes a boundary.

[0041] Next, a specific example of the pixel 101 of the liquid crystal display device will be described. The diagram is shown in Fig. 2. In Fig. 2, the counter electrode and the liquid crystal element are omitted.

[0042] In FIG. 2, the scanning lines 107 extend in a direction substantially perpendicular to the signal lines 109 (the left-right direction in the drawing). The signal lines 109 extend in a direction substantially perpendicular to the scanning lines 107 (the vertical direction in the drawing). The capacitance line 115 is provided so as to extend in a direction parallel to the scanning line 107. The scanning lines 107 and the capacitance lines 115 are connected to the scanning line driving circuit 104 (FIG. 1(A)). ) and the signal line 109 is electrically connected to the signal line driver circuit 106 (see FIG. 1). (See (A).)

[0043] The transistor 103 is provided in the area where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel formation region, A gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode In the scan line 107, a region overlapping with the semiconductor film 111 includes a transistor. The gate electrode 103 functions as a gate electrode of the signal line 109. The conductive film 113 is a semiconductor. The region overlapping with the film 111 functions as the drain electrode of the transistor 103. , the gate electrode, the source electrode, and the drain electrode are connected to the scanning line 107 and the signal line 109, respectively. 2, the top surface of the scan line 107 is shown as a conductive film 113. Therefore, the scanning line 107 is not affected by backlash. This functions as a light-shielding film that blocks light from light sources such as silicon dioxide. Therefore, the semiconductor film 111 is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed. Cut.

[0044] In addition, oxide semiconductors can be used to reduce the off-state current of transistors by treating them under appropriate conditions. In one embodiment of the present invention, an oxide semiconductor is used for the semiconductor film 111 because the oxide semiconductor can reduce the This makes it possible to reduce the power consumption of the semiconductor device.

[0045] The conductive film 113 is a pixel electrode formed of a conductive film that transmits light through the opening 117. 2, the pixel electrode 121 is shown as a hatched portion. is omitted in the illustration.

[0046] The capacitance element 105 is provided in a region surrounded by the capacitance line 115 and the signal line 109 in the pixel 101. The capacitor element 105 is connected to a capacitor line through a conductive film 125 provided in the opening 123. The capacitor 105 is electrically connected to a semiconductor formed of an oxide semiconductor. The insulating film 119, the pixel electrode 121, and the insulating film formed on the transistor 103 as a dielectric film. The semiconductor film 119, the pixel electrode 121, and the insulating film (not shown in FIG. 2) are included. Since each dielectric film has a light-transmitting property, the capacitor 105 has a light-transmitting property.

[0047] In this way, since the semiconductor film 119 has light-transmitting properties, the capacitor 105 can be formed large in the pixel 101. Therefore, the aperture ratio can be increased, typically 55%. It is possible to increase the charge capacity to 60% or more, preferably 60% or more. For example, a semiconductor device with high resolution, such as a liquid crystal display device, can be obtained. In this case, the area of ​​the pixel becomes smaller, and the area of ​​the capacitance element also becomes smaller. In a semiconductor device with a low capacitance, the charge capacity stored in the capacitance element is small. Since the capacitor 105 described in this embodiment has a light-transmitting property, the capacitor can be provided in a pixel. This makes it possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. The pixel density is 200ppi or more, and even 300ppi or more. Furthermore, one embodiment of the present invention can be suitably used in a high-resolution display device. The aperture ratio can be increased, allowing for efficient use of light from light sources such as backlights. This makes it possible to reduce the power consumption of the display device.

[0048] Here, the characteristics of a transistor using an oxide semiconductor will be described. The transistor used is an n-channel transistor. Oxygen vacancies can generate carriers, which can affect the electrical characteristics and reliability of transistors. For example, the threshold voltage of a transistor may be shifted in the negative direction. However, when the gate voltage is 0V, drain current may flow. A transistor in which drain current flows when the gate voltage is 0V is called a normally-on transistor. It can be assumed that no drain current flows when the gate voltage is 0V. A transistor that can perform this function is called a normally-off transistor.

[0049] Therefore, when an oxide semiconductor is used for the semiconductor film 111, defects in the semiconductor film 111, Typically, it is preferable to reduce oxygen vacancies as much as possible. For example, The spin density (semiconductor) of g=1.93 by electron spin resonance with the applied voltage parallel to the film surface The density of defects contained in the film 111 is reduced to below the detection limit of the measuring instrument. It is preferable to reduce defects, typically oxygen vacancies, in the semiconductor film 111 as much as possible. By reducing the current, it is possible to prevent the transistor 103 from becoming a normally-on transistor. This makes it possible to improve the electrical characteristics and reliability of the semiconductor device.

[0050] The negative shift in the threshold voltage of a transistor is not only due to oxygen vacancies, but also to oxide It can also be caused by hydrogen contained in semiconductors (including hydrogen compounds such as water). The hydrogen contained in the oxide semiconductor reacts with the oxygen that bonds with the metal atoms to form water. The oxygen vacancies (or oxygen vacancies) are formed in the lattice where the oxygen has been removed (or in the part where the oxygen has been removed). In addition, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen has a normally-on characteristic. It is easy to become sexually

[0051] Therefore, when an oxide semiconductor is used for the semiconductor film 111, the semiconductor film 111 is Specifically, in the semiconductor film 111, the secondary ion species is preferably reduced. Secondary Ion Mass Spectrometer (SIMS) The hydrogen concentration obtained by y) is 5 × 10 18 atoms / cm 3 Less than 1x, preferably 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 below , and more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0052] The semiconductor film 111 is also formed of an alkali metal or aluminum oxide obtained by secondary ion mass spectrometry. The concentration of potassium earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. The combination may generate carriers, which increases the off-state current of the transistor 103. This sometimes happens.

[0053] Furthermore, when nitrogen is contained in the semiconductor film 111, electrons serving as carriers are generated, and the carriers As a result, the density increases and it becomes easier to make the material n-type. The transistor tends to have a normally-on characteristic. It is preferable that the nitrogen is reduced as much as possible. For example, the nitrogen concentration is 5×10 18 a toms / cm 3 It is preferable to do the following:

[0054] In this way, impurities (hydrogen, nitrogen, alkali metals or alkaline earth metals, etc.) can be removed. The semiconductor film 111 is formed using a highly purified oxide semiconductor film. , the transistor 103 can be prevented from becoming a normally-on transistor. Therefore, the off-state current can be significantly reduced. In addition, a semiconductor device with improved reliability can be manufactured.

[0055] The reason why the off-state current of a transistor using a highly purified oxide semiconductor film is low is that This can be proven through various experiments. For example, if the channel width W is 1×10 6 Channel length in μm Even with an element with L of 10 μm, the voltage between the source electrode and the drain electrode (drain voltage) In the range of 1V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. Bottom, i.e. 1 x 10 -13In this case, the transistor The off-state current, which is equivalent to the value divided by the channel width of the transistor, must be 100 A / μm or less. In addition, by connecting a capacitor and a transistor, the current flowing into or out of the capacitor can be The off-state current was measured using a circuit in which charge flowing out of the transistor was controlled by the transistor. In this measurement, a highly purified oxide semiconductor film was used as a channel formation region of the transistor. The off-state current of the transistor is measured from the change in the amount of charge per unit time of the capacitor. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, several It was found that an even lower off-state current of 10 yA / μm could be obtained. A transistor including such an oxide semiconductor film has an extremely small off-state current.

[0056] Next, the dashed lines A1-A2, B1-B2, and C1-C2 in FIG. 3 shows a cross-sectional view of the scanning line driver circuit 104. A cross-sectional view of the scanning line driving circuit 104 is shown in D1-D2. 1 shows a cross-sectional view of a transistor provided in the signal line driver circuit 106. It can be set up in.

[0057] First, the pixel 101 is divided into two sections, A1 and A2, B1 and B2, and C1 and C2. The structure between the two will be described. A scanning line 107 and a capacitance line 115 provided on the same surface as the scanning line 107 are provided. A gate insulating film 127 is provided on the scanning line 107 and the capacitance line 115. A semiconductor film 111 is provided on a region of the gate insulating film 127 that overlaps with the scanning line 107. A semiconductor film 119 is provided on the gate insulating film 127. A signal line 109 including a source electrode of the transistor 103 is formed on the insulating film 127. The gate insulating film 127 is provided with a conductive film 113 including the drain electrode 103. An opening 123 reaching the capacitance line 115 is provided. A conductive film 125 is provided on the gate insulating film 127 and the semiconductor film 119. On the wire 109, on the semiconductor film 111, on the conductive film 113, on the conductive film 125, and on the semiconductor film 119 The insulating film 129, the insulating film 131, and the insulating film 132 function as protective insulating films for the transistor 103. 32 and an insulating film 137 are provided. The insulating film 137 has an opening 117 (see FIG. 2) that reaches the conductive film 113. A pixel electrode 121 is provided in the opening 117 (see FIG. 2) and on the insulating film 137 .

[0058] In the capacitor 105 shown in this embodiment, one of a pair of electrodes is connected to a semiconductor film 111. The other electrode of the pair of electrodes is a pixel electrode. 121, and the dielectric film provided between the pair of electrodes is an insulating film 129, an insulating film 131, an insulating film The insulating film 137 is an insulating film 132 .

[0059] Next, the structure of the transistor provided in the scanning line driver circuit 104 will be described. A gate electrode 627 of the transistor 623 is provided on the gate electrode 62 The gate insulating film 127 is provided on the gate electrode 627. A semiconductor film 631 is provided on the overlapping region. The source electrode 629 and the drain electrode 633 of the transistor 623 are provided on the film 127. On the gate insulating film 127, on the source electrode 629, on the semiconductor film 631, on the drain electrode The insulating film 129 and the insulating film 13 are formed on the transistor 633. The insulating film 129 and the insulating film 13 function as protective insulating films for the transistor 623. 1, an insulating film 132, and an insulating film 137 are provided on the insulating film 137. 41 is provided.

[0060] The substrate 102, the scanning line 107, the capacitance line 115, the gate electrode 627, and the gate A base insulating film may be provided between the insulating film 127 and the base insulating film 128 .

[0061] In the transistor 623, a conductive layer overlapping the gate electrode 627 with a semiconductor film 631 interposed therebetween is formed. By providing the conductive film 641, the rise of the on-current at different drain voltages is The voltage variation can be reduced. In this respect, the current flowing between the source electrode 629 and the drain electrode 633 can be controlled. This makes it possible to reduce variations in electrical characteristics among different transistors. In addition, by providing the conductive film 641, the influence of the change in the surrounding electric field on the semiconductor film 631 is reduced. This can reduce the noise and improve the reliability of the transistor. The potential of the driving circuit is set to the lowest potential (Vss, for example, the potential of the source electrode 629) as a reference. In this case, the potential of the transistor is set to the same potential as or equivalent to the potential of the source electrode 629. It is possible to reduce the fluctuation of the threshold voltage of the transistor, thereby improving the reliability of the transistor. This can be done.

[0062] The insulating film 129 and the insulating film 131 are made of, for example, silicon oxide, silicon oxynitride, or aluminum oxide. Oxide insulating materials such as aluminum, hafnium oxide, gallium oxide, or Ga-Zn-based metal oxides The insulating film can be provided in a single layer structure or a laminated structure using a material.

[0063] The thickness of the insulating film 129 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. The thickness of the insulating film 131 can be set to 10 nm or more and preferably 30 nm or less. The thickness can be 30 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less. Cut.

[0064] The insulating film 132 may be made of, for example, silicon oxynitride, silicon nitride, aluminum nitride, The insulating layer may be formed in a single layer or a multilayer structure using a nitride insulating material such as aluminum oxide nitride. can be done.

[0065] The insulating film 132 may be a nitride insulating film with a low hydrogen content. For example, the amount of released hydrogen molecules measured by TDS analysis is 5.0 × 10 2 1 atoms / cm 3 less than 3.0 x 10 21 atoms / cm 3 less than and more preferably 1.0 × 10 21 atoms / cm 3 The nitride insulating film is less than be.

[0066] The insulating film 132 has a thickness that can suppress the intrusion of impurities such as hydrogen and water from the outside. For example, it is 50 nm or more and 200 nm or less, preferably 50 nm or more and 150 nm or less. The thickness can be set to 50 nm or less and more preferably 100 nm or less.

[0067] The insulating film 137 is formed by a CVD method (chemical vapor deposition method) using organic silane gas. An oxide insulating film formed from a silicon dioxide film, typically a silicon oxide film, can be used.

[0068] The insulating film 137 is a silicon oxide film formed by a CVD method using organic silane gas. The silicon oxide film can be formed to a thickness of 300 nm or more and 600 nm or less. The organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetrahydrofuran (TEOS: chemical formula Si(OC2H5)4), and tetrahydrofuran (TEOS: chemical formula Si(OC2H5)4). Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasiloxane TMCTS, Octamethylcyclotetrasiloxane (OMCTS), Hexamethyl HMDS, triethoxysilane (SiH(OC2H5)3), tris(di) Use silicon-containing compounds such as methylaminosilane (SiH(N(CH3)2)3) It is possible.

[0069] The insulating film 137 is formed of a silicon oxide film formed by a CVD method using organic silane gas. This makes it possible to improve the flatness of the surface of the element portion formed on the substrate 102. As a result, the alignment disorder of the liquid crystal is reduced and the light is uniform even without providing a planarizing film made of organic resin. It is possible to reduce leakage and increase contrast. The transistors formed on the substrate 102 and the protective insulating film ( Insulating film 129, insulating film 131, insulating film 132, and insulating film 137), a capacitance element, a protective insulator The insulating film 129 includes a conductive film formed over the insulating film 129. Note that the insulating film 129 does not necessarily have to be provided.

[0070] Further, nitride insulating films are formed between the transistors 103 and 623 and the insulating film 137. By providing the insulating film 132, impurities such as carbon contained in the silicon oxide film are insulated. The semiconductor films of the transistors 103 and 623 are blocked by the insulating film 132. Since the movement of impurities into the semiconductor film 631 and the semiconductor film 111 is reduced, the electrical characteristics of the transistor are improved. It is possible to reduce the variation in the

[0071] Furthermore, one or both of the insulating film 129 and the insulating film 131 may be made of an acid having a stoichiometric composition. It is preferable that the oxide insulating film contains more oxygen than silicon. The desorption of oxygen from the semiconductor films 111 and 631 is prevented, and the oxygen contained in the oxygen-excess region is prevented. The oxygen can be transferred to the semiconductor films 111 and 631. The oxygen that has moved to 1 is oxygen vacant in the oxide semiconductor that forms the semiconductor films 111 and 631. For example, thermal desorption spectroscopy (hereinafter referred to as TDS analysis) can be used. ) is measured by the amount of oxygen released, which is 1.0 × 10 18 molecules / cm 3 More oxidation By using an insulating film, oxygen vacancies contained in the semiconductor films 111 and 631 are reduced. Note that the insulating film 129 and / or the insulating film 131 may have a stoichiometric composition. It is an oxide insulating film in which there are partially existing regions (oxygen excess regions) that contain more oxygen than the composition. At least an oxygen-excess region may be present in a region overlapping with the semiconductor films 111 and 631. This prevents oxygen from being released from the semiconductor films 111 and 631 and prevents excess oxygen from being released. The oxygen contained in the region is moved to the semiconductor film 111, 631, thereby reducing oxygen vacancies. This becomes possible.

[0072] The insulating film 131 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. In this case, the insulating film 129 is preferably an oxide insulating film that transmits oxygen. In the insulating film 129, all oxygen that enters the insulating film 129 from the outside passes through the insulating film 129 and migrates. Some oxygen does not move and remains in the insulating film 129. Therefore, the insulating film 129 is formed to prevent the diffusion of oxygen. An insulating oxide film with a large coefficient is preferred.

[0073] The insulating film 129 is formed using an oxide semiconductor. Since the semiconductor film 111 and the semiconductor film 631 are in contact with each other, oxygen is not only transmitted through the semiconductor film 111 and the semiconductor film 631 but also the semiconductor film 111 and the semiconductor film 631 are in contact with each other. It is preferable that the insulating film 12 is an oxide insulating film that reduces the interface state with the insulating film 12. The insulating film 9 is preferably an oxide insulating film having a lower defect density than the insulating film 131. The spin density of g = 2.001 (E´-center) measured by electron spin resonance is is 3.0×10 17 spins / cm 3 Less than 5.0 × 10 16 spins / cm 3 The oxide insulating film is shown below. Note that the g value measured by electron spin resonance is 2.001. The pin density corresponds to the number of dangling bonds contained in the insulating film 129 .

[0074] In addition, one or both of the insulating film 129 and the insulating film 131 has a barrier property against nitrogen. For example, a dense oxide insulating film can be used to prevent barriers to nitrogen. Specifically, when 0.5% by weight of hydrofluoric acid is used at 25°C, It is preferable that the oxide insulating film has an etching rate of 10 nm / min or less when the insulating film is etched.

[0075] Note that one or both of the insulating film 129 and the insulating film 131 may be formed using silicon oxynitride or silicon oxynitride. When using an oxide insulating film containing nitrogen, such as silicon dioxide, the nitrogen concentration obtained by SIMS is SIMS detection limit above 3 x 10 20 atoms / cm 3 Less than 1 x 10 18 a toms / cm 3 More than 1×10 20 atoms / cm 3 It is preferable to set the following: By doing so, the semiconductor film 111 and the semiconductor film 631 included in the transistor 103 This reduces the amount of nitrogen that moves. This reduces the number of defects in the insulating film itself.

[0076] In addition, an insulating film 129 and an insulating film 111 are formed between the signal line 109 and the pixel electrode 121 in the pixel. 31, the insulating film 132, and the insulating film 137 are provided, the signal line 109 and the pixel electrode 12 Since the interval between the signal lines 101 and 102 is widened, the parasitic capacitance can be reduced. This can reduce display unevenness and increased power consumption due to delays in the signal voltage transmitted. In the transistor 623 in the scan line driver circuit, the semiconductor film 631 and the conductive film 641 Since the gap is widened, the conductive film 641 reduces the electric field that affects the semiconductor film 631, and the This reduces variations in the electrical characteristics of the transistor 623. As a result, the display quality is improved. A semiconductor device having such a structure can be obtained.

[0077] The components of the above structure are described in detail below.

[0078] There is no particular restriction on the material of the substrate 102, but at least in the manufacturing process of the semiconductor device, For example, a glass substrate, There are ceramic substrates, plastic substrates, etc., and for glass substrates, barium borosilicate Non-alkali glass such as acid glass, aluminoborosilicate glass or aluminosilicate glass Alternatively, a substrate that does not have light-transmitting properties, such as a stainless steel alloy, may be used. In this case, it is preferable to provide an insulating film on the surface of the substrate. 2. Quartz substrate, sapphire substrate, single crystal semiconductor substrate, polycrystalline semiconductor substrate, compound semiconductor substrate It is also possible to use a solid substrate, SOI (Silicon On Insulator) substrate, etc. can.

[0079] The scanning line 107, the capacitance line 115, and the gate electrode 627 are made of a metal film because they pass a large current. It is preferable to use molybdenum (Mo), titanium (Ti), tungsten (W), etc. Tantalum (W), Tantalum (Ta), Aluminum (Al), Copper (Cu), Chromium (Cr), Neo Metallic materials such as neodymium (Nd) and scandium (Sc), or alloy materials containing these as the main components The insulating film is provided in a single layer structure or a laminated structure using the above.

[0080] Examples of the scanning line 107, the capacitance line 115, and the gate electrode 627 include silicon. Single layer structure using aluminum, double layer structure with titanium laminated on aluminum, titanium nitride Two-layer structure with titanium layered on titanium nitride, two-layer structure with tungsten layered on titanium nitride, Two-layer structure of tungsten laminated on tantalum oxide, copper-magnesium-aluminum alloy Two-layer structure with copper layered on top, copper layered on top of titanium nitride, and tungsten layered on top of that There are three-layer structures that are formed.

[0081] In addition, the scanning line 107, the capacitance line 115, and the gate electrode 627 are made of the same material as the pixel electrode 1 Any conductive material having light-transmitting properties that can be applied to 21 can be used.

[0082] Furthermore, the scanning line 107, the capacitance line 115, and the gate electrode 627 are made of materials containing nitrogen. Metal oxides containing nitrogen, specifically, In-Ga-Zn oxides containing nitrogen and In- Sn-based oxides, nitrogen-containing In-Ga-based oxides, nitrogen-containing In-Zn-based oxides, Nitrogen-containing Sn-based oxides, nitrogen-containing In-based oxides, and metal nitride films (InN, SnN, etc.) These materials have a work function of 5 eV (electron volts) or more. When the semiconductor film 111 of the transistor 103 is formed using an oxide semiconductor, By using a metal oxide containing nitrogen as 107 (gate electrode of the transistor 103), Therefore, the threshold voltage of the transistor 103 can be changed in the positive direction. For example, a nitrogen-containing In-Ga-Zn When a nitrogen-containing oxide is used, the nitrogen concentration is at least higher than that of the semiconductor film 111. In—Ga—Zn-based oxides with a concentration of 7 atomic % or more can be used.

[0083] The scanning line 107, the capacitance line 115, and the gate electrode 627 are made of aluminum, which is a low resistance material. It is preferable to use aluminum or copper. By using aluminum or copper, signal delay can be reduced. Aluminum has low heat resistance and is prone to hillocks and other problems. Defects due to whiskers or migration are likely to occur. To prevent migration, aluminum is often mixed with other materials such as molybdenum, titanium, and tungsten. It is preferable to laminate a metal material having a melting point higher than that of aluminum. In this case, molybdenum and titanium are added to the copper to prevent defects due to migration and the diffusion of copper elements. It is preferable to laminate a metal material having a higher melting point than copper, such as copper or tungsten.

[0084] The gate insulating film 127 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn metal The semiconductor film 111 has a single layer structure or a stacked layer structure using an insulating material such as an oxide. In order to improve the interface characteristics with the semiconductor film 111, the gate insulating film 127 is The region in contact with the insulating film is preferably formed of an oxide insulating film.

[0085] In addition, the gate insulating film 127 is formed of an insulating film having a barrier property against oxygen, hydrogen, water, etc. By providing the insulating layer, oxygen can be diffused from the semiconductor film 111 to the outside, and oxygen can be diffused from the outside to the semiconductor film 11 It is possible to prevent the intrusion of hydrogen, water, etc. into the The insulating film may include an aluminum oxide film, an aluminum oxynitride film, and a gallium oxide film. , gallium oxide nitride film, yttrium oxide film, yttrium oxide nitride film, hafnium oxide Examples of such films include a hafnium oxynitride film, a silicon nitride film, and the like.

[0086] The gate insulating film 127 is made of hafnium silicate (HfSiO x ), nitrogen-containing Hafnium silicate (HfSi x O y N z ), hafnium aluminate with nitrogen HfAlx O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor 103 can be reduced.

[0087] The gate insulating film 127 preferably has the following stacked structure: A silicon nitride film with a small amount of defects is provided as a contact film, and a second silicon nitride film is formed on the first silicon nitride film. As the silicon nitride film, a silicon nitride film with a small amount of hydrogen desorption and ammonia desorption is provided. On the second silicon nitride film, any of the oxide insulating films listed in the gate insulating film 127 is formed. It is preferable to provide

[0088] The second silicon nitride film is a film that has a hydrogen molecule desorption rate of 500 ppm or more in thermal desorption gas spectroscopy. x10 21 molecules / cm 3 Less than 3 x 10 21 molecules / cm 3 The following are more preferred: 1×10 21 molecules / cm 3 The number of ammonia molecules released is 1 × 10 22 molecule / cm 3 Less than 5 x 10 21 molecules / cm 3 or less, more preferably 1 × 10 2 1 molecules / cm 3 It is preferable to use a nitride insulating film having the following properties: The gate insulating film 127 is formed by using the silicon nitride film and the second silicon nitride film as a part of the gate insulating film 127. The insulating film 127 is a gate insulating film having a small amount of defects and a small amount of hydrogen and ammonia desorbed. As a result, the hydrogen and nitrogen contained in the gate insulating film 127 can be Therefore, the amount of transfer to the semiconductor film 111 can be reduced.

[0089] In a transistor using an oxide semiconductor, a semiconductor formed using an oxide semiconductor A trap state (also referred to as an interface state) exists at the interface between the film 111 and the gate insulating film or at the gate insulating film. If present, the threshold voltage of the transistor will shift, typically in the negative direction of the threshold voltage. The drain current changes by an order of magnitude when the transistor is turned on. This causes an increase in the subthreshold coefficient (S value), which indicates the required gate voltage. However, there is a problem that the electrical characteristics vary from transistor to transistor. In addition, by using a silicon nitride film with a small number of defects, the area in contact with the semiconductor film 111 By providing an oxide insulating film in the region, the negative shift of the threshold voltage is reduced and the S value is The increase in the amount of oxygen can be suppressed.

[0090] The thickness of the gate insulating film 127 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. The thickness is preferably at most 300 nm, more preferably at least 50 nm and at most 250 nm.

[0091] The semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 are formed using an oxide semiconductor. The oxide semiconductor can have an amorphous structure, a single crystal structure, or a polycrystalline structure. The semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 are made of the same metal element. The thickness of the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 is 1n m or more and 100 nm or less, preferably 1 nm or more and 50 nm or less, and more preferably 1 nm or more It is preferably 30 nm or less, and more preferably 3 nm or more and 20 nm or less.

[0092] Examples of oxide semiconductors that can be used for the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 include The energy gap is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 e V or more. In this way, by using an oxide semiconductor with a wide energy gap, The off-state current of the transistor 103 can be reduced.

[0093] Oxide semiconductors that can be used for the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 include: It is preferable that the metal oxide contains at least indium (In) or zinc (Zn). Alternatively, it is preferable that the oxide is a metal oxide containing both In and Zn. In order to reduce the variations in the electrical characteristics of transistors using semiconductors, It is preferred to have one or more barriers.

[0094] The stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Aluminum (Al) or zirconium (Zr) are also used. The lanthanides are lanthanum (La), cerium (Ce), and praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Er, Thulium, Ytterbium, Lutetium, etc. do.

[0095] Examples of oxide semiconductors that can be used for the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 include Examples of suitable oxides include indium oxide, tin oxide, zinc oxide, and oxides containing two metals. In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxide, In-Mg oxide, In-Ga oxide, and oxide containing three types of metals In-Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides Sn-Al-Zn oxides, In-Hf-Zn oxides, In-Zr-Zn oxides , In-Ti-Zn oxide, In-Sc-Zn oxide, In-Y-Zn oxide, I n-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In -Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In- Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-H Oxide based on Zn, In-Er-Zn, In-Tm-Zn, In-Yb -Zn-based oxides, In-Lu-Zn-based oxides, and oxides containing four metals, such as In-S n-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide Oxides, In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, In-H f-Al-Zn oxides can be used.

[0096] Here, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as its main components. The ratio of In, Ga, and Zn does not matter. The metal elements may be included.

[0097] In addition, as an oxide semiconductor, InMO3(ZnO) m Using materials expressed as (m>0) M may be one or more metal elements selected from Ga, Fe, Mn, and Co. or the above-mentioned stabilizer element.

[0098] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Ga: Zn=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1: The In-Ga-Zn metal oxide with an atomic ratio of 2 (= 1 / 2: 1 / 6: 1 / 3) was used. Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3 (=1 / 3:1 / 6:1 / 2) or In:Sn:Zn In-Sn-Zn metal oxide with an atomic ratio of 2:1:5 (1 / 4:1 / 8:5 / 8) The atomic ratio of metal elements contained in metal oxides may be calculated by adding the above formula as an error. This includes a variation of plus or minus 20% in atomic ratio.

[0099] However, the semiconductor properties and electrical properties required (field effect mobility, etc.) are not limited to these. The appropriate atomic ratio can be used depending on the semiconductor material (threshold voltage, etc.). To obtain the desired characteristics, the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, It is preferable to make the interatomic distance, density, etc. appropriate. For example, In-Sn-Zn alloy High field-effect mobility can be obtained relatively easily with metal oxides. Even in Zn-based metal oxides, the field-effect mobility can be increased by reducing the defect density in the bulk. It is possible.

[0100] A signal line 109 including the source electrode of the transistor 103, a drain electrode of the transistor 103 The conductive film 113 including the electrode, the semiconductor film 119 of the capacitor 105, and the capacitor line 115 are electrically connected. The conductive film 125, the source electrode 629, and the drain electrode 633 are electrically connected to the scanning line. 107, the capacitance line 115, and the gate electrode 627 using a material applicable to the single layer structure or It is provided in a laminated structure.

[0101] The pixel electrode 121 and the conductive film 641 are made of indium tin oxide and indium oxide containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide The insulating film 11 is formed of a light-transmitting conductive material such as indium tin oxide doped with indium tin oxide.

[0102] Here, the connections of the components included in the pixel 101 shown in this embodiment are shown in FIG. The circuit diagram shown in FIG. 3C and the cross-sectional view shown in FIG. 3 will be used for explanation.

[0103] FIG. 1C is an example of a detailed circuit diagram of a pixel 101 included in the semiconductor device shown in FIG. As shown in FIG. 1C and FIG. 3, the transistor 103 has a gate electrode. A scanning line 107, a signal line 109 including a source electrode, and a conductive film 113 including a drain electrode are formed. Has.

[0104] In the capacitor element 105, a semiconductor layer electrically connected to the capacitor line 115 via a conductive film 125 is The conductive film 119 functions as one of the electrodes. The pixel electrode 121 that is electrically connected to the semiconductor film 119 functions as the other electrode. The insulating film 129, the insulating film 131, the insulating film 132, and the insulating film 133 are provided between the element electrodes 121. The film 137 functions as a dielectric film.

[0105] The liquid crystal element 108 includes a pixel electrode 121, a counter electrode 154, and a It is composed of a liquid crystal layer provided between electrodes 154 .

[0106] In the capacitor 105, the semiconductor film 119 may have the same structure as the semiconductor film 111. , which functions as an electrode of the capacitor element 105. This is because the pixel electrode 121 functions as a gate electrode. The insulating films 129, 131, 132, and 137 are used as gate insulating films. The capacitor line 115 can function as a source electrode or a drain electrode. As a result, the capacitor element 105 operates in the same manner as a transistor, and the semiconductor film 119 is turned on. That is, the capacitance element 105 can be made of MOS (Metal Oxide It is possible to use a MOS (metal-oxide semiconductor) capacitor. The capacitor is connected to one of the electrodes that make up the MOS capacitor when a voltage higher than the threshold voltage (Vth) is applied. When a voltage is applied to the capacitor line 1 (the pixel electrode 121 in the capacitor element 105), it is charged. By controlling the potential applied to the semiconductor film 119, the semiconductor film 119 is brought into a conductive state. can function as one electrode of the capacitor element. In this case, The potential of the pixel electrode 121 is set as follows: (See page 10.) To operate the video signal, the center potential of the video signal is used as the reference, and the positive and negative The capacitance element 105 (MOS capacitor) is always kept in a conductive state. In order to do this, the potential of the capacitance line 115 is always set higher than the potential applied to the pixel electrode 121. It is necessary to lower the threshold voltage of 105 (MOS capacitor) by at least Since the conductive film 119 and the semiconductor film 111 have the same structure, the potential of the capacitance line 115 is applied to the transistor. The threshold voltage of the semiconductor film 103 is set lower than that of the semiconductor film 103. 119 can be always in a conductive state, and the capacitance element 105 (MOS capacitor) It can be brought into a conductive state.

[0107] The insulating film 129 provided over the semiconductor film 111 and the semiconductor film 631 is made of a material that is permeable to oxygen. and the oxide insulating film which reduces the interface state with the semiconductor film 111 and the semiconductor film 631. The insulating film 131 is an oxide insulating film including an oxygen-excess region or an oxygen-excess insulating film having a stoichiometric composition. By using an oxide insulating film containing more oxygen than This makes it easier to supply oxygen to the semiconductor film 111 and the semiconductor film 631. The insulating film 131 is formed by the insulating film 131. The element is transferred to the semiconductor film 111 and the semiconductor film 631 to form the semiconductor films 111 and 631. It is possible to reduce oxygen vacancies contained in the oxide semiconductor. This can prevent the capacitor element 103 from becoming normally on, and The potential applied to the capacitance line 115 so that the MOS capacitor is always in a conductive state. Since it is possible to control the electrical characteristics and reliability of semiconductor devices, can.

[0108] In addition, by using a nitride insulating film as the insulating film 132 provided over the insulating film 131, The semiconductor film 111 and the semiconductor film 119 are prevented from being penetrated by impurities such as hydrogen and water from the outside. Furthermore, by providing a nitride insulating film with a low hydrogen content as the insulating film 132, As a result, fluctuations in the electrical characteristics of the transistor and the capacitance element 105 (MOS capacitor) are suppressed. It is possible.

[0109] In addition, the capacitance element 105 can be formed large (with a large area) within the pixel 101. As a result, a semiconductor device can be obtained that has an increased aperture ratio and an increased charge capacity. As a result, a semiconductor device with excellent display quality can be obtained.

[0110] <Method for manufacturing semiconductor device> Next, a method for manufacturing an element portion provided on the substrate 102 shown in the above semiconductor device will be described. This will be explained with reference to FIG. 4 and FIG.

[0111] First, the scanning lines 107, the capacitance lines 115, and the gate electrodes 627 are formed on the substrate 102. The gate insulating film 12 is then formed to cover the scanning line 107, the capacitance line 115, and the gate electrode 627. 7, and a semiconductor layer is formed in the region of the insulating film 126 that overlaps with the scanning line 107. The conductor film 111 is formed, and the semiconductor film 111 is formed so as to overlap the area where the pixel electrode 121 is to be formed later. 119 is formed. A semiconductor film 631 is formed in a region overlapping with the gate electrode 627. (See Figure 4(A)).

[0112] The scanning line 107, the capacitance line 115, and the gate electrode 627 are made of the materials listed above. A conductive film is formed, a mask is formed on the conductive film, and processing is performed using the mask. The conductive film can be formed by a deposition method, a CVD method, a sputtering method, a spin coating method, etc. The thickness of the conductive film is not particularly limited. The mask can be determined by taking into consideration the time required for the mask to be formed and the desired resistivity. The resist mask may be formed by a lithography process. The film is processed by either dry etching or wet etching, or both. can be done.

[0113] The insulating film 126 is formed by using a material that can be applied to the gate insulating film 127 and by a CVD method or a sputtering method. The film can be formed by using various film formation methods such as a deposition method.

[0114] When gallium oxide is used for the gate insulating film 127, MOCVD (Metal Using the Organic Chemical Vapor Deposition (OCVD) method An insulating film 126 can be formed.

[0115] The semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 are made of any of the above-listed oxide semiconductors. an oxide semiconductor film is formed using a mask; and a mask is formed over the oxide semiconductor film. Therefore, the semiconductor film 111, the semiconductor film 119, The oxide semiconductor film and the semiconductor film 631 are formed using the same metal element. It is formed using methods such as coating, coating, pulsed laser deposition, and laser ablation. By using the printing method, the semiconductor film 111 and the semiconductor film 11 The oxide semiconductor 9 can be formed directly on the insulating film 126 by sputtering. When forming a film, the power supply to generate plasma is an RF power supply, an AC power supply, or A sputtering gas may be a rare gas (alternative gas). Typically, argon, oxygen, a rare gas, and a mixed gas of oxygen are used as appropriate. In the case of a mixed gas containing oxygen, it is preferable to increase the ratio of oxygen to rare gas. The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. The mask may be a resist mask formed by a photolithography process, for example. The oxide semiconductor film can be processed by dry etching and wet etching. This can be done by one or both of the following: Also, etching conditions (etching gas, etching solution, etching time, temperature, etc.) Set appropriately.

[0116] After the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 are formed, heat treatment is performed. Dehydration of the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 formed using an oxide semiconductor The temperature of the heat treatment is typically 150°C or higher. Lower than the strain point of the upper substrate, preferably 200°C or higher and 450°C or lower, more preferably 300°C or higher The temperature is set to 450° C. or lower. Note that this heat treatment is performed at a temperature that is used to process the semiconductor film 111 and the semiconductor film 119. The oxide semiconductor film may be subjected to the treatment before it is heated.

[0117] In this heat treatment, the heat treatment device is not limited to an electric furnace, and a medium such as heated gas may be used. It may also be a device that heats the workpiece by thermal conduction or thermal radiation from the workpiece. GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (La RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with a halogen lamp. lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure natri The treated object is irradiated with light (electromagnetic waves) emitted from lamps such as mercury lamps and high-pressure mercury lamps. The GRTA device is a device that uses high-temperature gas to perform heat treatment. do.

[0118] The heat treatment is carried out in nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less, or air), or rare gas (argon, helium, etc. The above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be added to hydrogen, water, or the like. It is preferable that the material does not contain the above. After heating in an inert gas atmosphere, the material is heated in an oxygen atmosphere. The treatment time is set to 3 minutes to 24 hours.

[0119] In addition, between the substrate 102 and the scanning line 107, the capacitance line 115, and the gate insulating film 127 When a base insulating film is provided, the base insulating film may be made of silicon oxide, silicon oxynitride, or nitride. silicon oxide, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, The insulating film can be formed of aluminum nitride, aluminum oxynitride, or the like. As silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide By forming the layer using a material such as aluminum, impurities, typically alkali metals, water, and the like, can be removed from the substrate 102. The diffusion of elements into the semiconductor film 111, the semiconductor film 119, and the semiconductor film 631 is suppressed. The base insulating film can be formed by sputtering or CVD.

[0120] Next, an opening 123 is formed in the insulating film 126 to reach the capacitance line 115, and a gate insulating film 127 is formed. After forming the signal line 109 including the source electrode of the transistor 103, the transistor 10 The conductive film 113 including the drain electrode 3, the semiconductor film 119 and the capacitor line 115 are electrically connected. A conductive film 125 is formed. A source electrode 629 and a drain electrode 633 are also formed. (See Figure 4(B)).

[0121] The opening 123 is formed so that a part of the region of the insulating film 126 that overlaps with the capacitance line 115 is exposed. The mask can be formed and processed using the mask. This processing is performed in the same manner as the scanning line 107, the capacitance line 115, and the gate electrode 627. It is possible.

[0122] The signal line 109, the conductive film 113, the conductive film 125, the source electrode 629, and the drain electrode 6 33 can be applied to the signal line 109, the conductive film 113, the conductive film 125, and the gate electrode 627. A conductive film is formed using a material, a mask is formed on the conductive film, and a processing is performed using the mask. The mask and the processing are performed on the scanning line 107, the capacitance line 115, and the like. , and the gate electrode 627 can be formed in the same manner.

[0123] Next, the semiconductor film 111, the semiconductor film 119, the semiconductor film 631, the signal line 109, the conductive film 1 13, the conductive film 125, the source electrode 629, the drain electrode 633, and the gate insulating film An insulating film 128 is formed on the insulating film 127, an insulating film 130 is formed on the insulating film 128, and the insulating film 13 An insulating film 133 is formed on the insulating film 130. An insulating film 136 is formed on the insulating film 133 (FIG. 5). (See (A)). The insulating film 128, the insulating film 130, and the insulating film 133 are formed successively. In this way, the insulating film 128, the insulating film 130, and the insulating film 1 This can prevent impurities from being mixed into the interfaces of the layers 33.

[0124] The insulating film 128 is formed by using a material that can be applied to the insulating film 129 and is formed by a CVD method or a sputtering method. The insulating film 130 can be formed by various film forming methods such as a coating method. Formed using applicable materials by various film formation methods such as CVD or sputtering. The insulating film 133 can be formed by using a material that can be used for the insulating film 132, using a CVD method or a sputtering method. The insulating film 136 can be formed by various film forming methods such as a deposition method. It can be formed by CVD using any available material.

[0125] When an oxide insulating film that reduces the interface state with the semiconductor film 111 is used as the insulating film 129, The insulating film 128 can be formed under the following conditions. The following describes the case where a silicon oxide film or a silicon oxynitride film is formed. The conditions were as follows: the substrate placed in the evacuated processing chamber of the plasma CVD device was heated to 180°C or higher. The temperature is kept at 400°C or less, more preferably 200°C to 370°C, and the raw material gas is introduced into the processing chamber. A deposition gas containing silicon and an oxidizing gas were introduced to maintain the pressure in the processing chamber at 20 Pa. The pressure in the processing chamber is set to 40 Pa or more and 250 Pa or less, and more preferably 40 Pa or more and 200 Pa or less. This is the condition for supplying high frequency power to the electrodes.

[0126] Typical examples of silicon-containing deposition gases are silane, disilane, trisilane, and fluoride. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide. There is.

[0127] In addition, by increasing the amount of oxidizing gas to the amount of silicon-containing deposition gas by 100 times or more, It is possible to reduce the hydrogen content in the insulating film 128 (insulating film 129) and Therefore, the number of dangling bonds contained in the insulating film 128 (insulating film 129) can be reduced. The oxygen that moves from the insulating film 130 (insulating film 131) moves to the insulating film 128 (insulating film 129). Since the insulating film 128 (insulating film) may be captured by the dangling bonds contained therein, When the dangling bonds contained in the insulating film 130 (insulating film 13) are reduced, 1) efficiently moves oxygen contained in the semiconductor film 111 and the semiconductor film 119, The oxide semiconductor film 111 and the semiconductor film 119 can be reduced in oxygen vacancies. As a result, the amount of hydrogen mixed into the semiconductor film 111 and the semiconductor film 119 can be reduced. In addition, oxygen vacancies in the semiconductor films 111 and 119 can be reduced. is possible.

[0128] The insulating film 131 is an oxide insulating film containing the above-mentioned oxygen excess region or an oxygen insulating film having a stoichiometric composition. When the insulating film 130 is an oxide insulating film containing more oxygen than Here, the oxide insulating film can be formed using a silicon oxide film or a silicon oxynitride film. The formation conditions are as follows: The substrate placed in the processing chamber is heated to 180°C or higher and 260°C or lower, more preferably 180°C or lower. The temperature was kept at 230°C or higher, and the raw material gas was introduced into the processing chamber to reduce the pressure in the processing chamber to 10 The pressure is set to 0 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. 0.17W / cm to the electrode installed in the room 2 More than 0.5W / cm 2 The following is more preferably is 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power is supplied: .

[0129] The source gas for the insulating film 130 can be the source gas that can be used for the insulating film 128 .

[0130] As a condition for forming the insulating film 130, a high frequency voltage of the above power density is applied in a processing chamber under the above pressure. By supplying power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. As the oxidation of the source gas progresses, the oxygen content in the insulating film 130 becomes higher than the stoichiometric composition. In addition, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Therefore, it is possible to remove some of the oxygen in the film by heat treatment in a later step. As a result, the oxygen content is greater than the stoichiometric composition, and the oxygen content is reduced by heating. In addition, an insulating film can be formed on the semiconductor film 111. Therefore, in the process of forming the insulating film 130, the insulating film 128 This serves as a protective film for the semiconductor film 111. As a result, Even when the film 130 is formed, damage to the semiconductor film 111 and the semiconductor film 631 can be suppressed.

[0131] In addition, by increasing the thickness of the insulating film 130, the amount of oxygen released by heating is increased. Therefore, it is preferable that the insulating film 130 is thicker than the insulating film 128. By providing the insulating film 128, it is possible to improve the coverage even when the insulating film 130 is provided thickly. can.

[0132] The insulating film 132 can be formed by a sputtering method, a CVD method, or the like. When the insulating film 132 is formed using a nitride insulating film with a low hydrogen content, the insulating film 133 is formed under the following conditions: In this case, a silicon nitride film is used as the nitride insulating film. The formation conditions are as follows: The substrate is heated at a temperature of 80°C to 400°C, more preferably 200°C to 370°C. The pressure in the processing chamber is maintained at 100 Pa or more and 250 Pa or less by introducing the raw material gas into the processing chamber. a or less, preferably 100 Pa or more and 200 Pa or less, and an electrode provided in the processing chamber The purpose is to supply high frequency power to the

[0133] The source gas for the insulating film 132 is a deposition gas containing silicon, nitrogen, and ammonia. It is preferable to use the following gases. Typical examples of deposition gases containing silicon include silane, disilane, and the like. The nitrogen flow rate is different from the ammonia flow rate. The ratio is preferably 5 to 50 times, more preferably 10 to 50 times. By using ammonia as a source gas, the decomposition of silicon-containing deposition gas and nitrogen This is because ammonia can be decomposed by plasma energy or thermal energy. The energy generated by dissociation is used to break down the bonds and This is because it contributes to breaking down the bonds of nitrogen molecules. The silicon nitride film is formed to prevent the intrusion of impurities such as hydrogen and water from the outside. It is possible.

[0134] The insulating film 136 is formed by using organic silane gas and oxygen at a substrate temperature of 200° C. or higher and 550° C. or lower. Preferably, the film is formed by a CVD method at a temperature of 300° C. or higher and 450° C. or lower.

[0135] After forming at least the insulating film 130, a heat treatment is performed to form the insulating film 128 or the insulating film 13 The excess oxygen contained in the semiconductor film 111 is transferred to the semiconductor film 631. It is also preferable to reduce oxygen vacancies contained in the oxide semiconductor forming the semiconductor film 631. Note that the heat treatment is performed to dehydrogenate or dehydrate the semiconductor films 111 and 119. The heat treatment can be carried out appropriately by referring to the details of the heat treatment to be carried out.

[0136] Next, the conductive film 113 of the insulating film 128, the insulating film 130, the insulating film 133, and the insulating film 136 is An opening 117 (see FIG. 2) reaching the conductive film 113 is formed in a region overlapping with the , an insulating film 129, an insulating film 131, an insulating film 132, and an insulating film 137 are formed. 7 (see FIG. 2) can be formed in the same manner as opening 123.

[0137] Finally, the pixel electrode 121 and the conductive film 641 are formed on the substrate 102. The element portion can be fabricated (see FIG. 5(B)). A conductive film is formed using the material in contact with the conductive film 113 through the opening 117, and The mask is formed on the surface of the substrate, and the substrate is processed using the mask. The wiring and processing can be performed in the same manner as the scanning line 107 and the capacitance line 115.

[0138] <Variation 1> In the semiconductor device according to one embodiment of the present invention, a semiconductor The connection between the film 119 and the capacitance line 115 can be changed as needed. In order to improve the capacitance, the semiconductor film is in direct contact with the capacitance line without the conductive film 125 being interposed therebetween. Since the conductive film 125 that serves as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. It is possible.

[0139] <Variation 2> In the semiconductor device of one embodiment of the present invention, one electrode of the capacitor 105 The upper surface shape of the conductive film 125 that electrically connects the semiconductor film 119 and the capacitor line 115 is appropriately For example, the contact resistance between the semiconductor film 119 and the conductive film 125 can be reduced. In order to achieve this, the conductive film 125 is provided along the periphery of the semiconductor film 119 so as to be in contact with the periphery. The conductive film is formed on the signal line 109 including the source electrode of the transistor 103 and the Since it is formed in the same formation process as the conductive film 113 including the drain electrode of the transistor 103, It is preferable to form it in a loop shape since it may have a light-blocking property.

[0140] <Variation 3> In the semiconductor device according to one embodiment of the present invention, a semiconductor film and a capacitor included in a capacitor element The structure of the dose curve can be changed as needed. A specific example of this structure will be explained with reference to FIG. FIG. 6 is a top view of the pixel 172. Like the pixel 172, the side parallel to the signal line 109 The side parallel to the scanning line 107 is longer than the side parallel to the signal line 107. The signal line 109 and the capacitance line 176 may be provided so as to extend in a direction parallel to each other. is electrically connected to the signal line driver circuit 106 (see FIG. 1(A)).

[0141] The capacitance element 174 is connected to a capacitance line 176 extending in a direction parallel to the signal line 109. The capacitor 174 is formed using an oxide semiconductor film formed in the same process as the semiconductor film 111. The semiconductor film 178 is made up of the pixel electrode 121 and the transistor 10 3 and an insulating film (not shown in FIG. 6) formed on the semiconductor film 111. Since the electrode 121 and the dielectric film are both light-transmitting, the capacitance element 174 is Has.

[0142] In the capacitor 174, the dielectric film provided between the pair of electrodes is As in the capacitor 105, the insulating films 129, 131, 132, and 13 It is 7.

[0143] The capacitor line 176 can be formed in the same process as the signal line 109 and the conductive film 113 . By providing the capacitor line 176 in contact with the semiconductor film 178, the semiconductor film 178 and the capacitor line 176 In addition, in the pixel 172, the contact area between the scanning line 107 and the Since the side parallel to the signal line 109 is shorter than the side parallel to the signal line 109, the pixel electrode 121 In addition, the area where the capacitor line 176 overlaps can be reduced, and the aperture ratio can be increased. do.

[0144] <Variation 4> In the semiconductor device according to one embodiment of the present invention, one electrode constituting a capacitor and a capacitor The wire can be a semiconductor film. A specific example will be explained with reference to FIG. Only the semiconductor film 198 will be described, which is different from the semiconductor film 119 and the capacitance line 115 described in 2. FIG. 7 is a top view of the pixel 196. In the pixel 196, one of the capacitance elements 197 A semiconductor film 198 is provided, which also serves as an electrode and a capacitance line. The semiconductor device has a region extending in a direction parallel to the signal line 109, and the region functions as a capacitance line. In the conductive film 198, the area overlapping with the pixel electrode 121 is one electrode of the capacitance element 197. The semiconductor film 198 functions as a semiconductor of the transistor 103 provided in the pixel 196. It can be formed simultaneously with the conductive film 111.

[0145] In addition, the semiconductor film 198 is formed as a continuous semiconductor film without any gaps in all the pixels 196 in one row. In this case, the semiconductor film 198 overlaps with the scan line 107, and therefore the potential of the scan line 107 Due to the influence of the change, the capacitor line and one electrode of the capacitor 197 may not function. Therefore, as shown in FIG. 7, the semiconductor films 198 are provided at intervals in each pixel 196. The semiconductor film 198 provided between the signal lines 109 and the conductive film 113 can be formed at the same time. It is preferable to electrically connect the semiconductor film 198 to the semiconductor film 199. The area not connected to the conductive film 199 overlaps with the pixel electrode 121, Since the resistance of the semiconductor film 198 in the capacitance line and the capacitance element 1 can be reduced, the semiconductor film 198 It functions as one of the electrodes of 97.

[0146] Although not shown, the semiconductor film 198 overlaps the scanning line 107 in the region where it overlaps the scanning line 107. When the semiconductor film 198 is not affected by the potential change of the scanning The semiconductor film 107 can be formed as a single semiconductor film so as to overlap with the line 107. 198 is provided as a continuous semiconductor film without any gaps in all pixels 196 of one row. can be done.

[0147] In FIG. 7, the region of the semiconductor film 198 that functions as a capacitance line extends in a direction parallel to the signal line 109. However, the area functioning as a capacitance line is configured to extend in a direction parallel to the scanning line 107. The region of the semiconductor film 198 that functions as a capacitance line may be parallel to the scanning line 107. In the case where the transistor 103 and the capacitor 197 are configured to extend in the semiconductor device direction, An insulating film is formed between the conductor film 111 and the semiconductor film 198 and the signal line 109 and the conductive film 113. It is necessary to provide electrical isolation.

[0148] As described above, as in the pixel 196, one electrode of the capacitor element provided in the pixel and the capacitor line In addition, by providing the oxide semiconductor film, the oxide semiconductor film has a light-transmitting property, and therefore, the pixel development You can increase your speaking rate.

[0149] <Variation 5> In addition, in the semiconductor device according to one embodiment of the present invention, the configuration of the capacitance line can be changed as appropriate. This structure will be explained with reference to FIG. 8. The difference compared to the line 115 is that the capacitance line is located between two adjacent pixels.

[0150] FIG. 8 shows a case where a capacitance line is provided between adjacent pixels in the extension direction of the signal line 409. 8, the structure of the scanning line 437 is shown. A configuration in which a capacitance line is provided in the

[0151] FIG. 8 shows the upper surfaces of the pixel 401_1 and the pixel 401_2 adjacent to each other in the extension direction of the signal line 409. Figure.

[0152] The scanning line 407_1 and the scanning line 407_2 are parallel to each other and connected to the signal line 409. The scanning lines 407_1 and 407_2 are arranged to extend in directions substantially perpendicular to each other. A capacitance line 415 is provided in parallel to the scanning line 407_1 and the scanning line 407_2. Note that the capacitor line 415 is connected to the capacitor 405_1 provided in the pixel 401_1 and the The pixel 401_1 and the pixel 401_2 are electrically connected to the capacitor 405_2 provided in the pixel 401_1. The top surface shape of the element 401_2 and the arrangement positions of the components are symmetrical with respect to the capacitance line 415. .

[0153] The pixel 401_1 includes a transistor 403_1 and a A pixel electrode 421_1 and a capacitor 405_1 connected to the pixel electrode 421_1 are provided.

[0154] The transistor 403_1 is provided in a region where the scanning line 407_1 and the signal line 409 intersect. The transistor 403_1 is a semiconductor having at least a channel formation region. a film 411_1, a gate electrode, a gate insulating film (not shown in FIG. 8), a source electrode, and a drain electrode. The overlapping region functions as the gate electrode of the transistor 403_1. The region overlapping with the semiconductor film 411_1 functions as a source electrode of the transistor 403_1. In the conductive film 413_1, a region overlapping with the semiconductor film 411_1 is a transistor. The conductive film 413_1 and the pixel electrode 421_1 function as a drain electrode of the pixel electrode 403_1. The connection is made at the opening 417_1.

[0155] The capacitor 405_1 is connected to the capacitor line 415 through a conductive film 425 provided in an opening 423. The capacitor 405_1 is electrically connected to the semiconductor film 4 19_1, a pixel electrode 421_1, and a dielectric film formed on the transistor 403_1. The semiconductor film 419_1 and the insulating film (not shown in FIG. 8) are connected to the pixel electrode 419_2. Since the dielectric film 421_1 and the dielectric film 422_2 have light-transmitting properties, the capacitor 405_1 has light-transmitting properties. It has.

[0156] The pixel 401_2 includes a transistor 403_2, and a A pixel electrode 421_2 and a capacitor 405_2 are provided to connect the two electrodes.

[0157] The transistor 403_2 is provided in a region where the scanning line 407_2 and the signal line 409 intersect. The transistor 403_2 is a semiconductor having at least a channel formation region. a film 411_2, a gate electrode, a gate insulating film (not shown in FIG. 8), a source electrode, and a drain electrode. The overlapping region functions as the gate electrode of the transistor 403_2. The region overlapping with the semiconductor film 411_2 functions as a source electrode of the transistor 403_2. In the conductive film 413_2, a region overlapping with the semiconductor film 411_2 is a transistor The conductive film 413_2 and the pixel electrode 421_2 function as a drain electrode of the pixel electrode 421_2. The connection is made at the opening 417_2.

[0158] The capacitor 405_2 is formed by a conductive film provided in the opening 423, similarly to the capacitor 405_1. The capacitor element 405_2 is electrically connected to the capacitor line 415 through a gate electrode 425. The semiconductor film 419_2 formed of a semiconductor, the pixel electrode 421_2, and a dielectric film and an insulating film (not shown in FIG. 8) formed on the transistor 403_2. The semiconductor film 419_2, the pixel electrode 421_2, and the dielectric film each have light-transmitting properties. The capacitor 405_2 has a light-transmitting property.

[0159] Note that the transistor 403_1, the transistor 403_2, and the capacitor 405_ The cross-sectional structures of the transistor 103 and the capacitor 405_2 are the same as those of the transistor 103 and the capacitor 405_2 shown in FIG. Since it is similar to the quantum element 105, its description is omitted here.

[0160] In the top view, a capacitance line is provided between two adjacent pixels, and the capacitance included in each pixel is By connecting the capacitance elements and the capacitance lines, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the pixel aperture ratio compared to a structure in which a capacitance line is provided for each pixel. is.

[0161] <Variation 6> In the semiconductor device according to one embodiment of the present invention, the shape of a transistor provided in a pixel is The shape of the transistor is not limited to that shown in FIGS. 2 and 3 and can be changed as appropriate. For example, in a transistor, the source electrode included in the signal line 109 is U-shaped (C-shaped, The transistor was shaped like a square or horseshoe, and surrounded the conductive film including the drain electrode. By adopting such a shape, even if the area of ​​the transistor is small, a sufficient channel can be obtained. This allows the transistor to have a wide channel width, and the drain current (on It is possible to increase the amount of current.

[0162] <Variation 7> In the pixels 101, 172, and 196 shown above, the semiconductor film is a gate insulating film. The signal line 109 including the source electrode and the conductive film 113 including the drain electrode are connected to the Instead of using a transistor, the semiconductor film is connected to the signal line including the source electrode and the drain electrode. A transistor located between the conductive film including the gate electrode and the insulating film 129 can be used. .

[0163] <Variation 8> In addition, in the pixels 101, 172, and 196 shown above, the transistors are Instead of the etched transistor shown, a channel protection transistor is used. By providing the channel protective film, the surface of the semiconductor film 111 can be used as a signal line. The semiconductor film 11 is not exposed to the etchant or etching gas used in the conductive film forming process. As a result, the impurities between the source electrode of the transistor and the channel protection film can be reduced. It is possible to reduce the leakage current flowing between the gate and drain electrodes.

[0164] <Variation 9> In addition, in the pixels 101, 172, 196, 401_1, and 401_2 shown above, Although a transistor having one gate electrode is shown as a transistor, A transistor having two gate electrodes facing each other via a semiconductor film 111 can be used. can.

[0165] The transistor is formed on the insulating film 137 of the transistor 103 described in this embodiment. The conductive film overlaps at least a channel formation region of the semiconductor film 111. By providing the conductive film at a position overlapping with the channel formation region of the semiconductor film 111, The potential is preferably set to the lowest potential of the video signal input to the signal line 109. On the surface of the semiconductor film 111 facing the conductive film, a current flows between the source electrode and the drain electrode. It is possible to control the current flowing through the transistor, thereby reducing variations in the electrical characteristics of the transistor. In addition, by providing a conductive film, the change in the surrounding electric field is applied to the semiconductor film 111. This reduces the impact and improves the reliability of the transistor.

[0166] The conductive film is made of the same material and by the same method as the scanning line 107, the signal line 109, the pixel electrode 121, etc. It can be formed more easily.

[0167] As described above, one electrode of the capacitor element is formed of the same material as the semiconductor film included in the transistor. By using a semiconductor film formed in the process, the aperture ratio can be increased while the charge capacity can be increased. As a result, a semiconductor device having a high display quality can be manufactured. The device can be obtained.

[0168] In addition, a semiconductor film formed using an oxide semiconductor and included in a transistor may have an oxygen deficiency. Since the loss is reduced and impurities such as hydrogen are reduced, the semiconductor according to one embodiment of the present invention The resulting device is a semiconductor device with good electrical properties.

[0169] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0170] (Embodiment 2) This embodiment describes a semiconductor device according to one embodiment of the present invention, which has a structure different from that of the above embodiment. The semiconductor device will be described with reference to the drawings. In this embodiment, a liquid crystal display device will be used as an example. In addition, the semiconductor device described in this embodiment will be described. The device has a different structure of the capacitance element compared to the above embodiment. In the semiconductor device to be described, the same configuration as the semiconductor device described in the above embodiment is Reference can be made to the embodiment modes.

[0171] <Configuration of semiconductor device> A top view of a pixel 101 described in this embodiment is shown in FIG. 9. The pixel 201 shown in FIG. In the region enclosed by the dashed dotted line, an insulating film 229 (not shown) and an insulating film 231 (not shown) are formed. ) is not provided. In addition, an insulating film 229 (not shown) and The end of the insulating film 231 (not shown) is located there. The element 205 has a semiconductor film 119 as one electrode and a pixel electrode 221 as the other electrode. The insulating film 232 is a dielectric film, and the insulating film 237 (not shown) is also a dielectric film.

[0172] Next, the dashed lines A1-A2, B1-B2, and C1-C2 in FIG. 1A and a cross-sectional view of a transistor provided in the scan line driver circuit 104 (see FIG. 1A). 10. Here, a top view of the scanning line driver circuit 104 is omitted, and the scanning line driver circuit 104 is not shown. A cross-sectional view of the scanning line driving circuit 104 is shown in D1-D2. 1 shows a cross-sectional view of a transistor to be used in the signal line driver circuit 106. It can be done.

[0173] The cross-sectional structure of the pixel 201 in this embodiment is as follows. A scanning line 107 including the gate electrode of the transistor 103 and a gate electrode 106 provided on the same surface as the scanning line 107 are provided. A gate electrode is provided on the scanning line 107 and the capacitance line 115. An insulating film 127 is provided on the gate insulating film 127 in a region overlapping with the scanning line 107. A semiconductor film 111 is provided, and a semiconductor film 219 is provided on the gate insulating film 127. The source electrode of the transistor 103 is formed on the semiconductor film 111 and the gate insulating film 127. and a conductive film 113 including the drain electrode of the transistor 103. The gate insulating film 127 has an opening 123 that reaches the capacitor line 115. A conductive film 125 is provided in the opening 123, on the gate insulating film 127, and on the semiconductor film 219. On the gate insulating film 127, on the signal line 109, on the semiconductor film 111, on the conductive film 113, An insulating film serving as a protective insulating film for the transistor 103 is formed on the conductive film 125 and the semiconductor film 219. An insulating film 229, an insulating film 231, an insulating film 232, and an insulating film 237 are provided. An insulating film 232 is provided on the semiconductor film 219 at least in a region that will become the capacitor element 205. The insulating films 229, 231, 232, and 237 are covered with conductive films. An opening 117 (see FIG. 9) is provided that reaches the nozzle 113. The pixel electrode 221 is provided on the insulating film 232. A base insulating film is provided between the gate insulating film 127 and the capacitor line 115. Good too.

[0174] The insulating film 229 is the same as the insulating film 129 described in the first embodiment. 231 is an insulating film similar to the insulating film 131 described in the first embodiment. The insulating film 237 is the same as the insulating film 132 described in the first embodiment. The insulating film is the same as the insulating film 137 described in the first embodiment. This pixel electrode is the same as the pixel electrode 121 described above.

[0175] As in the capacitor element 205 of this embodiment, the semiconductor film 219 which is one electrode and the other The dielectric film provided between the pixel electrode 221 and the insulating film 232 is 37, the thickness of the dielectric film is set to be the same as that of the dielectric film of the capacitor element 105 in the first embodiment. Therefore, the capacitance element 205 in this embodiment can be made thinner than the capacitance element 205 in the embodiment. The charge capacity can be increased compared to the capacitor 105 in the first embodiment.

[0176] The insulating film 232 and the insulating film 237 function as a dielectric film of the capacitor 205 . The insulating film 232 is made of a nitride insulating film, which is made of an oxide insulating film such as silicon oxide. Compared to insulating films, they tend to have a higher dielectric constant and larger internal stress. When only the insulating film 232 is used as the dielectric film of the insulating film 2305 without using the insulating film 237, the insulating film 2 If the film thickness of the capacitor 32 is small, the capacitance value of the capacitor 205 becomes too large, and the image signal is not displayed properly. On the other hand, it becomes difficult to increase the speed of writing to the element with low power consumption. If the film thickness is too large, the internal stress becomes too large, causing the threshold voltage of the transistor to fluctuate. Furthermore, if the internal stress of the insulating film 232 becomes too large, The insulating film 232 becomes more likely to peel off from the substrate 102, resulting in a decrease in yield. An insulating film 237 using an oxide insulator such as silicon oxide having a lower dielectric constant than that of the insulating film 32 is formed. By using the insulating film 232 as a dielectric film of the capacitance element of the pixel, the thickness of the insulating film 232 can be reduced. The dielectric constant of the dielectric film can be adjusted to a desired value without increasing the thickness.

[0177] The insulating film 232 is a nitride insulating film similar to the insulating film 132 of the first embodiment. The semiconductor film 219 has high conductivity and is n-type. The semiconductor film 21 is a light-transmitting conductive film made of a metal oxide having the above-mentioned characteristics. The conductivity of the semiconductor film 9 is higher than that of the semiconductor film 111 .

[0178] In addition, the semiconductor film 219 has a region with higher conductivity than the semiconductor film 111. At least the region of the semiconductor film 219 that is in contact with the insulating film 232 is n-type. The conductivity is higher than that of the region of the insulating film 229 of the first insulating film 11.

[0179] Note that the semiconductor film 219 preferably has a higher hydrogen concentration than the semiconductor film 111. In the film 219, secondary ion mass spectrometry (SIMS) was performed. The hydrogen concentration obtained by ass spectrometry is 8×10 19 atom s / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 More preferably, 5x 10 20 atoms / cm 3 The semiconductor film 111 was subjected to secondary ion mass spectrometry. The hydrogen concentration obtained by this method is 5×10 19 atoms / cm 3 Less than 5x1 0 18 atoms / cm 3 Less than 1 x 10 18 atoms / cm 3 More information below: Preferably 5 x 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 ato ms / cm 3 The following is the result.

[0180] The semiconductor film 219 has a lower resistivity than the semiconductor film 111. However, the resistivity of the semiconductor film 111 is 1×10 -8 more than 1x10 -1 It is preferable that the Typically, 1×10 -3 Ωcm or more 1×10 4 less than Ωcm, more preferably Resistivity is 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0181] In the semiconductor device of this embodiment, the method for operating the capacitive element 205 is as follows: The capacitor 205 is operated in the same manner as the capacitor 105 described in the first embodiment. During the period in which the potential of the semiconductor film 219 is activated (in other words, the potential of the capacitance line 115), The threshold voltage of the capacitance element 205 (MOS capacitor) is always higher than the potential of the pixel electrode 121. However, in the capacitor 205, the voltage Vth is set to be lower by at least (Vth). The semiconductor film 219 is n-type and has high conductivity, so the threshold voltage is negative. The potential of the semiconductor film 219 (in other words, the potential of the capacitance line 115) shifts. The maximum value that the pixel electrode 121 can take is determined according to the amount of shift in the threshold voltage of the pixel electrode 121 in the negative direction. Therefore, the threshold voltage of the capacitor 205 can be increased. When the potential of the capacitance line 115 is a large negative value, the potential of the capacitance line 115 is higher than the potential of the pixel electrode 121. can be done.

[0182] As in this embodiment, the semiconductor film 219 which is one electrode of the capacitor element 205 is made n-type. By increasing the conductivity, the threshold voltage can be shifted in the negative direction. Therefore, compared with the capacitor 105 of the first embodiment, the capacitor 205 is operated Therefore, in this embodiment, the range of potentials required for the capacitor element 205 can be widened. This is preferable because the capacitor element 205 can be operated stably at all times during the period in which the capacitor element 205 is operated. I wish.

[0183] In addition, the semiconductor film 219 included in the capacitor element 205 is n-type and has high conductivity. Even if the planar area of ​​the capacitor 205 is reduced, a sufficient charge capacity can be obtained. The oxide semiconductor constituting the semiconductor film 9 has a visible light transmittance of 80 to 90%. 9 is reduced in area, and a region where the semiconductor film 219 is not formed is provided in the pixel. This can increase the transmittance of light emitted from a light source such as a desk lamp.

[0184] <Method for manufacturing semiconductor device> Next, a method for manufacturing an element portion provided over a substrate 102 shown in this embodiment will be described with reference to FIG. 11 and 12.

[0185] First, the scanning lines 107, the capacitance lines 115, and the gate electrodes 627 are formed on the substrate 102. , a gate insulating film 1 is formed on the substrate 102, the scanning line 107, the capacitance line 115, and the gate electrode 627. 27 is formed, and a semiconductor film 111, a semiconductor film 119, and and a semiconductor film 631 is formed, and an opening 123 reaching the capacitance line 115 is formed in the insulating film. After forming the gate insulating film 127, the signal line 109, the conductive film 113, the conductive film 125, the source The electrode 629 and the drain electrode 633 are formed. Next, the gate insulating film 127, the semiconductor film 1 11, the semiconductor film 119 and the semiconductor film 631, the signal line 109, the conductive film 113, the conductive film 125, an insulating film 128 is formed on the source electrode 629 and the drain electrode 633, and an insulating film 1 An insulating film 130 is formed on the substrate 28 (see FIG. 11(A)). This can be done with reference to the first embodiment.

[0186] Next, a mask is formed on at least a region of the insulating film 130 that overlaps with the semiconductor film 119, The mask is used to process the insulating film 228 and the insulating film 230, and the semiconductor film 1 19 is exposed (see FIG. 11(B)). The mask is used in the photolithography process. The resist mask formed by the above method can be used, and the processing can be performed by dry etching and wet etching. This can be done by one or both of wet etching and etching.

[0187] Next, an insulating film 233 is formed on the exposed region of the semiconductor film 119 and on the insulating film 230. Then, an insulating film 236 is formed on the insulating film 233 (see FIG. 12(A)). The insulating film 236 is the same as the insulating film 133 described in the first embodiment. The insulating film is the same as the insulating film 136 described in the first embodiment. After forming the insulating film 233, a heat treatment is performed in a state where the insulating film 233 is in contact with the semiconductor film 119. The steps up to this point can also be carried out by referring to the first embodiment.

[0188] The insulating film 233 formed of a nitride insulating film is formed by a plasma CVD method or a sputtering method. When the semiconductor film 119 is formed, the semiconductor film 119 is exposed to plasma, and oxygen vacancies are generated in the semiconductor film 119. In addition, the semiconductor film 119 and the insulating film 233 formed of a nitride insulating film are in contact with each other. Nitrogen and / or hydrogen move from the insulating film 233 to the semiconductor film 119. When hydrogen contained in the insulating film 23 enters, electrons, which act as carriers, are generated. 2 is a nitride insulating film, and heat treatment is performed in a state where the insulating film 232 is in contact with the semiconductor film 119. In this way, nitrogen and / or hydrogen contained in the nitride insulating film can be moved to the semiconductor film 119. When hydrogen contained in the insulating film 233 enters the oxygen vacancy, electrons, which act as carriers, are generated. As a result, the conductivity of the semiconductor film 119 increases, and the semiconductor film 119 becomes an n-type semiconductor film 219. The semiconductor film 219 is a light-transmitting film made of a metal oxide having conductive properties. The semiconductor film 219 has higher conductivity than the semiconductor film 111.

[0189] Next, the conductive film 11 is formed on the insulating film 228, the insulating film 230, the insulating film 233, and the insulating film 236. 3, an opening 117 (see FIG. 9) is formed, and insulating films 229, 231, and The pixel electrode 232 and the insulating film 237 are formed, and the pixel electrode 232 is in contact with the conductive film 113 through the opening 117. The electrode 221 is formed (see FIG. 12(B)). This can be done with reference to form 1.

[0190] Through the above steps, the semiconductor device of this embodiment mode can be manufactured.

[0191] <Modification> In the semiconductor device according to one embodiment of the present invention, the structure of the capacitor can be changed as appropriate. A specific example of this structure will be described with reference to FIG. 13. Note that, here, the same structure as in FIGS. 9 and 1 will be described. Only the capacitive element 245, which is different from the capacitive element 105 described in .0, will be described.

[0192] The semiconductor film 219 is made n-type, and the gate insulating film 227 is nitrided to increase the conductivity. The insulating film 225 and the insulating film 226 are stacked layers. In the region where the semiconductor film 219 is provided, only the insulating film 225, which is a nitride insulating film, is provided. By adopting such a structure, the nitride insulating film, which is the insulating film 225, is formed on the lower surface of the semiconductor film 219. This makes the semiconductor film 219 n-type, and the conductivity can be increased. In this case, the dielectric film of the capacitance element 245 is made up of the insulating film 129, the insulating film 131, the insulating film 132, and The insulating film 225 and the insulating film 226 are the gate insulating film 127. An applicable insulating film can be used as appropriate. The insulating film 225 is an insulating film similar to the insulating film 132. In order to achieve this configuration, the insulating film 22 may be formed as appropriate with reference to the first embodiment. 13, the insulating film 129 and the insulating film 131 can be formed. Since etching is not performed, it is possible to prevent the thickness of the semiconductor film 219 from decreasing. Compared with the semiconductor device shown in FIGS. 9 and 10, the yield is improved.

[0193] In the structure shown in FIG. 13, the upper surface of the semiconductor film 219 is in contact with the insulating film 132. That is, in the insulating film 129 and the insulating film 131 shown in FIG. The area in contact with the film 219 may be removed. In this case, the dielectric film of the capacitance element 245 is an insulating film. The upper and lower surfaces of the semiconductor film 219 are in contact with the nitride insulating film 132 and the insulating film 137. By using this configuration, the semiconductor film 21 can be formed more efficiently and sufficiently than when only one side is in contact with the nitride insulating film. 9 can be made n-type to increase conductivity.

[0194] As described above, one electrode of the capacitor element is formed of the same material as the semiconductor film included in the transistor. By using the semiconductor film formed in the process, the aperture ratio can be increased, typically 55% or more. Preferably, the capacitance can be increased to 60% or more, and the capacitance can be increased. As a result, a semiconductor device with excellent display quality can be obtained. It is possible.

[0195] In addition, a semiconductor film formed using an oxide semiconductor and included in a transistor may have an oxygen deficiency. Since the loss is reduced and impurities such as hydrogen are reduced, the semiconductor according to one embodiment of the present invention The resulting device is a semiconductor device with good electrical properties.

[0196] The configurations shown in this embodiment may be applied to the configurations shown in other embodiments and their modifications. They can be used in any suitable combination.

[0197] (Embodiment 3) This embodiment describes a semiconductor device according to one embodiment of the present invention, which has a structure different from that of the above embodiment. The semiconductor device will be described with reference to the drawings. In this embodiment, a liquid crystal display device will be used as an example. In addition, the semiconductor device described in this embodiment will be described. The device is different from the above embodiment in the semiconductor film included in the capacitor element. In the semiconductor device described in the embodiment, the same as the semiconductor device described in the above embodiment The above embodiment modes can be referred to for the configuration.

[0198] <Configuration of semiconductor device> Specific configuration of a pixel 301 provided in a pixel portion of a liquid crystal display device described in this embodiment An example will be described. A top view of a pixel 301 is shown in FIG. 14. The pixel 301 shown in FIG. 14 has the following features: The pixel 301 includes a capacitor element 305, which is connected to the capacitor line 115 and the signal line 10. The capacitor element 305 is provided in the region surrounded by the conductive film 9. The capacitor element 305 is electrically connected to the capacitor line 115 through the capacitor 125. The semiconductor film 319 is formed using a material having a higher conductivity than the semiconductor film 111, and the pixel electrode The electrode 121 and the insulating film formed on the transistor 103 as a dielectric film (shown in FIG. 14) The semiconductor film 319, the pixel electrode 121, and the dielectric film are each Since the capacitor 305 has a light-transmitting property, the capacitor 305 has a light-transmitting property.

[0199] The conductivity of the semiconductor film 319 is set to 10 S / cm or more and 1000 S / cm or less, preferably 10 0 S / cm or more and 1000 S / cm or less.

[0200] In this way, the semiconductor film 319 has light-transmitting properties. Therefore, it is possible to increase the aperture ratio and, typically, % or more, preferably 60% or more, and the charge capacity can be increased. As a result, a semiconductor device with excellent display quality can be obtained. In addition, since the semiconductor film 319 included in the capacitor 305 is n-type and has high conductivity, The semiconductor film 319 can also be said to be a conductive film. Since the body film 319 has high conductivity, sufficient charge capacity can be obtained even if the planar area of ​​the capacitance element 305 is reduced. The oxide semiconductor constituting the semiconductor film 319 has a light transmittance of 80 to 90%. Since the area of ​​the semiconductor film 319 is 0%, the area of ​​the semiconductor film 319 is reduced. By providing an area where no light is visible, the transmittance of light emitted from a light source such as a backlight is increased. It is possible.

[0201] Next, the dashed lines A1-A2, B1-B2, and C1-C2 in FIG. 1A and 1B are cross sections of transistors provided between the transistors and in the scanning line driver circuit 104 (see FIG. 1A). 15. Here, a top view of the scanning line driver circuit 104 is omitted, and the scanning line A cross-sectional view of the driving circuit 104 is shown in D1-D2. A cross-sectional view of a transistor to be provided is shown, and the transistor is connected to the signal line driver circuit 106. It can be established.

[0202] The cross-sectional structure of the pixel 301 is as follows: A gate electrode of a transistor 103 is formed on a substrate 102. A scanning line 107 including a gate electrode is provided. A gate insulating film 127 is provided on the scanning line 107. The semiconductor film 111 is formed on the gate insulating film 127 in a region overlapping with the scanning line 107. A semiconductor film 319 is provided on the gate insulating film 127. The signal line 111 includes the source electrode of the transistor 103 and the gate insulating film 127. 109 and a conductive film 113 including a drain electrode of the transistor 103. In addition, a capacitance line 115 is provided on the gate insulating film 127 and the semiconductor film 319. On the insulating film 127, on the signal line 109, on the semiconductor film 111, on the conductive film 113, and on the semiconductor film 319 An insulating film 129 which functions as a protective insulating film for the transistor 103 is formed on the capacitor line 115. An insulating film 131, an insulating film 132, and an insulating film 137 are provided. An opening 117 reaching the conductive film 113 is provided in the insulating film 131, the insulating film 132, and the insulating film 137. A pixel electrode 121 is provided on the opening 117 and the insulating film 137 .

[0203] In this configuration, one of the pair of electrodes of the capacitor 305 is n-type, and the semiconductor film The other electrode of the pair of electrodes is a pixel electrode. The dielectric film provided between the pair of electrodes is an insulating film 129, an insulating film 131, These are the insulating film 132 and the insulating film 137 .

[0204] The semiconductor film 319 can be formed using an oxide semiconductor that can be used for the semiconductor film 111. Since the semiconductor film 319 can be formed at the same time as the semiconductor film 111 is formed, The semiconductor film 319 contains a metal element of the oxide semiconductor that constitutes the semiconductor film 111. The film 319 preferably has a higher conductivity than the semiconductor film 111, thereby increasing the conductivity. Specifically, the semiconductor film 319 preferably contains an element (dopant) that causes the semiconductor film 319 to As dopants, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, The semiconductor film 319 contains one or more elements selected from the group consisting of tin, antimony, and rare gas elements. The dopant concentration in 19 atoms / cm 3 More than 1×10 22 atom s / cm 3 By doing so, the conductivity of the semiconductor film 319 is preferably is 10 S / cm or more and 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less cm or less, and the semiconductor film 319 can be used sufficiently as one electrode of the capacitor 305. The semiconductor film 319 has a region with higher conductivity than the semiconductor film 111. In this structure, at least the region of the semiconductor film 319 that is in contact with the insulating film 132 The conductivity of the semiconductor film 111 is higher than that of the region in contact with the insulating film 129. 19 is n-type because it contains the above element (dopant) and has high conductivity. It can also be said to be a membrane that

[0205] <Method for manufacturing semiconductor device> Next, a method for manufacturing an element portion provided over a substrate 102 shown in this embodiment will be described with reference to FIG. 16 and 17.

[0206] First, the scanning lines 107, the capacitance lines 115, and the gate electrodes 627 are formed on the substrate 102. The gate insulating film 12 is formed on the substrate 102, the scanning line 107, the capacitance line 115, and the gate electrode 627. 7, an insulating film 126 is formed on the insulating film 126, and the semiconductor film 111 and the semiconductor A semiconductor film 631 is formed in a region overlapping with the gate electrode 627. (See FIG. 16(A)). The steps up to this point can be performed with reference to the first embodiment. This can be done.

[0207] Next, a dopant is added to the semiconductor film 119 to form a semiconductor film 319, and then an insulating film 12 6, an opening 123 reaching the capacitance line 115 is formed, and a gate insulating film 127 is formed. A signal line 109 including the source electrode of the transistor 103, a drain electrode of the transistor 103 a conductive film 113 including the semiconductor film 319 and a conductive film 125 electrically connecting the semiconductor film 319 and the capacitor line 115; In addition, a source electrode 629 and a drain electrode 633 are formed (see FIG. 16(B)). reference.).

[0208] The dopant is added to the semiconductor film 119 by masking the region other than the semiconductor film 119. By using the mask, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, in One or more dopants selected from the group consisting of tungsten, tin, antimony and rare gas elements are implanted by ion implantation. The addition is performed by ion implantation or ion doping. Instead of the above method, the semiconductor film 119 is exposed to plasma containing the dopant. After the dopant is added, a heat treatment may be performed. The heat treatment is a heat treatment for dehydrogenating or dehydrating the semiconductor film 111 and the semiconductor film 119. This can be done appropriately by referring to the details of the process.

[0209] The process of adding the dopant is performed on the signal line 109, the conductive film 113, the conductive film 125, and the solenoid. This may be done after forming the source electrode 629 and the drain electrode 633. The conductive film 319 is doped in the area in contact with the signal line 109, the conductive film 113, and the conductive film 125. is not added.

[0210] Next, the semiconductor film 111, the semiconductor film 319, the semiconductor film 631, the signal line 109, the conductive film 1 13, the conductive film 125, the source electrode 629, the drain electrode 633, and the gate insulating film An insulating film 128 is formed on the insulating film 127, an insulating film 130 is formed on the insulating film 128, and the insulating film 13 An insulating film 133 is formed on the insulating film 130. An insulating film 136 is formed on the insulating film 133 (FIG. 1 7(A).) This step can be performed with reference to the first embodiment.

[0211] Next, the conductive film 113 of the insulating film 128, the insulating film 130, the insulating film 133, and the insulating film 136 is An opening 117 (see FIG. 14) reaching the conductive film 113 is formed in the region overlapping with the conductive film 113. Next, insulating films 129, 131, 132, and 137 are formed on the insulating film 129. A pixel electrode 121 is formed in contact with the conductive film 113 through the opening 117 (see FIG. 17(B)). (See also Embodiment 1.) This step can also be carried out by referring to Embodiment 1.

[0212] Through the above steps, the semiconductor device of this embodiment mode can be manufactured.

[0213] As described above, one electrode of the capacitor element is formed of the same material as the semiconductor film included in the transistor. By using a semiconductor film formed in the process, the aperture ratio can be increased while the charge capacity can be increased. As a result, a semiconductor device having a high display quality can be manufactured. The device can be obtained.

[0214] In addition, a semiconductor film formed using an oxide semiconductor and included in a transistor may have an oxygen deficiency. Since the loss is reduced and impurities such as hydrogen are reduced, the semiconductor according to one embodiment of the present invention The resulting device is a semiconductor device with good electrical properties.

[0215] The configurations shown in this embodiment may be applied to the configurations shown in other embodiments and their modifications. They can be used in any suitable combination.

[0216] (Fourth embodiment) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is and a capacitor element. Reveal.

[0217] The oxide semiconductor may be an amorphous oxide semiconductor, a single-crystal oxide semiconductor, or a polycrystalline oxide semiconductor. In addition to conductors, oxide semiconductors with crystalline parts (C Axis Aligned Crys Consists of CaCl3Oxide Semiconductor (CAAC-OS) The CAAC-OS film is preferably an oxide semiconductor film having a plurality of crystal parts. Most of the crystals are small enough to fit inside a cube with a side length of less than 100 nm. Therefore, the crystal parts contained in the CAAC-OS film have a side length of less than 10 nm and less than 5 nm. The CAAC-OS film is a microstructure with a size of less than 3 nm. It has the advantage of having a lower density of defect states than a crystalline oxide semiconductor film. The membrane will now be described in detail.

[0218] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed under a tron ​​microscope, clear boundaries between the crystalline parts are observed. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0219] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When observed, it can be confirmed that metal atoms are arranged in layers in the crystalline part. Each layer of the CAAC-OS film is formed on a surface (also called a surface to be formed) or on a concave surface of the upper surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0220] On the other hand, the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystalline region. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0221] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that this is the case.

[0222] X-ray diffraction (XRD) of the CAAC-OS film When structural analysis is performed using this device, for example, CAAC-OS with InGaZnO4 crystals can be seen. In the out-of-plane analysis of the film, the diffraction angle (2θ) peaks around 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis faces the surface on which the film is formed or the upper surface. It can be seen that the direction is roughly vertical.

[0223] On the other hand, the in-p X-rays incident on the CAAC-OS film are perpendicular to the c-axis. In the Lane analysis, a peak may appear around 2θ of 56°. The crystal structure of InGaZnO4 is composed of a single crystal of InGaZnO4. In the case of a nitride semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is the axis (φ axis). When the sample is rotated and analyzed (φ scan), a crystal plane equivalent to the (110) plane is detected. In contrast, in the case of the CAAC-OS film, six peaks are observed, which are assigned to 2θ. Even when the φ is fixed at around 56° and scanned, no clear peak appears.

[0224] From the above, it can be concluded that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is a plane parallel to the ab plane of the crystal.

[0225] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization treatment such as a heat treatment. As described above, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is to be formed. Therefore, for example, in the CAAC-OS film, When the shape is changed by etching, the c-axis of the crystal is aligned with the CAAC-OS film. It may not be parallel to the normal vector of the face or top surface.

[0226] Furthermore, the crystallinity of the CAAC-OS film may not be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface to be formed. When impurities are added to the AC-OS film, the crystallinity of the region where the impurities are added changes, and the Regions of differing crystallinity may be formed.

[0227] In addition, the out-of-plane structure of the CAAC-OS film with InGaZnO4 crystals In the analysis by the NMR method, in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in part of the CAAC-OS film. The CAAC-OS film contains crystals that do not have crystalline structure. It is preferable that the peak is exhibited at 2θ of about 36° and that the peak is not exhibited at 2θ of about 36°.

[0228] There are three methods for forming the CAAC-OS.

[0229] In the first method, an oxide semiconductor film is formed at a film formation temperature of 100° C. or more and 450° C. or less. Therefore, the c-axis of the crystal part included in the oxide semiconductor film is aligned with the normal vector of the surface where the film is formed or the This is a method for forming crystals aligned in a direction parallel to the normal vector.

[0230] The second method is to form a thin oxide semiconductor film and then heat it at a temperature of 200°C to 700°C. By the heat treatment, the c-axis of the crystal part included in the oxide semiconductor film is aligned with the normal vector of the surface where the oxide semiconductor film is formed. This is a method for forming crystals aligned in a direction parallel to the normal vector of the crystal or surface.

[0231] The third method is to deposit a thin oxide semiconductor film as a first layer, and then heat the film at 200°C or higher for 700°C. Then, a second oxide semiconductor film is formed. The c-axis of the crystalline part contained in the film is parallel to the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystals aligned in a specific direction.

[0232] A transistor using CAAC-OS for an oxide semiconductor film can be irradiated with visible light or ultraviolet light. Therefore, the change in electrical characteristics due to the application of CAAC-OS to the oxide semiconductor film is small. The transistor has good reliability.

[0233] In addition, CAAC-OS uses a polycrystalline oxide semiconductor sputtering target. It is preferable to form the film by sputtering. When ions collide with the target, the crystalline regions in the sputtering target are transformed from the ab plane to The cleavage is performed to obtain flat or pellet-shaped sputtered particles with a surface parallel to the ab plane. In this case, the plate-shaped or pellet-shaped sputtered particles may peel off. By reaching the deposition surface while maintaining its crystalline state, CAAC-OS can be deposited. Cut.

[0234] In addition, the following conditions are preferably applied to form a CAAC-OS film.

[0235] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas can be reduced. A deposition gas having a temperature of −80° C. or lower, preferably −100° C. or lower is used.

[0236] In addition, by increasing the heating temperature of the surface to be film-formed (for example, the substrate heating temperature) during film formation, Specifically, the temperature of the surface on which the film is to be formed is The temperature is set to 100°C or higher and 740°C or lower, preferably 150°C or higher and 500°C or lower. By increasing the temperature of the surface during film formation, plate-shaped or pellet-shaped sputtering particles When it reaches the surface on which the film is to be formed, migration occurs on the surface on which the film is to be formed, resulting in sputtering. The flat surface of the particle adheres to the surface on which the film is to be formed.

[0237] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition can be reduced. The oxygen ratio in the film forming gas is 30% by volume or more, preferably 100% by volume or more. Expressed as volume %.

[0238] As an example of a sputtering target, an In-Ga-Zn-O compound target is used. The details are shown below.

[0239] InO X powder, GaOY Powder and ZnO Z The powders are mixed in a specified number of moles and then pressurized. By heat treatment at a temperature between 1000℃ and 1500℃, polycrystalline In-Ga The pressure treatment is performed while cooling (or allowing to cool). The heating may be carried out while heating, and X, Y, and Z are any positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z Powder , 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2 The type of powder and the molar ratio of the powder to be mixed depend on the sputtering target to be prepared. This can be changed as appropriate depending on the kit.

[0240] The oxide semiconductor film may have a structure in which a plurality of oxide semiconductor films are stacked. The oxide semiconductor film is a stack of a first oxide semiconductor film and a second oxide semiconductor film. The oxide semiconductor film and the second oxide semiconductor film may be made of metal oxides having different atomic ratios. For example, the first oxide semiconductor film may be formed of an oxide containing two kinds of metals or an oxide containing three kinds of metals. The first oxide is formed on the second oxide semiconductor film by using one of the oxides containing four kinds of metals. Semiconductor film and oxide containing two different metals, oxide containing three different metals, oxide containing four different metals An oxide containing the following may also be used.

[0241] The oxide semiconductor film has a two-layer structure, consisting of a first oxide semiconductor film and a second oxide semiconductor film. The elements may be the same, but the atomic ratio of the two may be different. The atomic ratio of In:Ga:Zn is set to 3:1:2, and the atomic ratio of the second oxide semiconductor film is set to In. :It may be In:Ga:Zn = 1:1:1. Also, the atomic ratio of the first oxide semiconductor film is In :Ga:Zn = 2:1:3, and the atomic ratio of the second oxide semiconductor film is In:Ga:Zn = 1:3:2. Note that the atomic ratio of each oxide semiconductor film includes a variation of plus or minus 20% of the above atomic ratio as an error.

[0242] At this time, among the first oxide semiconductor film and the second oxide semiconductor film, it is preferable that the atomic ratio of In and Ga in the oxide semiconductor film on the side closer to the gate electrode ( channel side) is In ≥ Ga. Also the atomic ratio of In and Ga in the oxide semiconductor film on the side farther from the gate electrode (back channel side) is In < Ga. With these laminated structures, a transistor with a high field-effect mobility can be fabricated. On the other hand, by setting the atomic ratio of In and Ga in the oxide semiconductor film on the side closer to the gate electrode (channel side) to In < Ga and the atomic ratio of In and G a in the oxide semiconductor film on the back channel side to In ≥ Ga, the variation amount of the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0243] The first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:2. The substrate temperature is set to room temperature, and it can be formed using argon or a mixed gas of argon and oxygen as the sputtering gas. The second oxide semiconductor film with an atomic ratio of In:Ga:Zn = 3:1:2 can be formed using an oxide target with an atomic ratio of In:Ga:Zn = 3:1:2 and the same method as for the first oxide semiconductor film.

[0244] ​​​​In addition, the oxide semiconductor film has a three-layer structure, and the first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film are The oxide semiconductor film may contain the same elements but have different atomic ratios. The three-layer structure will be described with reference to FIG.

[0245] The transistor illustrated in FIG. 18 includes a first oxide semiconductor film 199a, a second oxide semiconductor film a third oxide semiconductor film 199b and a third oxide semiconductor film 199c are stacked in this order from the gate insulating film 127 side. The materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are The fee is InM1 x Zn y O z (x≧1, y>1, z>0, M1=Ga, Hf, etc.) However, the first oxide semiconductor film 199a and the third oxide semiconductor film 199b are made of a material that can be used. When Ga is included in the material that makes up 99c, the ratio of Ga included is high, specifically I nM 1X Zn Y O Z If X exceeds 10, there is a risk of powder being generated during film formation. Yes, it is inappropriate.

[0246] The material constituting the second oxide semiconductor film 199b is InM2 x Zn y O z (x≧ Use materials that can be expressed as: 1, y≧x, z>0, M2=Ga, Sn, etc.

[0247] The conduction band of the first oxide semiconductor film 199a and the conduction band of the third oxide semiconductor film 199c are In comparison, the conduction band of the second oxide semiconductor film 199b is a well-type oxide semiconductor film having a depth from the vacuum level that is the deepest. Materials for the first, second, and third oxide semiconductor films are selected as appropriate to form the structure.

[0248] In an oxide semiconductor film, silicon and carbon, which are elements of Group 14, act as donors. Therefore, when silicon or carbon is contained in the oxide semiconductor film, the oxide semiconductor film Therefore, the silicon and carbon contained in each oxide semiconductor film are converted to n-type. The concentration of 18 / cm 3 Less than or equal to 3 x 10 17 / cm 3 The following applies: In order to prevent a large amount of Group 14 elements from being mixed into the second oxide semiconductor film 199b, The second oxide semiconductor film 199a and the third oxide semiconductor film 199c are formed in the second oxide semiconductor film 199b, which serves as a carrier path. It is preferable that the first oxide semiconductor film 199b is sandwiched between or surrounded by the first oxide semiconductor film 199b. The semiconductor film 199a and the third oxide semiconductor film 199c are formed of a group 14 element such as silicon or carbon. The oxide semiconductor film 199b can also be called a barrier film that prevents elements from entering the second oxide semiconductor film 199b.

[0249] For example, the atomic ratio of the first oxide semiconductor film 199a is In:Ga:Zn=1:3:2. The atomic ratio of the second oxide semiconductor film 199b is In:Ga:Zn=3:1:2. The atomic ratio of the oxide semiconductor film 199c in No. 3 may be In:Ga:Zn=1:1:1. Note that the atomic ratio of the third oxide semiconductor film 199c is In:Ga:Zn=1:1:1. It can be formed by sputtering using an oxide target.

[0250] Alternatively, the first oxide semiconductor film 199a may be formed of a compound semiconductor having an atomic ratio of In:Ga:Zn=1:3:2. and the second oxide semiconductor film 199b is an oxide semiconductor film having an atomic ratio of In:Ga: an oxide semiconductor film having a composition of Zn=1:1:1 or In:Ga:Zn=1:3:2; The oxide semiconductor film 199c is an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:3:2. It may also have a three-layer structure with a membrane.

[0251] The first to third oxide semiconductor films 199a to 199c contain the same elements. Therefore, the second oxide semiconductor film 199b has a thin film at the interface with the first oxide semiconductor film 199a. In detail, the defect level (trap level) is than the defect states at the interface between the gate insulating film 127 and the first oxide semiconductor film 199a. Therefore, by stacking oxide semiconductor films as described above, This can reduce the amount of variation in threshold voltage due to deterioration over time or due to reliability testing.

[0252] In addition, the conduction band of the first oxide semiconductor film 199a and the conduction band of the third oxide semiconductor film 199c The conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level compared to the conduction band. The materials of the first, second, and third oxide semiconductor films are appropriately selected so as to form a well structure. By doing so, it is possible to increase the field effect mobility of the transistor and This can reduce the amount of variation in threshold voltage due to deterioration over time of the transistor or due to reliability testing.

[0253] In addition, the first to third oxide semiconductor films 199a to 199c are formed of crystalline oxide semiconductor films. Different oxide semiconductors may be used. For example, a single-crystal oxide semiconductor, a polycrystalline oxide semiconductor, etc. A conductor, an amorphous oxide semiconductor, and a CAAC-OS may be combined as appropriate. In addition, any one of the first to third oxide semiconductor films 199a to 199c When an amorphous oxide semiconductor is used, the internal stress and external stress of the oxide semiconductor film are alleviated. , the variation in transistor characteristics is reduced, and the deterioration of transistors over time and reliability tests are also This can reduce the amount of variation in threshold voltage.

[0254] At least the second oxide semiconductor film 199b which can be a channel formation region is formed of a CAA The oxide semiconductor film on the back channel side is preferably C-OS. In this embodiment, the third oxide semiconductor film 199c is amorphous or CAAC-OS. By adopting such a structure, it is possible to prevent deterioration of the transistor over time and the deterioration of the transistor due to reliability tests. The amount of variation in threshold voltage can be reduced.

[0255] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0256] (Embodiment 5) A semiconductor device having a display function using the transistor and the capacitor described as an example in the above embodiment A semiconductor device (also called a display device) can be manufactured. A part or the whole of the operating circuit is formed on the same substrate as the pixel section to form a system on panel. In this embodiment, the transistors exemplified in the above embodiments can be used. An example of the display device will be described with reference to FIGS. 19 to 21. 9(B) is a cross-sectional view showing the cross-sectional structure of the portion indicated by the dashed line MN in FIG. 0, only a portion of the structure of the pixel section is shown.

[0257] In FIG. 19A, a pixel portion 902 provided on a first substrate 901 is surrounded by a A sealant 905 is provided, and the substrate is sealed with a second substrate 906. ) is different from the region surrounded by the sealing material 905 on the first substrate 901. A signal line driver formed of a single crystal semiconductor or a polycrystalline semiconductor on a separately prepared substrate is formed in the region where the signal line driver is formed. A signal line driver circuit 903 and a scanning line driver circuit 904 are mounted on the display panel. 3. Various signals and potentials given to the scanning line driver circuit 904 or the pixel portion 902 are transmitted through the FPC (Flexible printed circuit) 918a, FPC 918b is being supplied.

[0258] 19B and 19C, a pixel portion 90 provided on a first substrate 901 A sealant 905 is provided so as to surround the scanning line driver circuit 904. A second substrate 906 is provided on the pixel portion 902 and the scanning line driver circuit 904. The pixel portion 902 and the scanning line driver circuit 904 are formed by the first substrate 901 and the sealing material 905. The display element is sealed with the second substrate 906. In (C), the region surrounded by the sealing material 905 on the first substrate 901 is In different regions, signals formed with single crystal semiconductors or polycrystalline semiconductors on separately prepared substrates are 19B and 19C, the signal line Various signals and voltages are applied to the driver circuit 903, the scanning line driver circuit 904, or the pixel portion 902. The position is supplied by FPC918.

[0259] In addition, in FIGS. 19B and 19C, a signal line driver circuit 903 is separately formed. 9, an example in which the scanning line is mounted on the first substrate 901 is shown, but the present invention is not limited to this configuration. The driver circuit may be formed separately and mounted, or may be mounted as part of the signal line driver circuit or the scanning line driver circuit. Only a part of it may be formed separately and mounted.

[0260] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG (C Hip On Glass method, wire bonding method, or TAB (Tape On Glass) method The Automated Bonding method can be used. This is an example in which a signal line driver circuit 903 and a scanning line driver circuit 904 are implemented by the COG method. FIG. 19(B) shows an example in which a signal line driver circuit 903 is mounted by the COG method. C) is an example in which the signal line driver circuit 903 is mounted by the TAB method.

[0261] The display device includes a panel in which a display element is sealed, and a controller for the panel. This includes modules in which ICs, etc., including lasers, are mounted.

[0262] In this specification, the term "display device" refers to an image display device or a display device. Moreover, it can function as a light source (including a lighting device) instead of a display device. , a connector, such as a module with an FPC or TCP attached, A module with a printed wiring board or a display element is mounted with an IC (integrated circuit) by the COG method. The display device also includes all modules in which the display device (circuit) is directly mounted.

[0263] In addition, the pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described in the above embodiment can be applied to this.

[0264] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, and the like. A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by the light source, specifically inorganic EL (Electroluminescent) Luminescence elements, organic EL elements, etc. Also, electronic ink, etc. A display medium whose contrast changes due to electrical effects can also be used. 1 shows an example of a liquid crystal display device using a liquid crystal element as a display element.

[0265] The liquid crystal display device shown in FIG. 20 is a vertical electric field type liquid crystal display device. The connecting terminal electrode 915 and the terminal electrode 916 are 16 is electrically connected to the terminal of the FPC 918 via the anisotropic conductive material 919. do.

[0266] The connection terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 are formed of the same conductive film as the source and drain electrodes of the transistors 910 and 911. are.

[0267] In addition, a pixel portion 902 and a scanning line driver circuit 904 provided on a first substrate 901 are In FIG. 20, the pixel portion 902 includes a transistor 910. and a transistor 911 included in the scan line driver circuit 904. The insulating film 129 and the insulating film 131 shown in Embodiment 1 are formed over the capacitor 910 and the transistor 911. An insulating film 924 corresponding to the insulating film 132 is provided. An insulating film 934 corresponding to the insulating film 137 described in Embodiment 1 is provided. The insulating film 923 is an insulating film that functions as a base film.

[0268] In this embodiment, the transistor 910 is the transistor described in any of Embodiments 1 to 3. The transistor provided in the pixel shown in FIG. 1, the transistor provided in the scanning line driver circuit shown in any of the above-described Embodiments 1 to 3 In addition, the oxide semiconductor film 927, the insulating film 924, and the insulating film A capacitor 936 is formed using the first electrode 934 and the first electrode 930. The body membrane 927 is electrically connected to a capacitance wiring 929 via an electrode 928. The electrode 928 is The source and drain electrodes of the transistors 910 and 911 are made of the same material. The capacitor wiring 929 is formed in the same process as the transistor 910 and the transistor 911. The gate electrode of the capacitor element 936 is formed of the same material and in the same process. Although the capacitive element shown in the first embodiment is illustrated, the capacitive element shown in the other embodiments may also be used as appropriate. can be used.

[0269] The transistor 910 provided in the pixel portion 902 is electrically connected to a display element. The display element is not particularly limited as long as it can display, and various display elements can be used. It can be used.

[0270] The liquid crystal element 913, which is a display element, includes a first electrode 930, a second electrode 931, and a liquid crystal layer. The liquid crystal layer 908 is sandwiched between insulating films 932 which function as alignment films. An insulating film 933 is provided on the second substrate 906 side. The first electrode 930 and the second electrode 931 are configured to overlap with each other via the liquid crystal layer 908. are.

[0271] The first electrode and the second electrode (pixel electrode, common electrode, counter electrode) that apply a voltage to the display element In this case, the direction of the light to be extracted, the location of the electrodes, and the pattern of the electrodes are The translucency or reflectivity can be selected depending on the turn structure.

[0272] The first electrode 930 and the second electrode 931 are the same as the pixel electrode 121 described in Embodiment 1. The above materials can be used appropriately.

[0273] The spacers 935 are columnar spacers obtained by selectively etching the insulating film. The distance between the first electrode 930 and the second electrode 931 (cell gap) is controlled by the It is to be noted that a spherical spacer may also be used.

[0274] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer Liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials can be in a cholesteric phase, smectic phase, cubic phase, or chromatic phase depending on the conditions. It shows an isotropic phase, an isotropic phase, etc.

[0275] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of the cholesteric liquid crystal is increased, the cholesteric phase transitions to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to improve the liquid crystal layer, a liquid crystal composition containing a chiral agent is used. is made of an organic resin, and the organic resin contains hydrogen or water, etc., Therefore, there is a risk that the electrical characteristics of the transistors in the semiconductor device may be deteriorated. By using a blue phase as the layer, it is possible to manufacture a semiconductor device according to one embodiment of the present invention without using an organic resin. Therefore, a highly reliable semiconductor device can be obtained.

[0276] The first substrate 901 and the second substrate 906 are fixed by a sealing material 925. The cooling material 925 may be an organic resin such as a thermosetting resin or a photosetting resin. The sealing material 925 is in contact with the insulating film 924. The sealing material 925 is the same as that shown in FIG. Equivalent to material 905.

[0277] The sealant 925 is provided on the insulating film 924. The insulating film 934 is The uppermost layer of the insulating film 924 is a nitride insulating film, and is provided inside the material 925. It is possible to prevent the intrusion of impurities such as hydrogen and water. For this reason, the insulating film 934 is provided inside the sealant 925, and the sealant is formed on the insulating film 924. By providing the insulating material 925, the intrusion of impurities such as hydrogen and water from the outside is suppressed, and the transistor Therefore, the fluctuation of the electrical characteristics of the first transistor 910 and the second transistor 911 can be suppressed.

[0278] In addition, in liquid crystal display devices, black matrices (light-shielding films), polarizing members, and phase difference members Optical members (optical substrates) such as anti-reflection members are provided as appropriate. Circularly polarized light produced by a retardation substrate may also be used. Either may be used.

[0279] In addition, since transistors are easily damaged by static electricity, etc., a protective circuit for protecting the drive circuit is It is preferable to provide a path. The protection circuit is preferably constructed using a non-linear element.

[0280] FIG. 21 shows the second electrode 906 provided on the substrate 906 in the liquid crystal display device shown in FIG. 31, a common connection portion (pad portion) for electrically connecting to the substrate 901 is formed on the substrate 901. show.

[0281] The common connection portion is disposed at a position overlapping the sealing material for bonding the substrate 901 and the substrate 906. and electrically connected to the second electrode 931 via conductive particles contained in the sealing material. Or, a common connection part is provided in a place where it does not overlap with the sealing material (excluding the pixel part), and the common connection A paste containing conductive particles is provided separately from the sealing material so as to overlap the connecting portion, forming a second electrode 93. 1 may be electrically connected to the

[0282] FIG. 21(A) is a cross-sectional view of the common connection portion, and corresponds to IJ in the top view shown in FIG. 21(B). Correct.

[0283] The common potential line 975 is provided on the gate insulating film 922 and is connected to the transistor 9 shown in FIG. 10. The source electrode 971 or the drain electrode 973 is fabricated using the same material and in the same process.

[0284] The common potential line 975 is covered with the insulating film 924 and the insulating film 934. The insulating film 934 has a plurality of openings at positions overlapping the common potential line 975. The transistor 910 is connected to one of the source electrode 971 and the drain electrode 973 of the transistor 910. The contact hole connecting to the electrode 930 is fabricated in the same process.

[0285] Furthermore, the common potential line 975 and the common electrode 977 are connected at the opening. is provided on the insulating film 934 and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is made from the same materials and using the same process.

[0286] In this way, the common connection portion is formed by the same manufacturing process as the switching element of the pixel portion 902. It can be manufactured.

[0287] The common electrode 977 is an electrode that comes into contact with the conductive particles contained in the sealing material, and is connected to the substrate 906 Electrical connection is made with the second electrode 931 of the first electrode 931 .

[0288] 21C, the common potential line 985 is connected to the gate of the transistor 910. The electrode may be made of the same material and in the same process as the electrode.

[0289] In the common connection portion shown in FIG. 21(C), the common potential line 985 is connected to the gate insulating film 922, The insulating film 922, the insulating film 924, and the insulating film 934 are provided below the insulating film 922, the insulating film 924, and the insulating film 934. The insulating film 934 has a plurality of openings at positions overlapping the common potential line 985. One of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930 The insulating film 924 and the insulating film 934 are etched in the same process as the contact holes connecting the After that, the gate insulating film 922 is selectively etched to form the insulating film.

[0290] In addition, the common potential line 985 and the common electrode 987 are connected at the opening. is provided on the insulating film 924 and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is made from the same materials and using the same process.

[0291] As described above, by using the transistor and the capacitor described in the above embodiment, It is possible to provide a semiconductor device having a capacitance element with an increased charge capacity while increasing the efficiency. As a result, a semiconductor device with excellent display quality can be obtained.

[0292] In addition, a semiconductor film formed using an oxide semiconductor and included in a transistor may have an oxygen deficiency. Since the loss is reduced and impurities such as hydrogen are reduced, the semiconductor according to one embodiment of the present invention The resulting device is a semiconductor device with good electrical properties.

[0293] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0294] (Sixth embodiment) A semiconductor device which is one embodiment of the present invention can be applied to various electronic devices (including game machines). The electronic equipment includes a television set (television or television receiver) (also called a monitor), computer monitors, digital cameras, digital video cameras , digital photo frames, mobile phones, portable game consoles, personal digital assistants, sound reproduction devices These electronic machines include gaming machines (pachinko machines, slot machines, etc.) and game cabinets. An example of the vessel is shown in Figure 22.

[0295] FIG. 22(A) shows a table 9000 having a display section. A display unit 9003 is built into the housing 9001, and images are displayed on the display unit 9003. It is possible to support the housing 9001 with four legs 9002. The housing 9001 also has a power cord 9005 for supplying power.

[0296] The semiconductor device described in any of the above embodiments can be used for the display portion 9003. Therefore, the display quality of the display portion 9003 can be improved.

[0297] The display unit 9003 has a touch input function. By touching the display button 9004 displayed on the screen with a finger or the like, the screen can be operated or information can be input. It can also communicate with other home appliances or control them, improving the image quality. It may also be used as a control device to control other home appliances by surface manipulation. If a semiconductor device having a sensor function is used, the display portion 9003 can have a touch input function. It is possible.

[0298] In addition, the screen of the display unit 9003 can be tilted relative to the floor by a hinge provided in the housing 9001. It can also be placed vertically and used as a television set. When a large screen television is installed, the free space becomes narrow, but the table If the display unit is built into the device, the space in the room can be used more effectively.

[0299] FIG. 22(B) shows a television device 9100. Television device 9100 The display unit 9103 is incorporated in the housing 9101, and the display unit 9103 displays images. In this example, the housing 9101 is supported by a stand 9105. The figure shows the configuration.

[0300] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by using the remote control operation device 9110. The channel and volume can be controlled by the -9109, and the information displayed on the display 9103 In addition, the remote control unit 9110 can be used to control the video. A display unit 9107 for displaying information output from the device 9110 may be provided.

[0301] A television device 9100 shown in FIG. 22(B) includes a receiver, a modem, and the like. The television device 9100 can receive general television broadcasts using a receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (sender to receiver) or two-way (between sender and receiver, or between receivers) It is also possible to carry out information communication.

[0302] The semiconductor device described in any of the above embodiments can be used for the display portions 9103 and 9107. Therefore, the display quality of the television device can be improved.

[0303] FIG. 22C shows a computer 9200, which includes a main body 9201, a housing 9202, a display unit 9203, and a display section 9204. 203, keyboard 9204, external connection port 9205, pointing device 920 6 and more.

[0304] The semiconductor device described in any of the above embodiments can be used for the display portion 9203. Therefore, the display quality of the computer 9200 can be improved.

[0305] Figures 23(A) and 23(B) show a tablet terminal that can be folded in half. ) is in an open state, and the tablet terminal includes a housing 9630, a display unit 9631a, a display part 9631b, a display mode changeover switch 9034, a power switch 9035, a power saving mode It has a mode changeover switch 9036, a fastener 9033, and an operation switch 9038.

[0306] The semiconductor device described in any of the above embodiments includes a display portion 9631a and a display portion 9631b. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0307] A part of the display portion 9631a can be used as a touch panel area 9632a. By touching the operation keys 9638, data can be input. In 31a, for example, half of the area has a display function only, and the other half Although the display area 96 has a touch panel function, the display area 96 is not limited to this configuration. The entire area of ​​the display unit 9 may have a touch panel function. The entire surface of 631a is displayed as a keyboard button to serve as a touch panel, and the display part 9631b is displayed. It can be used as a display screen.

[0308] In addition, in the display unit 9631b, as in the display unit 9631a, The area can be used as a touch panel area 9632b. Touch the area where the display switch button 9639 is displayed with your finger or a stylus. This allows keyboard buttons to be displayed on the display portion 9631b.

[0309] In addition, the touch panel area 9632a and the touch panel area 9632b are simultaneously You can also use touch input.

[0310] A display mode changeover switch 9034 is used to change the display orientation, such as portrait or landscape. You can switch between black and white and color display. The Switch 9036 detects external light during use using a light sensor built into the tablet device. The tablet device can optimize the display brightness according to the amount of light in the room. In addition to sensors, other detection devices such as gyros and acceleration sensors that detect tilt are also included. It may be built-in.

[0311] FIG. 23A shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The display quality may also differ. For example, one display panel may be able to display a higher resolution image than the other. It may also be used as a rule.

[0312] FIG. 23(B) shows the tablet terminal in a closed state, and the tablet terminal includes a housing 9630 and a solar cell 9631. 23B, the charge / discharge control circuit 96 As an example of 34, a configuration having a battery 9635 and a DC-DC converter 9636 is shown. This shows that.

[0313] In addition, since the tablet device can be folded in half, when not in use, the case 9630 is closed. Therefore, the display portions 9631a and 9631b can be protected. This makes it possible to provide a tablet device that is highly durable and reliable even for long-term use.

[0314] In addition, the tablet terminals shown in Figs. 23(A) and 23(B) can be used in various Functions that display information (still images, videos, text images, etc.), calendars, dates, or times The function to display information on the display unit, and the function to input or edit the information displayed on the display unit. It has input functions, functions to control processing using various software (programs), etc. It is possible.

[0315] The solar cell 9633 attached to the surface of the tablet terminal supplies power to the touch panel. The solar cell 9633 can be supplied to a display unit, a video signal processor, or the like. The battery 9635 can be efficiently charged by providing a battery charger on one or both sides of the housing 9630. The battery 9635 may be a lithium-ion battery. The use of such a device has the advantage of enabling miniaturization.

[0316] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 23(B) are shown in FIG. A block diagram is shown in Fig. 23(C) and will be explained. 635, DC-DC converter 9636, converter 9637, switches SW1 to SW3 , the display unit 9631, the battery 9635, the DC-DC converter 963 6. The converter 9637 and the switches SW1 to SW3 are configured to perform the charge / discharge control shown in FIG. 23(B). This corresponds to the circuit 9634.

[0317] First, an example of operation when power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell is converted into a voltage to charge the battery 9635. The CDC converter 9636 increases or decreases the voltage. When power is supplied from the solar cell 9633, switch SW1 is turned on and the converter The voltage is increased or decreased to the voltage required for the display unit 9631 by the voltage regulator 9637. When not displaying on the 9631, turn SW1 off, turn SW2 on, and turn off the battery. It is sufficient to configure it to charge the 9635.

[0318] The solar cell 9633 is shown as an example of a power generating means, but is not particularly limited thereto. , by other power generation means such as piezoelectric elements and thermoelectric conversion elements (Peltier elements) For example, the battery 9635 may be configured to be charged wirelessly (contactlessly). It can be combined with a non-contact power transmission module that transmits and receives power and charges, or with other charging methods. This may also be configured as follows.

[0319] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used. [Example]

[0320] In this example, the resistance of the oxide semiconductor film and the multilayer film is measured using FIGS. 24 and 25. I will explain.

[0321] First, the structure of the sample will be explained with reference to FIG.

[0322] FIG. 24A is a top view of Samples 1 to 4, and shows a cross-sectional view taken along dashed line A1-A2. 24(B), (C), and (D). Samples 1 to 4 have the same top view, and the cross-sectional view is The cross-sectional view of Sample 1 is shown in Figure 24(B), and the cross-sectional view of Sample 2 is shown in Figure 24(C). The cross-sectional view of the sample 1 is shown in FIG. 24(C), and the cross-sectional views of the sample 3 and the sample 4 are shown in FIG. 24(D). .

[0323] In the sample 1, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, conductive films 1907 and 1909 functioning as electrodes are provided on both ends of the oxide semiconductor film 1905. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with insulating films 1910 and 1911. The insulating films 1910 and 1911 are provided with openings 1913 and 1915. The conductive films 1907 and 1909 are exposed in the openings.

[0324] In the sample 2, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, conductive films 1907 and 1909 functioning as electrodes are provided on both ends of the oxide semiconductor film 1905. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with an insulating film 1911 . The insulating film 1911 has openings 1917 and 1919. In the openings, the conductive films 1907 and 1909 are exposed.

[0325] In the samples 3 and 4, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 19 An insulating film 1904 is formed on the insulating film 1903, and a multilayer film 1906 is formed on the insulating film 1904. Both ends of the multilayer film 1906 are covered with conductive films 1907 and 1909 that function as electrodes. The multilayer film 1906 and the conductive films 1907 and 1909 are covered with an insulating film 1911. 911 is provided with openings 1917 and 1919, , the conductive films 1907 and 1909 are exposed.

[0326] In this way, Samples 1 to 4 are obtained by forming a semiconductor layer on the oxide semiconductor film 1905 or the multilayer film 1906. The structure of the insulating film in contact with the oxide semiconductor film 1905 and the insulating film 1910 is different. In Sample 2, the oxide semiconductor film 1905 and the insulating film 1911 are in contact with each other. In Sample 3, In Sample 4, the multilayer film 1906 and the insulating film 1911 are in contact with each other.

[0327] Next, the method for preparing each sample will be described.

[0328] First, the method for preparing Sample 1 will be described.

[0329] On a glass substrate 1901, an insulating film 1903 was formed by plasma CVD to a thickness of 400 A silicon nitride film with a thickness of nm was deposited.

[0330] Next, on the insulating film 1903, an insulating film 1904 is formed by plasma CVD to a thickness of 50 A silicon oxynitride film with a thickness of nm was formed.

[0331] Next, a metal oxide target ( In:Ga:Zn=1:1:1) and a 35 nm thick IGZ was deposited by sputtering. Then, an O film was formed. Then, etching was performed using a mask formed by photolithography. An oxide semiconductor film 1905 was formed by performing etching treatment.

[0332] Next, a thick film was formed on the insulating film 1903 and the oxide semiconductor film 1905 by a sputtering method. A 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick tungsten film were After laminating the titanium films in order, etching is performed using a mask formed by photolithography. A conductive film 1907 and a conductive film 1909 were formed by performing a coating treatment.

[0333] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After forming the film, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0334] Next, on the insulating film 1910, an insulating film 1911 is formed by plasma CVD to a thickness of 50 A silicon nitride film with a thickness of nm was deposited.

[0335] Next, after providing a mask formed by a photolithography process on the insulating film 1911, , an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0336] Sample 1 was prepared by the above steps.

[0337] Next, a method for fabricating Sample 2 will be described.

[0338] The insulating film 1903, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 19 in Sample 1 On the 09, a 450 nm thick oxide nitride silicon film was formed as an insulating film 1910 by plasma CVD. After the silicon film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. After that, the insulating film 1910 was removed.

[0339] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 9, as an insulating film 1911, a silicon nitride film having a thickness of 50 nm is formed by a plasma CVD method. A film was formed.

[0340] Next, after providing a mask formed by a photolithography process on the insulating film 1911, Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911 .

[0341] Sample 2 was prepared by the above steps.

[0342] Next, a method for preparing Sample 3 will be described.

[0343] In Sample 3, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 of Sample 2. The layer film 1906 is formed by depositing a metal oxide target (In:Ga:Zn =1:3:2), a 10 nm thick IGZO film was formed by sputtering, followed by A metal oxide target (In:Ga:Zn=1:1:1) was used for sputtering. A 10 nm thick IGZO film was deposited by the ion beam, followed by a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. After that, an etching process was carried out using a mask formed by a photolithography process. Thus, a multilayer film 1906 was formed.

[0344] Sample 3 was prepared by the above steps.

[0345] Next, a method for preparing Sample 4 will be described.

[0346] In Sample 4, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 of Sample 2. In addition, sample 4 is different from sample 3 in the film thickness of the IGZO film that constitutes the multilayer film 1906 . The multilayer film 1906 is formed by depositing a metal oxide target (In:Ga:Z n=1:3:2), and a 20 nm thick IGZO film was formed by sputtering. Next, sputtering was performed using a metal oxide target (In:Ga:Zn=1:1:1). A 15 nm thick IGZO film was formed by the ion beam deposition method, followed by deposition of a metal oxide target (In:Ga :Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. Then, etching was performed using a mask formed by a photolithography process. This resulted in the formation of a multilayer film 1906.

[0347] Sample 4 was prepared by the above steps.

[0348] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided in Samples 1 to 4 were The sheet resistance was measured. The sheet resistance of the oxide semiconductor film 1905 was measured by contacting the oxide semiconductor film 1905 with a solder paste. In the example shown in FIG. 4, a probe is brought into contact with the openings 1917 and 1919, and an oxide semiconductor The sheet resistance of the film 1905 and the multilayer film 1906 was measured. In the compound semiconductor film 1905 and the multilayer film 1906, the conductive film 1907 and the conductive film 190 The width of the opposing conductive film 1907 and conductive film 1909 is 1 mm, and the distance between the conductive film 1907 and conductive film 1909 is 10 μm. In Samples 1 to 4, the conductive film 1907 was set to a ground potential, and the conductive film 1909 A voltage of 1 V was applied to the

[0349] The sheet resistances of Samples 1 to 4 are shown in FIG.

[0350] The sheet resistance of sample 1 is approximately 1×10 11 Ω / sq. Also, the sheet of sample 2 The sheet resistance of sample 3 was 4410 Ω / sq. The sheet resistance of Sample 4 was 2930 Ω / sq.

[0351] In this way, the oxide semiconductor film 1905 and the insulating film in contact with the multilayer film 1906 are different. Therefore, the oxide semiconductor film 1905 and the multilayer film 1906 have different sheet resistances.

[0352] When the sheet resistances of the above-described Samples 1 to 4 are converted into resistivities, Sample 1 has a resistivity of 3 .9×105 Ωcm, sample 2 is 9.3×10 -3 Ωcm, sample 3 is 1.3×10 -2 Ωcm, sample 4 is 1.3×10 -2 It was Ωcm.

[0353] Sample 1 is a silicon oxynitride film that is in contact with an oxide semiconductor film 1905 and is used as an insulating film 1910. A silicon nitride film is formed on the insulating film 1911. On the other hand, Samples 2 to 4 show that the oxide semiconductor film 1905 and the multilayer film 1906 are A silicon nitride film used as an insulating film 1911 is formed in contact with the oxide. The nitride semiconductor film 1905 and the multilayer film 1906 are made of silicon nitride, which is used as an insulating film 1911. When the oxide semiconductor film 1905 and the multilayer film 1906 are provided in contact with each other, defects, typically In this case, oxygen vacancies are formed, and hydrogen contained in the silicon nitride film is absorbed into the oxide semiconductor film 1. The oxide semiconductor film 1905 and the multilayer film 1906 are then transferred or diffused. 05 and the conductivity of the multilayer film 1906 is improved.

[0354] For example, when an oxide semiconductor film is used for a channel formation region of a transistor, It is preferable that a silicon oxynitride film be provided in contact with the oxide semiconductor film so as to cover the insulating film. As a light-transmitting conductive film used for an electrode of a quantum well, an oxide film as shown in Samples 2 to 4 is used. It is preferable to provide a silicon nitride film in contact with the nitride semiconductor film or multilayer film. By using this structure, an oxide semiconductor film used in a channel formation region of a transistor can be formed. The oxide semiconductor film or multilayer film used for the electrode of the capacitor element is fabricated in the same process. The resistivity of the oxide semiconductor film and the multilayer film can be changed even when the oxide semiconductor film and the multilayer film are fabricated.

[0355] Next, the sheet resistance of Samples 2 and 3 stored in a high-temperature, high-humidity environment was investigated. The conditions for each sample used here are explained below. In some cases, conditions used were different from those of Sample 2 and Sample 3. Samples with the same structure as Sample 3 but different preparation conditions are designated Sample 2a and Sample 3a, respectively. do.

[0356] First, a method for preparing the sample 2a will be described.

[0357] An insulating film 1903 and an insulating film 1904 were formed on a glass substrate 1901 .

[0358] A metal oxide target (In: Ga:Zn=1:1:1) and a 35 nm thick IGZO film was formed by sputtering. After that, etching was performed using a mask formed by a photolithography process. After the treatment, heat treatment is performed at 350° C. or 450° C. to form an oxide semiconductor film 1905. Successful.

[0359] A 50 nm thick oxide semiconductor film was formed over the insulating film 1903 and the oxide semiconductor film 1905 by a sputtering method. After laminating a titanium film with a thickness of 400 nm and a copper film with a thickness of 400 nm in this order, a photolithography process was carried out. The conductive film 1907 and the conductive film 1909 are then subjected to etching treatment using a mask formed from the above. was formed.

[0360] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After forming the film, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0361] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 9, as an insulating film 1911, a silicon nitride film having a thickness of 50 nm is formed by a plasma CVD method. The silicon nitride film was formed at a temperature of 220°C or 350°C.

[0362] Next, after providing a mask formed by a photolithography process on the insulating film 1911, , an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0363] Sample 2a was fabricated through the above steps.

[0364] Next, a method for producing the sample 3a will be described.

[0365] In Sample 3a, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 of Sample 2a. The multilayer film 1906 is formed by depositing a metal oxide target (In:Ga: Zn=1:1:1) and a 10 nm thick IGZO film was formed by sputtering. Then, a metal oxide target (In:Ga:Zn=1:3:2) was used for sputtering. A 10 nm thick IGZO film was then formed by the photolithography process. After etching using the mask formed by the above method, the wafer was heated at 350°C or 450°C. The multilayer film 1906 was formed by the above process.

[0366] Sample 3a was fabricated through the above steps.

[0367] Next, the oxide semiconductor film 1905 and the multilayer film 190 provided in Sample 2a and Sample 3a were The sheet resistance of the sample 2a and the sample 3a was measured. A probe is brought into contact with the portion 1919, and the oxide semiconductor film 1905 and the multilayer film 1906 are sealed. The oxide semiconductor film 1905 and the multilayer film 1906 of Sample 2a and Sample 3a were measured. In 1906, the width of the conductive film 1907 and the conductive film 1909 facing each other is 1.5 mm, The distance between the film 1907 and the conductive film 1909 was set to 10 μm. In a, the conductive film 1907 was set to the ground potential, and 1 V was applied to the conductive film 1909. Samples 2a and 3a were stored in an atmosphere of 60°C and 95% humidity for 60 hours and 13 hours. After storing for 0 hours, the sheet resistance of each sample was measured.

[0368] The sheet resistance values ​​of Sample 2a and Sample 3a are shown in Figure 29. In Figure 29, the solid line indicates In each sample, the silicon nitride film formed as the insulating film 1910 was formed at a temperature of 220°C. The dashed line indicates 350°C. The black markers indicate the oxidation temperature of each sample. After forming the semiconductor film 1905 or the multilayer film 1906, a heat treatment was performed at 350°C. The white markers indicate the oxide semiconductor film 1905 or the multilayer film 1906 formed thereon. The rounded corners indicate that each sample was subjected to a heat treatment at 450° C. The triangle marker indicates that each sample has a multilayer film 190 6, that is, sample 3a. The measurement results for sample 3a were obtained by heating at 350°C after forming the film. It is not yet installed.

[0369] As can be seen from FIG. 29, Samples 2a and 3a have low sheet resistance and are suitable as electrodes for capacitor elements. It can be seen that the desired sheet resistance value of 0.2Ω / sq or less is satisfied. It can be seen that the time fluctuation of the sheet resistance value is small for Sample 2a and Sample 3a. The oxide semiconductor film or multilayer film in contact with the silicon nitride film is subjected to high temperature and high humidity conditions. Since the fluctuation of the resistance value is small, it can be used as a light-transmitting conductive film for the electrodes of a capacitor element. You can be there.

[0370] Next, for Sample 2a and Sample 3a, the substrate temperatures were set to 25°C, 60°C, and 150°C. The results of measuring the sheet resistance of each sample are shown in FIG. As for the sample 3a, the silicon nitride film formed as the insulating film 1910 was formed at a film formation temperature of 220 After the oxide semiconductor film 1905 or the multilayer film 1906 is formed, the film is heated at 350° C. The black circle markers indicate the measurement results of sample 2a, and the black triangle markers indicate the measurement results of sample 2b. The mark shows the measurement results for sample 3a.

[0371] 30, even when the substrate temperature is increased, the oxide semiconductor film 1905 and the multilayer film 1906 It can be seen that the gate resistance value does not change. The oxide semiconductor film or multilayer film in contact with the silicon nitride film can be considered a degenerate semiconductor. The layer film has little fluctuation in sheet resistance even when the substrate temperature changes, so it is suitable for use as an electrode for a capacitance element. The conductive film can be used as a light-transmitting conductive film.

[0372] The configuration shown in this embodiment may be appropriately combined with the configurations shown in other embodiments or examples. It can be used. [Example]

[0373] In this example, impurity analysis of an oxide semiconductor film and an insulating film formed on the oxide semiconductor film was performed. This will be explained using FIG.

[0374] In this example, two types of samples (hereinafter referred to as samples) were used for impurity analysis. 5 and sample 6) were prepared.

[0375] First, the method for preparing Sample 5 will be described below.

[0376] For sample 5, an IGZO film was formed on a glass substrate, and then a silicon nitride film was formed. After that, heat treatment was carried out at 450°C for 1 hour in a nitrogen atmosphere, and then in a mixed gas atmosphere of nitrogen and oxygen. Heat treatment was carried out at 450°C for 1 hour in an atmosphere (nitrogen = 80%, oxygen = 20%).

[0377] The conditions for forming the IGZO film are as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) and Ar / O2=100 / 100sccm (O2 = 50%), pressure = 0.6 Pa, deposition power = 5000 W, substrate temperature = 170 °C. A 1000 nm thick IGZO film was deposited.

[0378] The silicon nitride film was formed under the conditions of plasma CVD using SiH4 / N2 / NH3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, A silicon nitride film having a thickness of 100 nm was formed under the condition of a substrate temperature of 220°C.

[0379] Next, a method for preparing Sample 6 will be described below.

[0380] An IGZO film is formed on a glass substrate, and then a silicon oxynitride film and a silicon nitride film are formed. After that, a heat treatment was carried out at 450°C for 1 hour in a nitrogen atmosphere, and then Heat treatment at 450°C for 1 hour in a mixed gas atmosphere of nitrogen and oxygen (nitrogen = 80%, oxygen = 20%) The theory was carried out.

[0381] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 5. The silicon oxynitride film was formed under the following conditions: ,SiH4 / N2O=30 / 4000sccm, pressure=40Pa, film formation power=150W, A silicon oxynitride film with a thickness of 50 nm was formed under the condition of a substrate temperature of 220°C. Plasma CVD method, SiH4 / N2O=160 / 4000sccm, pressure=200Pa The silicon oxynitride film was deposited to a thickness of 400 nm under the conditions of deposition power = 1500 W and substrate temperature = 220°C. A Kon film was formed.

[0382] The results of the impurity analysis of Samples 5 and 6 are shown in FIG.

[0383] The impurity analysis was carried out using secondary ion mass spectrometry (SIMS). Using Ion Mass Spectrometry, the analysis was performed in the direction of the arrow shown in Figure 26. That is, measurements were taken from the glass substrate side.

[0384] Also, Figure 26(A) shows the concentration profile of hydrogen (H) obtained by measuring sample 5. FIG. 26(B) shows the concentration profile of hydrogen (H) obtained by measuring sample 6. do.

[0385] From Figure 26(A), the hydrogen (H) concentration in the IGZO film is 1.0×10 20 atoms / c m 3In addition, the hydrogen (H) concentration in the silicon nitride film is 1.0 × 10 2 3 atoms / cm 3 In addition, from Figure 26(B), it can be seen that the hydrogen in the IGZO film (H) concentration is 5.0 × 10 19 atoms / cm 3 In addition, nitric oxide The hydrogen (H) concentration in the silicon dioxide film is 3.0×10 21 atoms / cm 3 That is I understand.

[0386] Due to its measurement principle, SIMS analysis does not detect the area near the sample surface or the layer boundary between films of different materials. It is known that it is difficult to obtain accurate data near the surface. When analyzing the distribution of hydrogen (H) in the thickness direction by SIMS, the area where the target film exists is In the range, there is no extreme fluctuation and the average value in the area where almost constant intensity is obtained is used. do.

[0387] In this way, by changing the composition of the insulating film in contact with the IGZO film, the water in the IGZO film Differences were observed in the hydrogen (H) concentration.

[0388] For example, when the above-mentioned IGZO film is used in the channel formation region of a transistor, Sample 6 As shown in Fig. 1, it is preferable to provide a silicon oxynitride film in contact with the IGZO film. As a transparent conductive film used for the electrodes of the quantum well, an IGZO film was used as shown in sample 5. It is preferable to provide a silicon nitride film in contact with the silicon nitride film. IGZO film used in the channel formation region of transistors and IGZO used in the electrodes of capacitor elements The hydrogen concentration in the IGZO film can be changed even when the O film is fabricated in the same process. [Example]

[0389] In this example, the defect amounts of the oxide semiconductor film and the multilayer film were measured using FIGS. 27 and 28. I will explain.

[0390] First, the structure of the sample will be described.

[0391] Sample 7 is a 35 nm thick oxide semiconductor film formed on a quartz substrate and a 35 nm thick oxide semiconductor film and a nitride insulating film having a thickness of 100 nm formed thereon.

[0392] Samples 8 and 9 are a 30 nm thick multilayer film formed on a quartz substrate and a 30 nm thick multilayer film formed on the multilayer film. The multilayer film of Sample 8 has a thickness of 100 nm. The first IGZO film was 10 nm thick, the second IGZO film was 10 nm thick, and the third IGZO film was 10 nm thick. Sample 9 has a first IGZO film with a thickness of 20 nm, a second IGZO film with a thickness of A second IGZO film with a thickness of 15 nm and a third IGZO film with a thickness of 10 nm are stacked in this order. Compared to Sample 7, Samples 8 and 9 have a multilayer film instead of an oxide semiconductor film. The points are different.

[0393] Sample 10 is a 100 nm thick oxide semiconductor film formed on a quartz substrate and a 100 nm thick oxide semiconductor film. A 250 nm thick oxide insulating film was formed on the solid film, and a 10 nm thick film was formed on the oxide insulating film. The sample 10 has an oxide semiconductor film and a nitride insulating film with a thickness of 0 nm. The difference is that the film is not in contact with the nitride insulating film but is in contact with the oxide insulating film.

[0394] Next, the method for preparing each sample will be described.

[0395] First, the method for preparing sample 7 will be described.

[0396] A 35 nm thick IGZO film was formed on a quartz substrate as an oxide semiconductor film. The film was formed by sputtering using a metal oxide target (In:Ga:Z n = 1:1:1, Ar / O2 = 100sccm / 100sccm (O2 = 50%) ), pressure = 0.6 Pa, film formation power = 5000 W, and substrate temperature = 170°C.

[0397] Next, as a first heat treatment, a heat treatment was performed in a nitrogen atmosphere at 450°C for 1 hour, and then Heating for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) at 450℃ Processing was carried out.

[0398] Next, a silicon nitride film having a thickness of 100 nm is formed as a nitride insulating film on the oxide semiconductor film. The conditions for forming the silicon nitride film were as follows: plasma CVD method, SiH4 / N2 / N H3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, The plate temperature was set to 350°C.

[0399] Next, as a second heat treatment, heat treatment was performed at 250° C. in a nitrogen atmosphere for 1 hour.

[0400] Sample 7 was prepared by the above steps.

[0401] Next, a method for preparing Sample 8 will be described.

[0402] In Sample 8, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. The multilayer film was A metal oxide target (In:Ga:Zn=1: 3:2), Ar / O2 = 180 / 20sccm (O2 = 10%), pressure = 0.6P a) The first IGZO film with a thickness of 10 nm was formed under the conditions of deposition power = 5000 W and substrate temperature = 25°C. Next, a metal oxide target (In:Ga:Zn= 1:1:1), Ar / O2 = 100 / 100sccm (O2 = 50%), pressure = 0 The second I film was deposited at a thickness of 10 nm under the conditions of 0.6 Pa, deposition power = 5000 W, and substrate temperature = 170 °C. Next, a GZO film was formed using a metal oxide target (In:Ga Zn=1:3:2) was used, and the pressure was Ar / O2=180 / 20sccm (O2=10%). The third layer was deposited to a thickness of 10 nm under the conditions of pressure = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25 °C. An IGZO film was formed.

[0403] The other steps were the same as those for Sample 7. Sample 8 was formed by the above steps.

[0404] Next, a method for preparing Sample 9 will be described.

[0405] In Sample 9, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. The multilayer film was A 20 nm thick first IGZO film was formed on a quartz substrate under the same conditions as those for the first IGZO film shown in Sample 8. Next, a second IGZO film shown in Sample 8 was formed by sputtering. A second IGZO film with a thickness of 15 nm was then deposited under the same conditions as in Sample 8. A second IGZO film with a thickness of 10 nm was deposited under the same conditions as the third IGZO film.

[0406] The other steps were the same as those for Sample 7. Sample 9 was formed through the above steps.

[0407] Next, a method for preparing the sample 10 will be described.

[0408] Sample 10 is a sample obtained by growing an oxide semiconductor film 100 nm thick on a quartz substrate under the same conditions as Sample 7. was formed.

[0409] Next, the first heat treatment was carried out under the same conditions as those for Sample 7.

[0410] Next, a first silicon oxynitride film having a thickness of 50 nm was formed as an oxide insulating film over the oxide semiconductor film. A silicon nitride film and a second silicon oxynitride film with a thickness of 200 nm were formed. VD method, SiH4 / N2O=30 / 4000sccm, pressure=40Pa, film formation power= A first silicon oxynitride film having a thickness of 50 nm was formed under the conditions of 150 W and a substrate temperature of 220°C. Then, by plasma CVD, SiH4 / N2O=160 / 4000sccm, Pressure = 200 Pa, film formation power = 1500 W, substrate temperature = 220 °C, thickness of 200 nm The second silicon oxynitride film was formed with a stoichiometric amount of SiO 2 . This film contains more oxygen than the stoichiometric composition.

[0411] Next, using the same conditions as Sample 7, a silicon nitride film with a thickness of 100 nm was formed on the oxide insulating film. Formed.

[0412] Next, a second heat treatment was carried out under the same conditions as for Sample 7.

[0413] Sample 10 was formed through the above steps.

[0414] Next, ESR measurements were carried out on Samples 7 to 10. The ESR measurements were carried out at a predetermined temperature. From the magnetic field value (H0) at which microwave absorption occurs, the g value can be calculated using the formula g=hν / βH0. The following parameters are obtained. Note that ν is the microwave frequency. h is Planck's constant. and β is the Bohr magneton, both of which are constants.

[0415] Here, ESR measurements were carried out under the following conditions: The measurement temperature was room temperature (25°C), and the The 2GHz radio frequency power (microwave power) was set to 20mW, and the magnetic field direction was set to the same as that of the prepared sample. The film surface was parallel to the

[0416] The primary oxide semiconductor films and multilayer films included in Samples 7 to 9 were measured by ESR. The differential curves are shown in Figure 27. Figure 27(A) shows the measurement results for sample 7, and Figure 27(B) shows the 27(A) shows the measurement results for sample 8, and FIG. 27(B) shows the measurement results for sample 9.

[0417] The first derivative curve obtained by ESR measurement of the oxide semiconductor film included in Sample 10 is shown in Figure 28. show.

[0418] In Fig. 27(A) to Fig. 27(C), sample 7 shows that the oxide A symmetric signal due to defects in the semiconductor film was detected. Samples 8 and 9 At a g value of 1.95, a signal with symmetry due to defects in the multilayer film was detected. The spin density of sample 7 with a g value of 1.93 is 2.5 × 10 19 spins / c m 3 The sum of the spin densities for g values ​​of 1.93 and 1.95 in sample 8 is 1.6 x10 19 spins / cm 3 The g values ​​of sample 9 are 1.93 and 1.95. The total pin density is 2.3 x 10 19 spins / cm 3 That is, oxide semiconductor It can be seen that the oxide semiconductor film and the multilayer film contain defects. An example of a defect is an oxygen vacancy.

[0419] In FIG. 28, sample 10, compared with the oxide semiconductor film of sample 7 and the multilayer films of samples 8 and 9, although the thickness of the oxide semiconductor film is thick, no signal having symmetry due to defects is detected, that is, it is below the detection limit (here, the detection limit is 3.7×10 spin 16 s / cm s / cm[[ID=第十二]] 3 is assumed.). From this, it can be seen that the amount of defects contained in the oxide semiconductor film cannot be detected. <000s129>

[0420] When a nitride insulating film, here a silicon nitride film formed by plasma CVD, is in contact with the oxide semiconductor film or the multilayer film, it can be seen that defects, typically oxygen deficiencies, are formed in the oxide semiconductor film or the multilayer film. On the other hand, when an oxide insulating film, here a silicon oxynitride film, is provided on the oxide semiconductor film, excess oxygen contained in the silicon oxynitride film, that is, oxygen more than the stoichiometric composition, diffuses into the oxide semiconductor film, and the defects in the oxide semiconductor film do not increase.

[0421] From the above, as shown in samples 7 to 9, the oxide semiconductor film or the multilayer film in contact with the nitride insulating film has many defects, typically a large amount of oxygen deficiency and high conductivity, and thus can be used as an electrode of a capacitive element. On the other hand, as shown in sample 10, the oxide semiconductor film or the multilayer film in contact with the oxide insulating film has a small amount of oxygen deficiency and low conductivity, and thus can be used as a channel formation region of a transistor. 》

[0422] Here, the reason for the reduction in the resistivity of the oxide semiconductor film and the multilayer film in contact with the nitride insulating film will be described below.

[0423] <Energy and Stability between Forms of Existence of H>​​​​​​​​​​ First, we calculated the energy difference and stability of the forms of H present in the oxide semiconductor film. Here, InGaZnO4 was used as the oxide semiconductor film.

[0424] The structure used in the calculation is a hexagonal unit cell of InGaZnO4 doubled in the a-axis and b-axis directions. The model is based on an 84-atom bulk model with each atom separated.

[0425] In the bulk model, one O atom bonded to three In atoms and one Zn atom is assigned to H A model in which atoms are replaced with atoms is prepared (see FIG. 31(A)). In FIG. 31(A), The ab plane of the InO layer viewed from the c axis is shown in Figure 31(B). The region where one O atom bonded to two Zn atoms is removed is shown as oxygen vacancy Vo, and is shown in Figure 31( 31(A) and 31(B), the H atoms located in the oxygen vacancies V are denoted by V. It is written as oH.

[0426] In addition, in the bulk model, one O atom is bonded to three In atoms and one Zn atom. The oxygen vacancies (Vo) are formed by removing the Ga atoms. A model was prepared in which an H atom is bonded to an O atom bonded to an atom and two Zn atoms (Figure 31 In addition, in FIG. 31(C), the ab plane of the InO layer is viewed from the c axis. This is shown in Figure 31(D). In Figures 31(C) and 31(D), the oxygen vacancy Vo is indicated by a dashed line. In addition, there is an oxygen vacancy Vo, and one Ga atom is present in the ab plane near the oxygen vacancy Vo. A model with an H atom bonded to an O atom bonded to an atom and two Zn atoms is called Vo+H. Write.

[0427] For the above two models, an optimization calculation was performed with the lattice constant fixed, and the total energy was calculated. Note that the smaller the value of the total energy, the more stable the structure can be said to be.

[0428] For the calculation, the first-principles calculation software VASP (The Vienna Ab initio simulation package) was used. The calculation conditions are shown in Table 1. For the calculation, the first-principles calculation software VASP (The Vienna Ab initio simulation package) was used. The calculation conditions are shown in Table 1.

[0429]

Table 1

[0431]

Table 2

[0432] From Table 2, the total energy of VoH is 0.78 eV smaller than that of Vo + H. Therefore, [[ID=四十二]]It can be said that VoH is more stable than Vo + H. Therefore, when a H atom approaches an oxygen vacancy (Vo), it is considered that the H atom is more likely to be incorporated into the oxygen vacancy (Vo) than to bond with an O atom. From Table 2, the total energy of VoH is 0.78 eV smaller than that of Vo + H. Therefore, [[ID=四十五]]It can be said that VoH is more stable than Vo + H. Therefore, when a H atom approaches an oxygen vacancy (Vo), it is considered that the H atom is more likely to be incorporated into the oxygen vacancy (Vo) than to bond with an O atom.

[0433] <Thermodynamic state of VoH> Next, the formation energy and charge state of VoH in which a H atom is incorporated into an oxygen vacancy (Vo) The calculation results are explained below. The formation energy of VoH varies depending on the charge state. , and also depends on the Fermi energy. Therefore, VoH depends on the Fermi energy and is stable. Here, the state where VoH releases one electron is called (VoH) + and indicated The state in which one electron is captured is (VoH) - and the state without electron movement is expressed as (VoH ) 0 (VoH) + , (VoH) - , (VoH) 0 The formation energy of each is calculated. I calculated.

[0434] The calculations were performed using the first-principles calculation software VASP. The calculation conditions are shown in Table 3.

[0435] [Table 3] The electronic state pseudopotential calculation uses Projector Augmented Wave ( The potential generated by the PAW method is used as the functional. The Ernzerhof (HSE) DFT hybrid functional (HSE06) was used.

[0436] In calculating the formation energy of oxygen vacancies, the dilute limit of the oxygen vacancy concentration was assumed. The energy was calculated by correcting for the excess broadening of electrons and holes into the conduction band and valence band. The energy origin is the top of the valence band of a perfect crystal, and the deviation of the valence band due to the defect structure is Corrections were made using the average electrostatic potential.

[0437] In Figure 32(A), (VoH) + , (VoH) - , (VoH) 0 The respective formation energies The horizontal axis is the Fermi level, and the vertical axis is the formation energy. The solid line indicates the ) + The dashed line indicates the formation energy of (VoH) 0 The dashed line indicates the formation energy of (VoH) - The formation energy of VOH is shown. Also, the charge of VOH is (VOH) + From (Vo H) 0 Through (VoH) - The transition level between these two is denoted as ε(+ / -).

[0438] Figure 32(B) shows the thermodynamic transition level of VoH. The energy gap of 4 was 2.739 eV. The valence band energy was 0 e V, the transition level (ε(+ / -)) is 2.62 eV, which is located just below the conduction band. This indicates that the incorporation of H atoms into oxygen vacancies (Vo) results in the formation of InGaZ It can be seen that nO4 becomes n-type.

[0439] When the oxide semiconductor film is exposed to plasma, the oxide semiconductor film is damaged, and the oxide semiconductor Defects, typically oxygen vacancies, are generated in the conductive film. When the nitride insulating film comes into contact with the oxide semiconductor film, hydrogen contained in the nitride insulating film moves to the oxide semiconductor film. Hydrogen enters the oxygen vacancies in the oxide semiconductor film, forming VoH in the oxide semiconductor film. As a result, the oxide semiconductor film becomes n-type and the resistivity decreases. The oxide semiconductor film in contact with the oxide semiconductor film can be used as an electrode of a capacitor.

Claims

[Claim 1] a transistor including a light-transmitting semiconductor film, a capacitor element having a pair of electrodes and a dielectric film provided between the electrodes, and a pixel electrode electrically connected to the transistor; In the transistor, an insulating film in which a first oxide insulating film, a nitride insulating film, and a second oxide insulating film are stacked in this order is provided over the light-transmitting semiconductor film, In the capacitor, a conductive film formed on the same surface as the light-transmitting semiconductor film of the transistor is in contact with the nitride insulating film and functions as one of the pair of electrodes, the pixel electrode functions as the other electrode of the pair of electrodes, The semiconductor device is characterized in that the nitride insulating film and the second oxide insulating film of the insulating film function as the dielectric film.

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