Printed wiring board

Abstract

To provide a high-quality printed wiring board.SOLUTION: A printed wiring board includes: a first resin insulating layer having a first surface and a second surface opposite to the first surface; a first conductor layer formed on the first resin insulating layer and having a pad; a second resin insulating layer having a third surface and a fourth surface opposite to the third surface and formed on the first resin insulating layer and the first conductor layer so that the fourth surface faces the first conductor layer; and a second conductor layer formed on the second resin insulating layer. A surface of the first conductor layer on a first resin insulating layer side is roughened, and a root mean square roughness of the surface of the first conductor layer on the first resin insulating layer side is not less than 0.06 μm and not more than 0.5 μm.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a printed wiring board. [Background technology]

[0002] Patent Document 1 discloses a method for manufacturing a multilayer printed wiring board, which includes sequentially laminating conductor circuits and interlayer resin insulating layers on a substrate, and forming a layer containing a triazine compound on at least a portion of the surface of the conductor circuits. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-203462 Summary of the Invention

[0004] [Problem of Patent Document 1] In the printed wiring board of Patent Document 1, the surface of the conductor layer is smoothed using a triazine compound. If the surface is smoothed excessively, it is thought that adhesion between the conductor layer and the resin insulating layer will be poor, causing peeling. If the surface is not smoothed enough, it is thought that insertion loss will increase. In order to simultaneously improve the adhesion between the conductor layer and the resin insulating layer and reduce insertion loss, it is thought that it is necessary to accurately estimate the effects of smoothing on adhesion and insertion loss. It is thought that the technology of Patent Document 1 makes it difficult to simultaneously improve the adhesion between the conductor layer and the resin insulating layer and reduce insertion loss. [Means for solving the problem]

[0005] The printed wiring board of the present invention comprises: a first resin insulating layer having a first surface and a second surface opposite to the first surface; a first conductor layer formed on the first resin insulating layer and having a pad; a second resin insulating layer having a third surface and a fourth surface opposite to the third surface, the second conductor layer being formed on the first resin insulating layer and the first conductor layer so that the fourth surface faces the first conductor layer; and a second conductor layer formed on the second resin insulating layer. The surface of the first conductor layer facing the first resin insulating layer is roughened, and the root mean square roughness of the surface of the first conductor layer facing the first resin insulating layer is 0.06 μm or more and 0.5 μm or less.

[0006] In the printed wiring board according to the embodiment of the present invention, the surface of the first conductor layer facing the first insulating layer is roughened, and the root mean square roughness of the first conductor layer facing the first resin insulating layer is 0.06 μm or more and 0.5 μm or less. The root-mean-square roughness exaggerates surface roughness characteristics compared to the arithmetic mean roughness. This makes it easier to detect abnormalities in surface roughness and consider their impact on insertion loss. In the embodiment, the surface roughness of the first conductor layer on the first resin insulation layer side is specified by the root-mean-square roughness. This allows for accurate evaluation of the surface roughness of the first conductor layer. This makes it possible to reduce insertion loss while suppressing peeling between the conductor layer and the resin insulation layer. According to the embodiment, by setting the root-mean-square roughness to be 0.06 μm or more and 0.5 μm or less, it is possible to achieve both improved adhesion between the conductor layer and the resin insulation layer and reduced insertion loss. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view schematically showing a printed wiring board according to an embodiment. [Figure 2A] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2B] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2C] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2D] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2E] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2F] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 2G] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] <Printed wiring board according to an embodiment> 1 is a cross-sectional view showing a printed wiring board 2 according to an embodiment. As shown in FIG. 1, the printed wiring board 2 has an insulating layer (first resin insulating layer) 4, a first conductor layer 10, a resin insulating layer 20 (second resin insulating layer), a second conductor layer 30, and via conductors 40.

[0009] The insulating layer 4 is formed using a thermosetting resin. The insulating layer 4 contains inorganic particles such as silica. Alternatively, the insulating layer 4 contains a reinforcing material such as glass cloth. The insulating layer 4 has a first surface 6 and a second surface 8 opposite to the first surface 6.

[0010] The first conductor layer 10 is formed on the first surface 6 of the insulating layer 4. The first conductor layer 10 includes signal wiring 12 and pads 14. Although not shown in the figure, the first conductor layer 10 also includes conductor circuits other than the signal wiring 12 and pads 14. The first conductor layer 10 is made of copper. The first conductor layer 10 is formed of a seed layer 10a and an electrolytic plating film 10b on the seed layer 10a. The surface of the first conductor layer 10 facing the insulating layer 4 is roughened. The root mean square roughness of the surface of the first conductor layer 10 facing the insulating layer 4 is 0.06 μm or more and 0.5 μm or less. In FIG. 1, the surface of the seed layer 10a facing the second surface 8 is roughened. In FIG. 1, the root mean square roughness of the surface of the seed layer 10a facing the second surface 8 is 0.06 μm or more and 0.5 μm or less.

[0011] The resin insulating layer 20 is formed on the first surface 6 of the insulating layer 4 and the first conductor layer 10. The resin insulating layer 20 has a third surface 22 and a fourth surface 24 opposite the third surface 22. The fourth surface 24 faces the first conductor layer 10. The resin insulating layer 20 has an opening 26 (opening for a via conductor) that leads to the pad 14. The opening 26 penetrates the resin insulating layer 20. The resin insulating layer 20 is formed of an epoxy resin and a plurality of inorganic particles dispersed in the epoxy resin. Examples of resins are thermosetting resins and photocurable resins. The inorganic particles are, for example, silica or alumina.

[0012] The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and a land 36. Although not shown in the figure, the second conductor layer 30 also includes conductor circuits other than the first signal wiring 32, the second signal wiring 34, and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair of wiring. The second conductor layer 30 is made of copper. The second conductor layer 30 is formed of a seed layer 30a and an electrolytic plated film 30b on the seed layer 30a.

[0013] The via conductor 40 is formed in the opening 26. The via conductor 40 connects the first conductor layer 10 and the second conductor layer 30. In FIG. 1, the via conductor 40 connects the pad 14 and the land 36. The via conductor 40 is formed by the seed layer 30a that forms the second conductor layer 30 and the electrolytic plated film 30b on the seed layer 30a. The seed layer 30a that forms the via conductor 40 is directly connected to the pad 14.

[0014] <Method for manufacturing a printed wiring board according to an embodiment> 2A to 2G show a method for manufacturing a printed wiring board 2 according to an embodiment. 2A to 2G are cross-sectional views. 2A shows an insulating layer 4 and a first conductor layer 10 formed on a first surface 6 of the insulating layer 4. The first conductor layer 10 is formed by a semi-additive method. In this embodiment, the surface of the first conductor layer 10 facing the insulating layer 4 is roughened. The root-mean-square roughness of the surface of the first conductor layer 10 facing the insulating layer 4 is 0.06 μm or more and 0.5 μm or less. The surface roughness of the first conductor layer 10 can be accurately evaluated. This allows for reduced insertion loss while suppressing peeling between the first conductor layer 10 and the insulating layer 4. According to this embodiment, by setting the root-mean-square roughness to 0.06 μm or more and 0.5 μm or less, it is possible to achieve both improved adhesion between the first conductor layer 10 and the insulating layer 4 and reduced insertion loss.

[0015] 2B, a resin insulating layer 20 is formed on the insulating layer 4 and the first conductor layer 10. A fourth surface 24 of the resin insulating layer 20 faces the first surface 6 of the insulating layer 4.

[0016] As shown in FIG. 2C, laser light L is irradiated from above the third surface 22 of the resin insulating layer 20. The laser light L penetrates the resin insulating layer 20. An opening 26 for a via conductor reaching the pad 14 of the first conductor layer 10 is formed. The laser light L is, for example, a UV laser light, a carbon dioxide laser light, or a YAG laser light. The pad 14 is exposed through the opening 26.

[0017] As shown in FIG. 2D, a seed layer 30a is formed on the resin insulating layer 20 and the pad 14. The seed layer 30a is formed on the exposed surfaces exposed from the opening 26. The exposed surfaces are the upper surfaces of the pads 14 and the inner wall surfaces of the opening 26. The seed layer 30a is formed by sputtering. The seed layer 30a is formed by a dry process. The seed layer 30a is made of copper.

[0018] 2E, plating resists 60A, 60B, 60C, and 60D are formed on the seed layer 30a by a photographic technique. The plating resists 60A to 60D have openings 60a for forming the first signal wiring 32, the second signal wiring 34, and the lands 36 (see FIG. 1).

[0019] As shown in FIG. 2F, electrolytic plating film 30b is formed on seed layer 30a exposed from plating resists 60A to 60D.

[0020] As shown in FIG. 2G, plating resists 60A-60D are removed. Seed layer 30a exposed from electrolytic plated film 30b is removed. First signal wiring 32, second signal wiring 34, and land 36 are formed. Via conductors 40 are formed in openings 26. Second conductor layer 30 and via conductors 40 are formed simultaneously. A printed wiring board 2 of the embodiment (see FIG. 1) is obtained. [Explanation of symbols]

[0021] 2: Printed wiring board 4: Insulating layer 6: 1st page 8:Second side 10: First conductor layer 10a: seed layer 10b: Electroplated film 12: Signal wiring 14: Pad 20: Resin insulating layer 22:Third side 24:Side 4 26 :Aperture 30: Second conductor layer 30a: seed layer 30b: Electroplated film 32: First signal wiring 34: Second signal wiring 36: Land 40: Via conductor 60A: Plating resist 60a: Opening 60B: Plating resist 60C: Plating resist 60D: Plating resist L: Laser light

Claims

1. a first resin insulating layer having a first surface and a second surface opposite to the first surface; a first conductor layer formed on the first resin insulating layer and having a pad; a second resin insulating layer having a third surface and a fourth surface opposite to the third surface, the second resin insulating layer being formed on the first resin insulating layer and the first conductor layer such that the fourth surface faces the first conductor layer; a second conductor layer formed on the second resin insulating layer; A printed wiring board having the surface of the first conductor layer on the side of the first resin insulating layer is roughened, The root mean square roughness of the surface of the first conductor layer on the side of the first resin insulating layer is 0.06 μm or more and 0.5 μm or less.

2. 2. The printed wiring board according to claim 1, wherein the first conductor layer and the second conductor layer are made of copper.

3. 2. The printed wiring board of claim 1, further comprising an opening for a via conductor that penetrates the second resin insulating layer and reaches the pad, and the via conductor is formed in the opening and connects the pad and the land.

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