Pressure Pack Diagnostic Wafer

Abstract

An exemplary diagnostic wafer for a semiconductor processing chamber may include a wafer body defining a plurality of recesses. The diagnostic wafer may include at least one data logging pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one battery pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one sensor pack positionable within one of the plurality of recesses.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. patent application Ser. No. 17 / 522,635, entitled "PRESSURE PUCK DIAGNOSTIC WAFER," filed on November 9, 2021, which is incorporated by reference in its entirety into this specification.

[0002] The present technology relates to components and apparatus for monitoring conditions within a semiconductor processing chamber. In particular, the present technology relates to diagnostic wafers (or instrumented wafers) that can detect processing conditions during semiconductor processing operations. [Background technology]

[0003]

[0003] Integrated circuits are made possible by processes that produce intricately patterned layers of material on a substrate surface. Producing patterned materials on a substrate requires controlled methods for forming and removing materials. To produce a desired film profile on the substrate, certain processing conditions may need to be maintained within the chamber. For example, temperature, pressure, gas / plasma flow, and / or other conditions may need to be carefully controlled to provide a desired film profile on the substrate surface. Therefore, it would be advantageous to monitor the semiconductor chamber to ensure that processing conditions within the chamber are within predefined parameters for producing a desired film profile on the substrate surface.

[0004]

[0004] Thus, there is a need for an improved semiconductor processing chamber monitoring tool that can be used to ensure that desired processing conditions are maintained during one or more semiconductor processing operations. These and other needs are addressed by the present technique. Summary of the Invention

[0005]

[0005] An exemplary diagnostic wafer for a semiconductor processing chamber may include a wafer body defining a plurality of recesses. The diagnostic wafer may include at least one data logging pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one battery pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one sensor pack positionable within one of the plurality of recesses.

[0006]

[0006] In some embodiments, each of the at least one battery pack may include a plurality of batteries. Each of the at least one sensor pack may include at least one sensor selected from the group consisting of: temperature sensor, pressure sensor, retarding field energy analyzer (RFEA), plasma probe, plasma diagnostic light emitting probe, visible light sensor, infrared light sensor / camera. At least some of the at least one data logging pack, the at least one battery pack, and the at least one sensor pack may include an alignment mechanism to properly orient the respective pack within one of the recesses. The wafer may include a bus coupling each of the at least one battery pack, the at least one sensor pack, and the at least one data logging pack. At least some of the at least one data logging pack, the at least one battery pack, and the at least one sensor pack may include a ceramic coating. The at least one sensor pack may include a plurality of sensor packs. Each of the plurality of sensor packs may include the same type of sensor. The at least one sensor pack may include a plurality of sensor packs. Each of the plurality of sensor packs may include a different type of sensor. The at least one data logging pack, the at least one battery pack, and the at least one sensor pack may each be insertable into one of the plurality of recesses.

[0007]

[0007] Some embodiments of the present technology may include a diagnostic wafer for a semiconductor processing chamber. The diagnostic wafer may include a wafer body defining a plurality of recesses. Each of the plurality of recesses may include a plurality of electrical contacts. The wafer body may include connection circuitry electrically coupling the plurality of electrical contacts of each of the plurality of recesses with the plurality of electrical contacts of at least one other of the plurality of recesses. The diagnostic wafer may include a plurality of battery packs positionable within one of the plurality of recesses. The diagnostic wafer may include a plurality of sensor packs positionable within one of the plurality of recesses.

[0008]

[0008] In some embodiments, at least one of the plurality of battery packs may include a status LED. At least one of the plurality of sensor packs may include a status LED. One or both of the wafer body and the plurality of sensor packs may include a wireless antenna. A thickness of each of the plurality of sensor packs may match a depth of each of the plurality of recesses.

[0009]

[0009] Some embodiments of the present technology may include a method of monitoring a condition in a semiconductor processing chamber. The method may include disposing a diagnostic wafer on a substrate support of a semiconductor processing chamber. The diagnostic wafer may include a wafer body defining a plurality of recesses. The diagnostic wafer may include at least one data logging pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one battery pack positionable within one of the plurality of recesses. The diagnostic wafer may include at least one sensor pack positionable within one of the plurality of recesses. The method may include performing one or more process operations in the semiconductor processing chamber. The method may include monitoring at least one process condition in the semiconductor processing chamber using the at least one sensor pack.

[0010]

[0010] In some embodiments, the method may include recording data associated with at least one process state using at least one data logging pack. The method may include accessing data from the at least one data logging pack at a remote computing device. The method may include transmitting data associated with the at least one process state to a computing device outside the semiconductor processing chamber. The at least one process state may include one or more process states selected from the group consisting of a temperature in the semiconductor processing chamber, a pressure in the semiconductor processing chamber, a flow of ions and electrons in the semiconductor processing chamber, an energy of ions and electrons in the semiconductor processing chamber, a plasma potential in the semiconductor processing chamber, and an optical emission in the semiconductor processing chamber. The at least one battery pack may be operated in a pulsed mode.

[0011]

[0011] Such technology may provide numerous advantages over conventional systems and techniques. For example, embodiments of the present technology may provide a diagnostic wafer that includes several removable sensor packs. The diagnostic wafer provides a customizable solution for monitoring various process conditions within a semiconductor processing chamber. These and other embodiments, together with their many advantages and features, are described in more detail in the following description and accompanying drawings.

[0012]

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief description of the drawings]

[0013] [Figure 1A]

[0013] FIG. 1 shows a top view of a diagnostic wafer according to some embodiments of the present technique. [Figure 1B]

[0014] FIG. 1B shows a top view of the diagnostic wafer of FIG. 1A having several sensor packs. [Diagram 2]

[0015] 1 shows a wiring diagram of a diagnostic wafer in accordance with some embodiments of the present technique. [Diagram 3]

[0016] 1 shows a top view of a diagnostic wafer according to some embodiments of the present technique. [Figure 4]

[0017] 1 shows a top view of a sensor pack according to some embodiments of the present technology. [Diagram 5]

[0018] 1 shows a schematic cross-sectional top view of a battery pack according to some embodiments of the present technology. [Figure 6]

[0019] 1 shows a schematic cross-sectional top view of a battery pack according to some embodiments of the present technology. [Figure 7]

[0020] 1 shows a top isometric view of a diagnostic wafer in accordance with some embodiments of the present technique. [Figure 8]

[0021] 1 shows a partial cross-sectional side elevation view of a diagnostic wafer connected to a sensor pack via a discrete contact PCB and spring-loaded contacts in accordance with some embodiments of the present technology. [Figure 9A]

[0022] 1 shows a partial cross-sectional side elevation view of a diagnostic wafer connected to a sensor pack via a common contact PCB and insulating feedthrough contacts in accordance with some embodiments of the present technology. [Figure 9B]

[0023] FIG. 9B shows a partially exploded bottom isometric view of the diagnostic wafer and sensor pack of FIG. 9A in accordance with some embodiments of the present technology. [Figure 10]

[0024] 1 illustrates operations of an exemplary method for monitoring conditions within a semiconductor processing chamber, in accordance with certain embodiments of the present technique. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]

[0025] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and should not be considered to scale unless expressly stated to be to scale. Moreover, as schematic diagrams, the drawings are provided to aid in understanding and may not include all aspects or information compared to a realistic depiction and may include material that is emphasized for illustrative purposes.

[0015]

[0026] In the accompanying drawings, similar components and / or features may have the same reference numbers. Furthermore, various components of the same type may be distinguished according to the reference numbers, with a letter distinguishing between the similar components. If only a first reference number is used in this specification, the description is applicable to any of the similar components having the same first reference number, regardless of the letter.

[0016]

[0027] Semiconductor substrate processing is performed under carefully controlled processing conditions, as factors such as temperature, pressure, gas / plasma flow, etc. can affect deposition rate and uniformity across the substrate. To ensure that processing conditions meet required parameters, some conventional chambers integrate one or more sensors into the chamber components. However, these sensors are located away from the substrate location, so measurements from the sensors do not indicate conditions at the substrate surface itself. Furthermore, the presence of such sensors can disturb chamber conditions, such as by interfering with gas / plasma flow and / or pressure within the chamber. To address these issues, some systems may utilize diagnostic wafers that include one or more sensors. These wafers may mimic the size and shape of a semiconductor substrate. However, such wafers may be difficult and / or time consuming to manufacture. Furthermore, if one sensor on a wafer fails, the entire wafer must be taken out of operation and replaced or repaired.

[0017]

[0028] The present technology overcomes these challenges by providing a diagnostic wafer that includes several removable sensor packs. The diagnostic wafer may mimic a semiconductor substrate and may be placed on a substrate support during one or more process operations to monitor conditions within a semiconductor processing chamber. Because the sensor packs are removable, each wafer may be configurable in any number of different configurations to monitor a desired set of conditions within the chamber. Furthermore, if one sensor pack fails or is damaged, only that sensor pack needs to be removed from processing, while the remaining packs and wafers may continue to be used. Furthermore, individual packs may be able to be charged faster than conventional wafers, reducing downtime. In some embodiments, the battery packs may be pre-charged, allowing for quick replacement in the field. Manufacturing of individual packs may be easier and faster than building conventional wafers.

[0018]

[0029] While the remainder of the disclosure will routinely identify diagnostic wafers and packs utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to other chamber diagnostic systems. Thus, the present technology should not be considered limited to use with any particular semiconductor chamber or system. The present disclosure will describe some possible diagnostic wafers and packs according to embodiments of the present technology before further variations and adjustments of this system according to embodiments of the present technology are described.

[0019]

[0030] FIG. 1A illustrates a top view of an exemplary embodiment of a diagnostic wafer 100. The diagnostic wafer 100 may include a wafer body 102. The wafer body 102 forms the exterior of the diagnostic wafer 100 and houses the internal components of the diagnostic wafer 100. The wafer body 102 may be sized and shaped to mimic a semiconductor substrate, although the wafer body 102 may have any shape and / or size in various embodiments. For example, the wafer body 102 may be generally circular, oval, rectangular, and / or have any other shape. In some embodiments, the wafer body 102 may have a diameter between about 50 mm and 500 mm, between about 100 mm and 400 mm, or between about 200 mm and 300 mm, although the wafer body 102 may have a larger or smaller diameter in some embodiments. In many cases, the wafer body 102 may have a thickness of about 10 mm or less, about 9 mm or less, about 8 mm or less, about 7 mm or less, about 6 mm or less, about 5 mm or less, about 4 mm or less, about 3 mm or less, or less. The wafer body 102 may be formed from one or more pieces. For example, the wafer body 102 may include a top plate and a bottom plate, and some electrical components may be disposed between the top plate and the bottom plate. In other embodiments, the electrical components may be disposed in a single piece wafer body 102, such as a wafer body 102 formed around the electrical components. The wafer body 102 may be formed from a variety of materials compatible with a semiconductor chamber. For example, the wafer body 102 may be formed from metal and / or ceramic materials, such as, but not limited to, aluminum and / or aluminum oxide. In other embodiments, the wafer body 102 may include other materials compatible with a semiconductor chamber, such as FR4, polyamide, printed circuit board (PCB) materials, and the like.

[0020]

[0031] The top surface 104 of the wafer body 102 may define a number of recesses 106. The recesses 106 may serve as seating locations for one of a number of pucks. Each recess 106 may be defined by a base and at least one sidewall formed in the wafer body 102. In many cases, each of the recesses 106 may have the same size and shape. This may allow a variety of pucks to be inserted into any or nearly any respective recess 106 on the wafer body 102, providing maximum flexibility in puck / sensor placement. In other embodiments, some or all of the recesses 106 may have different sizes and / or shapes to accommodate specific types of pucks. The recesses 106 may be any shape. For example, the recesses 106 may have a generally circular shape, a generally oval shape, a generally rectangular shape, and / or other polygonal shape. The recesses 106 may each have a diameter of about 70 mm or less, about 60 mm or less, about 50 mm or less, about 40 mm or less, about 30 mm or less, or less. In some embodiments, the depth of the recess 106 can be about 6 mm or less, about 5 mm or less, about 4 mm or less, about 3 mm or less, about 2 mm or less, about 1 mm or less, or less.

[0021]

[0032] The wafer body 102 may define any number of recesses 106. For example, the wafer body 102 may define at least about 3 recesses, at least about 4 recesses, at least about 5 recesses, at least about 6 recesses, at least about 7 recesses, at least about 8 recesses, at least about 9 recesses, at least about 10 recesses, at least about 15 recesses, at least about 20 recesses, or more. The recesses 106 may be arranged in any layout about the top surface 104 of the wafer body 102. For example, the recesses 106 may be arranged at regular and / or irregular intervals about the top surface 104 of the wafer body 102. In some embodiments, the recesses 106 may be arranged symmetrically about the top surface 104. The recesses 106 may be arranged in one or more concentric rings in various embodiments.

[0022]

[0033] Some or all of the recesses 106 may include one or more alignment features that may help to allow a puck to be quickly and properly oriented within a given recess 106. By way of example only, the sidewalls of each recess 106 may include one or more notches 108 that protrude from the recess 106 and / or a protrusion (not shown) that protrudes into the center of the recess 106. This allows the corresponding alignment feature of the puck to be properly oriented within the recess 106. Proper orientation of the puck within the recess 106 may ensure that the electrical connectors of each component are properly aligned and engaged when the puck is seated within the recess 106. Although illustrated as having one notch 108, it will be understood that any number of notches, protrusions, and / or other alignment features may be provided in a given recess 106. In many cases, the alignment features may be asymmetrically positioned around the recess 106. This ensures that a puck may only be inserted into the recess 106 in a single orientation.

[0023]

[0034] Each recess 106 may include a number of electrical contacts 110, such as feed-through connectors. In some embodiments, the electrical contacts 110 may include press-fit receptacles that may receive the feed-through connectors of the packs. The electrical contacts 110 may be provided in a lower surface of each recess 106 as shown herein and / or in one or more side walls of the recess 106. The electrical contacts 110 may interact with corresponding connectors of the various packs to facilitate the transfer of power and / or data between the various packs. For example, several wires, electrical buses, and / or other circuits may be used to connect the electrical contacts 110 from the several recesses 106 to facilitate the exchange of data and / or power between the various recesses 106. In some embodiments, rather than using physical connections, power and / or data may be exchanged wirelessly between the packs / recesses 106 using known wireless protocols. The various electrical contacts 110 may include one or more connectors dedicated to data exchange and one or more connectors dedicated to power transfer. As shown, each recess includes a data receiver electrical contact 110a, a data transmitter electrical contact 110b, a positive battery terminal electrical contact 110c, and a negative battery terminal electrical contact 110d. Although shown in a given order, it will be understood that the electrical contacts 110 may be provided in any order. Additionally, although arranged linearly in FIG. 1A, it will be understood that the electrical contacts 110 may be arranged in any pattern within the recesses 106. Although four electrical contacts 110 are shown within each recess 106, in various embodiments, more or fewer electrical contacts 110 may be provided. In some cases, one or more of the recesses 106 may have a different number and / or arrangement of electrical contacts 110 than the other recesses 106.

[0024]

[0035] The electrical contacts 110 may take many forms. For example, the electrical contacts 110 may include spring-loaded contacts, while in other embodiments, the electrical contacts 110 may include pins and / or ports that interact with corresponding connectors on the puck. It will be appreciated that in various embodiments, any form of electrical connector may be utilized as the electrical contacts 110. The electrical contacts 110 may be formed from a conductive material (such as a material already present in the chamber components) that is compatible with the semiconductor processing chamber. Such a material may need to have minimal (e.g., less than 10%) or no change in resistivity over a large temperature range (such as from room temperature up to at least 200° C.) and / or may need to exhibit low thermal expansion. For example, the material for the electrical contacts 110 may have a linear coefficient of thermal expansion of about 30 or less, about 25 or less, about 20 or less, about 15 or less, about 10 or less, about 5 or less, or less. Possible materials may include nickel, stainless steel, aluminum, Kovar, and the like. In some embodiments, a ceramic material (such as alumina or glass) may be provided within the recesses 106 to insulate the various electrical contacts 110 .

[0025]

[0036] FIG. 1B shows a top view of several packs 112 seated in recesses 106 of diagnostic wafer 100. Packs 112 may be removably inserted into recesses 106, whereby individual ones of packs 112 may be removed for repair, replacement, charging, and / or other reasons. By making packs 112 removable, different pack 112 configurations may be adapted to the needs of a particular monitoring application while still allowing the same diagnostic wafer 100 to be utilized. Packs 112 may include at least one data logging pack 112a (which may be optional in some embodiments and will be described in more detail below), at least one battery pack 112b, and at least one sensor pack 112c. Each sensor pack 112c may include one or more sensors that may monitor processing conditions within a semiconductor processing chamber. For example, the sensor pack 112c may include one or more sensors including a temperature sensor, a pressure sensor (including Pirani Microelectromechanical System (MEMS) sensor, piezoelectric transducer, capacitance diaphragm, etc.), a retarding field energy analyzer (RFEA), a plasma probe (Langmuir, hairpin, etc.), a plasma diagnostic light emitting probe, a visible light sensor, an infrared light sensor / camera, and / or other sensors. The data logging pack 112a may include a storage device and possibly a wireless data transmission device and can collect data from each of the sensor packs 112c for analysis of conditions within the semiconductor processing chamber, while the battery pack 112b provides power to each of the sensor packs 112c and the data logging pack 112a.

[0026]

[0037] Each of the pucks 112 may be sized and shaped to be received within a respective one of the recesses 106 of the diagnostic wafer 100. For example, each puck 112 may be generally circular and may have a diameter that matches the diameter of the generally circular recess 106. The thickness of each puck 112 may substantially match the depth of the recess 106. This helps ensure that the top surface of each puck 112 is flush or substantially flush with the top surface 104 of the diagnostic wafer 100, thereby allowing the diagnostic wafer 100 to better mimic a semiconductor substrate and preventing the diagnostic wafer 100 from disturbing chamber conditions during process / test processing. Each puck 112 may include protrusions 114 and / or other alignment features that may be used to properly orient the puck 112 within the recess 106. By way of example only, the protrusions 114 may be aligned with and inserted into the notches 108 of the recess 106 to properly align the puck 112 within the recess 106. Proper alignment can ensure that some electrical contacts (not shown) of the puck 112 are properly aligned with the electrical contacts 110 of a given recess 106. In some embodiments, some or all of the exterior surface of the puck 112 can include a ceramic material, such as a ceramic coating. For example, a ceramic material (coating, plate, etc.) can be provided in proximity to the electrical contacts of the puck 112 to help insulate the electrical contacts. The ceramic coating of the sensor can help the sensor withstand harsh semiconductor processing environments. The coating can be done by atomic layer deposition (ALD) and / or another type of thin film deposition process. A coating can also be applied to the puck body 102 and / or the electronics (in this case, the coating can be a polymer coating, such as polypropylene).

[0027]

[0038] As shown, the diagnostic wafer 100 includes one data logging pack 112a coupled to three battery packs 112b and five sensor packs 112c, although the diagnostic wafer 100 may include any number of each type of pack 112 in various embodiments, and in some embodiments, the data logging pack 112a may be omitted. In some embodiments, each of the recesses 106 may receive a pack 112, and in other cases, one or more of the recesses 106 may be empty. In some embodiments, rather than leaving the recesses 106 empty, a dummy pack (e.g., a blank pack body) may be placed in the recess 106. This may be done to ensure that the top surface of the pack 112 is substantially flat so as not to interfere with the fluid flow and / or pressure distribution in the chamber. The packs 112 may be provided in any arrangement within the diagnostic wafer 100 to meet the particular monitoring needs of a particular test operation. In many cases, the sensor packs 112c may be symmetrically arranged around the diagnostic wafer 100, but in some cases, an asymmetric arrangement may be utilized. In some embodiments, each of the sensor packs 112c used may include the same type of sensor, while in other embodiments, at least one of the sensor packs 112c includes a different sensor than a sensor in at least one other sensor pack 112c. For example, in some embodiments, one or more of the sensor packs 112c may include Pirani pressure and temperature sensors, one or more of the sensor packs 112c may include a piezoelectric transducer pressure sensor, and one or more of the sensor packs 112c may include an optical sensor. In some embodiments, a single sensor pack 112c may include multiple of the same and / or different types of sensors.

[0028]

[0039] In some embodiments, one or more of the packs 112 may include one or more status indicators. For example, some or all of the packs 112 may include status light emitting diodes (LEDs) that may be illuminated to indicate the status of the respective packs 112. By way of example only, the status LED of the battery pack 112b may be illuminated green when the battery pack 112b has a high level of charge (e.g., 50% or more), amber when the battery pack 112b has a medium level of charge (e.g., 10%-50%), and red when the battery pack 112b has a low level of charge (e.g., 0%-10%). Additionally, while charging, the battery pack 112b may flash until the battery pack 112b is fully charged, at which point the status LED may be illuminated at a steady state. The status LEDs of the data logger pack 112a and / or sensor pack 112c may be on and / or off in a predetermined color and / or pattern (e.g., steady, flashing, etc.) when a particular pack 112 is performing a given process (logging data, measuring process status, etc.) and / or is at rest.

[0029]

[0040] The use of a diagnostic wafer with several interchangeable packs provides a robust solution for monitoring process conditions in a substrate processing chamber. For example, the number and selection of sensor packs may enable monitoring any number of chamber conditions at the location of the semiconductor substrate without disturbing the chamber conditions. Such a diagnostic wafer may enable measurement of conditions (such as pressure and / or temperature distribution) in a semiconductor chamber by using a diagnostic disk of a size and shape similar to the wafer. Such a wafer may allow individual packs to be replaced and / or removed in the event of a failure or the like without affecting the remainder of the wafer and / or other packs. Each battery pack may be charged individually. As a result, charging time / downtime for each pack may be reduced. The battery packs may be charged at a dedicated charging station (ex-situ) and / or wirelessly (in-situ). Wireless in-situ charging may allow the diagnostic wafer to be kept in place in the chamber, avoiding chamber movement and / or air exposure. Furthermore, such features provide a flexible test platform that allows users to combine sensors to create custom sensor configurations for specific test processes.

[0030]

[0041] FIG. 2 illustrates a wiring diagram of a diagnostic wafer 200 according to some embodiments of the present technology. FIG. 2 may include one or more components described above with respect to FIG. 1A and FIG. 1B, and may provide further details related to the diagnostic wafer 100. The diagnostic wafer 200 is understood to include any feature or aspect of the diagnostic wafer 100 described above. For example, the diagnostic wafer 200 may include a wafer body defining several recesses, each of which may receive one of several packs 212. The diagnostic wafer 200 may include several electrical contacts 210. Each of the several electrical contacts 210 is coupled to a bus 220 or other connection circuit. The bus 220 or other connection circuit may be used to electrically couple the various packs 212 together. For example, each recess may include two (or more) connectors dedicated to data exchange and two (or more) connectors dedicated to power transfer. As illustrated, each sensor pack 212c may be disposed within a recess. The recesses include data receiver electrical contacts 210a, data transmitter electrical contacts 210b, positive battery terminal electrical contacts 210c, and negative battery terminal electrical contacts 210d. The bus 220 may include circuit elements (wires, optical fibers, etc.) that extend between the various electrical contacts 210 and couple the electrical contacts 210 of the various recesses together to facilitate the transmission of power and / or data between the recesses. For example, the circuit elements may couple the receiver and / or transmitter electrical contacts 210a,b of each sensor pack 212c to the recess that holds the data logger pack 212a (which may be located within any of the recesses in some embodiments). The circuit elements may couple the negative and positive terminals of each of several battery packs to the positive and negative battery electrical contacts 210c,d of each recess to facilitate the transfer of power from the battery pack 212b to the data logger pack 212a and / or the sensor pack 212c. 2 is by way of example only, and it will be appreciated that a variety of wiring configurations can be used to electrically couple the various recesses of diagnostic wafer 200 to puck 212. In some embodiments, a timer can be embedded and / or otherwise incorporated into data logger puck 212a and / or the diagnostic wafer body. The timer can distribute power to the sensor pack 212c in pulse mode (send trigger signals to start and stop measurements). In some embodiments, the data logger pack 212a can be operated in the same power mode as the other packs 212 (e.g., all packs 212 in pulse mode), while in other embodiments, the data logger pack 212a can be operated in a power mode independent of the other packs. For example, the sensor pack 212c can be operated in pulse mode and the data logger pack 212a is operated in continuous power mode.

[0031]

[0042] In some embodiments, one or more of the packs of the diagnostic wafer may have different sizes and / or shapes. FIG. 3 illustrates a top view of an exemplary embodiment of a diagnostic wafer 300. FIG. 3 may include one or more of the components described above with respect to FIGS. 1A and 1B and may illustrate further details related to the diagnostic wafer 100. It is understood that the diagnostic wafer 300 includes any of the features or aspects of the diagnostic wafer 100 described above. For example, the diagnostic wafer 300 may include a wafer body 302 that defines several recesses, each of which may receive one of several pucks 312. An upper surface 304 of the wafer body 302 may define several recesses that may serve as seating locations for one of several pucks 312. The recesses may be of any shape. For example, the recesses receiving the data logger pack 312a and / or the sensor pack 312c may have a generally circular shape, while the recess for the battery pack 312b may have a generally trapezoidal shape (regular and / or irregular, possibly with rounded corners). The generally trapezoidal recesses may be larger than the circular recesses, allowing a larger and / or more powerful battery pack 312b to interact with the diagnostic wafer 300. By utilizing an irregular trapezoidal recess as shown, the battery pack 312b may only be insertable into the recess in a single orientation, eliminating the need for other alignment features. Although the generally trapezoidal battery pack 312b is shown with the smaller top side facing toward the center of the wafer body 302, it will be understood that the battery pack 312b and the corresponding recess may be oriented in any direction on the top surface 304 of the wafer body 302. However, by orienting the battery pack 312b and corresponding recess, a larger end of the generally trapezoidal shape is disposed closer to the outer periphery of the wafer body 302, which may allow a larger battery pack 312b to fit onto the wafer body 302. The larger battery pack 312b may include larger and / or more batteries and may be able to power the data logger pack 312a and the sensor pack 312c for a longer duration.

[0032]

[0043] As shown, the diagnostic wafer 300 includes one data logging pack 312a coupled to three battery packs 312b and five sensor packs 312c, although the diagnostic wafer 300 may include any number of each type of pack 312 in various embodiments. The packs 312 may be provided in any arrangement within the diagnostic wafer 300 to meet the particular monitoring needs of a particular test process. In many cases, the sensor packs 312c may be symmetrically arranged about the diagnostic wafer 300, although in some cases, an asymmetric arrangement may be utilized. In some embodiments, each of the sensor packs 312c used may include the same type of sensor, while in other embodiments, at least one of the sensor packs 312c includes a different sensor than the sensor in at least one other sensor pack 312c. For example, in some embodiments, one or more of the sensor packs 312c may include Pirani pressure and temperature sensors, one or more of the sensor packs 312c may include a piezoelectric transducer pressure sensor, and one or more of the sensor packs 312c may include an optical sensor. In some embodiments, a single sensor pack 312c may include multiple sensors of the same and / or different types.

[0033]

[0044] FIG. 4 illustrates a top view of a sensor pack 400 according to some embodiments of the present technology. FIG. 4 may include one or more components described above with respect to FIG. 1A and FIG. 1B and may provide further details related to the diagnostic wafer 100 or 300. It is understood that the diagnostic wafer 400 includes any feature or aspect of the sensor pack 112c or 312c described above. The sensor pack 400 may include a pack body 402 that houses one or more sensors 404. The pack body 402 may be dimensioned to be received within a recess of a diagnostic wafer, such as the diagnostic wafer 100 or 200 described above. A bottom surface of the pack body 402 may include a number of electrical contacts (not shown) that are used to electrically couple the sensor pack 400 to the diagnostic wafer. The sensor 404 may be disposed within a top surface of the pack body 402. Thereby, a top surface of the sensor header may be exposed through the top surface of the pack body 402. Although a single sensor 404 is shown centered on the top surface of the puck body 402, it will be understood that one or more sensors 404 may be located anywhere on the puck body 402. The sensors 404 on the sensor pack 400 may all be the same type of sensor, or the sensor pack 400 may include multiple types of sensors. The sensors may be selected from temperature sensors, pressure sensors (including Pirani Microelectromechanical System (MEMS) sensors, piezoelectric transducers, capacitance diaphragms, etc.), retarded field energy analyzers (RFEA), plasma probes (Langmuir, hairpin, etc.), plasma diagnostic light emitting probes, visible light sensors, infrared light sensors / cameras, and / or other sensors. In some embodiments, some or all of the puck body 402 may be formed from and / or coated with chemically resistant dielectric and / or composite materials (ceramic materials or polymer coatings). For example, chemically resistant materials may be applied to one or more surfaces of the puck body 402 via atomic layer deposition and / or other processes. Such coatings may help protect the sensor pack 400 and / or the sensor 404 from chemical interactions that may cause degradation and / or erosion of the pack body 402 and / or the sensor 404.In some embodiments, only the sensor header may be coated, rather than the entire puck body 402.

[0034]

[0045] FIG. 5 shows a schematic cross-sectional top view of a battery pack 500 according to some embodiments of the present technology. FIG. 5 may include one or more components described above with respect to FIGS. 1A and 1B and 3, and may show further details related to the diagnostic wafer 100 or 300. It is understood that the battery pack 500 includes any feature or aspect of the battery pack 112b or 312b described above. The battery pack 500 may include a pack body 502 that houses several batteries 504. The pack body 502 may be dimensioned to be received within a recess of a diagnostic wafer, such as the diagnostic wafer 100 or 200 described above. The bottom surface of the pack body 502 may include several electrical contacts (not shown) that are used to electrically couple the battery pack 500 to the diagnostic wafer. The batteries 504 may be provided on a substrate 506 disposed within the pack body 502. The batteries 504 may be disposed on one or both sides of the substrate 506. For example, in some embodiments, some batteries 504 may be provided on the upper side of the substrate 506 and some batteries 504 may be provided on the lower side of the substrate 506. Some or all of the batteries 504 may be operated in series and / or parallel with one or more other batteries 504. For example, a set of batteries 504 may be coupled in series and / or parallel with each other. By way of example only, the batteries 504 may be 1.5V batteries that may be connected in series (e.g., two batteries) for a total of 3V and connected in parallel for higher current. The battery pack 500 may include any number of batteries 504. For example, the battery pack 500 may include at least about 1 battery, at least about 2 batteries, at least about 5 batteries, at least about 10 batteries, at least about 20 batteries, at least about 30 batteries, at least about 40 batteries, at least about 50 batteries, at least about 60 batteries, at least about 70 batteries, at least about 80 batteries, at least about 90 batteries, at least about 100 batteries, or more. The number and / or arrangement of batteries 504 on the upper side of the substrate 506 may match or differ from that on the lower side of the substrate 506.Although the batteries 504 are shown arranged in several rows and columns, it will be appreciated that the batteries 504 may be arranged in any pattern in various embodiments.

[0035]

[0046] The battery 504 can be any type of battery that can withstand the chamber conditions and is not prone to explosion. For example, the battery 504 can be selected to be operable at temperatures of at least about 100° C., at least about 125° C., at least about 150° C., at least about 175° C., at least about 200° C., or higher. In some embodiments, the battery 504 can be a solid-state cell. In some embodiments, some or all of the pack body 502 can be formed from and / or coated with chemically resistant dielectric and / or composite materials. For example, chemically resistant materials can be added to one or more surfaces of the pack body 502 via atomic layer deposition and / or other processes. Such coatings can help protect the battery pack 500 from chemical interactions that may cause degradation and / or erosion of the pack body 502.

[0036]

[0047] During test operations, the battery packs 500 may be operated in a continuous power mode and / or a pulsed mode. In a continuous power mode, power may be continuously provided from one or more battery packs 500 to the data logger packs and / or sensor packs. This may allow for continuous sampling of sensor data. In a pulsed mode, the battery 504 may be pulsed or powered for a short period of time (such as between about 1 and 10 seconds, between about 2 and 9 seconds, between about 3 and 8 seconds, between about 4 and 7 seconds, or between about 5 and 6 seconds) and may be allowed to recover for a preset period of time (such as between about 5 and 30 seconds, between about 10 and 25 seconds, or between about 15 and 20 seconds). For example, a 0.1 Hz duty cycle may provide a 4 second pulse time and a 6 second recovery time, a 0.05 Hz duty cycle may provide a 4 second pulse time and a 16 second recovery time, and / or a 0.066 Hz duty cycle may provide a 4 second pulse time and an 11 second recovery time, although other duty cycles for the pulsed operation may be utilized in various embodiments. During the pulse time, the sensor pack may be powered to take measurements that may be transmitted to the data logger pack before being powered off during the recovery time. The pulse cycle may be repeated any number of times during a test / processing operation. By operating the battery 504 in a pulsed mode, the battery life of the battery pack 500 may be extended compared to operation in a continuous mode. Thus, pulsed mode operation may be particularly advantageous in longer test operations. In some embodiments, the battery 504 of the battery pack 500 may be charged by coupling the electrical contacts to a charging device. In other embodiments, the battery 504 of the battery pack 500 may be charged wirelessly.

[0037]

[0048] FIG. 6 illustrates a schematic cross-sectional top view of a battery pack 600 according to some embodiments of the present technology. FIG. 6 may include one or more components described above with respect to FIGS. 1A-1B and 3 and 5, and may illustrate further details related to the diagnostic wafer 100 or 300. The battery pack 600 is understood to include any features or aspects of the battery packs 112b, 312b, or 500 described above. The battery pack 600 may include a pack body 602 that houses several batteries 604. The pack body 602 may be dimensioned to be received within a recess of a diagnostic wafer, such as the diagnostic wafer 300 described above. For example, the pack body 602 may be generally trapezoidal in shape (possibly with rounded corners) to fit within a recess formed in the diagnostic wafer 300. For example, a narrower end of the trapezoid may be located toward the center of the wafer body, while a larger end of the trapezoid may be located proximate the periphery of the wafer body. Such a trapezoidal orientation may allow the battery pack 600 to utilize a greater amount of the surface area of ​​the diagnostic wafer. This may allow the size and / or number of batteries 604 provided within the battery pack 600 to be increased. This may allow a given battery pack 600 to be used for longer test applications. The bottom surface of the pack body 602 may include several electrical contacts (not shown) that are used to electrically couple the battery pack 600 to the diagnostic wafer. The batteries 604 may be provided on a substrate 606 disposed within the pack body 602. The batteries 604 may be disposed on one or both sides of the substrate 606. For example, in some embodiments, some batteries 604 may be provided on an upper side of the substrate 606 and some batteries 604 may be provided on a lower side of the substrate 606. The battery pack 600 may include any number of batteries 604.For example, the battery pack 600 may include at least about 1 battery, at least about 2 batteries, at least about 5 batteries, at least about 10 batteries, at least about 20 batteries, at least about 30 batteries, at least about 40 batteries, at least about 50 batteries, at least about 60 batteries, at least about 70 batteries, at least about 80 batteries, at least about 90 batteries, at least about 100 batteries, or more. In some embodiments, the substrate 606 may have generally the same shape as the battery pack 600 (i.e., trapezoidal). In some embodiments, the substrate 606 may be generally hexagonal as shown in FIG. 6. In some embodiments, the substrate 606 may be or may include a PCB. The PCB mechanically supports and electrically connects the battery 604 and / or other electrical components of the battery pack 600. For example, the PCB may include several circuit traces, wires, and / or other connections. They facilitate the exchange of electrical signals between the various electrical components of the battery pack 600. In some embodiments, the battery pack 600 may include an electronic chip 608, which may include one or more electrical components. The electronic chip 608 may be mounted on and / or otherwise coupled to the substrate 606. For example, the electronic chip 608 may be disposed on a PCB forming the substrate 606. The electronic chip 608 may include a voltage converter and / or a processor. The voltage converter and / or processor may be electrically coupled to the battery 604 through the PCB and may facilitate the transfer of power to other packs and / or control the operating mode of the battery pack 600. For example, the data logger pack may send commands to the processor to operate the battery pack 600 in a pulsed mode by selectively turning on and off each sensor pack.

[0038]

[0049] FIG. 7 illustrates a top isometric view of an exemplary embodiment of a diagnostic wafer 700. FIG. 7 may include one or more components described above with respect to FIGS. 1A-6 and may illustrate further details related to diagnostic wafers and / or pucks described elsewhere herein. Diagnostic wafer 700 is understood to include any feature or aspect of diagnostic wafers 100, 200, or 300 described above. For example, diagnostic wafer 700 may include a wafer body 702 defining several recesses 706, each of which may receive one of several pucks 712. For example, top surface 704 of wafer body 702 may define several recesses 706, each of which may serve as a seating location for one of several pucks 712. Recesses 706 may be of any shape. For example, the recesses 706 receiving the data logger pack 712a and / or the sensor pack 712c may have a generally circular shape, while the recesses 706 for the battery pack 712b may have a generally trapezoidal shape (regular and / or irregular, possibly with rounded corners). The generally trapezoidal recesses 706 may be larger than the circular recesses 706, allowing a larger and / or more powerful battery pack 712b to interact with the diagnostic wafer 700. By utilizing the irregular trapezoidal recesses 706 as shown, the battery pack 712b may only be insertable into the recesses 706 in a single orientation, eliminating the need for other alignment features. In some embodiments, each recess 706 may be a distinct feature with sharp boundaries, while in other embodiments, some or all of the recesses 706 may connect to one another to form a larger recess.

[0039]

[0050] As shown, the diagnostic wafer 700 includes one data logging pack 712a coupled to three battery packs 712b and five sensor packs 712c, although the diagnostic wafer 700 may include any number of each type of pack 712 in various embodiments. In some embodiments, the diagnostic wafer 700 may omit the data logging pack 712a and instead include a sensor pack 712c and / or one or more wireless antennas disposed within the wafer body 702 that transmit data from the sensor pack 712c to a remote computing device. The packs 712 may be provided in any arrangement within the diagnostic wafer 700 to meet the particular monitoring needs of a particular test operation.

[0040]

[0051] The wafer body 702 may include one or more PCBs 720 disposed within the upwardly facing surface of the wafer body 702. For example, in some embodiments, each recess 706 may include a dedicated PCB 720, while in other embodiments, one or more recesses 706 may share a single PCB 720. As shown, a single PCB 720 may be provided that is electrically coupled to each of the recesses 706. A portion of the PCB 720 may extend into the recess 706, such that the pucks 712 may be electrically coupled to one another when disposed within the recess 706. For example, each recess 706 includes a branch 722 of the PCB 720. The branch 722 allows contacts of the pucks 712, such as spring-loaded contacts, glass or ceramic feedthroughs, to interact with corresponding connectors of the PCB 720. For example, each branch 722 may extend sufficiently into each recess 706, such that the connectors of the PCB 720 are aligned with contacts disposed on the underside of each of the pucks 712. In some embodiments, rather than using contacts disposed on the underside of the puck 712, each lateral edge of the puck 712 may include electrical contacts. These electrical contacts may engage with corresponding connectors (common in this case, but may also be individual) on the PCB 720. A dedicated top cover 724 may be provided to isolate the PCB 720 from gases present in the process chamber. The top cover 724 represents a specially shaped portion of the wafer body 702. The shape of the top cover 724 may be designed to match the design of the wafer body 702 and the recess / puck arrangement. The top cover 724 allows the upper surface 704 of the diagnostic wafer 700 to be substantially planar to prevent any flow, pressure, and / or temperature non-uniformity issues that arise during testing operations. In some embodiments, the top cover 724 may define one or more openings 726. For example, the top cover 724 may define a central opening 726 sized and shaped to allow the puck 712 to seat inside the top cover 724. For example, the opening 726 may be generally circular (or other shape) to allow the sensor pack 712c and / or the data logging pack 712a to be seated within the opening 726.In other embodiments, the opening 726 may be generally trapezoidal (or other shape) to allow the battery pack 712b to seat within the opening 726. In embodiments that include an opening 726, a bottom or side surface of the diagnostic pack 712 may include one or more electrical contacts that allow the internally inserted pack 712 to be electrically coupled with contacts of the PCB 720.

[0041]

[0052] FIG. 8 illustrates a partial cross-sectional side elevation view of an exemplary embodiment of a diagnostic wafer 800. FIG. 8 may include one or more components described above with respect to FIGS. 1A-7 and may illustrate further details related to diagnostic wafers and / or packs described elsewhere herein. It is understood that diagnostic wafer 800 may include any feature or aspect of diagnostic wafers 100, 200, 300, or 700 described above. For example, diagnostic wafer 800 may include a wafer body 802 defining several recesses, each of which may receive one of several packs 812. A lower portion of wafer body 802 may include one or more PCBs 820 and / or other connector substrates. At least a portion of PCB 820 is disposed within a lower surface of each recess. This may allow electrical contacts of packs 812 to interact with PCB 820 to electrically couple packs 812 to one another. This may allow a battery pack to power data logging packs and / or sensor packs and facilitate data transfer between various packs 812.

[0042]

[0053] 8, each puck 812 may include one or more spring-loaded contacts 814. The one or more spring-loaded contacts 814 may electrically couple the puck 812 to the PCB 820 when the puck 812 is inserted into the recess. The spring-loaded contacts 814 may include a spring-loaded pin, a screw, or other feature. For example, each spring-loaded contact 814 may include a conductive screw 816. The conductive screw 816 may extend through at least a portion of the underside of the puck 812 and contact an internal electrical component of the puck 812. A conductive spring finger 818 (or other spring) may be positioned to contact a head of the screw 816. When the puck 812 is inserted into the recess, the spring finger 818 may contact a corresponding connector on the PCB 820 and establish contact between the PCB 820 and the screw 816 / puck 812. The use of spring-loaded contacts 814 may help ensure that a reliable connection is made between the puck 812 and the PCB 820 without the contacts 814 being damaged during insertion of the puck 812 into the recess. Additionally, while the spring fingers 818 are shown positioned on the bottom of each screw 816, some embodiments may reverse the orientation, whereby the spring fingers 818 are positioned within the body of the puck 812 with the distal ends of the screws 816 projecting downward to contact the top surface of the PCB 820. In some embodiments, spring-loaded contacts may be used to establish contact between the sides of the puck 812 and the PCB. The edges of the puck 812 may include O-rings 830 and / or other seals. The O-rings 830 and / or other seals may help create a vacuum-tight fit of the puck 812 within the recess and help retain the puck 812 within the recess during testing operations.

[0043]

[0054] Although illustrated as a sensor pack having at least one sensor 822 (although any number of sensors may be included in various embodiments), it will be understood that a similar contact layout may be used to couple the battery packs and / or data logging packs to the PCB 820 in a similar manner. As illustrated, each pack 812 may include four different spring-loaded contacts 814, although any number of contacts 814 may be used in various embodiments. The use of four contacts 814 may allow for the use of separate contacts 814 to receive and / or transmit electrical signals and to couple the negative and positive terminals of each of several battery packs with each data logger pack and / or sensor pack.

[0044]

[0055] FIG. 9A illustrates a partial cross-sectional side elevation view of an exemplary embodiment of a diagnostic wafer 900. FIG. 9A may include one or more components described above with respect to FIGS. 1A-8 and may illustrate further details related to diagnostic wafers and / or pucks described elsewhere herein. The diagnostic wafer 900 is understood to include any feature or aspect of the diagnostic wafers 100, 200, 300, 700, or 800 described above. For example, the diagnostic wafer 900 may include a wafer body 902 defining several recesses, each of which may receive one of several pucks 912. A lower portion of the wafer body 902 may include one or more PCBs 920 and / or other connector substrates. At least a portion of the PCBs 920 are disposed within a lower surface of each recess. This may allow electrical contacts of the pucks 912 to interact with the PCBs 920 to electrically couple the pucks 912 to one another. This may allow the battery pack to power the data logging pack and / or the sensor pack and facilitate data transfer between the various packs 912.

[0045]

[0056] 9A and 9B, each puck 912 may include one or more feedthrough contacts 914, such as glass or ceramic feedthroughs. The one or more feedthrough contacts 914 may electrically couple the puck 912 to the PCB 920 when the puck 912 is inserted into the recess. For example, the feedthroughs 914 may extend through at least a portion of a lower surface of the puck 912 and contact an internal electrical component of the puck 912. When the puck 912 is inserted into the recess, the feedthroughs 914 may each be received in a corresponding receptacle 916 formed in a lower surface of the recess to establish contact between the PCB 920 and the feedthroughs 914. As shown, each puck 912 may include four different feedthroughs 914, although any number of feedthroughs 914 may be utilized in various embodiments. The use of four feedthroughs 914 may allow for a separate feedthrough 914 to be used for receiving and / or transmitting electrical signals, as well as for coupling the negative and positive terminals of each of several battery packs with each data logger pack and / or sensor pack. The edges of the pack 912 may include O-rings 930 and / or other seals. The O-rings 930 and / or other seals may help create a vacuum-tight fit of the pack 912 within the recess and help retain the pack 912 within the recess during testing operations.

[0046]

[0057] In some embodiments, the diagnostic wafer described herein may not include a data logging pack. In such embodiments, measurements and / or other data from the sensor packs may be wirelessly transmitted to a remote computing device (outside the chamber) while the diagnostic wafer is disposed in the chamber. This may allow real-time measurements to be tracked without the need for a data logging pack (although some embodiments may still include a data logging pack to provide backup storage). For example, one or more of the packs and / or wafers may include a wireless antenna that may transmit data to a remote computing device. In some embodiments, each of the sensor packs may include a wireless communication antenna. The wireless communication antenna allows each sensor pack to communicate directly with a remote computing device. Alternatively or additionally, a wireless antenna may be provided within the diagnostic wafer body. For example, the wireless antenna may be coupled to a PCB or other signal interface of the diagnostic wafer body. The PCB or other signal interface allows measurements and / or other data from the sensor packs to be collected and transmitted to a remote computing device via an antenna provided within the diagnostic wafer body.

[0047]

[0058] In some embodiments, a viewing window (such as a quartz window) may be provided in the chamber wall to facilitate transmission of wireless signals between the remote computing device and the sensor pack antenna and / or diagnostic wafer antenna. In some embodiments, an antenna may be embedded in the chamber wall to facilitate communication between the wafer and the remote computer. For example, the chamber wall antenna may relay signals from the sensor pack antenna and / or diagnostic wafer antenna to the remote computing device, or vice versa. The signal transmitted by the sensor pack antenna and / or diagnostic wafer antenna may be between 1 MHz and 80 GHz in various embodiments. The frequency of the signal is selected based on process operating conditions and / or chamber design to minimize interference with the transmitted signal. By way of example only, the frequency may be at least 5 times higher than the maximum plasma frequency to avoid signal interference.

[0048]

[0059] 10 illustrates operations of an exemplary method 1000 for monitoring conditions in a semiconductor processing chamber in accordance with some embodiments of the present technique. The method may be used to monitor several different conditions in a semiconductor processing chamber, including, but not limited to, temperature in the semiconductor processing chamber, pressure in the semiconductor processing chamber, flow of ions and electrons in the semiconductor processing chamber, energy of ions and electrons in the semiconductor processing chamber, plasma potential in the semiconductor processing chamber, light emission in the semiconductor processing chamber, etc. Method 1000 may be performed using a diagnostic wafer similar to diagnostic wafers 100, 200, 300, 700, 800, or 900 described above. Method 1000 may include several optional operations that may or may not be specifically associated with some embodiments of the method in accordance with the present technique.

[0049]

[0060] Method 1000 may include optional operations before the start of method 1000, or the method may include additional operations. For example, method 1000 may include operations performed in a different order than those illustrated. In some embodiments, method 1000 may include placing a diagnostic wafer on a substrate support of a semiconductor processing chamber in operation 1005. The diagnostic wafer may be similar to those described herein and may include a wafer body defining a plurality of recesses, at least one battery pack, at least one sensor pack, and optionally at least one data logging pack. Each of the packs may be positionable within one of the plurality of recesses. The sensor pack used may be selected and positioned within the wafer to measure one or more process conditions within the chamber around the surface of the wafer. In some embodiments, the packs may be provided in any position within the recess. This allows for customization of the sensing capabilities of the wafer to measure different chamber conditions. One or more process operations may be performed within the semiconductor processing chamber in operation 1010. In some embodiments, the process may include flowing one or more precursors into a processing chamber. For example, the precursors may be flowed into a processing region of the chamber. In some aspects, the precursors may be or include a carbon-containing precursor. A plasma of the precursors may be generated in the processing region, such as by providing RF power to a face plate to generate a plasma. Materials generated in the plasma, such as carbon-containing materials, may be deposited on a substrate.

[0050]

[0061] At least one process condition may be monitored in the semiconductor processing chamber using a sensor pack in operation 1015. For example, the sensor pack may monitor the temperature in the semiconductor processing chamber, the pressure in the semiconductor processing chamber, the flow of ions and electrons in the semiconductor processing chamber, the energy of ions and electrons in the semiconductor processing chamber, the plasma potential in the semiconductor processing chamber, and / or the light emission in the semiconductor processing chamber. The various packs may be powered continuously and / or in a pulsed mode using a battery pack. In some embodiments, data from the sensor packs may be recorded using at least one data logging pack. For example, the data logging pack may receive data from the sensor pack via a wired connection (such as a bus or other circuitry in the wafer) and / or wirelessly. In such an embodiment, after the data is recorded and the process operation is stopped, the data logging pack may be removed from the chamber and may interact with a computing device. For example, the data logging pack may be physically (such as via a dock or other connector) and / or wirelessly coupled to the computing device. The data may thereby be accessed using the computing device. This data may be used to determine whether a desired process condition is maintained during the process operation. In some embodiments, data from one chamber may be compared to data from another chamber to ensure that the chambers are producing identical or similar processing conditions that will produce uniform semiconductor substrates in both chambers. Similarly, data from wafers can be compared between tools to ensure substrate film consistency between substrates by ensuring that the process tools are processing in the same manner.

[0051]

[0062] In some embodiments, data from the sensor pack may be wirelessly transmitted to a remote computing device (outside the chamber) while the wafer is placed in the chamber. This allows real-time measurements to be tracked. For example, one or more of the packs and / or wafers may include wireless antennas that may transmit data to a remote computing device. In some embodiments, a sight glass (such as a quartz window) may be provided in the chamber wall to allow the wireless signal to be transmitted outside the chamber. In some embodiments, an antenna may be embedded in the chamber wall to facilitate communication between the wafer and the remote computer. In some embodiments, a transmitter and / or receiver antenna may be placed on either side of the sight glass to facilitate transmission of signals between the interior of the chamber and the remote computing device. This may be particularly effective when higher frequency signals are used due to the short wavelengths of such signals. The signal transmitted by the wafer may be between 1 MHz and 80 GHz in various embodiments. The frequency of that signal is selected based on process conditions and / or chamber design to minimize interference with the transmitted signal. By way of example only, the frequency may be at least 5 times higher than the maximum plasma frequency to avoid signal interference. In some embodiments, the signal may be between about 2.4 GHz and 5 GHz, such as by using WiFi and / or Bluetooth communication. Some embodiments that use a wireless antenna to communicate the sensor data may also include a data logging pack that may record the sensor data, while other embodiments that use a wireless antenna may omit the data logging pack entirely.

[0052]

[0063] In the foregoing description, for purposes of explanation, numerous details are presented in order to facilitate an understanding of various embodiments of the present technology. However, it will be apparent to one of ordinary skill in the art that certain embodiments may be practiced without some of these details or with additional details.

[0053]

[0064] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Moreover, some well-known processes and elements have not been described to avoid unnecessarily obscuring the technology. Thus, the above description should not be construed as limiting the scope of the technology.

[0054]

[0065] Where a range of values ​​is provided, it is to be understood that each intervening value between the upper and lower limits of that range is specifically disclosed, to the smallest unit of the lower limit, unless the context clearly indicates otherwise. Any smaller ranges between any stated or unstated intervening value in a stated range, as well as any other stated or intervening value in that stated range, are also included. The upper and lower limits of these smaller ranges may be individually included or excluded from the range, and each range in which either, neither or both limits are included in the smaller ranges is also encompassed within the scope of the technology, subject to any specifically excluded limits in the stated range. Where a stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0055]

[0066] As used in the specification and claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, a reference to "an opening" includes a plurality of such openings, a reference to "an opening" includes a reference to one or more openings and equivalents thereof known to those skilled in the art, and so forth.

[0056]

[0067] Additionally, the terms "comprises," "comprising," "containing," "containing," "including," and "including," when used in this specification and claims, are intended to specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, operations, or groups.

Claims

1. a wafer body defining a plurality of recesses; at least one data logging puck positionable within one of the plurality of recesses; at least one battery pack positionable within one of the plurality of recesses; and A diagnostic wafer for a semiconductor processing chamber comprising at least one sensor pack positionable within one of said plurality of recesses.

2. The semiconductor processing chamber diagnostic wafer of claim 1 , wherein each of said at least one battery pack includes a plurality of batteries.

3. Each of the at least one sensor pack comprises:

10. The diagnostic wafer for a semiconductor processing chamber of claim 1, comprising at least one sensor selected from the group consisting of a temperature sensor, a pressure sensor, a retarding field energy analyzer (RFEA), a plasma probe, a plasma diagnostic light emitting probe, a visible light sensor, and an infrared light sensor / camera.

4. 2. The diagnostic wafer for a semiconductor processing chamber of claim 1, wherein at least some of the at least one data logging pack, the at least one battery pack, and the at least one sensor pack include an alignment feature for properly orienting a respective pack within one of the plurality of recesses.

5. 10. The diagnostic wafer for semiconductor processing chambers of claim 1, wherein said wafer further comprises a bus coupling each of said at least one battery pack, said at least one sensor pack, and said at least one data logging pack.

6. 10. The diagnostic wafer for a semiconductor processing chamber of claim 1, wherein at least some of the at least one data logging pack, the at least one battery pack, and the at least one sensor pack include a ceramic coating.

7. the at least one sensor pack includes a plurality of sensor packs; 10. The diagnostic wafer for a semiconductor processing chamber of claim 1, wherein each of said plurality of sensor packs includes a same type of sensor.

8. the at least one sensor pack includes a plurality of sensor packs; The diagnostic wafer for a semiconductor processing chamber of claim 1 , wherein at least some of said plurality of sensor packs include different types of sensors.

9. 2. The diagnostic wafer for a semiconductor processing chamber of claim 1, wherein the at least one data logging pack, the at least one battery pack, and the at least one sensor pack are each insertable into one of the plurality of recesses.

10. a wafer body defining a plurality of recesses, each of the plurality of recesses including a plurality of electrical contacts, the wafer body including connection circuitry electrically coupling the plurality of electrical contacts of each of the plurality of recesses with the plurality of electrical contacts of at least one other of the plurality of recesses; a plurality of battery packs positionable within a recess of the plurality of recesses; and A diagnostic wafer for a semiconductor processing chamber comprising a plurality of sensor packs positionable within one of the plurality of recesses.

11. The semiconductor processing chamber diagnostic wafer of claim 10 , wherein at least one of the plurality of battery packs includes a status LED.

12. The semiconductor processing chamber diagnostic wafer of claim 10 , wherein at least one of said plurality of sensor packs includes a status LED.

13. 11. The diagnostic wafer for semiconductor processing chambers of claim 10, wherein one or both of the wafer body and the plurality of sensor packs include a wireless antenna.

14. 11. The diagnostic wafer for a semiconductor processing chamber of claim 10, wherein a thickness of each of said plurality of sensor packs matches a depth of each of said plurality of recesses.

15. placing a diagnostic wafer on a substrate support of a semiconductor processing chamber, the diagnostic wafer comprising: a wafer body defining a plurality of recesses; at least one data logging puck positionable within one of the plurality of recesses; at least one battery pack positionable within one of the plurality of recesses; and placing a diagnostic wafer including at least one sensor pack positionable within one of the plurality of recesses; performing one or more processing operations in the semiconductor processing chamber; and A method of monitoring a condition within a semiconductor processing chamber comprising: using the at least one sensor pack to monitor at least one process condition within the semiconductor processing chamber.

16. 16. The method of monitoring conditions within a semiconductor processing chamber of claim 15, further comprising: recording data associated with said at least one processing condition using said at least one data logging pack.

17. 20. The method of monitoring conditions within a semiconductor processing chamber of claim 16, further comprising accessing data from the at least one data logging pack at a remote computing device.

18. 20. The method of monitoring conditions within a semiconductor processing chamber of claim 15, further comprising transmitting data associated with the at least one processing condition to a computing device outside the semiconductor processing chamber.

19. 16. The method of monitoring conditions within a semiconductor processing chamber of claim 15, wherein the at least one process condition comprises one or more process conditions selected from the group consisting of: temperature within the semiconductor processing chamber, pressure within the semiconductor processing chamber, flow of ions and electrons within the semiconductor processing chamber, energy of ions and electrons within the semiconductor processing chamber, plasma potential within the semiconductor processing chamber, and optical emissions within the semiconductor processing chamber.

20. 20. The method of monitoring conditions within a semiconductor processing chamber of claim 15, wherein the at least one battery pack is operated in a pulsed mode.

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