Nitride-based bidirectional switching device for battery management and method of manufacture thereof

Abstract

A nitride based bidirectional switching device is provided for operation with a battery protection controller. The battery protection controller has a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) terminal, a voltage monitor (VM) terminal, and a ground terminal. The nitride-based bidirectional switching device includes a nitride-based bidirectional switching element and an adaptation module, the adaptation module being configured to receive a DO signal and a CO signal from the battery protection controller and to generate a main control signal for controlling the bidirectional switching element. By implementing the adaptation circuit, the nitride-based bidirectional switching element is combined with a conventional battery protection controller to manage the charging and discharging of a battery. This allows the nitride-based battery management system to achieve a higher operating frequency and a more compact size.

Description

[Technical field]

[0001] The present invention relates to a nitride-based semiconductor bidirectional switching device, and more particularly to a nitride-based bidirectional switching device for battery management. [Background technology]

[0002] For charging and discharging high power density batteries, it is necessary to perform battery management to monitor the battery status and ensure the safety of operation. Conventional battery management systems are equipped with a battery protection controller and electronic switches (usually silicon MOSFETs) that are used to disconnect the battery from the charger or load under key conditions that may cause dangerous reactions, and prevent the battery unit from being damaged and the battery from failing.

[0003] Nitride-based devices, such as GaN-based devices, are widely applied in high-frequency electric energy conversion systems due to their low power loss and fast switching transitions. Compared with silicon (Si) metal oxide semiconductor field effect transistors (MOSFETs), GaN high electron mobility transistors (HEMTs) have more favorable figures of merit and more promising performance in high-power and high-frequency applications. Therefore, it is desirable to have a nitride-based battery management system that can be used for high-frequency applications and has a more compact size. More specifically, there is a need for a nitride-based bidirectional switching device to manage the charging and discharging of a battery in combination with a conventional battery protection controller. Summary of the Invention [Problem to be solved by the invention]

[0004] According to one aspect of the present invention, there is provided a nitride based bidirectional switching device for operating with a battery protection controller. The battery protection controller has a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) terminal, a voltage monitor (VM) terminal, and a ground terminal. The nitride based bidirectional switching device comprises a nitride based bidirectional switching element and an adaptation module, the adaptation module being configured to receive a DO signal and a CO signal from the battery protection controller and to generate a main control signal for controlling the bidirectional switching element. By implementing the adaptation circuit, the nitride based bidirectional switching element can be combined with a conventional battery protection controller to manage the charging and discharging of a battery. Thus, the nitride based battery management system achieves a higher operating frequency and a more compact size.

[0005] According to another aspect of the present invention, the nitride based bidirectional switching device further comprises a substrate potential management module arranged to manage the potential of a main substrate of the bidirectional switching element. By implementing the substrate potential management circuit, the substrate potential of the bidirectional switching element is essentially equal to the lower potential of the potentials of its conduction terminals, regardless of the operation direction of the bidirectional switching device. This allows the bidirectional switching device to be operated under a stable substrate potential and to conduct current in both directions. [Brief description of the drawings]

[0006] The nature of the present disclosure can be readily understood based on the following detailed description with reference to the accompanying drawings. The drawings are not necessarily drawn to scale, i.e., the size of each feature may be arbitrarily increased or decreased to clarify the present disclosure. Due to manufacturing techniques and tolerances, there may be differences between the reproduction of the technology in the present disclosure and the actual installation. The accompanying drawing labels are used throughout the accompanying drawings and detailed description to indicate the same or similar parts.

[0007] 1A and 1B are circuit diagrams illustrating a battery management system 1 in charging and discharging operation, respectively, according to some embodiments of the present disclosure. FIG. 2 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to one embodiment of the present invention. FIG. 3 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 4 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 5 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 6 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 7 is a circuit diagram illustrating an example circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 8 shows how each diode is replaced with a nitride-based transistor to form a voltage clamping element. 9A and 9B are cross-sectional views showing a nitride-based IC chip on which the circuit shown in FIG. 2 is integrated. 10A and 10B are cross-sectional views showing a nitride-based IC chip on which the circuit shown in FIG. 3 is integrated. FIG. 11 is a cross-sectional view showing a nitride-based IC chip on which the circuit shown in FIG. 4 is integrated. FIG. 12 is a cross-sectional view showing a nitride-based IC chip on which the circuit shown in FIG. 5 is integrated. FIG. 13 is a cross-sectional view showing a nitride-based IC chip on which the circuit shown in FIG. 6 is integrated. FIG. 14 is a cross-sectional view showing a nitride-based IC chip on which the circuit shown in FIG. 7 is integrated. 15A-15E show resistor structures formed in nitride-based IC chips according to various embodiments of the present invention. 16A to 16J are diagrams showing different steps of a method for manufacturing a nitride-based IC chip according to each embodiment of the present invention. 17A-17E illustrate steps for forming a resistor structure according to various embodiments of the present invention. FIG. 18 illustrates a process for forming a through gallium via (TGV) according to various embodiments of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In the following description, the embodiments combined with the description of the attached drawings are the preferred examples of the present disclosure. The description and the attached drawings are for illustrative purposes only and are not intended to be limiting. In order to avoid obscuring the present disclosure, specific details may be omitted. However, the description of the present disclosure enables those skilled in the art to realize the teachings of the present specification without undue experimentation.

[0009] 1A and 1B show circuit diagrams of a battery management system 1 according to some embodiments of the present disclosure in charging and discharging operation states, respectively. As shown, the battery management system 1 includes a battery protection controller 10, a nitride-based bidirectional switching device 100 arranged to operate with the battery protection controller 10, a pair of positive and negative interface ports P+, P- arranged to be connected to a load 16 and / or a charger 14, and a battery 12 that receives power from the charger 14 (e.g., as shown in FIG. 1A) to be charged or that supplies power to the load 16 (e.g., as shown in FIG. 1B) to be discharged.

[0010] The battery protection controller 10 has a power input node Vcc electrically connected to the positive terminal B+ of the battery 12 and a ground node Vss electrically connected to the negative terminal B- of the battery 12. Optionally, an RC circuit 18 is implemented between the battery 12 and the battery protection controller 10.

[0011] The battery protection controller 10 includes a voltage monitoring resistor R VM The negative interface port P- further comprises a voltage monitoring node electrically connected to the negative interface port P- via a voltage monitoring node for receiving a monitoring signal used for detecting an overcurrent.

[0012] The battery protection controller 10 further includes an overcurrent charge protection node CO and an overcurrent discharge protection node DO, which are respectively used for providing control signals for the controlled nitride based bidirectional switching device 100 to implement overcurrent protection during charging and discharging operation processes.

[0013] Specifically, the nitride based bidirectional switching device 100 comprises a control terminal Ctrl1 arranged to be electrically connected to the DO node of the controller, and a control terminal Ctrl2 arranged to be electrically connected to the CO node of the controller. The nitride based bidirectional switching device 100 further comprises a conduction terminal Cdct1 arranged to be electrically connected to the ground node Vss of the controller (and the negative terminal of the battery 12), and a conduction terminal Cdct2 arranged to be electrically connected to the negative interface port P-.

[0014] Referring to FIG. 1A, during the charging operation, the charging current I C is conducted from the charger 14 to the battery and is passed from the conduction terminal Cdct1 to the conduction terminal Cdct2 by the bidirectional switching device 100. If an overcurrent is detected, the battery protection controller 10 issues a control signal at the overcurrent charging protection node CO to control the nitride based bidirectional switching device 100 to disconnect the battery 12 from the charger 14.

[0015] Referring to FIG. 1B, during the discharge operation, the discharge current I D is conducted from the battery 12 to the load 16 and is flowed from the conduction terminal Cdct2 to the conduction terminal Cdct1 by the bidirectional switching device 100. When an overcurrent is detected, the battery protection controller 10 issues a control signal at the overcurrent discharge protection node DO to control the nitride based bidirectional switching device 100 to disconnect the battery 12 from the load 16.

[0016] 2 to 7 are circuit diagrams illustrating exemplary circuits 100A to 100F of a bidirectional switching device 100 according to embodiments of the present invention. As shown in Fig. 2 to 7, the bidirectional switching device 100 may include a main switch element Sm and adaptive modules 200A to F, which are arranged to receive DO and CO signals from control terminals Ctrl1 and Ctrl2, respectively, and to generate a main control signal for controlling the main switch element Sm.

[0017] The main switching element Sm has a control electrode electrically connected to the adaptive modules 200A-F, a first conductive electrode connected to the conductive terminal Cdct1, and a second conductive electrode connected to the conductive terminal Cdct2. The main switching element Sm may be a nitride-based transistor, with its gate being the control electrode of the main switching element Sm, its drain being the first conductive electrode of the main switching element Sm, and its source being the second conductive electrode of the main switching element Sm. Preferably, the nitride-based transistor is an AlGaN / GaN enhancement-type (E-type) high electron mobility transistor (HEMT).

[0018] During the normal operation process of charging and discharging, when a high-level voltage is applied to the control terminal Ctrl1 and a high-level voltage is applied to the control terminal Ctrl2, the main switch element Sm is turned on, and current flows in two directions between the conduction terminals Cdct1 and Ccdt2.

[0019] If an overcurrent is detected during the discharge operation, a low-level voltage is applied to the control terminal Ctrl1 and a high-level voltage is applied to the control terminal Ctrl2, and the main switch element Sm is turned off, thereby disconnecting the battery from the load and protecting the battery from excessive discharge or short circuit.

[0020] If an overcurrent is detected during the charging process, a high-level voltage is applied to the control terminal Ctrl1 and a low-level voltage is applied to the control terminal Ctrl2, and the main switch element Sm is disconnected, thereby cutting off the connection between the battery and the charger and protecting the battery from overcharging.

[0021] Please refer to Figures 2, 4 and 6. The adaptive modules 200A, 200C and 200E each include a voltage fixing element D1, a voltage fixing element D2, an auxiliary switching element S1, an auxiliary switching element S2 and a resistor element R1.

[0022] The voltage fixing element D1 has a positive electrode electrically connected to the control terminal Ctrl1 and a negative electrode electrically connected to the interconnection node A. The voltage fixing element D2 has a positive electrode electrically connected to the second control terminal Ctrl2 and a negative electrode electrically connected to the interconnection node A.

[0023] The auxiliary switch element S1 has a control electrode electrically connected to the control terminal Ctrl1, a first conductive electrode connected to the interconnection node A, and a second conductive electrode connected to the interconnection node B. The auxiliary switch element S2 has a control electrode electrically connected to the second control terminal Ctrl2, a first conductive electrode connected to the interconnection node B, and a second conductive electrode connected to the control electrode of the main switch element Sm.

[0024] Resistance element R1 has a first electrode electrically connected to the control electrode of main switch element Sm and a second electrode electrically connected to conduction terminal Cdct1.

[0025] The voltage fixing elements D1, D2 are arranged to isolate the main switching element Sm from the control terminals Ctrl1 and Ctrl2, respectively, to protect the main switching element Sm from being damaged by a short circuit when the voltage levels at the control terminals Ctrl1 and Ctrl2 are different under normal operation.

[0026] The voltage fixing elements D1 and D2 can be selected to have a suitable forward voltage to fix the voltage applied to the control electrode of the main switching element Sm at a required level and ensure that the main switching element Sm operates normally. In general, the voltage fixing elements D1 and D2 have essentially the same forward voltage V F1and V F2 It has.

[0027] The auxiliary switch elements S1 and S2 are arranged to transmit control signals received from control terminals Ctrl1 and Ctrl2, respectively, into the main control signal to control the main switch element Sm.

[0028] During the normal operation of charging and discharging, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at two nodes DO and CO. That is, the high-level voltage V Ctrl1_P (10V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P A voltage of 10 V is applied to the control terminal Ctrl2. The voltage fixing elements D1 and D2 are both biased in the forward direction. The auxiliary switch elements S1 and S2 are both on. Therefore, the voltage at the control electrode of the main switch element Sm is V Ctrl1_P -V F1 (or V Ctrl2_P -V F2 ) until it becomes equal to the high-level voltage of the conduction terminals Cdct1 and Ccdt2. After that, the main switch element Sm turns on, allowing the charge / discharge current to flow between the conduction terminals Cdct1 and Ccdt2.

[0029] During the discharging operation, if an overcurrent or the battery 12 is detected to be completely discharged, the battery protection controller 10 generates a low-level voltage signal (e.g., 0V) at the DO node and a high-level voltage signal (e.g., 10V) at the CO node. That is, the low-level voltage V Ctrl1_L (0V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_PA voltage (10V) is applied to the control terminal Ctrl2. The voltage fixing element D1 is biased in the reverse direction, and the voltage fixing element D2 is biased in the forward direction. The auxiliary switch element S1 is disconnected, and the auxiliary switch element S2 is turned on. As a result, the voltage at the control electrode of the main switch element Sm is dropped by the resistance element R1 to the voltage level of the conduction terminal Cdct1 connected to the negative terminal B- of the battery 12 (i.e., ground potential = 0V). Thereafter, the main switch element Sm is disconnected, thereby cutting off the connection between the battery 12 and the load 16, and the battery is protected from excessive discharge or overcurrent.

[0030] During the charging operation, if an overcurrent or the battery 12 is fully charged is detected, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at the DO node and a low-level voltage signal (e.g., −10V) at the CO node, and the high-level voltage V Ctrl1_P (10V) is applied to the control terminal Ctrl1, and the low-level voltage V Ctrl2_N A voltage (-10V) is applied to the control terminal Ctrl2. The voltage fixing element D1 is biased in the forward direction, and the voltage fixing element D2 is biased in the reverse direction. The auxiliary switch element S1 is turned on, and the auxiliary switch element S2 is turned off. This causes the voltage at the control electrode of the main switch element Sm to drop to the voltage level of the conduction terminal Cdct1 connected to the negative terminal B- of the battery 12 (i.e., ground potential = 0V). Thereafter, the main switch element Sm is turned off, thereby cutting off the connection between the battery 12 and the charger 14, and the battery is protected from excessive charging or overcurrent.

[0031] 3, 5 and 7, the adaptive modules 200B, 200D and 200F are similar to the adaptive modules 200A, 200C and 200E, respectively, except that the adaptive modules 200B, 200D and 200F further include a voltage fixing element D3 having a positive electrode electrically connected to the control electrode of the main switch element Sm and a negative electrode electrically connected to the control terminal Ctrl2. In general, the voltage fixing element D3 is connected to a forward voltage V F1 and V F2The forward voltage V is essentially the same as F3 It has.

[0032] During the normal operation of charging and discharging, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at two nodes DO and CO. That is, the high-level voltage V Ctrl1_P (10V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P A voltage of 10 V is applied to the control terminal Ctrl2. The voltage fixing elements D1, D2, and D3 are all biased in the forward direction. The auxiliary switch elements S1 and S2 are both turned on. As a result, the voltage at the control electrode of the main switch element Sm becomes V Ctrl1_P -V F1 (or V Ctrl2_P -V F2 ) until it becomes equal to the high-level voltage of the conduction terminals Cdct1 and Ccdt2. After that, the main switch element Sm turns on, allowing the charge / discharge current to flow between the conduction terminals Cdct1 and Ccdt2.

[0033] During the discharging operation, if an overcurrent or the battery 12 is detected to be completely discharged, the battery protection controller 10 generates a low-level voltage signal (e.g., 0V) at the DO node and a high-level voltage signal (e.g., 10V) at the CO node. That is, the low-level voltage V Ctrl1_L (0V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P A voltage (10V) is applied to the control terminal Ctrl2. The voltage fixing elements D1 and D3 are biased in the reverse direction, and the voltage fixing element D2 is biased in the forward direction. The auxiliary switch element S1 is disconnected, and the auxiliary switch element S2 is turned on. This causes the voltage at the control electrode of the main switch element Sm to drop to the voltage level (i.e., 0V) of the conduction terminal Cdct1 connected to the negative terminal B- of the battery 12 by the resistance element R1. Thereafter, the main switch element Sm is disconnected, thereby cutting off the connection between the battery 12 and the load 16, and the battery is protected from excessive discharge or overcurrent.

[0034] During the charging operation, if an overcurrent or the battery 12 is fully charged is detected, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at the DO node and a low-level voltage signal (e.g., −10V) at the CO node, and the high-level voltage V Ctrl1_P (10V) is applied to the control terminal Ctrl1, and the low-level voltage V Ctrl2_N A voltage of -10V is applied to the control terminal Ctrl2. The voltage fixing elements D1 and D3 are biased in the forward direction, and the voltage fixing element D2 is biased in the reverse direction. The auxiliary switch element S1 is turned on, and the auxiliary switch element S2 is turned off. As a result, the voltage at the control electrode of the main switch element Sm becomes V Ctrl2_N +V F3の The voltage level is then increased to be equal to the voltage level of the battery 12. Thereafter, the main switch element Sm is turned off, thereby disconnecting the battery 12 from the charger 14 and protecting the battery from overcharging or overcurrent.

[0035] In some embodiments, the adaptive modules 200A to 200F further include a voltage fixing element D4 (not shown) having a positive electrode electrically connected to the control terminal Ctrl1 and a negative electrode electrically connected to the control electrode of the auxiliary switch element S1, and a voltage fixing element D5 (not shown) having a positive electrode electrically connected to the control terminal Ctrl2 and a negative electrode electrically connected to the control electrode of the auxiliary switch element S2.

[0036] As shown in Figures 4 to 7, the bidirectional switching device 100 further includes substrate potential management modules 300C to F that are arranged to manage the potential of the main substrate SUB of the main switch element Sm so that it is basically equal to the lower of the potentials of the first and second conductive terminals.

[0037] During normal charging and discharging operations, when a high-level voltage is applied to the control terminal Ctrl1 and a high-level voltage is applied to the control terminal Ctrl2, the substrate potential management modules 300C to 300F manage the potential of the main substrate SUB to be basically equal to the ground potential.

[0038] If an overcurrent is detected during the discharge operation process, a low-level voltage is applied to the control terminal Ctrl1 and a high-level voltage is applied to the control terminal Ctrl2, and the substrate potential management modules 300C to F manage the potential of the main substrate SUB so that it is basically equal to the ground potential.

[0039] If an overcurrent is detected during the charging operation, a high-level voltage is applied to the control terminal Ctrl1 and a low-level voltage is applied to the control terminal Ctrl2, and the substrate potential management modules 300C to F manage the potential of the main substrate SUB to be basically equal to the potential of the second conductive terminal.

[0040] Please refer to Figures 4 and 5. The substrate potential management module 300C / 300D includes an auxiliary switch element S3 and an auxiliary switch element S4.

[0041] The auxiliary switch element S3 has a control electrode electrically connected to the control terminal Ctrl2, a first conductive electrode electrically connected to the conductive terminal Cdct1, and a second conductive electrode electrically connected to the main substrate SUB of the main switch element Sm. The auxiliary switch element S4 has a control electrode electrically connected to the control terminal Ctrl1, a first conductive electrode electrically connected to the conductive terminal Cdct2, and a second conductive electrode electrically connected to the main substrate SUB of the main switch element Sm.

[0042] During the normal operation of charging and discharging, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at two nodes DO and CO. That is, the high-level voltage V Ctrl1_P (i.e., 10V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P (i.e., 10V) is applied to the control terminal Ctrl2. The auxiliary switch elements S3 and S4 are both turned on. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R s3,on / (R s3,on +R s4,on). Here, V Cdct1 and V Cdct2 indicate the voltage potentials at the conduction terminals Cdct1 and Cdct2, respectively, and R s3,on and R s4,on V indicates the on-resistance of the auxiliary switch elements S3 and S4, respectively. Cdct1 is equal to ground potential (i.e., 0V). The main switch element turns on. V Cdct2 is the on-state drain-source voltage V of the main switch element Sm m,on is equal to V m,on is so small that Vsub is essentially equal to ground potential (i.e., 0V). Cdct1 is equal to

[0043] During the discharging operation, if an overcurrent or the battery 12 is detected to be completely discharged, the battery protection controller 10 generates a low-level voltage signal (e.g., 0V) at the DO node and a high-level voltage signal (e.g., 10V) at the CO node. That is, the low-level voltage V Ctrl1_L (i.e., 0V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P (i.e., 10V) is applied to the control terminal Ctrl2. The auxiliary switch element S3 is turned on and the auxiliary switch element S4 is turned off. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R s3,on / (R s3,on +R s4,off ). Here, R s4,off indicates the off-resistance of S4. V Cdct1 is equal to the ground potential (0V). The main switch element Sm is turned off. V Cdct2 is V Cdct1 is higher than the off-state drain-source voltage V m,off That is, V Cdct2 =V Cdct1 +V m,off =V m,off It becomes. R s4,off R s3,on Since the substrate potential Vsub is essentially equal to ground potential (i.e., 0V), Cdct1is equal to

[0044] During the charging operation, if an overcurrent or the battery 12 is fully charged is detected, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at the DO node and a low-level voltage signal (e.g., −10V) at the CO node, and the high-level voltage V Ctrl1_P (i.e., 10V) is applied to the control terminal Ctrl1, and the low-level voltage V Ctrl2_N (i.e., −10V) is applied to the control terminal Ctrl2. The auxiliary switch element S3 is turned off and the auxiliary switch element S4 is turned on. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R s3,off / (R s3,off +R s4,on ). Here, R s3,off indicates the off-resistance of the auxiliary switch element S3. V Cdct1 is equal to ground potential (0V). The main switch element is disconnected. V Cdct2 is V Cdct1 The difference is the off-state drain-source voltage V m,off That is, V Cdct2 =V Cdct1 -V m,off = -V m,off It becomes. R s3,off R s4,on Since the substrate potential Vsub is essentially -V m,off V is equivalent to Cdct2 is equal to

[0045] 6 and 7, the substrate potential management modules 300E / 300F are similar to the substrate potential management modules 300C / 300D, respectively, except that the substrate potential management modules 300E / 300F further include a resistive element R2 having a first electrode electrically connected to the main substrate SUB of the main switch element Sm and a second electrode electrically connected to the conductive terminal Cdct1.

[0046] During the normal operation of charging and discharging, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at two nodes DO and CO. That is, the high-level voltage V Ctrl1_P (i.e., 10V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P (i.e., 10V) is applied to the control terminal Ctrl2. The auxiliary switch elements S3 and S4 are both turned on. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R s3,on / (R s3,on +R s4,on ). V Cdct1 is equal to ground potential (i.e., 0V). The main switch element turns on. V Cdct2 is the on-state drain-source voltage V of the main switch element Sm m,on is equal to V m,on is so small that Vsub is essentially equal to ground potential (i.e., 0V). Cdct1 is equal to

[0047] During the discharging operation, if an overcurrent or the battery 12 is detected to be completely discharged, the battery protection controller 10 generates a low-level voltage signal (e.g., 0V) at the DO node and a high-level voltage signal (e.g., 10V) at the CO node. That is, the low-level voltage V Ctrl1_L (i.e., 0V) is applied to the control terminal Ctrl1, and a high-level voltage V Ctrl2_P (i.e., 10V) is applied to the control terminal Ctrl2. The auxiliary switch element S3 is turned on and the auxiliary switch element S4 is turned off. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R eq,on / (R eq,on +R s4,off ). Here, R eq,on =R2*R s3,on / (R2+R s3,on ) is the parallel connection of R2 and R s3,on is the equivalent resistance of V Cdct1 is equal to the ground potential (0V). The main switch element Sm is turned off. V Cdct2is V Cdct1 is higher than the off-state drain-source voltage V m,off That is, V Cdct2 =V Cdct1 +V m,off =V m,off R s4,off R eq,on Therefore, the substrate potential Vsub is essentially equal to ground potential (i.e., 0V), V Cdct1 is equal to

[0048] Alternatively, during the discharging operation, if an overcurrent is detected or the battery 12 is completely discharged, the battery protection controller 10 generates a low-level voltage signal (e.g., 0V) at the DO node and generates a low-level voltage signal (e.g., 0V) at the CO node. That is, the low-level voltage V Ctrl1_L (i.e., 0V) is applied to the control terminal Ctrl1, and the low-level voltage V Ctrl2_P (i.e., 0V) is applied to the control terminal Ctrl2. The auxiliary switch elements S3 and S4 are both turned off. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R eq,off / (R eq,off +R s4,off ). Here, R eq,off =R2*R s3,off / (R2+R s3,off ) is the parallel connection of R2 and R s3,off is the equivalent resistance of V Cdct1 is equal to the ground potential (0V). The main switch element Sm is turned off. V Cdct2 is V Cdct1 is higher than the off-state drain-source voltage V m,off That is, V Cdct2 =V Cdct1 +V m,off =V m,off R s4,off R eq,off Therefore, the substrate potential Vsub is essentially equal to the ground potential (ie, 0V).

[0049] During the charging operation, if an overcurrent or the battery 12 is fully charged is detected, the battery protection controller 10 generates a high-level voltage signal (e.g., 10V) at the DO node and a low-level voltage signal (e.g., −10V) at the CO node, and the high-level voltage V Ctrl1_P (i.e., 0V) is applied to the control terminal Ctrl1, and the low-level voltage V Ctrl2_N (i.e., −10V) is applied to the control terminal Ctrl2. The auxiliary switch element S3 is turned off and the auxiliary switch element S4 is turned on. The substrate potential Vsub is calculated by the following formula: Vsub=V Cdct1 +V Cdct2 *R eq,off / (R eq,off +R s4,on ). Here, V Cdct1 is equal to ground potential (0V). The main switch element is disconnected. V Cdct2 is V Cdct1 The difference is the off-state drain-source voltage V m,off That is, V Cdct2 =V Cdct1 -V m,off =-V m,off R eq,off R s4,on Since the substrate potential Vsub is essentially -V m,off V is equivalent to Cdct2 is equal to

[0050] In some embodiments, the substrate potential management modules 300C to 300F further include a voltage fixing element D6 (not shown) having a positive electrode electrically connected to the control terminal Ctrl2 and a negative electrode electrically connected to the control electrode of the auxiliary switch element S3, and a voltage fixing element D7 (not shown) having a positive electrode electrically connected to the control terminal Ctrl1 and a negative electrode electrically connected to the control electrode of the auxiliary switch element S4.

[0051] The voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7 comprises a diode, the anode of which is the positive electrode of the voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7 and the cathode of which is the negative electrode of the voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7, or the voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7 comprises a plurality of diodes connected in series, the anode at one end of the diode is the positive electrode of the voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7 and the cathode at the other end of the diode is the negative electrode of the voltage clamp element D1 / D2 / D3 / D4 / D5 / D6 / D7.

[0052] As shown in Fig. 8, each diode for forming the voltage fixing elements D1 / D2 / D3 / D4 / D5 / D6 / D7 can be replaced by a transistor, whose gate and source are connected to each other to form the anode of the diode, and whose drain is disposed as the cathode of the diode. The transistor may be a Si MOSFET or an AlGaN / GaN high electron mobility transistor (HEMT).

[0053] The auxiliary switching elements S1 / S2 / S3 / S4 may be transistors, whose gates are the control electrodes of the auxiliary switching elements S1 / S2 / S3 / S4, whose drains are the first conductive electrodes of the auxiliary switching elements S1 / S2 / S3 / S4, and whose sources are the second conductive electrodes of the auxiliary switching elements S1 / S2 / S3 / S4. The transistors may be Si MOSFETs or AlGaN / GaN high electron mobility transistors (HEMTs).

[0054] The resistive element R1 / R2 may be a resistor, the first terminal of which is the first electrode of the resistive element R1 / R2, and the second terminal of which is the second electrode of the resistive element R1 / R2.

[0055] Resistor R1 can be selected to have a resistance much higher than the on-resistance of auxiliary switch devices S1 / S2 and much lower than the off-resistance of auxiliary switch devices S1 / S2. For example, resistor R1 may be selected to have a resistance value in the range of about 0.1 Ω to about 1 GΩ.

[0056] Resistor R2 may be selected to have a resistance much higher than the on-resistance of auxiliary switch device S3 / S4 and much lower than the off-resistance of auxiliary switch device S3 / S4 For example, resistor R2 may be selected to have a resistance value in the range of about 0.1 Ω to about 1 GΩ.

[0057] The nitride based bidirectional switching device 100 may be integrated into a nitride based integrated circuit (IC) chip. Figures 9A-9B and 10A-10B are cross-sectional views of nitride based IC chips integrating circuits 100A and 100B, respectively. For ease of understanding, Figures 11 and 12 are cross-sectional views of nitride based IC chips integrating circuits 100C and 100D, respectively, which are based on circuits 100A and 100B, respectively. Also, Figures 13 and 14 are cross-sectional views of nitride based IC chips integrating circuits 100E and 100F, respectively, which are based on circuits 100A and 100B, respectively.

[0058] 9A-9B, the nitride-based IC chip on which the circuit 100A is integrated includes a substrate 102, a first nitride-based semiconductor layer 104, a second nitride-based semiconductor layer 106, a gate structure 110, an S / D electrode 116, a first passivation layer 124, a second passivation layer 126, a third passivation layer 128, one or more first conductive vias 132, one or more second conductive vias 136, one or more first conductive lines 142, one or more second conductive lines 146, a protective layer 154, a conductive pad 170, and a resistor structure 180.

[0059] The substrate 102 may be a semiconductor substrate. Exemplary materials for the substrate 102 include, but are not limited to, Si, SiGe, SiC, gallium arsenide, p-doped Si, n-doped Si, sapphire, semiconductor on insulator such as silicon on insulator (SOI), or other suitable semiconductor materials. In some embodiments, the substrate 102 may include, but is not limited to, a Group 3 element, a Group 4 element, a Group 5 element, or combinations thereof (e.g., III-V compounds). In other embodiments, the substrate 102 may include, but is not limited to, one or more other features, such as, but not limited to, a doped region, a buried layer, an epitaxial (epi) layer, or combinations thereof.

[0060] The nitride-based semiconductor layer 104 is disposed on the substrate 102. Exemplary materials for the nitride-based semiconductor layer 104 include, but are not limited to, nitrides or III-V compounds. For example, GaN, AlN, InN, In x Al y Ga (1-x-y) N (where x+y≦1), Al y Ga (1-y) N (where y≦1). Exemplary structures of the nitride-based semiconductor layer 104 include, but are not limited to, a multilayer structure, a superlattice structure, and a composition gradient structure.

[0061] The nitride-based semiconductor layer 106 is disposed on the nitride-based semiconductor layer 104. Exemplary materials for the nitride-based semiconductor layer 106 include, but are not limited to, nitrides or III-V compounds. For example, GaN, AlN, InN, In x Al y Ga (1-x-y) N (where x+y≦1), Al y Ga (1-y) N, where y≦1.

[0062] Exemplary materials for the nitride-based semiconductor layers 104 and 106 are selected so that the nitride-based semiconductor layer 106 has a band gap (i.e., a forbidden band width) larger than the band gap of the nitride-based semiconductor layer 104, and thus the electron affinities are different from each other and a heterojunction is formed between them. For example, when the nitride-based semiconductor layer 104 is an undoped GaN layer having a band gap of about 3.4 eV, an AlGaN layer having a band gap of about 4.0 eV is selected as the nitride-based semiconductor layer 106. This makes the nitride-based semiconductor layers 104 and 106 a channel layer and a barrier layer, respectively. A triangular well potential is generated at the junction interface between the channel layer and the barrier layer, and electrons accumulate in the triangular well potential, generating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction. This allows the nitride-based IC chip to include one or more GaN-based high electron mobility transistors (HEMTs).

[0063] In some embodiments, the nitride-based IC chip further comprises a buffer layer, a nucleation layer, or a combination thereof (not shown). The buffer layer is disposed between the substrate 102 and the nitride-based semiconductor layer 104. The buffer layer is disposed to reduce lattice and thermal mismatch between the substrate 102 and the nitride-based semiconductor layer 104, thereby hardening defects caused by the mismatch / difference. The buffer layer includes a III-V compound. III-V compounds include, but are not limited to, aluminum, gallium, indium, nitrogen, or combinations thereof. Thus, exemplary materials for the buffer layer further include, but are not limited to, GaN, AlN, AlGaN, InAlGaN, or combinations thereof.

[0064] The nucleation layer is formed between the substrate 102 and the buffer layer. The nucleation layer is positioned to transition to accommodate the mismatch / difference between the substrate 102 and the III-nitride layer of the buffer layer. Exemplary materials for the nucleation layer include, but are not limited to, AlN or one of its alloys.

[0065] The gate structures 110 are disposed on / above / above the second nitride-based semiconductor layer 106. Each gate structure 110 comprises an optional gate semiconductor layer 112 and a gate metal layer 114. The gate semiconductor layer 112 and the gate metal layer 114 are stacked on the nitride-based semiconductor layer 106. The gate semiconductor layer 112 is interposed between the nitride-based semiconductor layer 106 and the gate metal layer 114. The gate semiconductor layer 112 and the gate metal layer 114 form a Schottky barrier. In some embodiments, the nitride-based IC chip further comprises an optional dielectric layer (not shown) between the p-type doped III-V compound semiconductor layer 112 and the gate metal layer 114.

[0066] The nitride-based transistors forming the nitride-based bidirectional switching device 100 may be enhancement-type devices and are normally off when the gate electrode 114 is at about zero bias. In particular, the gate semiconductor layer 112 may be a p-type doped III-V compound semiconductor layer. The p-type doped III-V compound semiconductor layer 112 forms at least one pn junction with the nitride-based semiconductor layer 106 to deplete the 2DEG region, such that at least one area of ​​the 2DEG region corresponding to a location below the corresponding gate structure 110 has a different characteristic (e.g., different electron concentration) than the rest of the 2DEG region and is blocked thereby. This mechanism causes the bidirectional switching device 100 to have normally off characteristics. In other words, when no voltage is applied to the gate electrode 114 or the voltage applied to the gate electrode 114 is less than a threshold voltage (i.e., the minimum voltage required to form an inversion layer below the gate structure 110), the area of ​​the 2DEG region below the gate structure 110 remains blocked and no current flows therethrough. Additionally, by providing the p-type doped III-V compound semiconductor layer 112, the gate leakage current is reduced and the threshold voltage during the off-state process is increased.

[0067] In some embodiments, the p-type doped III-V compound semiconductor layer 112 can be omitted, making the bidirectional switching device 100 a depleted device, meaning that the transistor is normally on under zero gate-source voltage.

[0068] Exemplary materials for the p-type doped III-V compound semiconductor layer 112 include, but are not limited to, p-doped III-V nitride semiconductor materials, such as p-type GaN, p-type AlGaN, p-type InN, p-type AlInN, p-type InGaN, p-type AlInGaN, or combinations thereof. In some embodiments, the p-doped materials are achieved using p-type impurities, such as, for example, Be, Mg, Zn, Cd, and Mg.

[0069] In some embodiments, nitride based semiconductor layer 104 comprises undoped GaN, nitride based semiconductor layer 106 comprises AlGaN, and p-type doped III-V compound semiconductor layer 112 bows the bottom band structure upward and depletes a corresponding area of ​​the 2DEG region, thereby making bidirectional switching device 11 p-type GaN in the off state.

[0070] In some embodiments, the gate electrode 114 includes a metal or a metal compound. The gate electrode 114 may be formed as a single layer or multiple layers having the same or different compositions. Exemplary materials for the metal or metal compound include, but are not limited to, W, Au, Pd, Ti, Ta, Co, Ni, Pt, Mo, TiN, TaN, Si, metal alloys or compounds thereof, or other metal compounds. In some embodiments, exemplary materials for the gate electrode 114 include, but are not limited to, nitrides, oxides, silicides, doped semiconductors, or combinations thereof.

[0071] In some embodiments, the optional dielectric layer is formed of one or more layers of dielectric material. Exemplary dielectric materials include, for example, one or more layers of oxide, SiO x layer, SiNx layers, high-k dielectric materials (e.g., HfO2, Al2O3, TiO2, HfZrO, Ta2O3, HfSiO4, ZrO2, ZrSiO2, etc.), or combinations thereof.

[0072] The S / D electrodes 116 are disposed on the nitride semiconductor layer 106. The term "S / D" electrode refers to each S / D electrode 116 being either a source electrode or a drain electrode, as determined by the device design. The S / D electrodes 116 are located on opposite sides of a corresponding gate structure 110, although other arrangements may be used, particularly when multiple source, drain or gate electrodes are employed in the device. Each gate structure 110 is disposed such that each gate structure 110 is located between at least two of the S / D electrodes 116. The gate structures 110 and the S / D electrodes 116 together constitute at least one nitride / GaN HEMT having a 2DEG region.

[0073] In the illustrated illustration, adjacent S / D electrodes 116 are symmetrical about the gate structure 110 between them. In some embodiments, adjacent S / D electrodes 116 may optionally be asymmetrical about the gate structure 110 between them, i.e., one of the S / D electrodes 116 is closer to the gate structure 110 than another of the S / D electrodes 116.

[0074] In some embodiments, the S / D electrodes 116 may include, but are not limited to, metals, alloys, doped semiconductor materials (e.g., doped crystalline silicon), compounds such as silicides and nitrides, other conductive materials, or combinations thereof. Exemplary materials for the S / D electrodes 116 include, but are not limited to, Ti, AlSi, TiN, or combinations thereof. The S / D electrodes 116 may be single or multiple layers having the same or different compositions. In some embodiments, the S / D electrodes 116 form an ohmic contact with the nitride-based semiconductor layer 106. The ohmic contact may be achieved by adding Ti, Al, or other suitable materials to the S / D electrodes 116. In some embodiments, each S / D electrode 116 is formed by at least one conformal layer and a conductive fill. The conformal layer may cover the conductive fill. Exemplary materials for the conformal layer include, but are not limited to, Ti, Ta, TiN, Al, Au, AlSi, Ni, Pt, or combinations thereof. Exemplary materials for the conductive filler include, but are not limited to, AlSi, AlCu, or combinations thereof.

[0075] The passivation layer 124 is disposed on the nitride-based semiconductor layer 106. The passivation layer 124 is formed for protection purposes or to enhance the electrical properties of the device (e.g., to provide electrical insulation effect between / among different layers / elements). The passivation layer 124 may cover the top surface of the nitride-based semiconductor layer 106. The passivation layer 124 may cover the gate structure 110. The passivation layer 124 may cover at least two opposite sidewalls of the gate structure 110. The S / D electrodes 116 penetrate / pass through the passivation layer 124 and contact the nitride-based semiconductor layer 106. Exemplary materials for the passivation layer 124 include, for example, SiN x , SiO x, Si3N4, SiON, SiC, SiBN, SiCBN, oxides, nitrides, poly(2-ethyl-2-oxazoline (PEOX), or combinations thereof. In some embodiments, the passivation layer 124 can be a multi-layer structure, such as a composite dielectric layer of Al2O3 / SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or combinations thereof.

[0076] The passivation layer 126 is disposed above the passivation layer 124 and the S / D electrode 116. The passivation layer 126 covers the passivation layer 124 and the S / D electrode 116. The passivation layer 126 is a planarization layer and has a horizontal upper surface to support other layers / elements. Exemplary materials for the passivation layer 126 include, for example, SiN x , SiO x , Si3N4, SiON, SiC, SiBN, SiCBN, oxide, PEOX, or combinations thereof. In some embodiments, the passivation layer 126 is a multi-layer structure, such as a composite dielectric layer of Al2O3 / SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or combinations thereof.

[0077] The conductive via 132 is disposed within the passivation layer 126 and the passivation layer 124. The conductive via 132 penetrates the passivation layer 126 and the passivation layer 124. The conductive via 132 extends vertically and is electrically connected to the gate structure 110 and the S / D electrode 116, respectively. The top surface of the conductive via 132 is not within the coverage of the passivation layer 126. Exemplary materials for the conductive via 132 include, but are not limited to, conductive materials such as metals and alloys.

[0078] Conductive line 142 is disposed on passivation layer 126 and conductive via 132. Conductive line 142 contacts conductive via 132. Conductive line 142 is formed by patterning a conductive layer disposed on passivation layer 126 and conductive via 132. Exemplary materials for conductive line 142 include, but are not limited to, conductive materials. Conductive line 142 may include single or multi-layer films having Ag, Al, Cu, Mo, Ni, alloys thereof, oxides thereof, nitrides thereof, or combinations thereof.

[0079] The passivation layer 128 is disposed above the passivation layer 126 and the conductive lines 142. The passivation layer 128 covers the passivation layer 126 and the conductive lines 142. The passivation layer 128 is a planarizing layer and has a horizontal upper surface to support other layers / elements. Exemplary materials for the passivation layer 128 include, for example, SiN. x , SiO x , Si3N4, SiON, SiC, SiBN, SiCBN, oxide, PEOX, or combinations thereof. In some embodiments, the passivation layer 128 is a multi-layer structure, such as a composite dielectric layer of Al2O3 / SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or combinations thereof.

[0080] Conductive via 136 is disposed within passivation layer 128. Conductive via 136 penetrates passivation layer 128. Conductive via 136 extends vertically and is electrically connected to conductive line 142. A top surface of conductive via 136 is not within the coverage of passivation layer 136. Exemplary materials for conductive via 136 include, but are not limited to, conductive materials such as metals and alloys.

[0081] The conductive line 146 is disposed on the passivation layer 128 and the conductive via 136. The conductive line 146 contacts the conductive via 136. The conductive line 146 is formed by patterning a conductive layer disposed on the passivation layer 128 and the conductive via 136. Exemplary materials for the conductive layer 146 include, but are not limited to, conductive materials. The conductive layer 146 may include a single film or multiple films having Ag, Al, Cu, Mo, Ni, alloys thereof, oxides thereof, nitrides thereof, or combinations thereof.

[0082] A protective layer 154 is disposed over the passivation layer 128 and the conductive layer 146. The protective layer 154 covers the passivation layer 128 and the conductive layer 146. The protective layer 154 protects the conductive layer 146 from oxidation. Portions of the conductive layer 146 are exposed through openings in the protective layer 154 to form conductive pads 170 that are configured to be electrically connected to an external device (e.g., an external circuit).

[0083] The conductive pad 170 includes one or more conductive pads each serving as a first control terminal Ctrl1, a second control terminal Ctrl2, a first conductive terminal Cdct1, and a second conductive terminal Cdct2.

[0084] The conductive lines 142 or 146 and the conductive vias 132 or 136 are arranged to be electrically connected to different layers / elements to form a main switch element Sm and an adaptive module, the adaptive module comprising a voltage fixing element D1, a voltage fixing element D2, an auxiliary switch element S1, an auxiliary switch element S2, and a resistive element R1.

[0085] 15A-15E illustrate different ways of forming a resistor structure 180 according to embodiments of the present invention. Referring to FIG. 15A, the resistor structure 180 is formed by patterning a two-dimensional electron gas region (i.e., 2DEG region) adjacent to a heterojunction interface between the first and second nitride-based semiconductor layers. Referring to FIG. 15B, the resistor structure 180 is formed by patterning the gate metal layer 114. Referring to FIG. 15C, the resistor structure 180 is formed by patterning the S / D electrode layer 116. Referring to FIG. 15D, the resistor structure 180 is formed by patterning the first conductive layer 142. Referring to FIG. 15E, the resistor structure 180 is formed by patterning the second conductive layer 146.

[0086] 10A-10B, the nitride-based IC chip on which the circuit 100B is integrated has a layered structure similar to the IC chip on which the circuit 100A is integrated. The conductive lines 142 or 146 and the conductive vias 132 or 136 are arranged to electrically connect different layers / elements to form a main switch element Sm and an adaptive module, and the adaptive module includes a voltage fixing element D1, a voltage fixing element D2, a voltage fixing element D3, an auxiliary switch element S1, an auxiliary switch element S2, and a resistor element R1.

[0087] Referring to FIG. 11 , the nitride-based IC chip in which circuit 100C is integrated has a layered structure similar to the IC chip in which circuit 100A is integrated, except that the nitride-based IC chip in which circuit 100C is integrated further includes one or more through gallium vias (TGVs) 162.

[0088] The TGV 162 extends vertically from the second conductive layer 146 and is formed to penetrate into the substrate 102. The top surface of the TGV 162 is not covered by the third passivation layer 128. In some embodiments, the TGV 162 extends vertically from the first conductive layer 142 and is formed to penetrate into the substrate 102. The top surface of the TGV 162 is not covered by the second passivation layer 126. Exemplary materials for the TGV 162 include, but are not limited to, conductive materials such as metals and alloys.

[0089] The conductive lines 142 or 146, the conductive vias 132 or 136 and the TGVs 162 are electrically connected to different layers / elements / conductive lines and are arranged to form an adaptive module including a main switch element Sm, a voltage fixing element D1, a voltage fixing element D2, an auxiliary switch element S1, an auxiliary switch element S2, and a resistive element R1, and a substrate potential management module including an auxiliary switch element S3 and an auxiliary switch element S4.

[0090] 12, the nitride-based IC chip on which the circuit 100D is integrated has a layered structure similar to that of the IC chip on which the circuit 100B is integrated, except that the nitride-based IC chip on which the circuit 100D is integrated further includes one or more through gallium vias (TGVs) 162. The conductive lines 142 or 146, the conductive vias 132 or 136 and the TGVs 162 are electrically connected to different layers / elements and arranged to form a main switch element Sm, an adaptive module including a voltage fixing element D1, a voltage fixing element D2, a voltage fixing element D3, an auxiliary switch element S1, an auxiliary switch element S2, and a resistor element R1, and a substrate potential management module including an auxiliary switch element S3 and an auxiliary switch element S4.

[0091] 13, the nitride-based IC chip on which the circuit 100E is integrated has a layered structure similar to that of the IC chip on which the circuit 100A is integrated, except that the nitride-based IC chip on which the circuit 100E is integrated further includes one or more through gallium vias (TGVs) 162. The conductive lines 142 or 146, the conductive vias 132 or 136 and the TGVs 162 are electrically connected to different layers / elements and arranged to form a main switch element Sm, an adaptive module including a voltage fixing element D1, a voltage fixing element D2, an auxiliary switch element S1, an auxiliary switch element S2, and a resistor element R1, and a substrate potential management module including an auxiliary switch element S3, an auxiliary switch element S4, and a resistor element R2.

[0092] 14, the nitride-based IC chip on which the circuit 100F is integrated has a layered structure similar to that of the IC chip on which the circuit 100B is integrated, except that the nitride-based IC chip on which the circuit 100F is integrated further includes one or more through gallium vias (TGVs) 162. The conductive lines 142 or 146, the conductive vias 132 or 136 and the TGVs 162 are electrically connected to different layers / elements and arranged to form a main switch element Sm, an adaptive module including a voltage fixing element D1, a voltage fixing element D2, a voltage fixing element D3, an auxiliary switch element S1, an auxiliary switch element S2, and a resistor element R1, and a substrate potential management module including an auxiliary switch element S3, an auxiliary switch element S4, and a resistor element R2.

[0093] 16A to 16J are diagrams showing different steps of a method for manufacturing a nitride-based IC chip on which the circuit 100A / 100B is integrated, which will be described below. In the following description, the deposition technique includes, but is not limited to, atomic layer deposition (ALD), physical vapor deposition (PVD), chemical vapor deposition (CVD), metalorganic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), plasma assisted chemical vapor deposition, epitaxial growth, or other suitable techniques. The passivation layer forming technique as a planarization layer usually includes chemical mechanical polishing (CMP) techniques. The conductive via forming technique usually includes forming a via in a passivation layer and filling the via with a conductive material. The conductive line forming technique usually includes photolithography, exposure and development, etching, other suitable techniques, or a combination thereof.

[0094] 16A, a substrate 102 is provided. Nitride-based semiconductor layers 104 and 106 are formed, in order, on the substrate 102 using the deposition techniques described above. A two-dimensional electron gas (2DEG) region is formed adjacent a heterojunction interface between the first nitride-based semiconductor layer 104 and the second nitride-based semiconductor layer 106.

[0095] In some embodiments, the 2DEG region is patterned by implantation to form one or more resistor structures 180, as shown in Figure 17A.

[0096] Referring to FIG. 16B, a p-type blanket doped III-V compound semiconductor layer 111 and a blanket gate metal layer 113 are sequentially formed over the nitride based semiconductor layer 106 using the deposition techniques described above.

[0097] 16C, a plurality of gate structures 110 are formed above the nitride-based semiconductor layer 106 by patterning the p-type blanket doped III-V compound semiconductor layer 111 and the blanket gate metal layer 113. Each gate structure 110 includes a p-type doped III-V compound semiconductor layer 112 and a gate metal layer 114. A passivation layer 124 is then formed to cover the gate structures 110 using the deposition techniques described above.

[0098] In some embodiments, the blanket gate metal layer 113 is also patterned to form one or more resistor structures 180 during the same step of forming the gate structure 110, as shown in FIG. 17B.

[0099] 16D, several S / D regions 160 are formed by removing several portions of the passivation layer 124. At least a portion of the nitride-based semiconductor layer 106 is exposed from the S / D regions 160. A blanket conductive layer 115 is formed to cover the nitride-based semiconductor layer 106 and the passivation layer 124, and to contact the nitride-based semiconductor layer 106 by filling the S / D regions 160.

[0100] 16E, S / D electrodes 116 are formed by patterning blanket conductive layer 115. Portions of blanket conductive layer 115 are removed, and remaining portions of blanket conductive layer 115 in S / D region 160 are retained to provide S / D electrodes 116. A passivation layer 126 is then formed on passivation layer 124 using the deposition techniques described above to cover S / D electrodes 116.

[0101] In some embodiments, blanket conductive layer 115 is patterned to form one or more resistive structures 180 during the same step that forms S / D electrodes 116, as shown in FIG. 17C.

[0102] 16F, conductive vias 132 are formed through passivation layers 126 and 124. A blanket conductive layer 141 is deposited over passivation layer 126 using the deposition techniques described above.

[0103] 16G, blanket conductive layer 141 is patterned to form conductive lines 142 above passivation layer 126 that are electrically connected to conductive vias 132. A passivation layer 128 is then formed over passivation layer 126 using the deposition techniques described above to cover conductive lines 142.

[0104] In some embodiments, blanket conductive layer 141 is also patterned to form one or more resistor structures 180 during the same step that forms conductive lines 142, as shown in FIG. 17D.

[0105] 16H, conductive vias 136 are formed in passivation layer 128. A blanket conductive layer 145 is deposited over passivation layer 128 using the deposition techniques described above.

[0106] 16I, blanket conductive layer 145 is patterned to form conductive lines 146 above passivation layer 128 that are electrically connected to conductive vias 136. A protective layer 154 is then formed on passivation layer 128 using the deposition techniques described above to cover conductive lines 146.

[0107] In some embodiments, blanket conductive layer 145 is also patterned to form one or more resistor structures 180 during the same step that forms conductive lines 146, as shown in FIG. 17E.

[0108] Referring to FIG. 16J, the protective layer 154 is then patterned to form one or more openings to expose one or more conductive pads 170.

[0109] The manufacturing method of the nitride-based IC chip in which the circuits 100C / 100D / 100E / 100F are integrated is similar to the manufacturing method of the nitride-based IC chip in which the circuits 100A / 100B are integrated, except that in the step shown in FIG. 16H, before depositing the blanket conductive layer 145, a plurality of TGVs 162 are further formed, which extend from the upper surface of the passivation layer 128 and penetrate into the substrate 102 (as shown in FIG. 18).

[0110] The selection and description of the embodiments are intended to adequately illustrate the principles of the invention and its practical application, thereby facilitating the understanding of those skilled in the art of the various modifications that are adapted to each embodiment of the invention and the particular uses contemplated. Although the methods disclosed herein have been described and refer to specific operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or rearranged to form methods that produce equivalent effects without departing from the teachings of the disclosure. Thus, unless specifically indicated herein, there are no limitations to the order and grouping of operations. Although the equipment disclosed herein has been described with reference to specific structures, shapes, materials, compositions of matter and relationships, these descriptions and drawings are not intended to be limiting. Modifications may be made to adapt a particular situation to the objective, spirit and scope of the disclosure. All such modifications are within the scope of the appended claims.

Claims

1. 1. A nitride based bidirectional switching device for operation with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) terminal, a voltage monitor (VM) terminal, and a ground terminal, the nitride based bidirectional switching device comprising: a first control terminal arranged to be electrically connected to a DO terminal of the controller and a second control terminal arranged to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; and an adaptation module arranged to receive a DO signal and a CO signal from the first and second control terminals, respectively, and to deliver a main control signal to a control electrode of the main switch element to control the main switch element.

2. 2. The nitride-based bidirectional switching device of claim 1, wherein when a high-level voltage is applied to the first control terminal and a high-level voltage is applied to the second control terminal, the main switch element is turned on to allow charging and discharging of a battery.

3. 2. The nitride-based bidirectional switching device of claim 1, wherein when a low-level voltage is applied to the first control terminal and a high-level voltage is applied to the second control terminal, the main switch element is disconnected to protect a battery from excessive discharge or short circuit.

4. 2. The nitride-based bidirectional switching device of claim 1, wherein when a high-level voltage is applied to the first control terminal and a negative high-level voltage is applied to the second control terminal, the main switch element is disconnected to protect a battery from overcharging.

5. 5. The nitride-based bidirectional switching device according to claim 1, wherein the main switching element is a first nitride-based transistor, the gate of which is a control electrode of the main switching element, the drain of which is a first conductive electrode of the main switching element, and the source of which is a second conductive electrode of the main switching element.

6. 6. The nitride-based bidirectional switching device of claim 5, wherein the first nitride-based transistor is an AlGaN / GaN enhancement-type (E-type) high electron mobility transistor (HEMT).

7. The adaptation module includes: a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; A second voltage fixing element is provided having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. a first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; a second auxiliary switching element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switching element; 7. The nitride-based bidirectional switching device according to claim 1, wherein a first resistor element has a first electrode electrically connected to a control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal.

8. The first voltage fixing element is a second nitride based transistor, the gate and the source of which are connected to each other to form a positive electrode of the first voltage fixing element, and the drain of which is disposed as a negative electrode of the first voltage fixing element; 8. The nitride-based bidirectional switching device according to claim 7, wherein the second voltage clamp element is a third nitride-based transistor, the gate and the source of which are connected to form a positive electrode of the second voltage clamp element, and the drain of which is disposed as a negative electrode of the second voltage clamp element.

9. the first auxiliary switching element is a fourth nitride based transistor, the gate of which is a control electrode of the first auxiliary switching element, the drain of which is a first conductive electrode of the first auxiliary switching element, and the source of which is a second conductive electrode of the first auxiliary switching element; 9. The nitride-based bidirectional switching device according to claim 7 or 8, wherein the second auxiliary switching element is a fifth nitride-based transistor, the gate of which is a control electrode of the second auxiliary switching element, the drain of which is a first conductive electrode of the second auxiliary switching element, and the source of which is a second conductive electrode of the second auxiliary switching element.

10. 10. The nitride based bidirectional switching device of claim 7, wherein the first resistive element is a resistor.

11. 11. The nitride based bidirectional switching device of claim 1, wherein the adaptive module further comprises a third voltage fixing element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

12. 12. The nitride based bidirectional switching device of claim 11, wherein the third voltage fixing element is a sixth nitride based transistor, the gate and the source of which are connected together to form a positive electrode of the third voltage fixing element, and the drain of which is disposed as a negative electrode of the third voltage fixing element.

13. 13. The nitride based bidirectional switching device of any one of claims 1 to 12, wherein the main switch element and the adaptation module are integrated in a nitride based integrated circuit (IC) chip.

14. The nitride-based IC chip is a first nitride semiconductor layer disposed above a substrate; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a band gap larger than the band gap of the first nitride-based semiconductor layer; one or more gate structures formed by patterning a gate semiconductor layer disposed on the second nitride-based semiconductor layer and patterning a gate metal layer disposed on the gate semiconductor layer; a first passivation layer disposed on the second nitride semiconductor layer and covering the gate structure; one or more source / drain (S / D) electrodes formed by patterning an S / D electrode layer disposed on the first passivation layer and penetrating the first passivation layer to contact the second nitride-based semiconductor layer; a second passivation layer disposed on the first passivation layer and covering the S / D electrodes; one or more first conductive vias disposed in the second passivation layer; a first conductive layer disposed on the second passivation layer and patterned to define one or more first conductive lines; a third passivation layer disposed on the first conductive layer and covering the one or more first conductive lines; one or more second conductive vias disposed within the third passivation layer; a second conductive layer disposed on the third passivation layer and patterned to define one or more second conductive lines; 14. The nitride based bidirectional switching device of claim 13, further comprising: a protective layer disposed over said second conductive layer and having one or more openings to expose one or more conductive pads.

15. 15. The nitride-based bidirectional switching device of claim 14, wherein the nitride-based IC chip further comprises one or more resistive structures formed by patterning a two-dimensional electron gas region adjacent a heterojunction interface between the first and second nitride-based semiconductor layers.

16. 15. The nitride based bidirectional switching device of claim 14, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the S / D electrode layer.

17. 15. The nitride based bidirectional switching device of claim 14, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the gate metal layer.

18. 15. The nitride based bidirectional switching device of claim 14, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the first conductive layer.

19. 15. The nitride based bidirectional switching device of claim 14, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the second conductive layer.

20. 1. A method of manufacturing a nitride based bidirectional switching device for operation with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) node, a voltage monitor (VM) terminal, and a ground terminal, the method comprising: arranging a first control terminal to be electrically connected to a DO terminal of the controller and arranging a second control terminal to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; forming a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; and arranging an adaptation module to receive a DO signal and a CO signal from the first and second control terminals, respectively, and to deliver a main control signal to a control electrode of the main switch element to control the main switch element.

21. The adaptation module is configured by the following steps. forming a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; forming a second voltage fixing element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. forming a first auxiliary switch element, the first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; forming a second auxiliary switch element, the second auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switch element; 21. The method of claim 20, wherein forming a first resistive element comprises the first resistive element having a first electrode electrically connected to a control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal.

22. 22. The method of claim 21, wherein the adaptive module is configured by further forming a third voltage clamping element, the third voltage clamping element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

23. The method further includes integrating the main switch element and the adaptation module into an integrated circuit (IC) chip by the steps of: disposing a first nitride semiconductor layer over a substrate; a second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer, and a band gap of the second nitride-based semiconductor layer is larger than a band gap of the first nitride-based semiconductor layer; disposing a gate semiconductor layer on the second nitride based semiconductor layer and disposing a gate metal layer on the gate semiconductor layer, and patterning the gate semiconductor layer and the gate metal layer to form one or more gate structures; disposing a first passivation layer on the second nitride based semiconductor layer to cover the gate structure and patterning the first passivation layer to form one or more source / drain (S / D) regions; disposing an S / D electrode layer overlying the first passivation layer and the one or more S / D regions and patterning the S / D electrode layer to form one or more S / D electrodes through the first passivation layer and in contact with the second nitride based semiconductor layer; disposing a second passivation layer on the first passivation layer to cover the S / D electrodes; disposing a first conductive layer over the second passivation layer and patterning the first conductive layer to form one or more first conductive lines; disposing a third passivation layer on the first conductive layer to cover the one or more first conductive lines; disposing a second conductive layer over the third passivation layer and patterning the second conductive layer to form one or more second conductive lines; 23. The method of any one of claims 20 to 22, further comprising: disposing a protective layer over the second conductive layer; and patterning the protective layer to form one or more openings to expose one or more conductive pads, the conductive pads being the first control terminal, the second control terminal, the first conductive terminal, and the second conductive terminal, respectively.

24. 24. The method of claim 23, wherein the main switching element and the adaptive module are integrated into the IC chip, further comprising forming one or more resistor structures by patterning a two-dimensional electron gas region adjacent a heterojunction interface with the first nitride-based semiconductor layer.

25. 24. The method of claim 23, wherein the main switch element and the adaptation module are integrated into the IC chip further comprises forming one or more resistor structures by patterning the S / D electrode layer.

26. 24. The method of claim 23, wherein the main switch element and the adaptation module are integrated into the IC chip further comprises: patterning the gate metal layer to form one or more resistor structures.

27. 24. The method of claim 23, wherein the main switch element and the adaptation module are integrated into the IC chip further comprises forming one or more resistor structures by patterning the first conductive layer.

28. 24. The method of claim 23, wherein the main switch element and the adaptation module are integrated into the IC chip further comprises forming one or more resistor structures by patterning the second conductive layer.

29. 1. A nitride based bidirectional switching device for operation with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) terminal, a voltage monitor (VM) terminal, and a ground terminal, the nitride based bidirectional switching device comprising: a first control terminal arranged to be electrically connected to a DO terminal of the controller and a second control terminal arranged to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; an adaptation module arranged to receive a DO signal and a CO signal from the first and second control terminals, respectively, and to issue a main control signal to a control electrode of the main switching element to control the main switching element; and a substrate potential management module arranged to manage a potential of a main substrate of the main switch element to be essentially equal to the lower potential of the first and second conductive terminals.

30. When a high level voltage is applied to the first control terminal and a high level voltage is applied to the second control terminal, The main switch element is turned on to permit charging and discharging of the battery; and 30. The nitride based bidirectional switching device of claim 29, wherein the potential of the main substrate is managed to be essentially equal to a ground potential.

31. When a low level voltage is applied to the first control terminal and a high level voltage is applied to the second control terminal, The main switch element is turned off to protect the battery from excessive discharge or short circuit; and 30. The nitride based bidirectional switching device of claim 29, wherein the potential of the main substrate is managed to be essentially equal to a ground potential.

32. When a high-level voltage is applied to the first control terminal and a negative high-level voltage is applied to the second control terminal, The main switch element is turned off to protect the battery from overcharging, and 30. The nitride based bidirectional switching device of claim 29, wherein the potential of the main substrate is managed to be essentially equal to the potential of the second conductive terminal.

33. 33. The nitride-based bidirectional switching device according to any one of claims 29 to 32, wherein the main switching element is a first nitride-based transistor, the gate of which is a control electrode of the main switching element, the drain of which is a first conductive electrode of the main switching element, and the source of which is a second conductive electrode of the main switching element.

34. 34. The nitride based bidirectional switching device of claim 33, wherein the first nitride based transistor is an AlGaN / GaN enhancement mode (E mode) high electron mobility transistor (HEMT).

35. The adaptation module includes: a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; a second voltage fixing element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. a first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; a second auxiliary switching element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switching element; a first resistive element having a first electrode electrically connected to the control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal; and The substrate potential management module includes: a third auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode electrically connected to the first conductive terminal, and a second conductive electrode electrically connected to the main substrate; 35. The nitride based bidirectional switching device of any one of claims 29 to 34, further comprising a fourth auxiliary switch element having a control electrode electrically connected to said first control terminal, a first conductive electrode electrically connected to said second conductive terminal, and a second conductive electrode electrically connected to said main substrate.

36. The first voltage fixing element is a second nitride based transistor, the gate and the source of which are connected to each other to form a positive electrode of the first voltage fixing element, and the drain of which is disposed as a negative electrode of the first voltage fixing element; 36. The nitride based bidirectional switching device of claim 35, wherein the second voltage clamping element is a third nitride based transistor, the gate and source of which are connected to form a positive electrode of the second voltage clamping element, and the drain of which is disposed as a negative electrode of the second voltage clamping element.

37. the first auxiliary switching element is a fourth nitride based transistor, the gate of which is a control electrode of the first auxiliary switching element, the drain of which is a first conductive electrode of the first auxiliary switching element, and the source of which is a second conductive electrode of the first auxiliary switching element; the second auxiliary switching element is a fifth nitride based transistor, the gate of which is a control electrode of the second auxiliary switching element, the drain of which is a first conductive electrode of the second auxiliary switching element, and the source of which is a second conductive electrode of the second auxiliary switching element; the third auxiliary switching element is a seventh nitride based transistor, the gate of which is a control electrode of the third auxiliary switching element, the drain of which is a first conductive electrode of the third auxiliary switching element, and the source of which is a second conductive electrode of the third auxiliary switching element; and 37. The nitride-based bidirectional switching device according to claim 35 or 36, wherein the fourth auxiliary switching element is an eighth nitride-based transistor, the gate of which is a control electrode of the fourth auxiliary switching element, the drain of which is a first conductive electrode of the fourth auxiliary switching element, and the source of which is a second conductive electrode of the fourth auxiliary switching element.

38. 38. The nitride based bidirectional switching device of any one of claims 35 to 37, wherein the first resistive element is a resistor.

39. 39. The nitride based bidirectional switching device of any one of claims 29 to 38, wherein the adaptive module further comprises a third voltage fixing element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

40. 40. The nitride based bidirectional switching device of claim 39, wherein the third voltage clamping element is a ninth nitride based transistor, the gate and the source of which are connected to form a positive electrode of the third voltage clamping element, and the drain of which is disposed as a negative electrode of the third voltage clamping element.

41. 41. The nitride based bidirectional switching device of any one of claims 29 to 40, wherein the main switch element, the adaptation module and the substrate potential management module are integrated in a nitride based integrated circuit (IC) chip.

42. The nitride-based IC chip is a first nitride semiconductor layer disposed above a substrate; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a band gap larger than the band gap of the first nitride-based semiconductor layer; one or more gate structures formed by patterning a gate semiconductor layer disposed on the second nitride-based semiconductor layer and patterning a gate metal layer disposed on the gate semiconductor layer; a first passivation layer disposed on the second nitride semiconductor layer and covering the gate structure; one or more source / drain (S / D) electrodes formed by patterning an S / D electrode layer disposed on the first passivation layer and penetrating the first passivation layer to contact the second nitride based semiconductor layer; a second passivation layer disposed on the first passivation layer and covering the S / D electrodes; one or more first conductive vias disposed in the second passivation layer; a first conductive layer disposed on the second passivation layer and patterned to define one or more first conductive lines; a third passivation layer disposed on the first conductive layer and covering the one or more first conductive lines; one or more second conductive vias disposed within the third passivation layer; at least one through gallium via (TGV) extending vertically from the second conductive layer and through the substrate; a second conductive layer disposed on the third passivation layer and patterned to define one or more second conductive lines; 42. The nitride based bidirectional switching device of claim 41 further comprising: a protective layer disposed over said second conductive layer and having one or more openings to expose one or more conductive pads.

43. 43. The nitride-based bidirectional switching device of claim 42, wherein the nitride-based IC chip further comprises one or more resistive structures formed by patterning a two-dimensional electron gas region adjacent a heterojunction interface with the first nitride-based semiconductor layer.

44. 43. The nitride based bidirectional switching device of claim 42, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the S / D electrode layer.

45. 43. The nitride based bidirectional switching device of claim 42, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the gate metal layer.

46. 43. The nitride based bidirectional switching device of claim 42, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the first conductive layer.

47. 43. The nitride based bidirectional switching device of claim 42, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the second conductive layer.

48. 1. A method of manufacturing a nitride based bidirectional switching device for operation with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) node, a voltage monitor (VM) terminal, and a ground terminal, the method comprising: arranging a first control terminal to be electrically connected to a DO terminal of the controller and arranging a second control terminal to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; forming a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; an adaptation module arranged to receive a DO signal and a CO signal from said first and second control terminals, respectively, and to deliver a main control signal to a control electrode of said main switching element to control said main switching element; and arranging a substrate potential management module to manage a potential of a main substrate of the main switch element to be essentially equal to the lower potential of the potentials of the first and second conduction terminals.

49. The adaptation module is configured by the following steps. forming a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; forming a second voltage fixing element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. forming a first auxiliary switch element, the first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; forming a second auxiliary switch element, the second auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switch element; forming a first resistor element, the first resistor element having a first electrode electrically connected to the control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal; The substrate potential management module is arranged by the following steps. forming a third auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode electrically connected to the first conductive terminal, and a second conductive electrode electrically connected to the main substrate; 49. The method of claim 48, further comprising forming a fourth auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode electrically connected to the second conductive terminal, and a second conductive electrode electrically connected to the main substrate.

50. 50. The method of claim 49, wherein the adaptive module is configured by further forming a third voltage clamping element, the third voltage clamping element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

51. The method further includes integrating the main switch element, the adaptation module and the substrate potential management module into an integrated circuit (IC) chip by the steps of: disposing a first nitride semiconductor layer over a substrate; a second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer, and a band gap of the second nitride-based semiconductor layer is larger than a band gap of the first nitride-based semiconductor layer; disposing a gate semiconductor layer on the second nitride based semiconductor layer and disposing a gate metal layer on the gate semiconductor layer, and patterning the gate semiconductor layer and the gate metal layer to form one or more gate structures; disposing a first passivation layer on the second nitride based semiconductor layer to cover the gate structure and patterning the first passivation layer to form one or more source / drain (S / D) regions; disposing an S / D electrode layer overlying the first passivation layer and the one or more S / D regions and patterning the S / D electrode layer to form one or more S / D electrodes through the first passivation layer and in contact with the second nitride based semiconductor layer; disposing a second passivation layer on the first passivation layer to cover the S / D electrodes; disposing a first conductive layer over the second passivation layer and patterning the first conductive layer to form one or more first conductive lines; disposing a third passivation layer on the first conductive layer to cover the one or more first conductive lines; forming at least one through gallium via (TGV) extending vertically from an upper surface of the third passivation layer and through the substrate; disposing a second conductive layer over the third passivation layer and patterning the second conductive layer to form one or more second conductive lines; 51. The method of any one of claims 48 to 50, further comprising: disposing a protective layer over the second conductive layer; and patterning the protective layer to form one or more openings to expose one or more conductive pads, the conductive pads being the first control terminal, the second control terminal, the first conductive terminal, and the second conductive terminal, respectively.

52. 52. The method of claim 51, wherein integrating the main switching element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning a two-dimensional electron gas region adjacent to a heterojunction interface with the first nitride-based semiconductor layer.

53. 52. The method of claim 51, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the S / D electrode layer.

54. 52. The method of claim 51, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises patterning the gate metal layer to form one or more resistor structures.

55. 52. The method of claim 51, wherein integrating the main switching element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the first conductive layer.

56. 52. The method of claim 51, wherein integrating the main switching element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the second conductive layer.

57. 1. A nitride based bidirectional switching device operating in conjunction with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) terminal, a voltage monitor (VM) terminal, and a ground terminal, the nitride based bidirectional switching device comprising: a first control terminal arranged to be electrically connected to a DO terminal of the controller and a second control terminal arranged to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; an adaptation module arranged to receive a DO signal and a CO signal from the first and second control terminals, respectively, and to issue a main control signal to a control electrode of the main switching element to control the main switching element; and a substrate potential management module arranged to manage a potential of a main substrate of the main switch element to be essentially equal to the lower potential of the first and second conductive terminals.

58. When a high level voltage is applied to the first control terminal and a high level voltage is applied to the second control terminal, The main switch element is turned on to permit charging and discharging of the battery; and 58. The nitride based bidirectional switching device of claim 57, wherein the potential of the main substrate is managed to be essentially equal to ground potential.

59. When a low level voltage is applied to the first control terminal and a high level voltage is applied to the second control terminal, The main switch element is turned off to protect the battery from excessive discharge or short circuit; and 58. The nitride based bidirectional switching device of claim 57, wherein the potential of the main substrate is managed to be essentially equal to a ground potential.

60. When a high-level voltage is applied to the first control terminal and a negative high-level voltage is applied to the second control terminal, The main switch element is turned off to protect the battery from overcharging, and 58. The nitride based bidirectional switching device of claim 57, wherein the potential of the main substrate is managed to be essentially equal to the potential of the second conductive terminal.

61. 61. The nitride-based bidirectional switching device of any one of claims 57 to 60, wherein the main switching element is a first nitride-based transistor, the gate of which is a control electrode of the main switching element, the drain of which is a first conductive electrode of the main switching element, and the source of which is a second conductive electrode of the main switching element.

62. 62. The nitride based bidirectional switching device of claim 61, wherein the first nitride based transistor is an AlGaN / GaN enhancement mode (E mode) high electron mobility transistor (HEMT).

63. The adaptation module includes: a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; a second voltage fixing element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. a first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; a second auxiliary switching element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switching element; a first resistive element having a first electrode electrically connected to the control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal; and The substrate potential management module includes: a third auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode electrically connected to the first conductive terminal, and a second conductive electrode electrically connected to the main substrate; a fourth auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode electrically connected to the second conductive terminal, and a second conductive electrode electrically connected to the main substrate; 63. The nitride based bidirectional switching device of any one of claims 57 to 62, comprising: a second resistive element having a first electrode electrically connected to said main substrate and a second electrode electrically connected to said first conductive terminal.

64. The first voltage fixing element is a second nitride based transistor, the gate and the source of which are connected to each other to form a positive electrode of the first voltage fixing element, and the drain of which is disposed as a negative electrode of the first voltage fixing element; 64. The nitride based bidirectional switching device of claim 63, wherein the second voltage clamping element is a third nitride based transistor, the gate and source of which are connected to form a positive electrode of the second voltage clamping element, and the drain of which is disposed as a negative electrode of the second voltage clamping element.

65. the first auxiliary switching element is a fourth nitride based transistor, the gate of which is a control electrode of the first auxiliary switching element, the drain of which is a first conductive electrode of the first auxiliary switching element, and the source of which is a second conductive electrode of the first auxiliary switching element; the second auxiliary switching element is a fifth nitride based transistor, the gate of which is a control electrode of the second auxiliary switching element, the drain of which is a first conductive electrode of the second auxiliary switching element, and the source of which is a second conductive electrode of the second auxiliary switching element; the third auxiliary switching element is a seventh nitride based transistor, the gate of which is a control electrode of the third auxiliary switching element, the drain of which is a first conductive electrode of the third auxiliary switching element, and the source of which is a second conductive electrode of the third auxiliary switching element; and 65. The nitride-based bidirectional switching device of claim 63 or 64, wherein the fourth auxiliary switching element is an eighth nitride-based transistor, the gate of which is a control electrode of the fourth auxiliary switching element, the drain of which is a first conductive electrode of the fourth auxiliary switching element, and the source of which is a second conductive electrode of the fourth auxiliary switching element.

66. 66. The nitride based bidirectional switching device of any one of claims 63 to 65, wherein the first resistive element is a first resistor and the second resistive element is a second resistor.

67. 67. The nitride based bidirectional switching device of any one of claims 57 to 66, wherein the adaptive module further comprises a third voltage fixing element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

68. 68. The nitride based bidirectional switching device of claim 67, wherein the third voltage clamp element is a ninth nitride based transistor having a gate and a source connected to form a positive electrode of the third voltage clamp element and a drain disposed as a negative electrode of the third voltage clamp element.

69. 69. The nitride based bidirectional switching device of any one of claims 57 to 68, wherein the main switch element, the adaptation module and the substrate potential management module are integrated in a nitride based integrated circuit (IC) chip.

70. The nitride-based IC chip is a first nitride semiconductor layer disposed above a substrate; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a band gap larger than the band gap of the first nitride-based semiconductor layer; one or more gate structures formed by patterning a gate semiconductor layer disposed on the second nitride-based semiconductor layer and patterning a gate metal layer disposed on the gate semiconductor layer; a first passivation layer disposed on the second nitride semiconductor layer and covering the gate structure; one or more source / drain (S / D) electrodes formed by patterning an S / D electrode layer disposed on the first passivation layer and penetrating the first passivation layer to contact the second nitride based semiconductor layer; a second passivation layer disposed on the first passivation layer and covering the S / D electrodes; one or more first conductive vias disposed in the second passivation layer; a first conductive layer disposed on the second passivation layer and patterned to define one or more first conductive lines; a third passivation layer disposed on the first conductive layer and covering the one or more first conductive lines; one or more second conductive vias disposed within the third passivation layer; a second conductive layer disposed on the third passivation layer and patterned to define one or more second conductive lines; at least one through gallium via (TGV) extending vertically from the second conductive layer and through the substrate; 70. The nitride based bidirectional switching device of claim 69, further comprising: a protective layer disposed over said second conductive layer and having one or more openings to expose one or more conductive pads.

71. The nitride-based bidirectional switching device of claim 70, characterized in that the nitride-based IC chip further comprises one or more resistive structures formed by patterning a two-dimensional electron gas region adjacent a heterojunction interface with the first nitride-based semiconductor layer.

72. 71. The nitride based bidirectional switching device of claim 70, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the S / D electrode layer.

73. 71. The nitride based bidirectional switching device of claim 70, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the gate metal layer.

74. 71. The nitride based bidirectional switching device of claim 70, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the first conductive layer.

75. 71. The nitride based bidirectional switching device of claim 70, wherein the nitride based IC chip further comprises one or more resistor structures formed by patterning the second conductive layer.

76. 1. A method of manufacturing a nitride based bidirectional switching device for operation with a battery protection controller, the battery protection controller having a power input terminal, an overcurrent discharge protection (DO) terminal, an overcurrent charge protection (CO) node, a voltage monitor (VM) terminal, and a ground terminal, the method comprising: arranging a first control terminal to be electrically connected to a DO terminal of the controller and arranging a second control terminal to be electrically connected to a CO terminal of the controller; a first conductive terminal arranged to be electrically connected to a ground terminal of the controller and a second conductive terminal arranged to be electrically connected to a VM terminal of the controller through a voltage monitoring resistor; forming a main switch element having a control electrode, a first conductive electrode connected to the first conductive terminal, and a second conductive electrode connected to the second conductive terminal; an adaptation module arranged to receive a DO signal and a CO signal from the first and second control terminals, respectively, and transmitting a main control signal to a control electrode of the main switching element to control the main switching element; and arranging a substrate potential management module to manage a potential of a main substrate of the main switch element to be essentially equal to the lower potential of the potentials of the first and second conduction terminals.

77. The adaptation module is configured by the following steps. forming a first voltage fixing element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; forming a second voltage fixing element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node. forming a first auxiliary switch element, the first auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to a second interconnection node; forming a second auxiliary switch element, the second auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switch element; forming a first resistor element, the first resistor element having a first electrode electrically connected to the control electrode of the main switch element and a second electrode electrically connected to the first conductive terminal; The substrate potential management module is arranged by the following steps. forming a third auxiliary switch element having a control electrode electrically connected to the second control terminal, a first conductive electrode electrically connected to the first conductive terminal, and a second conductive electrode electrically connected to the main substrate; forming a fourth auxiliary switch element having a control electrode electrically connected to the first control terminal, a first conductive electrode electrically connected to the second conductive terminal, and a second conductive electrode electrically connected to the main substrate; 77. The method of claim 76, further comprising forming a second resistor element having a first electrode electrically connected to the main substrate and a second electrode electrically connected to the first conductive terminal.

78. 78. The method of claim 77, wherein the adaptive module is configured by further forming a third voltage clamping element, the third voltage clamping element having a positive electrode electrically connected to a control electrode of the main switch element and a negative electrode electrically connected to the second control terminal.

79. The method further includes integrating the main switch element, the adaptation module and the substrate potential management module into an integrated circuit (IC) chip by the steps of: disposing a first nitride semiconductor layer over a substrate; a second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer, and a band gap of the second nitride-based semiconductor layer is larger than a band gap of the first nitride-based semiconductor layer; disposing a gate semiconductor layer on the second nitride based semiconductor layer and disposing a gate metal layer on the gate semiconductor layer, and patterning the gate semiconductor layer and the gate metal layer to form one or more gate structures; disposing a first passivation layer on the second nitride based semiconductor layer to cover the gate structure and patterning the first passivation layer to form one or more source / drain (S / D) regions; disposing an S / D electrode layer overlying the first passivation layer and the one or more S / D regions and patterning the S / D electrode layer to form one or more S / D electrodes through the first passivation layer and in contact with the second nitride based semiconductor layer; disposing a second passivation layer on the first passivation layer to cover the S / D electrodes; disposing a first conductive layer over the second passivation layer and patterning the first conductive layer to form one or more first conductive lines; disposing a third passivation layer on the first conductive layer to cover the one or more first conductive lines; forming at least one through gallium via (TGV) extending vertically from an upper surface of the third passivation layer and through the substrate; disposing a second conductive layer over the third passivation layer and patterning the second conductive layer to form one or more second conductive lines; 79. The method of any one of claims 76 to 78, further comprising: disposing a protective layer over the second conductive layer; and patterning the protective layer to form one or more openings to expose one or more conductive pads, the conductive pads being the first control terminal, the second control terminal, the first conductive terminal, and the second conductive terminal, respectively.

80. 80. The method of claim 79, wherein integrating the main switching element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning a two-dimensional electron gas region adjacent to a heterojunction interface with the first nitride-based semiconductor layer.

81. 80. The method of claim 79, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the S / D electrode layer.

82. 80. The method of claim 79, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the gate metal layer.

83. 80. The method of claim 79, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the first conductive layer.

84. 80. The method of claim 79, wherein integrating the main switch element, the adaptive module, and the substrate potential management module into the IC chip further comprises forming one or more resistor structures by patterning the second conductive layer.

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