Sidewall passivation for plasma etching

Abstract

An exemplary semiconductor processing method may include depositing a boron-containing material on a substrate. The boron-containing material may extend along a sidewall of one or more features of the substrate. The method may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contact may etch a portion of the one or more features of the substrate. The contact may oxidize the boron-containing material.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. Non-provisional Application No. 17 / 590,084, filed February 1, 2022, the entire contents of which are incorporated herein by reference.

[0002]

[0002] The present technology relates to semiconductor systems, processes, and equipment. More specifically, the present technology relates to processes and systems that passivate sidewalls and maintain feature dimensions during etching steps. [Background technology]

[0003]

[0003] Integrated circuits are made possible by processes that form intricately patterned layers of material on a substrate surface. Forming patterned materials on a substrate requires controlled methods for forming and removing materials. As device sizes shrink, features in integrated circuits can become smaller and aspect ratios of structures can become larger, and maintaining the dimensions of these structures during processing steps can be a challenge. Some processing can cause the material to become dished, resulting in uneven or tapered sidewalls. Developing materials with vertical features without any undercutting can be more challenging.

[0004]

[0004] Accordingly, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. These and other needs are addressed by the present technique. Summary of the Invention

[0005]

[0005] An exemplary semiconductor processing method may include depositing a boron-containing material on a substrate. The boron-containing material may extend along sidewalls of one or more features of the substrate. The method may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a portion of the one or more features of the substrate. The contacting may oxidize the boron-containing material.

[0006] In some embodiments, the oxygen-containing precursor may be or may include diatomic oxygen. A temperature may be maintained at about 50° C. or less during contacting the substrate with the plasma effluent of the oxygen-containing precursor and during depositing the boron-containing material on the substrate. A pressure may be maintained at about 5 mTorr to about 100 mTorr during contacting the substrate with the plasma effluent of the oxygen-containing precursor and during depositing the boron-containing material on the substrate. The method may include forming a plasma of the boron-containing precursor. The plasma of the oxygen-containing precursor may be generated at a plasma power of about 3000 W or more. The method may include depositing a second amount of the boron-containing material on the substrate. The second amount of the boron-containing material may further extend along a sidewall of the one or more features of the substrate. The method may include providing a boron-containing precursor. The boron-containing precursor may be or may include boron trichloride. A carbon-containing mask may be disposed along at least a portion of the substrate. The method may include providing a fluorine-containing precursor. The method may include treating a silicon-containing material disposed along at least a portion of the substrate with the fluorine-containing precursor. Treating the silicon-containing material with the fluorine-containing precursor may maintain openings defined in the silicon-containing material. The fluorine-containing precursor may be or may include an organohalogen compound.

[0007]

[0007] Some embodiments of the present technique include a semiconductor processing method. The method may include i) etching one or more features of a substrate disposed in a processing region of a semiconductor processing chamber with plasma effluents of an oxygen-containing precursor. The method may include ii) depositing a boron-containing material on the substrate. The boron-containing material may extend along at least a portion of the one or more features of the substrate. The method may include repeating steps i and ii to iteratively etch one or more features of the substrate. While performing steps i and ii, a temperature within the semiconductor processing chamber may be maintained at about 50° C. or less.

[0008] In some embodiments, the boron-containing material may include a boron-oxygen-containing material. During etching, a silicon-containing material may be formed along at least a portion of the substrate. The method may include iii) treating the silicon-containing material with a fluorine-containing precursor. Treating the silicon-containing material with the fluorine-containing precursor may maintain the openings defined in the substrate. Steps i)-iii) may be repeated at least three times. The boron-containing material may be deposited for a total period of about 60 seconds or less.

[0009] Some embodiments of the present technique include a semiconductor processing method. The method may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The oxygen-containing precursor may be or may include diatomic oxygen. A substrate may be disposed in the processing region of the semiconductor processing chamber. The method may include forming a plasma of the oxygen-containing precursor in the processing region. The method may include contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a first portion of one or more features of the substrate. The method may include flowing a boron-containing precursor into the processing region of the semiconductor processing chamber. The method may include depositing a boron-containing material on the substrate. The boron-containing material may extend along at least a portion of one or more features of the substrate. The boron-containing material may include oxygen. The method may include flowing an oxygen-containing precursor into the processing region of the semiconductor processing chamber. The method may include forming a plasma of the oxygen-containing precursor in the processing region. The method may include contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a second portion of the one or more features of the substrate. The contacting may oxidize the boron-containing material.

[0010] In some embodiments, the flow rate of the boron-containing precursor may be from about 50 sccm to about 500 sccm. The boron-containing precursor may be flowed into a processing region of the semiconductor processing chamber without a carrier gas. The method may include forming a plasma of the boron-containing precursor. The plasma of the oxygen-containing precursor may be generated at a higher plasma power than the plasma of the boron-containing precursor. The method may include delivering a fluorine-containing precursor to a processing region of the semiconductor processing chamber. The fluorine-containing precursor may include carbon. The method may include treating a silicon-containing mask disposed along at least a portion of the substrate with the fluorine-containing precursor. Treating the silicon-containing mask with the fluorine-containing precursor may maintain openings defined in the silicon-containing mask.

[0011]

[0011] The above techniques may provide numerous advantages over conventional methods and techniques. For example, the process may passivate the sidewalls of the features being formed while allowing the substrate to be maintained in a single processing chamber. Additionally, the process may uniformly etch the features by preserving the feature dimensions, thereby allowing deeper and more uniform features to be formed. Formation of the passivation material may be faster than conventional atomic layer deposition (ALD), allowing for better throughput and single chamber processing. These and other embodiments, along with their many advantages and features, are described in more detail in conjunction with the following description and accompanying figures.

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief description of the drawings]

[0013] [Figure 1] 1 is a schematic top view illustrating an exemplary processing system according to some embodiments of the present technique. [Diagram 2] 1 is a schematic cross-sectional view of an exemplary processing system in accordance with some embodiments of the present technique; [Diagram 3] 1A-1D illustrate selected steps in a semiconductor processing method according to some embodiments of the present technique. [Figure 4] 1A-D show exemplary schematic cross-sectional structures including layers of material and formed in accordance with some embodiments of the present technique. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]

[0017] Some of the figures are included as schematic diagrams. It should be understood that the figures are for illustrative purposes and should not be considered to scale unless scale is specifically stated. Furthermore, as schematic diagrams, the figures are provided to aid in understanding and may not include all aspects or information as compared to realistic representations and may include exaggerated material for illustrative purposes.

[0015]

[0018] In the accompanying figures, similar components and / or features may be labeled with the same reference label. Additionally, various components of the same type may be distinguished by following the reference label with a letter that distinguishes the similar components. When only a first reference label is used herein, the description applies to any one of the similar components having the same first reference label, regardless of the letter.

[0016]

[0019] As device sizes continue to decrease, many layers of materials may decrease in thickness and size to scale the devices. Features within semiconductor structures may decrease in size and the aspect ratio of the features may increase. As the aspect ratio of a feature increases, it may become difficult for an etching process to uniformly etch the feature without tapering the sidewalls of the feature or compromising the dimensions or integrity of the feature.

[0017]

[0020] Prior art techniques use ALD to intermittently deposit a thin protective layer of material on the sidewalls of features during the etching process. However, these ALD steps require significant time to form the features, which increases wait times and reduces throughput. Furthermore, the introduction of layers of material formed using ALD may require additional hardware on the chamber to deliver various precursors, or the vacuum may need to be broken and the structure transported to another chamber to perform deposition via ALD. This transport not only increases wait times and reduces throughput, but may also allow for undesirable contamination or atmospheric exposure during processing. Thus, many prior art techniques have limited ability to prevent structural defects in the final device.

[0018]

[0021] The present technique overcomes these problems by delivering a deposition precursor to form a passivation material that helps coat the sidewalls of the features during the etching step. The deposition process can be performed in the same chamber as the etching process, limiting wait times and increasing throughput. By delivering the passivation material, the technique can continue etching the feature while protecting the feature dimensions and limit the sidewalls from being etched toward the top of the feature, causing the sidewalls to taper or the overlapping material to be undercut, widening the feature dimensions. By depositing a passivation layer, the technique can prevent problems in all subsequent integration processes due to pitch loss and / or defects in the final device.

[0019]

[0022] While the remaining disclosure will always identify specific etching and deposition processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to a variety of other processes, such as may be performed in the chambers described. Thus, the technology should not be considered limited to use with only the etching or deposition processes described. Before describing the systems and methods or steps of an exemplary process sequence according to some embodiments of the technology, the disclosure will describe one possible system and chamber that may be used with the technology. It should be understood that the technology is not limited to the equipment described, and the processes described may be performed in any number of processing chambers and systems.

[0020]

[0023] Figure 1 illustrates a top view of one embodiment of a deposition, etch, bake, and / or cure chamber processing system 10 according to an embodiment. The tool or processing system 10 illustrated in Figure 1 may include multiple process chambers 24a-d, a transfer chamber 20, a service chamber 26, an integrated metrology chamber 28, and a pair of load lock chambers 16a-b. The process chambers may include any number of structures or components and any number or combination of process chambers.

[0021]

[0024] The transfer chamber 20 may include a robotic transport mechanism 22 for transporting substrates between chambers. The transport mechanism 22 may have a pair of substrate transport blades 22a each attached to a distal end of an extendable arm 22b. The blades 22a may be used to transport individual substrates into and out of the process chambers. In operation, one of the substrate transport blades, such as blade 22a of the transport mechanism 22, may retrieve a substrate W from one of the load lock chambers, such as chambers 16a-b, and transport the substrate W to a first processing stage, e.g., a processing process, as described below, in chambers 24a-d. The chambers may be included to perform individual or combinations of steps of the described techniques. For example, one or more chambers may be configured to perform a deposition or etching step, and one or more other chambers may be configured to perform a pre-processing step and / or one or more post-processing steps as described. Any number of configurations are encompassed by the present technology, which may also perform any number of additional manufacturing steps typically performed in semiconductor processing.

[0022]

[0025] If a chamber is occupied, the robot can wait until processing is complete, then remove the processed substrate from the chamber with one blade 22a and insert a new substrate with a second blade. Once the substrate is processed, it can then be moved to a second processing stage. For each move, the transport mechanism 22 may generally have one blade to deliver the substrate and one empty blade to perform the exchange of the substrate. The transport mechanism 22 can wait at each chamber until the exchange is accomplished.

[0023]

[0026] Once processing is completed in the process chambers, the transport mechanism 22 can move the substrate W from the last process chamber and transport the substrate W to a cassette in the load lock chamber 16a-b. The substrate can be moved from the load lock chamber 16a-b into the factory interface 12. The factory interface 12 can be operable to transfer substrates between the pod loaders 14a-d and the load lock chambers 16a-b, which are generally in a clean environment at atmospheric pressure. The clean environment of the factory interface 12 can generally be obtained through an air filtration process, such as HEPA filtration. The factory interface 12 can also include a substrate orienter / aligner that can be used to properly align the substrate prior to processing. At least one substrate robot, such as robots 18a-b, can be positioned in the factory interface 12 to transport substrates between various locations / locations in the factory interface 12 and to other locations coupled thereto. The robots 18a-b may be configured to move along a track system within the factory interface 12 from a first end to a second end of the factory interface 12.

[0024]

[0027] The processing system 10 may further include an integrated metrology chamber 28 for providing control signals that may provide adaptive control for any of the processes being performed in the processing chambers. The integrated metrology chamber 28 may include any of a variety of metrology devices for measuring various film properties such as thickness, roughness, composition, etc., and the metrology devices may further be capable of characterizing lattice parameters such as critical dimensions, sidewall angles, and feature heights under vacuum in an automated manner.

[0025]

[0028] Each of the processing chambers 24a-d may be configured to perform one or more process steps in the fabrication of semiconductor structures, and any number and combination of processing chambers may be used on the multi-chamber processing system 10. For example, any of the processing chambers may be configured to perform multiple substrate processing steps, including cyclical layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition, and any number of deposition processes, including etching, pre-cleaning, pre-treatment, post-treatment, annealing, plasma treatment, degassing, orientation, and other steps including other substrate processes. Some specific processes that may be performed in any of the chambers, or any combination of the chambers, may include metal deposition, surface cleaning and pre-treatment, thermal annealing such as rapid thermal processing, plasma treatment, and the like. As one of ordinary skill in the art would readily appreciate, any other process, including any of the processes described below, may similarly be performed in a particular chamber incorporated within the multi-chamber processing system 10.

[0026]

[0029] 2 is a schematic cross-sectional view of an exemplary processing chamber 100 suitable for patterning a layer of material disposed on a substrate 302 within the processing chamber 100. While the exemplary processing chamber 100 is suitable for performing a patterning process, it should be understood that aspects of the present technology may be performed in any number of chambers, and the substrate support according to the present technology may be included in an etch chamber, a deposition chamber, a processing chamber, or any other processing chamber. The plasma processing chamber 100 may include a chamber body 105 that defines a chamber region 101 in which a substrate may be processed. The chamber body 105 may have sidewalls 112 and a bottom 118 coupled to a ground 126. The sidewalls 112 may have a liner 115 that protects the sidewalls 112 and extends the time between maintenance cycles of the plasma processing chamber 100. The dimensions of the chamber body 105 and associated components of the plasma processing chamber 100 are not limited and may generally be proportionally larger than the size of the substrate 302 to be processed therein. Example substrate sizes include 200 mm diameter, 250 mm diameter, 300 mm diameter, and 450 mm diameter, similar to display substrates, solar cell substrates, among others.

[0027]

[0030] The chamber body 105 may support a chamber lid assembly 110 that surrounds the chamber region 101. The chamber body 105 may be made of aluminum or other suitable material. A substrate access port 113 may be formed through a sidewall 112 of the chamber body 105 to facilitate transfer of a substrate 302 into and out of the plasma processing chamber 100. The access port 113 may be coupled to a transfer chamber and / or other chambers of a substrate processing system, as previously described. A pumping port 145 may be formed through the sidewall 112 of the chamber body 105 and connected to the chamber region 101. A pumping apparatus may be coupled to the chamber region 101 via the pumping port 145 to evacuate and control the pressure in the processing region. The pumping apparatus may include one or more pumps and a throttle valve.

[0028]

[0031] A gas panel 160 may be coupled to the chamber body 105 by gas lines 167 to supply process gases into the chamber region 101. The gas panel 160 may include one or more process gas sources 161, 162, 163, 164 and may additionally include inert, non-reactive, and reactive gases for use in any number of processes. Examples of process gases that may be supplied by the gas panel 160 include, but are not limited to, methane, sulfur hexafluoride, silicon chloride, carbon tetrafluoride, hydrogen bromide, hydrocarbon-containing gases, including argon gas, chlorine, nitrogen, helium, or oxygen gas, as well as any number of additional materials. Additionally, the process gas may include nitrogen, chlorine, fluorine, oxygen, and hydrogen-containing gases such as BCl3, C2F4, C4F8, C4F6, CHF3, CH2F2, CH3F, NF3, NH3, CO2, SO2, CO, N2, NO2, N2O, and H2, as well as any number of additional precursors.

[0029]

[0032] The valve 166 can control the flow of process gas from the sources 161, 162, 163, 164 of the gas panel 160 and can be managed by the controller 165. The flow of gas supplied from the gas panel 160 to the chamber body 105 can include a combination of gas from one or more sources. The lid assembly 110 can include a nozzle 114. The nozzle 114 can be one or more ports for introducing process gas from the sources 161, 162, 164, 163 of the gas panel 160 into the chamber region 101. After the process gas is introduced into the plasma processing chamber 100, a voltage can be applied to the gas to form a plasma. An antenna 148, such as one or more inductor coils, can be provided adjacent to the plasma processing chamber 100. The antenna power supply 142 can provide power to the antenna 148 through the matching circuit 141 to inductively couple energy, such as RF energy, to the process gas to maintain a plasma formed from the process gas in the chamber region 101 of the plasma processing chamber 100. Alternatively, or in addition to the antenna power supply 142, a process electrode below and / or above the substrate 302 can be used to capacitively couple RF power to the process gases to maintain a plasma in the chamber region 101. The operation of the power supply 142 can be controlled by a controller, such as controller 165, which also controls the operation of the other components of the plasma processing chamber 100.

[0030]

[0033] A substrate support pedestal 135 may be disposed within the chamber region 101 to support the substrate 302 during processing. The substrate support pedestal 135 may include an electrostatic chuck 122 for holding the substrate 302 during processing. The electrostatic chuck ("ESC") 122 may hold the substrate 302 to the substrate support pedestal 135 using electrostatic attraction. The ESC 122 may be powered by an RF power supply 125 integrated with a matching network 124. The ESC 122 may include an electrode 121 embedded within a dielectric. The electrode 121 may be coupled to the RF power supply 125 and may provide a bias that attracts plasma ions formed by process gases in the chamber region 101 to the ESC 122 and the substrate 302 seated on the pedestal. The RF power supply 125 is cycled on and off or pulsed during processing of the substrate 302. The ESC 122 may include an isolator 128 to prevent the plasma from being attracted to the sidewalls of the ESC 122 to extend the maintenance life of the ESC 122. Additionally, the substrate support pedestal 135 may include a cathode liner 136 to protect the sidewalls of the substrate support pedestal 135 from the plasma gases and extend the maintenance intervals of the plasma processing chamber 100.

[0031]

[0034] The electrode 121 may be coupled to a power supply 150. The power supply 150 may provide a chucking voltage of about 200 volts to about 2000 volts to the electrode 121. The power supply 150 may also include a system controller for controlling the operation of the electrode 121 by sending a direct current to the electrode 121 for chucking and dechucking the substrate 302. The ESC 122 may include a heater disposed in a pedestal and connected to a power supply for heating the substrate, and the cooling base 129 supporting the ESC 122 may include conduits for circulating a heat transfer fluid to maintain the temperature of the ESC 122 and the substrate 302 disposed thereon. The ESC 122 may be configured to operate in a temperature range as required by the thermal budget of the devices fabricated on the substrate 302. For example, the ESC 122 may be configured to maintain the substrate 302 at a temperature of about −150° C. or less to about 500° C. or more, depending on the process being performed.

[0032]

[0035] A cooling base 129 may be provided to assist in temperature control of the substrate 302. To mitigate process drift and time, the temperature of the substrate 302 may be maintained substantially constant by the cooling base 129 throughout the time the substrate 302 is in the cleaning chamber. In some embodiments, the temperature of the substrate 302 may be maintained at a temperature of about −150° C. to about 500° C. throughout the subsequent cleaning process, although any temperature may be used. A cover ring 130 may be disposed on the ESC 122 and along a periphery of the substrate support pedestal 135. The cover ring 130 may be configured to confine etching gases to a desired portion of an exposed upper surface of the substrate 302 while shielding the upper surface of the substrate support pedestal 135 from the plasma environment in the plasma processing chamber 100. Lift pins may selectively translate through the substrate support pedestal 135 to lift the substrate 302 above the substrate support pedestal 135 to facilitate access to the substrate 302 by a transfer robot or other suitable transfer mechanism, as described above.

[0033]

[0036] The controller 165 can be used to control process sequences and regulate the flow of gases from the gas panel 160 into the plasma processing chamber 100 and other process parameters. The software routines, when executed by the CPU, transform the CPU into a special purpose computer, such as a controller, that can control the plasma processing chamber 100 such that processes are performed in accordance with the present disclosure. The software routines can also be stored and / or executed by a second controller that can be associated with the plasma processing chamber 100.

[0034]

[0037] The processing chambers described above may be used during methods according to embodiments of the present technology. FIG. 3 illustrates a semiconductor processing method 300, the steps of which may be performed, for example, in one or more chambers 100 incorporated in a multi-chamber processing system 10, as described above. Any other chamber capable of performing one or more steps of any of the described methods or processes may also be used. The method 300 may include one or more steps prior to the initiation of the described method steps, including front-end processing, deposition, etching, polishing, cleaning, or any other steps that may be performed before the described steps. The method may include a number of optional steps shown in the figure that may or may not be specifically related to the method according to the present technology. For example, many of the steps are described to provide a broader scope of semiconductor processing, but are not required for the present technology, or may be performed by alternative methodologies, as described further below.

[0035]

[0038] Method 300 may include multiple steps that may be performed in multiple variations, including starting with a different processing step. Method 300 may generally include an etching step that may be performed in a chamber in which a deposition process may be performed. In many cases, deposition may be performed following or during etching. Thus, while method 300 is described in a particular order, it should be understood that the method may be performed in multiple different variations in accordance with embodiments of the present technology. Method 300 is illustrated in the steps shown generally in Figures 4A-4D, which illustrations will be described in conjunction with the steps of method 300. It should be understood that structure 400 in Figures 4A-4D shows only a partial schematic view, and substrate 405 may include any number of structural portions having the aspects as shown, as well as alternative structural aspects that may also benefit from the steps of the present technology.

[0036]

[0039] As shown in FIG. 4A, the structure 400 may include a substrate 405. The substrate 405 may have a substantially flat or textured surface in embodiments. The substrate 405 may be a material such as crystalline silicon, silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafer, patterned or unpatterned wafer, silicon-on-insulator, carbon doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, or sapphire. The substrate 405 may have a variety of dimensions, such as a 200 mm or 300 mm diameter wafer, as well as a rectangular or square panel. The substrate 405 may be disposed within a processing region of a semiconductor processing chamber. Although illustrated as a planar substrate, it should be understood that the substrate 405 may include any number of layers or features on a wafer or other substrate and is included only to represent an underlying structure upon which a mask may be formed as described below.

[0037]

[0040] The substrate 405 may include a carbon-containing mask 410. The carbon-containing mask 410 may be disposed along at least a portion or all of the substrate 405. The carbon-containing mask 410 may be or may include a carbon hard mask or any other carbon-containing mask material. To facilitate patterning of the carbon-containing mask, in some embodiments, a silicon-containing material 415, photoresist, or any other mask material may be disposed along the carbon-containing mask 410. The silicon-containing material 415 may be or may include crystalline silicon, amorphous silicon, silicon carbide, silicon oxide, silicon nitride, or any other silicon material.

[0038]

[0041] As shown in FIG. 4B, a pattern can be etched or formed in the silicon-containing material 415. Although the material 415 is referred to as silicon-containing, it is understood that any mask material, such as those described above, can be used to pattern the carbon-containing mask 410 according to embodiments of the present technology. The pattern can be etched into the silicon-containing material 415 using any etching process and any etching reagent. The pattern in the silicon-containing material 415 can form features or gaps in the silicon-containing material 415. The pattern can extend through the entire thickness of the silicon-containing material 415 such that the carbon-containing mask 410 is at least partially exposed.

[0039]

[0042] In step 305, the method 300 may include supplying or flowing an oxygen-containing precursor to a processing region of a semiconductor processing chamber. The oxygen-containing precursor that may be used in step 305 may be or include any number of oxygen-containing precursors. For example, any oxygen-containing precursor may be used to etch carbon materials to produce volatiles, such as carbon dioxide volatiles. As a non-limiting example, in embodiments of the present technology, the oxygen-containing precursor may be or include diatomic oxygen, ozone, nitrous oxide, nitric oxide, sulfur dioxide, or any other oxygen-containing precursor. In embodiments, an additional oxygen source may be supplied along with the oxygen-containing precursor. For example, diatomic oxygen may be supplied along with one or more other oxygen-containing precursors.

[0040]

[0043] Once the one or more oxygen-containing precursors are delivered to the processing region, the method 300 may include forming a plasma of the oxygen-containing precursors in the processing region at step 310. The plasma of the oxygen-containing precursors may be generated with a plasma power of about 2000 W or more, and may be generated with a plasma power of about 2250 W or more, about 2500 W or more, about 2750 W or more, about 3000 W or more, about 3250 W or more, about 3500 W or more, about 3750 W or more, about 4000 W or more, about 4250 W or more, about 4500 W or more, about 4750 W or more, about 5000 W or more, or more. In embodiments, the plasma of the oxygen-containing precursors may be generated with a plasma power of about 6000 W or more, and may be generated with a plasma power of about 5750 W or less, about 5500 W or less, about 5250 W or less, about 5000 W or less, or less. Plasma power, including both source power and bias power, of about 3000 W or greater can increase the directionality of the delivery of the oxygen-containing precursor, which can increase vertical etching to provide more anisotropic etching of the substrate 405 or carbon-containing mask 410, when present, to form high aspect ratio features 420, as described below.

[0041]

[0044] Still referring to FIG. 4B, in step 315, the method 300 may include contacting the substrate 405 or the carbon-containing mask 410, if present, with a plasma effluent of an oxygen-containing precursor. This contact may etch a first portion of one or more features 420 of the substrate 405 or the carbon-containing mask 410. Any type of etching process may be used to etch material from the substrate 405 or the carbon-containing mask 410. The oxygen-containing precursor may react with the substrate 405 or the carbon-containing mask 410 to form a volatile material, such as carbon dioxide, which may then be purged from the semiconductor processing chamber. The oxygen-containing precursor may not etch the silicon-containing material 415. A portion of the oxygen-containing precursor may react with the silicon-containing material 415 and oxidize the silicon-containing material 415. Additionally, due to ionic interactions, a certain amount of silicon-containing material may be sputtered and redeposited as silicon or oxidized material, which may form along the opening of the feature 420 to be etched.

[0042]

[0045] The first portion of the feature 420 may extend into the substrate 405 or carbon-containing mask 410 a distance less than the full thickness of the film. After the first portion of the feature 420 is etched, a passivation layer may be formed over the substrate or carbon-containing mask 410. The passivation layer may serve to protect the underlying substrate 405 or carbon-containing mask 410 from subsequent etching steps such that continued exposure and etching of the sidewalls of the substrate 405 or carbon-containing mask 410 may be limited, which may help to retain a substantially vertical shape as higher aspect ratio features are formed. As used herein, "substantially vertical" may mean within 10° of normal. For example, the present techniques can facilitate improved feature integrity for high aspect ratio formation and can improve sidewall profiles of features characterized by aspect ratios such as height-to-width ratios of about 2:1 or greater, and can improve sidewall profiles of features characterized by aspect ratios of about 3:1 or greater, about 4:1 or greater, about 5:1 or greater, about 8:1 or greater, about 10:1 or greater, about 15:1 or greater, about 20:1 or greater, about 25:1 or greater, or greater. In an embodiment, as shown in FIG. 4B, a first portion of feature 420 can extend about 1 μm or less into substrate 405 or carbon-containing mask 410, and can extend about 0.9 μm or less, about 0.8 μm or less, about 0.7 μm or less, about 0.6 μm or less, about 0.5 μm or less, or less. The first portion of feature 420 may be about 40% or less of the total depth of feature 420 to be formed, and may be about 35% or less, about 30% or less, about 25% or less, about 20% or less, about 10% or less, or less than the desired feature depth. If the first portion of feature 420 extends more than 1 μm or more than 40% of the total depth of feature 420, the sidewalls of the feature may continue to be etched by the plasma effluents of the oxygen-containing plasma and may not retain a substantially vertical profile.

[0043]

[0046] In optional step 320, the method 300 may include stopping the flow of the oxygen-containing precursor. In an embodiment, the method 300 may instead include decreasing the flow rate of the oxygen-containing precursor. If the flow rate of the oxygen-containing precursor is not decreased or stopped, the oxygen-containing precursor may begin to interact with other precursors, such as boron or other deposition compounds, in the processing region before reaching the substrate 405, as described in subsequent steps. If the boron compound is delivered after the oxygen-containing precursor, the oxygen-containing precursor may begin to dissociate the boron compound and form undesirable intermediates or by-products before the boron compound reaches the substrate 405.

[0044]

[0047] The method 300 may include providing a deposition precursor in step 325. While any number of deposition precursors may be used, in some embodiments of the present technique, the deposition precursor may be characterized by its ability to interact with residual oxygen. For example, as the aforementioned etching process proceeds, oxygen may be incorporated into the substrate 405 or the carbon-containing mask 410, potentially saturating the exposed surfaces. The deposition precursor may be characterized by its ability to readily interact with residual oxygen and form a material along the exposed surfaces of the carbon mask. For example, the material may be or include a Lewis acid or other acceptor material or radical that may more readily accept or form bonds with charged oxygen species and form a surface layer along the sidewalls of the features being formed. It should be understood that any Lewis acid material may be used in embodiments of the present technique, including aluminum-containing materials or boron-containing materials, etc. Some embodiments may use a boron-containing material that may limit conductive formation or other interactions that may alter the properties of the structure being formed.

[0045]

[0048] The boron-containing precursor that can be used in step 310 can be or include any number of boron-containing precursors, including any boron-containing Lewis acid. In embodiments, the boron-containing precursor can be or include boron trichloride (BCl3), boron tribromide (BBr3), boron trifluoride (BF3), or a combination thereof. The flow rate of the boron-containing precursor can be about 50 sccm or more, about 60 sccm or more, about 70 sccm or more, about 80 sccm or more, about 90 sccm or more, about 100 sccm or more, about 110 sccm or more, about 120 sccm or more, about 130 sccm or more, about 140 sccm or more, about 150 sccm or more, about 160 sccm or more, about 170 sccm or more, about 180 sccm or more, about 190 sccm or more, or more. In embodiments, the flow rate of the boron-containing precursor may be from about 50 sccm to about 500 sccm. The flow rate of the boron-containing precursor may be adjusted depending on the desired growth rate. Additionally, the flow rate of the boron-containing precursor may be adjusted depending on the aspect ratio of the features 420. For features 420 with a higher aspect ratio, the flow rate may be higher and for features 420 with a lower aspect ratio, the flow rate may be lower. In some embodiments, a carrier gas may not be used to deliver the boron-containing precursor.

[0046]

[0049] In step 330, the method 300 may or may not include forming a plasma of a boron-containing precursor in the processing region. The plasma of the boron-containing precursor may be generated at a plasma power of less than about 2500 W, and may be generated at a plasma power of less than about 2250 W, less than about 2000 W, less than about 1750 W, less than about 1500 W, less than about 1250 W, less than about 1000 W, less than about 750 W, less than about 500 W, less than about 250 W, or less. Plasma powers of more than 2500 W may increase ion interactions, causing more scattering and removal of the deposited material. At plasma powers of less than about 2500 W, scattering may be reduced or limited, which may result in conformal deposition of the boron material on the feature 420, as described below. In comparison to the etching step, the plasma of the oxygen-containing precursor may be generated at a higher plasma power than the plasma of the boron-containing precursor. Higher etching plasma power, in some embodiments, can facilitate delivery through high aspect ratio features and increase physical interaction with the material, improving etching.

[0047]

[0050] As shown in FIG. 4C, the method 300 may include depositing a boron-containing material 425 in step 335. The boron-containing material 425 may extend along at least a portion of one or more features 420 of the substrate 405 or the carbon-containing mask 410. The boron-containing material 425 may be conformally deposited along the sidewalls and bottom of the feature 420. As explained above, the boron-containing precursor may associate with residual oxygen retained from the etching in step 315. The boron-containing material 425 may be a boron-oxygen containing material. For example, if the boron-containing precursor is a Lewis acid, the plasma effluent of the boron-containing precursor may more easily interact with the residual oxygen to form the boron-containing material 425 on the substrate 405 or the carbon-containing mask 410. In an embodiment, it is contemplated that if there is not enough residual oxygen present on the substrate 405 or carbon-containing mask 410 of the feature 420 for the boron-containing material 425 to form, additional oxygen, such as diatomic oxygen, may be provided to the processing region in step 335.

[0048]

[0051] The plasma effluents of the boron-containing precursor may be deposited on the substrate 405 or the carbon-containing mask 410 for a period of about 60 seconds or less. For periods of more than 60 seconds, the thickness of the boron-containing material may increase, which may result in changes in the performance of the material and may cause subsequent etching steps to further increase the depth of the feature through the base portion of the deposited material to fail. Thus, the plasma effluents of the boron-containing precursor may be deposited on the substrate 405 or the carbon-containing mask 410 for a period of about 50 seconds or less, about 40 seconds or less, about 35 seconds or less, about 30 seconds or less, about 25 seconds or less, about 20 seconds or less, about 15 seconds or less, about 10 seconds or less, or less. In embodiments in which the method 300 includes repeatedly depositing the boron-containing material 425, as described below, the total time for depositing the material may be about 60 seconds or less, or less, as described above.

[0049]

[0052] The boron-containing precursor can be flowed into the processing region of the semiconductor processing chamber without a carrier gas. The carrier gas can increase dissociation of the boron-containing precursor before it can react with residual oxygen from the etch in step 315. If the boron-containing precursor is dissociated too much before it can react with residual oxygen on the substrate 405 or carbon-containing mask 410, the boron-containing material 425 may not form on the substrate 405 or carbon-containing mask 410, and harmful etchant by-products may form. For example, if a boron-containing precursor such as BCl3 is delivered with an argon or nitrogen carrier gas, BCl3 will dissociate more completely and the resulting chloride ions can unnecessarily etch the substrate 405 or carbon-containing mask 410 and / or the silicon-containing material 415, as well as any other layers present on the substrate 405. As detailed above, plasma powers less than 2500 W may dissociate the boron-containing precursor before reacting with residual oxygen, but the rate of dissociation may be insufficient to suppress the growth of boron-containing material 425.

[0050]

[0053] In an embodiment, the method 300 may include reducing the pressure in the semiconductor processing chamber while depositing the boron-containing material 425 on the substrate 405. This reduction in pressure, along with reduced plasma power, may improve delivery of the plasma effluent of the boron-containing precursor and therefore enhance conformality of deposition in the feature 420. The entire process may be performed at a processing pressure of about 100 mTorr or less, and may be performed at a pressure of about 80 mTorr or less, about 50 mTorr or less, about 40 mTorr or less, about 30 mTorr or less, about 20 mTorr or less, about 10 mTorr or less, or less. Further, in some embodiments, deposition can be performed at a pressure at least about 2 mTorr lower than the pressure during etching, deposition can be performed at a pressure at least about 3 mTorr lower than the pressure during etching, at least about 4 mTorr lower than the pressure during etching, at least about 5 mTorr lower than the pressure during etching, at least about 6 mTorr lower than the pressure during etching, at least about 7 mTorr lower than the pressure during etching, at least about 8 mTorr lower than the pressure during etching, at least about 9 mTorr lower than the pressure during etching, at least about 10 mTorr lower than the pressure during etching, or more.

[0051]

[0054] As shown in FIG. 4D, the method 300 may include etching a second portion of the feature 420. This etch may remove the boron-containing material at the bottom of the feature 420 and continue to etch the substrate 405 or the carbon-containing mask 410 below the boron-containing material 425 deposited on the sidewalls of the substrate 405 or the carbon-containing mask 410. In step 340, the method 300 may include supplying an oxygen-containing precursor or resuming the flow of the oxygen-containing precursor. Step 340 may be performed the same or similar to step 305. The method 300 may include forming a plasma of the oxygen-containing precursor in step 345. Step 345 may be performed the same or similar to step 310. The method 300 may include contacting the substrate 405 or the carbon-containing mask 410 with plasma effluents of the oxygen-containing precursor in step 350. Step 350 may be performed the same or similar to step 315. In step 350, the contact can etch a second portion of one or more features 420 of the substrate 405 or the carbon-containing mask 410. Etching the second portion of the features 420 of the substrate 405 or the carbon-containing mask 410 can selectively remove material from the bottom of the boron-containing material 425 before further removing the second portion of the substrate 405 or the carbon-containing mask 410. By performing a bias etch, the directionality of the plasma effluent of the oxygen-containing precursor can remove the bottom of the boron-containing material 425 without removing the sidewalls of the boron-containing material 425. Physical interaction or sputtering of the deposited material can easily remove material due to limited formation at the base of the feature, followed by anisotropic etching. Similar to step 315, any of a variety of etching processes may be used to etch material from the bottom of the boron-containing material 425 and / or the substrate 405 or the carbon-containing mask 410, and may include a directional etch that removes material across the bottom surface of the boron-containing material 425 while maintaining the boron-containing material 425 along the sidewalls of the substrate 405 or the carbon-containing mask 410. Additionally, the boron-containing material 425 may act as a passivation layer to protect the sidewalls of the substrate 405 or the carbon-containing mask 410 from further etching.

[0052]

[0055] After the etching process, the depth of the feature 420 may be about 1.0 μm or more, about 1.5 μm or more, about 2.0 μm or more, about 2.5 μm or more, about 3.0 μm or more, about 3.5 μm or more, about 4.0 μm or more, or more. As the aspect ratio increases, it may be difficult to continuously etch the feature 420 into the substrate 405 or the carbon-containing mask 410 with a consistent diameter. That is, the substrate 405 or the carbon-containing mask 410 may etch at a higher rate toward the top of the feature 420 than toward the bottom of the feature 420. This may result in non-uniformity in the feature 420. However, embodiments of the present technology provide a passivation layer of boron-containing material 425, so that the feature 420 may be etched in a more uniform manner.

[0053]

[0056] In optional step 335, method 300 may include supplying or flowing a fluorine-containing precursor into the processing region of the semiconductor processing chamber. The fluorine-containing precursor that may be used in step 355 may be or may include any number of fluorine-containing precursors. For example, the fluorine-containing precursor may be or may include an organic halogen compound such as hexafluorobutadiene (C4F6). In an embodiment, a plasma of the fluorine-containing precursor may be formed in the processing region.

[0054]

[0057] In optional step 340, the method may include treating the silicon-containing material 415 disposed along at least a portion of the substrate 405 or carbon-containing mask with a fluorine-containing precursor. Treating the silicon-containing material with the fluorine-containing precursor may maintain the openings defined in the substrate 405 or carbon-containing mask. During the etching step, an oxygen-containing precursor may react with the silicon-containing material 415. This reaction between the oxygen-containing precursor and the silicon-containing material 415 may result in the formation of additional material, such as silicon oxide, in the feature 420, as previously described. The formation of such additional material may narrow the openings defined by the feature 420, making it difficult to access the underlying feature 420 during subsequent etching and / or deposition steps. Thus, the flushing in optional step 340 may remove the additional material and maintain the openings defined in the silicon-containing material 415.

[0055]

[0058] Method 300 may include repeating the above steps to iteratively etch feature 420 and passivate the sidewalls of substrate 405 or carbon-containing mask 410 to enhance uniformity of feature 420. For example, method 300 may include iterative etching, such as steps 305-315, and deposition of a passivation layer, such as steps 325-335. As the steps are repeated, additional material may narrow the opening defined by feature 420. Thus, method 300 may include intermittently repeating the flushing procedure of steps 355-360. For example, method 300 may include multiple loops or iterations of a first sequence including etching, deposition, etching, and flashing. Following sufficient deposition, or deposition to a sufficient depth, the method may proceed as a particular etching process and may further include multiple loops or iterations of etching and flashing until the feature is formed to a desired depth. The method 300 may include any number of loops or iterations of any sequence, and may include two loops, three loops, four loops, or more. Each loop may be in the same order as the previous loop, or may be different from the previous loop. For example, in some loops, a flushing step may not be necessary.

[0056]

[0059] During method 300 or any of steps 305-360, the temperature within semiconductor processing chamber 100, such as the substrate support temperature or the substrate temperature, may be maintained at about 50° C. or less. Thus, the temperature within semiconductor processing chamber 100 may be maintained at about 40° C. or less, about 30° C. or less, about 25° C. or less, about 10° C. or less, about 5° C. or less, about 0° C. or less, about −5° C. or less, about −10° C. or less, about −25° C. or less, −30° C. or less, about −40° C. or less, or less. Because steps 305-360 may be performed in a single chamber, such as semiconductor processing chamber 100, the temperature may be maintained throughout method 300 to increase throughput and reduce wait times. Lowering the temperature may increase the etch rate during the etching steps. To control the etch rate, the temperature may be maintained at about −50° C. or more. Additionally, at lower temperatures, such as about 0° C. or less, the boron-containing material 425 may act as a stronger passivation layer.

[0057]

[0060] In the foregoing description, for purposes of explanation, numerous details are set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one of ordinary skill in the art that certain embodiments may be practiced without some of these details or with additional details.

[0058]

[0061] Although several embodiments have been disclosed, it will be recognized by those skilled in the art that various modifications, alternative structures, and equivalents may be used without departing from the spirit of the embodiments. Moreover, in order to avoid unnecessarily obscuring the present technology, some well-known processes and elements have not been described. Thus, the above description should not be construed as limiting the scope of the present technology.

[0059]

[0062] Where a range of values ​​is provided, it is understood that each intervening value between the upper and lower limit of that range, to the smallest fraction of the unit of the lower limit, is also specifically disclosed, unless the context clearly dictates otherwise. Any narrower range between any stated value or unstated intervening value in a stated range and any other stated or intervening value in that stated range is included. The upper and lower limits of these smaller ranges may be independently included or excluded in the range, and each range in which either or both limits are included in the smaller ranges is also included within the technology, subject to any specifically excluded limit in the stated range. When one or both limits are included in a stated range, ranges excluding one or both of those included limits are also included.

[0060]

[0063] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to a "carbon-containing precursor" includes a plurality of such precursors, reference to a "carbon-containing material" includes a reference to one or more such materials and equivalents thereof known to those skilled in the art, and so forth.

[0061]

[0064] Additionally, the terms "comprise," "comprising," "contain," "containing," "include," and "including," as used in this specification and the following claims, specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, operations, or groups.

Claims

1. 1. A semiconductor processing method comprising: depositing a boron-containing material on a substrate, the boron-containing material extending along sidewalls of one or more features of the substrate; forming a plasma of an oxygen-containing precursor; contacting the substrate with plasma effluents of the oxygen-containing precursor, the contact etching a portion of one or more features of the substrate and the contact oxidizing the boron-containing material; The method includes:

2. The oxygen-containing precursor comprises diatomic oxygen; 10. The semiconductor processing method of claim 1.

3. a temperature is maintained at or below about 50° C. during contacting the substrate with the plasma effluent of the oxygen-containing precursor and during deposition of the boron-containing material on the substrate; 10. The semiconductor processing method of claim 1.

4. a pressure is maintained at about 5 mTorr to about 100 mTorr while contacting the substrate with the plasma effluent of the oxygen-containing precursor and while depositing the boron-containing material on the substrate; 10. The semiconductor processing method of claim 1.

5. Forming a plasma of a boron-containing precursor The semiconductor processing method of claim 1 further comprising:

6. The plasma of the oxygen-containing precursor is generated with a plasma power of about 3000 W or more.

6. The semiconductor processing method of claim 5.

7. depositing a second amount of a boron-containing material onto the substrate, the second amount of the boron-containing material further extending along a sidewall of one or more features of the substrate.

10. The semiconductor processing method of claim 1.

8. providing a boron-containing precursor, the boron-containing precursor comprising boron trichloride; 10. The semiconductor processing method of claim 1.

9. a carbon-containing mask disposed along at least a portion of the substrate; 10. The semiconductor processing method of claim 1.

10. Providing a fluorine-containing precursor; treating a silicon-containing material disposed along at least a portion of the substrate with the fluorine-containing precursor, wherein treating the silicon-containing material with the fluorine-containing precursor maintains openings defined in the silicon-containing material; The semiconductor processing method of claim 1 further comprising:

11. The fluorine-containing precursor comprises an organohalogen compound; 11. The semiconductor processing method of claim 10.

12. 1. A semiconductor processing method comprising: i) etching one or more features of a substrate disposed within a processing region of a semiconductor processing chamber with plasma effluents of an oxygen-containing precursor; ii) depositing a boron-containing material onto the substrate, the boron-containing material extending along at least a portion of one or more features of the substrate; repeating steps i and ii to repetitively etch one or more features of the substrate, wherein a temperature within the semiconductor processing chamber is maintained at or below about 50° C. while performing steps i and ii. repeating steps i and ii to repetitively etch one or more features of the substrate. The method includes:

13. the boron-containing material comprises a boron-oxygen-containing material; 13. The semiconductor processing method of claim 12.

14. During etching, a silicon-containing material is formed along at least a portion of the substrate; The method further comprises iii) treating the silicon-containing material with a fluorine-containing precursor, wherein treating the silicon-containing material with the fluorine-containing precursor maintains the openings defined in the substrate.

13. The semiconductor processing method of claim 12.

15. Steps i)-iii) are repeated at least three times such that the boron-containing material is deposited for a total period of about 60 seconds or less; 15. The semiconductor processing method of claim 14.

16. 1. A semiconductor processing method comprising: flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber, the oxygen-containing precursor comprising diatomic oxygen, and a substrate being disposed within the processing region of the semiconductor processing chamber; forming a plasma of the oxygen-containing precursor in the processing region; contacting the substrate with plasma effluents of the oxygen-containing precursor, whereby a first portion of one or more features of the substrate are etched; flowing a boron-containing precursor into a processing region of the semiconductor processing chamber; depositing a boron-containing material on a substrate, the boron-containing material extending along at least a portion of one or more features of the substrate, the boron-containing material comprising oxygen; flowing an oxygen-containing precursor into a processing region of the semiconductor processing chamber; forming a plasma of the oxygen-containing precursor in the processing region; contacting the substrate with plasma effluents of the oxygen-containing precursor, whereby a second portion of one or more features of the substrate is etched and whereby the boron-containing material is oxidized; and The method includes:

17. the flow rate of the boron-containing precursor is from about 50 sccm to about 500 sccm; 17. The semiconductor processing method of claim 16.

18. the boron-containing precursor is flowed into a processing region of the semiconductor processing chamber without a carrier gas; 17. The semiconductor processing method of claim 16.

19. forming a plasma of the boron-containing precursor, the plasma of the oxygen-containing precursor being generated at a higher plasma power than the plasma of the boron-containing precursor; 20. The semiconductor processing method of claim 16 further comprising:

20. delivering a fluorine-containing precursor to a processing region of the semiconductor processing chamber, the fluorine-containing precursor comprising carbon; treating a silicon-containing mask disposed along at least a portion of the substrate with the fluorine-containing precursor, wherein treating the silicon-containing mask with the fluorine-containing precursor maintains openings defined in the silicon-containing mask; 20. The semiconductor processing method of claim 16 further comprising:

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