Method for making semiconductor-on-insulator multilayer structures - Patents.com

Abstract

The present invention relates to a method for making a semiconductor-on-insulator structure (1), comprising the steps of bonding a support substrate (2) having an electrical resistivity of 500 Ω.cm or more and containing interstitial nitrogen (6) and interstitial oxygen (7), the initial concentration of interstitial oxygen (6) in the support substrate (2) being between 15 and 25 old ppma, with a donor substrate of a semiconducting layer (4), with an electrically insulating layer (3) at the interface between the support substrate (2) and the donor substrate, and transferring said semiconductor layer (4) onto the support substrate, further comprising a nucleation step comprising a heat treatment to precipitate a portion of the oxygen (7) and a portion of the nitrogen (6) to form nuclei (9) of precipitates (8), and a stabilization step comprising a heat treatment to grow said nuclei to a size between 10 and 50 nm.

Description

[Technical field]

[0001] The present invention relates to a process for the manufacture of a multilayer structure of the semiconductor-on-insulator type. [Background technology]

[0002] A semiconductor-on-insulator type structure is a multilayer structure comprising a support substrate, generally made of a semiconductor material such as silicon, an electrically insulating layer, generally an oxide layer such as a silicon oxide layer, disposed on the support substrate, and a semiconductor layer, generally a silicon layer, disposed on the insulating layer. Such a structure is called a "semiconductor-on-insulator" structure, in particular a "silicon-on-insulator" (SOI) structure, when the semiconductor material is silicon. The oxide layer is then located between the substrate and the semiconductor layer. The oxide layer is then called "buried" and in the case of "buried oxide" it is called "BOX". In the remainder of this specification, the term "SOI" is generally adopted to denote a semiconductor-on-insulator type structure.

[0003] Such an SOI structure can be obtained by a process including the transfer of a monocrystalline semiconductor layer, obtained from a donor substrate, onto the front side of a supporting substrate, with an electrically insulating layer at the interface between the transferred semiconductor layer and the supporting substrate.

[0004] For applications in the high frequency range, one problem is the manufacture of certain SOI structures, the performance quality of which is not adversely affected by electrical losses caused by the flow of electrons from a conductive channel formed in or on the semiconductor layer to the supporting substrate. To this end, the process can include, for example, the use of a supporting substrate exhibiting high electrical resistivity and, optionally, the combination of said supporting substrate with a trap rich layer.

[0005] Another problem exists in the manufacture of SOI structures capable of withstanding severe thermal treatments without the appearance of slip lines. Slip lines consist of fracture surfaces where crystalline structures are offset. Without obstacles, dislocations can propagate up to the surface of the slab, where they create steps in the atomic planes or slip lines. During the subsequent lithography steps, such steps cause problems, in particular misregistration of the lithographic pattern (problems known to those skilled in the art by the term "overlay"). To limit the appearance of these slip lines, the process can use substrates in which oxygen is already included in interstitial positions at a relatively high concentration by the support substrate. The interstitial oxygen blocks the propagation of dislocations and thus prevents the appearance of steps at the surface of the slab.

[0006] However, interstitial oxygen presents the drawback of generating thermal donors that can change the electrical resistivity of the support substrate. Interstitial oxygen tends to reduce the value of the electrical resistivity. Indeed, especially for applications in the radio frequency range, the electrical resistivity must be controlled and kept stable at a high value.

[0007] To overcome this drawback, one solution consists in using substrates that are weakly enriched with interstitial oxygen by the supporting substrate. The concentration of interstitial oxygen in such substrates (commonly called "low Oi") is typically between 6 and 10 old ppma, the unit old ppma indicating "parts per million of atoms" according to the former standardized measurement specification ASTM 79. Such a concentration of interstitial oxygen is a relatively satisfactory compromise for large electronic components manufactured from these substrates, making it possible to limit the number of slip lines while controlling the resistivity of said substrate.

[0008] However, as the trend is towards miniaturization, the occurrence of slip lines in small electronic components, even in very small amounts, is becoming less and less tolerable. The use of weakly enriched substrates can result in interstitial oxygen contents that are too low to achieve the expected performance quality. A solution that consists in simply increasing the interstitial oxygen content of the substrate is not satisfactory, since an excessively high concentration of Oi no longer makes it possible to control the value of the electrical resistivity.

[0009] On the other hand, one solution that can be envisaged consists in increasing the initial concentration of interstitial oxygen in the support substrate and in precipitating said interstitial oxygen in the form of oxygen precipitates or defects known by the acronym BMD (Bulk Microdefects), by applying a heat treatment.

[0010] The initial concentration of interstitial oxygen in the substrate is typically greater than 27 ppma. The use of substrates highly enriched in interstitial oxygen (commonly referred to as "high Oi") allows 3 10 per 10 It is possible to obtain a density of oxygen precipitates or defects of the order of 1000, the size of said precipitates being between 70 and 120 nm, where the oxygen precipitates, like the interstitial oxygen, are large and numerous enough to block the propagation of dislocations.

[0011] However, such a configuration does not allow the resistivity of the support substrate to be controlled and maintained at a stable, sufficiently high value for applications in the radio frequency range. Moreover, if the oxygen precipitates are too numerous and large, they generate mechanical stresses locally in the core of the material, which can cause global deformation of the substrate. Substrate deformation can also be the cause of lithographic pattern alignment problems. Summary of the Invention

[0012] One object of the present invention is to design a semiconductor-on-insulator type structure in which the support substrate exhibits high and controlled electrical resistivity, but exhibits good resistance to subsequent slip line development, without generating significant mechanical stresses in the support substrate that could cause gross deformation of the support substrate.

[0013] The term "high electrical resistivity" is understood herein to mean an electrical resistivity of 500 Ω.cm or more.

[0014] Another object of the invention is to design a semiconductor-on-insulator type structure that does not give rise to overlay problems known to those skilled in the art during subsequent functionalization steps, even in the case of the manufacture of components applied in the field of high frequencies, whose gate lengths are less than 65 nm, for example less than or around 22 nm.

[0015] To this end, the invention relates to a process for the manufacture of a multilayer structure of the semiconductor-on-insulator type, comprising: - a support substrate exhibiting an electrical resistivity of 500 Ω.cm or more and containing interstitial nitrogen and interstitial oxygen, in which the initial concentration of interstitial oxygen in the support substrate is between 15 and 25 ppma (measured according to standard ASTM 79), and an assembly step of a donor substrate for the semiconductor layer to be transferred, in which there is an electrically insulating layer at the interface between the support substrate and the donor substrate; - transferring said semiconductor layer onto a support substrate; wherein the process further comprises a nucleation stage suitable for precipitating at least a portion of the interstitial oxygen and at least a portion of the interstitial nitrogen in a controlled manner to form seeds of oxygen and nitrogen precipitates, and a stabilization stage suitable for growing said seeds of oxygen and nitrogen precipitates to a size between 10 nm and 50 nm.

[0016] The addition of interstitial nitrogen contributes to the resistance to dislocation propagation but does not reduce the resistivity of the supporting substrate. Furthermore, due to the affinity of interstitial nitrogen for oxygen, interstitial nitrogen aids in the precipitation of interstitial oxygen.

[0017] The addition of interstitial oxygen in controlled concentrations intermediate those of the "low Oi" and "high Oi" substrates, together with the addition of interstitial nitrogen, makes it possible to further improve resistance to the occurrence of subsequent slip lines, including in the case of substrates having very small thicknesses where overlay problems become significant.

[0018] Controlling the size and concentration of the oxygen and nitrogen precipitates during the nucleation and growth steps also makes it possible to control the resistance to the subsequent generation of slip lines by limiting the propagation of dislocations in the support substrate. Moreover, by more or less fixing the interstitial nitrogen and interstitial oxygen, said steps make it possible to control the resistivity of the support substrate, including the resistivity of high resistivity support substrates for applications in the high frequency range.

[0019] According to another feature of the invention, there is provided, taken alone or, where this is technically possible, in combination: the process further comprises, prior to the assembly step, forming a trap rich layer on a supporting substrate, said trap rich layer being disposed between the supporting substrate and an electrically insulating layer; forming the trap rich layer comprises depositing a layer of polycrystalline silicon on a supporting substrate; the deposition of said layer of polycrystalline silicon is carried out after a stabilization step of oxygen and nitrogen precipitates, - The initial concentration of interstitial nitrogen in the support substrate is 10 14 atoms / cm 3 From 10 15 atoms / cm 3 Between At the end of the stabilization phase, the support substrate is 7 Precipitate cm -3 From 10 10 Precipitate cm -3 Concentrations of oxygen and nitrogen precipitates between 10 8 Precipitate cm-3 From 10 9 Precipitate cm -3 Including concentrations between the nucleation and stabilization stages each comprise a heat treatment, the temperature applied during the nucleation heat treatment being lower than the temperature applied during the stabilization heat treatment and the duration of the nucleation heat treatment being shorter than the duration of the stabilization heat treatment, the nucleation stage comprises the application of a temperature between 650° C. and 800° C., preferably between 700° C. and 750° C., for a period of more than 1 hour, preferably for a period of 2 hours, the stabilization step comprises the application of a temperature above 900° C., preferably 950° C., for a period of more than 2 hours, preferably 4 hours, - The nucleation and stabilization steps are carried out one after the other immediately prior to the assembly step.

[0020] The present invention also provides a substrate for microelectronics, optoelectronics and / or optics, comprising, from the back surface to the front surface, a supporting substrate, an electrically insulating layer and a semiconductor layer, wherein the supporting substrate exhibits an electrical resistivity of 500 Ω.cm or more and a resistivity of 10 7 Precipitate cm -3 From 10 10 Precipitate cm -3 The present invention relates to a substrate, characterized in that it is made of a semiconductor material, comprising oxygen and nitrogen precipitates exhibiting a size between 10 nm and 50 nm, with a concentration between 10 nm and 50 nm.

[0021] According to another feature of the invention, there is provided, taken alone or, where this is technically possible, in combination: the substrate further comprises a trap rich layer between the support substrate and the electrically insulating layer; the residual concentration of interstitial oxygen in the support substrate is less than 15 ppma (measured according to standard ASTM 79), preferably less than 12 ppma.

[0022] Other features and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings. [Brief description of the drawings]

[0023] [Figure 1] 1 represents a multilayer structure of the semiconductor-on-insulator type according to the invention, in which the support substrate contains oxygen and nitrogen precipitates (open circles), residual interstitial nitrogen (closed crosses) and residual interstitial oxygen (closed dots). [Figure 2A] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. [Figure 2B] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. [Figure 2C] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. [Figure 2D] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. [Figure 2E] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. [Figure 2F] It represents one embodiment of the process according to the invention, in which starting from a support substrate (FIG. 2A) containing interstitial nitrogen and interstitial oxygen, a nucleation step (FIG. 2B) for the formation of oxygen and nitrogen precipitate seeds (gray circles), a seed growth step (FIG. 2C) to give stable oxygen and nitrogen precipitates (white circles), an optional formation step (FIG. 2D) of a trap rich layer on the support substrate, a positioning step (FIG. 2E) of a donor substrate for a semiconductor layer to be transferred onto the support substrate (FIG. 2F) and a transfer step of the semiconductor layer are performed successively to obtain a multilayer structure of the semiconductor-on-insulator type represented in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] For reasons of legibility, the drawings are not necessarily drawn to scale.

[0025] A first subject of the invention is a multilayer structure of the semiconductor-on-insulator type, which exhibits a particular resistance to the propagation of dislocations, thus minimizing the formation of slip lines during the final heat treatment. Furthermore, the electrical resistivity of the support substrate of said multilayer structure remains stable during said heat treatment. By way of example, a multilayer structure according to the invention can exhibit gate lengths of less than 65 nm, for example of the order of 22 nm, while generating no or very few slip lines when a temperature of the order of 450° C. is applied to the multilayer structure for one hour. Furthermore, the support substrate of the multilayer structure can remain stable and exhibit a target electrical resistivity between 500 ohm cm and 5000 ohm cm. The multilayer structures of the semiconductor-on-insulator type, which are the subject of the invention, have applications, for example, in the field of radio frequencies, where a high resistivity support substrate has particular advantages.

[0026] Figure 1 shows one embodiment of such a multi-layer structure 1 according to the invention. The multi-layer structure 1 comprises, successively from the rear side to the front side of the structure, a supporting substrate 2, an electrically insulating layer 3 and a semiconducting layer 4.

[0027] The support substrate 2 of the multi-layer structure 1 is made of a high resistivity semiconductor material. The electrical resistivity of the support substrate is greater than or equal to 500 ohm cm. The high electrical resistivity confers the ability to limit electrical losses on the support substrate and improve the radio frequency performance qualities of the structure.

[0028] The support substrate 2 of the multilayer structure 1 comprises oxygen and nitrogen precipitates 8, also known by the acronym BMD (bulk microdefects). BMDs exhibit the property of blocking the propagation of dislocations that tend to arise when the multilayer structure 1 is subjected to heat treatments. They therefore make it possible to prevent dislocations from rising to the surface of the multilayer structure 1 and causing an offset of the atomic planes there. Such offsets are in particular the cause of alignment problems known to those skilled in the art by the term "overlay".

[0029] The size of the oxygen and nitrogen precipitates 8 in the support substrate 2 of the multilayer structure 1 is between 10 nm and 50 nm, preferably between 40 nm and 50 nm. The size range selected in this way represents a good compromise that allows to significantly limit the number of slip lines generated at the surface, but not to generate excessively high mechanical stresses in the material, since too few oxygen and nitrogen precipitates do not efficiently block the generation of dislocations. On the other hand, excessively large precipitates generate high mechanical stresses in the material, which runs the risk of causing the material to deform. This compromise results in a minimum of the above-mentioned overlay phenomenon.

[0030] The concentration of oxygen and nitrogen precipitates 8 in the support substrate 2 is cm 3 10 per 7 From 10 10 Precipitates between pieces, preferably cm 3 10 per 8 From 10 9 The precipitate is between the particles. The concentration of the precipitate is cm 3 10 per 7 When the concentration of precipitates is less than cm, the oxygen and nitrogen precipitates are not in sufficient numbers to effectively block dislocation propagation. 3 10 per 10 With more than one precipitate, the risk of generating mechanical stresses within the material becomes significant.

[0031] The size and density of the oxygen and nitrogen precipitates 8 are measured by laser scattering tomography, known by the acronym LST.

[0032] The support substrate 2 may also contain residual interstitial nitrogen 6 and residual interstitial oxygen 7, i.e., they do not contribute to precipitates 8. Similar to BMDs, the interstitial oxygen 7 and the interstitial nitrogen 6 oppose the propagation of dislocations. However, the interstitial oxygen 7 may contribute to the generation of thermal donors, which risk leading to an uncontrolled decrease in electrical resistivity. These thermal donors are generated when the multilayer structure 1 undergoes a final heat treatment, for example when temperatures between 375 ° C and 450 ° C are applied to the structure for a period ranging from a few minutes to 1-2 hours. This type of heat treatment is typically applied to the multilayer structure during a final anneal, known to those skilled in the art by the term "back-end of the line", with the goal of repairing defects that arise during the final stages of the manufacture of the chip. During this "passivation" anneal, hydrogen present in the furnace air diffuses up to the interfaces to repair impending bonds.

[0033] In order to limit the phenomenon of thermal donor generation, the concentration of residual interstitial oxygen 7 in the support substrate 2 is less than 15 ppma, preferably less than 12 ppma, since the lower the concentration of interstitial oxygen 7 in the support substrate 2, the better the control of the electrical resistivity of said substrate 2 in the various applications of the multilayer structure 1.

[0034] As mentioned above, the old term ppma denotes "parts per million of atoms" according to the previous standardized measurement specification ASTM 79.

[0035] The concentration of interstitial oxygen 7 is determined by a model for the generation of thermal donors, a heat treatment of 450° C. is applied to the substrate for 1 hour (known to those skilled in the art by the acronym DGA for the term Donor Generation Anneal) and the electrical resistivity of said substrate is measured before and after the DGA heat treatment. The model makes it possible to relate the variation between the two measurements of the electrical resistivity, which is related to the generation of thermal donors, to the concentration of residual interstitial oxygen. The electrical resistivity is measured by SRP (Spreading Resistance Profile).

[0036] Optionally, the structure 1 also comprises a trap rich layer 5, preferably made of polycrystalline or porous silicon, arranged between the support substrate 2 and the electrically insulating layer 3. This trap rich layer makes it possible to trap charges that accumulate under the electrically insulating layer 3. The trap rich layer 5 is particularly suitable for radio frequency applications of the multilayer structure 1.

[0037] The electrical insulating layer 3 can be an oxide layer, for example a silicon oxide layer. Other materials such as silicon nitride or also silicon oxynitride can be envisaged. The semiconductor layer 4 is a layer made of a semiconductor material, for example a monocrystalline silicon layer. In a non-limiting manner, the semiconductor layer 4 can be replaced by an active layer, in particular a piezoelectric layer, of any other material, for example lithium tantalate or lithium niobate. Other materials such as gallium nitride, gallium arsenide or also indium phosphide can be used.

[0038] Manufacturing Process A second subject of the invention is a process for the manufacture of such a multilayer structure by precipitation of interstitial oxygen and interstitial nitrogen to form oxygen and nitrogen precipitates in the support substrate of the multilayer structure.

[0039] Referring to FIG. 2A, a substrate 2 is first provided. The substrate 2 is made of a highly resistive semiconductor material that initially contains interstitial nitrogen 6 and interstitial oxygen 7. The substrate 2 is, for example, a circular silicon slab having a diameter of 300 mm. The substrate 2 may be prepared by pulling an ingot of the semiconductor material in an atmosphere of molecular oxygen and nitrogen. The interstitial oxygen and nitrogen content is generally controlled by the ingot manufacturer and indicated in the technical specifications of the substrate.

[0040] The addition of interstitial nitrogen 6 in addition to interstitial oxygen 7 makes it possible to obtain a substrate that is more resistant to the propagation of dislocations. Interstitial nitrogen 6 favors the precipitation of oxygen and nitrogen precipitates due to the affinity of interstitial nitrogen with oxygen. For exactly the same initial concentration of interstitial oxygen 7 in the substrate 2, the addition of interstitial nitrogen 6 makes it possible to generate precipitates with a higher density. Furthermore, the precipitates generated in the presence of interstitial nitrogen 6 are smaller. The content of interstitial nitrogen 6 in the substrate 2 is preferably 10 14 atoms / cm 3 From 10 15 atoms / cm 3 It is between.

[0041] A concentration of interstitial oxygen 7 in the substrate 2 is selected that is higher than that in the substrate described as "low Oi" so as to allow the precipitation of said oxygen. A concentration of interstitial oxygen 7 in the substrate 2 is selected that is lower than that in the substrate described as "high Oi" so as to nevertheless produce a lower precipitate density during the precipitation than would be produced starting from a "high Oi" substrate. Furthermore, the dimensions of said precipitates are smaller than those produced in a "high Oi" substrate. Furthermore, at the end of the precipitation, the concentration of residual interstitial oxygen is lower than in a "high Oi" substrate.

[0042] In this way, a substrate is obtained that exhibits a better resistance to the propagation of dislocations than a "low Oi" substrate. In terms of mechanical stress, a density and size of precipitates occurs that is smaller than those obtained starting from a "high Oi" substrate. The low concentration of residual interstitial oxygen limits the generation of thermal donors and therefore allows a better control of the resistivity of the substrate.

[0043] In other words, the concentration of interstitial oxygen 7 in the substrate 2 is intermediate between the concentration of interstitial oxygen in a "low Oi" substrate and the concentration of interstitial oxygen in a "high Oi" substrate. The concentration of interstitial oxygen 7 in the substrate 2 is preferably between 15 old ppma and 25 old ppma.

[0044] A preferred embodiment of the process is then described. Referring to Figures 2B to 2F, the process includes at least: a nucleation step (c) for generating seeds 9 of oxygen and nitrogen precipitates in the support substrate 2; - a stabilization stage (d) for growing seeds of oxygen and nitrogen precipitates 8 in said support substrate 2; - an optional formation step (e) of a trap rich layer 5 on the support substrate 2; - a step (a) of positioning a donor substrate for a semiconductor layer 4 to be transferred onto a support substrate 2, with an electrically insulating layer 3 at the interface between the support substrate 2 and the layer 4 to be transferred, - transfer step (b) of the semiconductor layer 4; The method includes the successive steps of

[0045] Nucleation stage (c) and stabilization stage (d) During the nucleation stage (c), the interstitial nitrogen 6 and the interstitial oxygen 7 diffuse into the material of the substrate 2. Furthermore, bonds between some of the atoms of said semiconductor material are broken and new bonds are formed between atoms of the semiconductor material and nitrogen, between atoms of the semiconductor material and oxygen and between nitrogen and oxygen, so as to form oxygen and nitrogen precipitate seeds 9 and to obtain the structure represented in Figure 2B.

[0046] During the stabilization stage (d), some species 9 of nitrogen and oxygen precipitates generated during the nucleation stage (c) grow in the form of grains 8, while others (the smallest ones) dissolve. The growth of the grains 8 makes it possible to stabilize said grains 8 so that they have less tendency to re-dissolve under the effect of subsequent treatments, in particular during heat treatment. The structure obtained at the end of the stabilization stage (d) is represented in FIG. 2C.

[0047] The nucleation stage (c) and the stabilization stage (d) each comprise a heat treatment whose parameters are fixed so as to obtain, at the end of stage (d), oxygen and nitrogen precipitates 8 whose size is between 10 nm and 50 nm, preferably greater than 40 nm, due to the presence of interstitial nitrogen 6 and interstitial oxygen 7 in concentrations intermediate between "low Oi" and "high Oi". The process according to the invention therefore produces precipitates that are smaller than those obtained starting from a "high Oi" substrate. As mentioned above, this range of precipitate sizes represents a good compromise between obtaining a better resistance to the propagation of dislocations than the "low Oi" substrate, while being observed to be smaller in terms of mechanical stress than the "high Oi" substrate.

[0048] Furthermore, the parameters of the nucleation step (c) and the stabilization step (d) are preferably 3 10 per 7 From 10 10 Precipitates between pieces, preferably cm 3 10 per 8 From 10 9 The density of nitrogen and oxygen precipitates 8 in the precipitates between the substrates is fixed, i.e. so as to generate a lower defect density than that obtained starting from a "high-Oi" substrate. Obtaining precipitates in such a concentration range is made possible in particular by the presence of interstitial nitrogen 6 and the initial concentration of interstitial oxygen 7 in the substrate 2. As mentioned above, this concentration range of precipitates represents a good compromise to obtain a good resistance to the propagation of dislocations while limiting the stresses.

[0049] The nucleation step (c) comprises, for example, a heat treatment in which a temperature between 650°C and 800°C, preferably between 700°C and 750°C, is applied to the support substrate 2 for a period of more than 1 hour, preferably 2 hours.

[0050] The temperature of the heat treatment adopted during the nucleation stage (c) must be strictly below 1000° C., since a temperature above 1000° C. leads to an excessively high diffusion of the interstitial nitrogen 6 from the substrate 2. A temperature below 800° C. makes it possible to limit even further the diffusion of the interstitial nitrogen 6 from the substrate 2.

[0051] The stabilization step (d) comprises, for example, a heat treatment in which a temperature above 900° C. and strictly below 1000° C. is applied to the support substrate 2 for a period of more than 2 hours, preferably 4 hours.

[0052] The temperature of the heat treatment adopted during the stabilization step (d) must be strictly below 1000° C., since temperatures above 1000° C. lead to a redissolution of the oxygen and nitrogen precipitate seeds 9 produced during the nucleation step (c) and to a diffusion of the interstitial nitrogen 6 from the substrate 2, so that it is not possible to obtain oxygen and nitrogen precipitates 8.

[0053] The temperature of the heat treatment adopted during the stabilization step (d) is preferably above 900° C. The stabilization step (d) therefore makes it possible to obtain stable precipitates during heat treatments up to temperatures of the order of 1200° C., applied for more than one hour. The final processes that the structure must subsequently undergo generally present a lower thermal budget, so that the precipitates are less likely to disappear during these subsequent treatments.

[0054] Formation of the trap rich layer (e) Optionally, referring to Figure 2D, during step (e), a trap rich layer 5 is formed on the support substrate 2, between the support substrate 2 and the electrical insulating layer 3. As mentioned above, the trap rich layer is particularly suitable for radio frequency applications, since it makes it possible to trap charges that accumulate under the electrical insulating layer 3. The trap rich layer may be made of polycrystalline silicon.

[0055] During the trap rich layer formation step (e), the support substrate 2 must not be subjected to a temperature above 1200° C. for more than one or two hours, since above 1200° C. the oxygen and nitrogen precipitates 8 may re-dissolve and the interstitial nitrogen 6 will diffuse out of the support substrate 2 material.

[0056] The formation step of the trap rich layer comprises, for example, chemical vapor deposition (CVD) or epitaxial deposition on a supporting substrate, in the presence or absence of seeds, at a temperature which may be between 600° C. and 1100° C. depending on the technique used.

[0057] Optionally, the trap rich layer may be formed before the nucleation heat treatment.

[0058] This is because the above-mentioned nucleation step (c) and stabilization step (d) are performed with a thermal budget low enough to avoid, or at least limit, recrystallization of the polycrystalline silicon of the trap rich layer 5.

[0059] Preferably, the trap rich layer 5 is formed after the nucleation heat treatment (c), and indeed even after the stabilization heat treatment (d), in order to prevent the structure of this layer from being modified during these treatments. (a) assembly of a donor substrate on a support substrate and (b) transfer of a semiconductor layer A step (a) of assembly of a donor substrate for a semiconductor layer 4 to be transferred onto a supporting substrate 2 is performed, with an electrically insulating layer 3 at the interface between the supporting substrate 2 and the semiconductor layer 4 to be transferred. Then a step (b) of transfer of the semiconductor layer 4 to be transferred is performed so as to obtain the multilayer structure 1 represented in FIG.

[0060] The donor substrate for the semiconductor layer 4 is provided in the form of a slab, for example a circular slab having the same dimensions as the support substrate 2. The donor substrate comprises a semiconductor material, for example monocrystalline silicon.

[0061] The layer transfer can be carried out, for example, according to the Smart Cut™ process. In this case, step (a) comprises: the sub-step represented in FIG. 2E of providing a donor substrate for a monocrystalline semiconductor layer 4; - forming weakened zones in said donor substrate so as to define the semiconductor layer 4 to be transferred (dotted lines in FIG. 2E); a bonding sub-step of bonding the donor substrate to a support substrate 2 so as to obtain a structure represented in FIG. 2F, with an electrically insulating layer 3 at the interface between the support substrate 2 and the donor substrate; Includes.

[0062] Step (b) comprises the separation of the donor substrate at the weakened zones in order to transfer the semiconductor layer 4 and form the multi-layer structure 1 depicted in FIG.

[0063] The weakened zone can be created by co-implantation of helium and hydrogen atoms into the donor substrate for the semiconductor layer, or the weakened zone is created by implantation of only hydrogen or helium atoms.

[0064] Separation along the weakened zone may be triggered by mechanical action, by the contribution of thermal energy, optionally in combination, or by any other suitable means.

[0065] Alternatively to the Smart Cut™ process, step (a) can comprise bonding a donor substrate for the semiconductor layer 4 to be transferred to a support substrate 2, with an electrically insulating layer 3 at the interface, and step (b) can comprise thinning the donor substrate from a side of the donor substrate opposite to the side bonded to the support substrate 2, until a desired thickness for the semiconductor layer 4 is obtained.

[0066] The electrically insulating layer 3 is, for example, an oxide layer, such as a silicon oxide layer. The electrically insulating oxide layer 3 can be formed on the support substrate 2, optionally covered with the trap rich layer 5, or on the donor substrate for the semiconductor layer 4, prior to bonding of the donor substrate to the support substrate.

[0067] Throughout the assembly step (a) of the donor substrate on the support substrate and the transfer step (b) of the semiconductor layer 4, the support substrate 2 must not be subjected to a temperature above 1200° C. for more than one hour in order not to result in re-dissolution of the oxygen and nitrogen precipitates 8.

[0068] If the multi-layer structure comprises a trap rich layer 5 made of a polycrystalline material, the applied temperature must not exceed 1100° C. for more than 2 hours, in order not to result in recrystallization of said layer.

[0069] According to alternative embodiments of the process according to the invention, the nucleation step (c) and the stabilization step (d) may be carried out after the step (a) of positioning the donor substrate on the support substrate 2, optionally covered with a trap rich layer 5, or after the transfer step (b) of the semiconductor layer 4. According to each of these embodiments, each step (a), (b), (c), (d) and (e) is further carried out as described above.

[0070] However, the steps preceding the nucleation step (c) and the stabilization step (d) must not involve the application of temperatures above 1000°C for periods of the order of one to several hours, since temperatures above 1000°C may result in diffusion of interstitial nitrogen 6 from the supporting substrate, with the result that oxygen and nitrogen precipitates 8 do not form.

[0071] According to further embodiments of the process according to the invention, the nucleation step (c) and the stabilization step (d) are not consecutive, so that at least one step from steps (a), (b) and (e) can be placed between the nucleation step (c) and the stabilization step (d). According to each of these embodiments, each step (a), (b), (c), (d) and (e) is further carried out as described above.

[0072] When steps (c) and (d) are not consecutive, the step preceding the stabilization step (d) should not involve the application of temperatures above 1000° C. for a period of the order of one to several hours, in order not to result in diffusion of interstitial nitrogen 6 from the support substrate 2 and re-dissolution of the oxygen and nitrogen precipitate seeds 9 produced during the nucleation step (c).

[0073] Finally, whatever embodiment is chosen, the steps subsequent to the stabilization step (d) must not involve the application of temperatures above 1200° C. for more than 1 hour, so as not to result in re-dissolution of the oxygen and nitrogen precipitates 8.

Claims

1. A process for the manufacture of a multilayer structure (1) of the semiconductor-on-insulator type, comprising: (a) assembly of a support substrate (2) made of a semiconductor material exhibiting an electrical resistivity of 500 Ω.cm or more and containing interstitial nitrogen (6) and interstitial oxygen (7) with a donor substrate for a semiconductor layer (4) to be transferred, wherein the initial concentration of interstitial oxygen (7) in said support substrate (2) is between 15 and 25 old ppma (measured according to standard ASTM 79), and an electrically insulating layer (3) is present at the interface between said support substrate (2) and said donor substrate; (b) transferring said semiconductor layer (4) onto said support substrate; Including, The process further comprises a nucleation step (c) comprising a heat treatment to precipitate at least a portion of the interstitial oxygen (7) and at least a portion of the interstitial nitrogen (6) in a controlled manner to form seeds (9) of oxygen and nitrogen precipitates (8), and a stabilization step (d) comprising a heat treatment to grow the seeds of oxygen and nitrogen precipitates to a size between 10 nm and 50 nm.

2. 10. The process of claim 1, further comprising, prior to said assembling step (a), forming a trap rich layer (5) on said support substrate (2), said trap rich layer (5) being disposed between said support substrate (2) and said electrically insulating layer (3).

3. 3. The process of claim 2, wherein said forming said trap rich layer (5) comprises depositing a layer of polycrystalline silicon on said supporting substrate.

4. 4. The process of claim 3, wherein said deposition of said layer of polycrystalline silicon is carried out after said stabilization step (d) of said oxygen and nitrogen precipitates (8).

5. The initial concentration of interstitial nitrogen (6) in the support substrate (2) is 10 １４ atoms / cm ３ From 10 １５ atoms / cm ３ The process according to any one of claims 1 to 4, characterized in that:

6. At the end of the stabilization step (d), the support substrate (2) is ７ Precipitate cm －３ From 10 １０ Precipitate cm －３ The concentration of oxygen and nitrogen precipitates (8) is preferably between 10 ８ Precipitate cm －３ From 10 ９ Precipitate cm －３ The process of any one of claims 1 to 4, comprising a concentration between

7. 5. The process according to any one of claims 1 to 4, characterized in that the nucleation step (c) and the stabilization step (d) each comprise a heat treatment, the temperature applied during the nucleation heat treatment (c) being lower than the temperature applied during the stabilization heat treatment (d), and the duration of the nucleation heat treatment (c) being shorter than the duration of the stabilization heat treatment (d).

8. A process according to any one of claims 1 to 4, wherein the nucleation step (c) comprises the application of a temperature between 650°C and 800°C, preferably between 700°C and 750°C, for a period of more than 1 hour, preferably 2 hours.

9. A process according to any one of claims 1 to 4, wherein the stabilisation step (d) comprises the application of a temperature above 900°C, preferably 950°C, for a period of more than 2 hours, preferably 4 hours.

10. 5. The process of any one of claims 1 to 4, wherein the nucleation step (c) and the stabilization step (d) are carried out one after the other immediately prior to the assembly step (a).

11. A semiconductor-on-insulator type multilayer structure including, from the back surface to the front surface, a support substrate (2), an electrical insulating layer (3), and a semiconductor layer (4), wherein the support substrate (2) exhibits an electrical resistivity of 500 Ω cm or more, and ７ Precipitate cm －３ From 10 １０ Precipitate cm －３ 1. A multilayer structure, characterized in that it is made of a semiconductor material, comprising oxygen and nitrogen precipitates (8) exhibiting a size between 10 and 50 nm, with a concentration between 10 and 50 nm.

12. 12. The multilayer structure of claim 11, further comprising a trap rich layer (5) between the support substrate (2) and the electrically insulating layer (3).

13. 13. Multilayer structure according to claim 11 or 12, characterized in that the residual concentration of interstitial oxygen (7) in the support substrate (2) is less than 15 old ppma, preferably less than 12 old ppma (measured according to standard ASTM 79).

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