Display with side-wrap conductive traces - Patents.com

Abstract

The conductive traces may be conformally wrapped around a side of the display panel that includes the array of display pixels. The conductive traces may electrically connect contacts on the top surface of the display panel to corresponding contacts on a flexible printed circuit attached to the bottom surface of the display panel. The side-wrap conductive traces may be interposed between a first insulating layer and a second insulating layer. The flexible printed circuit may have a multi-step interface that is electrically connected to the side-wrap conductive traces. A system-in-package including a display driver integrated circuit may be mounted on the flexible printed circuit. The system-in-package may include a plurality of redistribution layers that electrically connect contacts on the display driver integrated circuit to contacts on the flexible printed circuit.

Description

[Background technology]

[0001] This application claims priority to U.S. Patent Application No. 18 / 185,237, filed March 16, 2023, and U.S. Provisional Patent Application No. 63 / 334,546, filed April 25, 2022, each of which is incorporated by reference in its entirety. This application relates generally to electronic devices, and more particularly to electronic devices having a display.

[0002] Electronic devices often include a display. For example, an electronic device may have an organic light emitting diode display (OLED) based on organic light emitting diode pixels or a liquid crystal display (LCD) based on liquid crystal display pixels.

[0003] The electronic device may include control circuitry configured to provide control signals to pixels in a display. If care is not taken, the components used to provide control signals to the pixels in the display may be bulkier and / or less robust than desired. Summary of the Invention

[0004] The electronic device may have a display having an array of display pixels. The display pixels may be organic light emitting diode (OLED) display pixels, micro LED display pixels, or other types of display pixels. The display may be flexible and / or have curved portions.

[0005] To provide control signals to the display pixels, conductive traces may be conformally wrapped around a side of a display panel that includes an array of display pixels. The conductive traces may electrically connect contacts on a top surface of the display panel to corresponding contacts on a flexible printed circuit attached to a bottom surface of the display panel. The side-wrap conductive traces may be interposed between a first insulating layer and a second insulating layer.

[0006] The flexible printed circuit may have a multi-step interface electrically connected to the side wrap conductive traces. A first subset of the side wrap conductive traces may be electrically connected to contacts on the exposed portion of the first layer of the flexible printed circuit. A second subset of the side wrap conductive traces may pass through the exposed portion of the first layer of the flexible printed circuit and be electrically connected to contacts on the second layer of the flexible printed circuit.

[0007] A system in package including the display driver integrated circuit may be mounted on the flexible printed circuit. The system in package may include multiple redistribution layers that electrically connect contacts on the display driver integrated circuit to contacts on the flexible printed circuit. [Brief description of the drawings]

[0008] [Figure 1] 1 is a schematic diagram of an exemplary electronic device having a display in accordance with various embodiments.

[0009] [Diagram 2] 1 is a schematic diagram of an exemplary display, in accordance with various embodiments.

[0010] [Diagram 3] 1 is a schematic diagram of an exemplary display having pixel control circuitry in accordance with various embodiments.

[0011] [Figure 4] 1 is a schematic diagram of an exemplary passive matrix of light emitting diodes controlled by a pixel control circuit according to various embodiments.

[0012] [Diagram 5] 1 is a cross-sectional side view of an exemplary display having side-wrap conductive traces in accordance with various embodiments.

[0013] [Figure 6] 1 is a top view of an exemplary display having contacts distributed around the display in accordance with various embodiments. FIG.

[0014] [Figure 7] FIG. 1 is a side cross-sectional view of an exemplary flexible printed circuit having a multi-step interface in accordance with various embodiments.

[0015] [Figure 8] FIG. 8 is a bottom view of the exemplary flexible printed circuit of FIG. 7 in accordance with various embodiments.

[0016] [Figure 9] 1 is a cross-sectional side view of an exemplary display having side-wrap conductive traces and a planarization layer forming a dam structure in accordance with various embodiments.

[0017] [Figure 10A] FIG. 2 is a cross-sectional side view of an exemplary display having side-wrap conductive traces and a planarization layer that forms channels for the side-wrap conductive traces in accordance with various embodiments.

[0018] [Figure 10B] 10B is a cross-sectional side view of the example channel and corresponding conductive trace of FIG. 10A in accordance with various embodiments.

[0019] [Figure 11] 4 is a flowchart of exemplary method steps for forming conductive traces between a first insulating layer and a second insulating layer, in accordance with various embodiments.

[0020] [Figure 12] 4 is a flowchart of exemplary method steps for forming a conductive trace in a channel between a first insulating layer and a second insulating layer, in accordance with various embodiments.

[0021] [Figure 13]6 is a side cross-sectional view of an exemplary system-in-package having a display driver integrated circuit that may be included in a display of the type shown in FIG. 5, in accordance with various embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Exemplary types of electronic devices that may include a display are shown in Figure 1. Electronic device 10 can be a computing device such as a laptop computer, a computer monitor with an embedded computer, a tablet computer, a cellular phone, a media player, or other handheld or portable electronic device, a smaller device such as a watch-type device, a pendant-type device, a headphone-type or earphone-type device, a device incorporated into glasses or other equipment worn on a user's head, or other wearable or small device, a display, a computer display with an embedded computer, a computer display without an embedded computer, a gaming device, a navigation device, an embedded system such as a system in which an electronic device having a display is mounted in a kiosk or automobile, or other electronic device. Electronic device 10 may have the shape of a pair of glasses (e.g., a support frame), may form a housing having a helmet shape, or may have other configurations that are useful for mounting and securing one or more display components on a user's head or near the eyes.

[0023] 1, electronic device 10 may include control circuitry 16 for supporting operation of device 10. Control circuitry 16 may include storage devices such as hard disk drive storage, non-volatile memory (e.g., flash memory or other electrically programmable read-only memory configured to form a solid-state drive), volatile memory (e.g., static or dynamic random access memory), etc. Processing circuitry within control circuitry 16 may be used to control operation of device 10. Processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application specific integrated circuits, etc.

[0024] Input / output circuitry within device 10, such as input / output device 12, may be used to allow data to be provided to device 10 and to allow data to be provided from device 10 to external devices. Input / output device 12 may include buttons, joysticks, scroll wheels, touch pads, keypads, keyboards, microphones, speakers, sound sources, vibrators, cameras, sensors, light emitting diodes and other status indicators, data ports, and the like. A user may control the operation of device 10 by providing commands via the input resources of input / output device 12, and may receive status information and other output from device 10 using the output resources of input / output device 12.

[0025] The input / output device 12 may include one or more displays, such as a display 14. The display 14 may be a touch screen display including a touch sensor for collecting touch input from a user, or the display 14 may not be touch sensitive. The touch sensor for the display 14 may be based on an array of capacitive touch sensor electrodes, acoustic touch sensor structures, resistive touch components, force-based touch sensor structures, optically-based touch sensors, or other suitable touch sensor devices. The touch sensor for the display 14 may be formed from electrodes formed on a common display substrate with the display pixels of the display 14, or may be formed from a separate touch sensor panel that overlays the pixels of the display 14. If desired, the display 14 may not be touch sensitive (i.e., the touch sensor may be omitted). The display 14 in the electronic device 10 may be a head-up display that allows viewing without the user having to look away from a typical viewpoint, or may be a head-mounted display that is incorporated into a device worn on the user's head. If desired, the display 14 may be a holographic display used to display holograms.

[0026] Control circuitry 16 is used to execute software, such as operating system code and applications, on device 10. During operation of device 10, software running on control circuitry 16 can display images on display 14.

[0027] The input / output device 12 may also include one or more sensors 13, such as force sensors (e.g., strain gauges, capacitive force sensors, resistive force sensors, etc.), audio sensors such as microphones, touch sensors such as capacitive sensors and / or proximity sensors (e.g., two-dimensional capacitive touch sensors associated with a display and / or touch sensors forming buttons, track pads, or other input devices not associated with a display), and other sensors. In some embodiments, sensors 13 may include optical sensors such as optical sensors that emit and detect light (e.g., optical proximity sensors such as semi-reflective optical proximity structures), ultrasonic sensors and / or other touch and / or proximity sensors, monochromatic and color ambient light sensors, image sensors (cameras), fingerprint sensors, temperature sensors, proximity sensors and other sensors for measuring three-dimensional contactless gestures ("air gestures"), pressure sensors, sensors for detecting position, orientation, and / or motion (e.g., accelerometers, magnetic sensors such as compass sensors, gyroscopes, and / or inertial measurement units including some or all of these sensors), health sensors, radio frequency sensors, depth sensors (e.g., structured light sensors and / or depth sensors based on stereo imaging devices), optical sensors such as self-mixing sensors and light detection and ranging (lidar) sensors that collect time-of-flight measurements, humidity sensors, moisture sensors, eye-tracking sensors, and / or other sensors. In some configurations, device 10 may use sensors 13 and / or other input / output devices to collect user input (e.g., a button may be used to collect button press input, a touch sensor overlying the display may be used to collect user touchscreen input, a touchpad may be used to collect touch input, a microphone may be used to collect audio input, an accelerometer may be used to monitor when a finger contacts the input surface, and thus may be used to collect finger press input).

[0028] The display 14 may be an organic light emitting diode display, a display formed from an array of individual light emitting diodes (micro LEDs) each formed from a crystalline semiconductor die, a liquid crystal display, or any other suitable type of display. An example device configuration may be described herein in which the display 14 includes micro LEDs. However, this is merely exemplary. Any suitable type of display may be used as desired. In general, the display 14 may have a rectangular shape (i.e., the display 14 may have a rectangular footprint and a rectangular peripheral edge extending around the rectangular footprint) or may have another suitable shape. The display 14 may be flat or have a curved profile.

[0029] Figure 2 is a diagram of an exemplary display. The display of Figure 2 is an active matrix display. As shown in Figure 2, display 14 may include a layer, such as substrate layer 26. Substrate layers, such as layer 26, may be formed from rectangular, flat layers of material or layers of material having other shapes (e.g., circular shapes or other shapes with one or more curved and / or straight edges). The substrate layers of display 14 may include glass layers, polymer layers, silicon layers, composite films including polymers and inorganic materials, metal foils, and the like.

[0030] The display 14 may have an array of pixels 22, such as a pixel array 28, for displaying an image to a user. The pixels 22 (e.g., micro LEDs) in the array 28 may be arranged in rows and columns. The edges of the array 28 may be straight or curved (i.e., each row of pixels 22 and / or each column of pixels 22 in the array 28 may have the same length or different lengths). There may be any suitable number of rows and columns in the array 28 (e.g., 10 or more, 100 or more, or 1000 or more, etc.). The display 14 may include pixels 22 of different colors. As an example, the display 14 may include red pixels, green pixels, and blue pixels.

[0031] A display driver circuit 20 may be used to control the operation of the pixels 22. The display driver circuit 20 may be formed from integrated circuits, thin film transistor circuits, and / or other suitable circuits. The example display driver circuit 20 of FIG. 2 includes a display driver circuit 20A and additional display driver circuitry, such as a gate driver circuit 20B. The gate driver circuit 20B may be formed along one or more edges of the display 14. For example, the gate driver circuit 20B may be disposed along the left and right sides of the display 14 as shown in FIG. 2.

[0032] As shown in FIG. 2, the display driver circuit 20A (e.g., one or more display driver integrated circuits, thin film transistor circuitry, etc.) may include communication circuitry for communicating with the system control circuitry via signal paths 24. Paths 24 may be formed from traces on a flexible printed circuit, or other cables. The control circuitry may be located on one or more printed circuits in the electronic device 10. In operation, the control circuitry (e.g., control circuitry 16 of FIG. 1) may provide image data for an image to be displayed on the display 14 to circuits, such as the display driver integrated circuits, in the circuitry 20. The display driver circuitry 20A of FIG. 2 is located on top of the display 14. This is merely exemplary. The display driver circuitry 20A may be located on both the top and bottom of the display 14, or in other parts of the device 10.

[0033] To display an image on the pixels 22, the display driver circuit 20A may provide corresponding image data to the data lines D while issuing control signals to supporting display driver circuitry, such as the gate driver circuit 20B, via signal paths 30. In the exemplary arrangement of FIG. 2, the data lines D extend vertically through the display 14 and are associated with respective columns of pixels 22.

[0034] The gate driver circuit 20B (sometimes referred to as a gate line driver circuit or a horizontal control signal circuit) may be implemented using one or more integrated circuits and / or may be implemented using thin film transistor circuitry on the substrate 26. Horizontal control lines G (sometimes referred to as gate lines, scan lines, emission control lines, etc.) extend horizontally through the display 14. Each gate line G is associated with a respective row of pixels 22. If desired, there may be multiple horizontal control lines, such as gate lines G, associated with each row of pixels. Individually controlled and / or global signal paths within the display 14 may also be used to distribute other signals (e.g., power signals, etc.).

[0035] Gate driver circuit 20B may assert control signals on gate lines G in display 14. For example, gate driver circuit 20B may receive clock and other control signals from circuit 20A on path 30 and, in response to the received signals, assert gate line signals on gate lines G in sequence, starting with gate line signal G in a first row of pixels 22 in array 28. As each gate line is asserted, data from data line D may be loaded into the corresponding row of pixels. In this manner, control circuitry such as display driver circuits 20A and 20B may provide signals to pixels 22 that instruct pixels 22 to display a desired image on display 14. Each pixel 22 may include a light emitting diode and circuitry (e.g., thin-film circuitry on substrate 26) responsive to control and data signals from display driver circuit 20.

[0036] The gate driver circuit 20B may include blocks of gate driver circuits, such as gate driver row blocks. Each gate driver row block may include circuitry such as output buffers and other output driver circuitry, register circuitry (e.g., registers that can be chained together to form a shift register), and as well as signal lines, power lines, and other interconnections. Each gate driver row block may provide one or more gate signals to one or more respective gate lines in a corresponding row of pixels of an array of pixels in the active area of ​​the display 14.

[0037] The active matrix addressing scheme of FIG. 2 is merely exemplary. If desired, the display 14 may instead use pixel control circuitry that addresses a local passive matrix of pixels. An example of this type is shown in FIG. 3. As shown in FIG. 3, the display 14 may again include a layer, such as a substrate layer 26. A layer, such as the substrate 26, may be formed from a layer of material, such as a glass layer, a polymer layer, a composite film including polymer and inorganic materials, a metal foil, a semiconductor such as silicon or other semiconductor material, a layer of material such as sapphire (e.g., a crystalline transparent layer, ceramic, etc.), or other material. The substrate 26 may optionally be transparent (e.g., having a transparency of more than 80%, more than 85%, more than 90%, more than 95%, more than 98%, more than 99%, etc.). The substrate 26 may be flat or have other shapes (e.g., concave shapes, convex shapes, shapes with flat and curved surface areas, etc.). The outline of substrate 26 (e.g., when viewed from above along the Z direction) may be circular, oval, rectangular, square, may have a combination of straight and curved edges, or may have other suitable shapes. As shown in the example rectangular substrate of Figure 3, substrate 26 may have left and right vertical edges and top and bottom horizontal edges.

[0038] The display 14 may have an array of pixels 22 for displaying images to a user. A set of one or more pixels 22 in FIG. 3 may be controlled using a respective pixel control circuit 40 (sometimes referred to as a drive circuit 40 or microdriver 40). The pixel control circuit 40 may be formed using integrated circuits (e.g., silicon integrated circuits) and / or thin film transistor circuitry on the substrate 26. The thin film transistor circuitry may include thin film transistors formed from silicon (e.g., polysilicon thin film transistors or amorphous silicon transistors) and / or thin film transistors based on semiconductor oxides (e.g., indium gallium zinc oxide transistors or other semiconductor oxide thin film transistors). Semiconductor oxide transistors such as indium gallium zinc oxide transistors may exhibit low leakage currents and therefore may be advantageous in display 14 configurations where it is desirable to reduce power consumption (e.g., by reducing the refresh rate of the display's pixels). Configurations of the display 14 in which the pixel control circuits 40 are each formed from a set of silicon integrated circuits and thin film semiconductor oxide transistors may be used as desired.

[0039] The pixels 22 may be organized into arrays (e.g., arrays having rows and columns). The pixel control circuits 40 may be organized into associated arrays (e.g., arrays having rows and columns). As shown in FIG. 3, the pixel control circuits 40 may be interspersed among the arrays of pixels 22. The pixels 22 and pixel control circuits 40 may be organized into arrays having a rectangular outline or may have an outline of any other suitable shape. There may be any suitable number of rows and columns in each array (e.g., 10 or more, 100 or more, or 1000 or more).

[0040] Each pixel 22 may be formed from a light emitting component, such as a light emitting diode. If desired, each pixel may include a pair of light emitting diodes or any other suitable number of light emitting diodes for redundancy. In this type of configuration (as an example), the pair of light emitting diodes in each pixel may be driven in parallel. If one of the light emitting diodes fails, the other light emitting diode still produces light. Alternatively, or in addition, multiple pixel control circuits may be configured to control each pixel. If one of the pixel control circuits fails, the other pixel control circuit still controls the pixel.

[0041] A display driver circuit, such as display driver circuit 20, is coupled to conductive paths, such as metal traces, on substrate 26 using solder or conductive adhesive. Display driver circuit 20 may include communication circuitry for communicating with system control circuitry via paths 24. Paths 24 may be formed from traces on a flexible printed circuit or other cable, or may be formed using other signal path structures within device 10. The control circuitry may be located on a main circuit logic board within an electronic device in which display 14 is used. In operation, control circuitry on the main circuit logic board (e.g., control circuitry 16 of FIG. 1) may provide circuitry, such as display driver circuit 20, with information regarding an image to be displayed on display 14. To display an image on display pixels 22, display driver circuit 20 may provide corresponding image data, control signals, and / or power signals to signal lines S. The signal lines provide corresponding image data, control signals, and power to pixel control circuitry 40. Based on the received power, image data, and control signals, pixel control circuitry 40 directs individual subsets of pixels 22 to generate light at a desired intensity level.

[0042] The signal lines S may carry analog and / or digital control signals (e.g., scan signals, emission transistor control signals, clock signals, digital control data, power signals, etc.). In some cases, the signal lines may be coupled to individual columns of pixel control circuits 40. In some cases, the signal lines may be coupled to individual rows of pixel control circuits 40. Each pixel control circuit 40 may be coupled to one or more signal lines. The circuitry 20 may be formed at the top edge of the display 14 (as in FIG. 3), at the bottom edge of the display 14, at the top and left edges of the display 14, at the top, left and right edges of the display, or any other desired location(s) within the display 14.

[0043] A display control circuit such as circuit 20 may be implemented using one or more integrated circuits (e.g., a display driver integrated circuit such as a timing controller integrated circuit and associated source driver circuitry and / or gate driver circuitry) or may be implemented using thin film transistor circuitry implemented on substrate 26.

[0044] The pixels 22 may be organic light-emitting diode pixels or liquid crystal display pixels. Alternatively, the pixels 22 of FIG. 3 may be formed from individual inorganic light-emitting diodes (sometimes referred to as micro-LEDs). The pixels 22 may include light-emitting diodes of different colors (e.g., red, green, blue). Corresponding signal lines may be used to carry the red, green, and blue data. Other color pixel arrangements may be used as needed (e.g., a four-color arrangement, an arrangement including a white pixel, a three-pixel configuration having pixels other than red, green, and blue pixels, etc.). To generate different colors, the light-emitting diodes of the pixels 22 may be constructed from different material systems (e.g., AlGaAs for the red diode, GaN multiple quantum well diodes with different quantum well configurations for the green and blue diodes, respectively), may be formed using different phosphorescent materials or different quantum dot materials to generate red, blue, and / or green luminescence, or may be formed using other techniques or combinations of these techniques. The light emitting diodes of pixels 22 may emit upwards (i.e., pixels 22 may use a top emission design) or may emit downwards through substrate 26 (i.e., pixels 22 may use a bottom emission design). The light emitting diodes may have a thickness of (by way of example) 0.5 to 10 microns and may have lateral dimensions of 2 microns to 100 microns. Light emitting diodes having other thicknesses (e.g., less than 2 microns, more than 2 microns, etc.) and other lateral dimensions (e.g., less than 10 microns, less than 20 microns, more than 3 microns, more than 15 microns, etc.) may also be used as desired.

[0045] If desired, digital control signals can be provided to circuitry 40 (via signal line S), which can then generate corresponding analog light emission drive signals based on the digital control signals. During operation of display 14, each pixel control circuit 40 can provide output signals to a corresponding set of pixels 22 based on control signals received by that pixel control circuit from the display driver circuit 20.

[0046] As an example, each pixel control circuit 40 can control an individual local passive matrix 42 of LED pixels 22. Figure 4 is a schematic diagram of a local passive matrix 42 of LED pixels 22. As shown in Figure 4, the anode of each LED 22 is coupled to an individual anode contact line A (sometimes referred to as anode contact A or anode line A). The LEDs 22 of each column in the passive matrix are connected to a common anode contact A. The cathode of each LED 22 is coupled to an individual cathode contact line C (sometimes referred to as cathode contact C or cathode line C). The LEDs 22 of each row of the passive matrix are connected to a common cathode contact C.

[0047] The pixel control circuit 40 can control the current and voltage supplied to each anode line A. The pixel control circuit 40 can also control the voltage supplied to each cathode contact line C. In this way, the pixel control circuit 40 controls the current through each light emitting diode 22, which controls the intensity of light emitted by each light emitting diode. During passive matrix operation, the pixel control circuit 40 can rapidly scan the pixels 22 row by row to cause each LED 22 to emit light at a desired brightness level. In other words, each pixel in a first row is updated to a desired brightness level, then each pixel in a second row is updated to a desired brightness level, and so on.

[0048] The pixel control circuit 40 may have a first output terminal 32 coupled to the anode contact line A and a second output terminal 34 coupled to the cathode contact line C. The pixel control circuit 40 may have, as an example, one output terminal 32 for each anode contact line and one output terminal 34 for each cathode contact line. Thus, using a passive matrix such as that of Figure 4 allows the pixel control circuit 40 to control 64 light emitting diodes (e.g. an 8x8 grid) using only 16 outputs (8 anode output terminals and 8 cathode output terminals).

[0049] FIG. 5 is a side cross-sectional view of an exemplary display having side-wrap conductive traces. As shown in FIG. 5, the display 14 can include a display panel 52. In the example of FIG. 5, the display panel 52 is a micro-LED display panel having pixels 22 formed from individual light emitting diodes (micro-LEDs) each formed from a crystalline semiconductor die. The pixels 22 are formed on at least one planarization layer 54. The at least one planarization layer 54 includes a plurality of metal layers 62 that form signal lines (e.g., anode line A in FIG. 4, cathode line C in FIG. 4, signal line S in FIG. 3, data line D in FIG. 2, gate line G in FIG. 2, etc.) that provide control and data signals to the pixels 22. The at least one planarization layer 54 also covers one or more pixel control circuits 40 in the example of FIG. 5.

[0050] The planarization layer(s) 54 and the pixel control circuit(s) 40 are formed on a substrate 56. The substrate 56 may be formed of polyimide or another desired material. An adhesive layer 58 (e.g., a pressure sensitive adhesive) attaches the substrate 56 to a further substrate 60. The substrate 60 may be formed of polyethylene terephthalate (PET) or another desired material.

[0051] The display 14 may include display driver circuitry, such as a display driver integrated circuit and / or a timing controller, that provides control and data signals to the pixels 22 (e.g., through signal lines formed using the metal layer 62). The display panel 52 includes contacts 64 on a top surface of the display panel for receiving control and data signals. The contacts 64 may be electrically connected to various signal lines formed from the metal layer 62. The signal lines are used to control the pixels 22 during operation of the display.

[0052] In some displays, a flexible printed circuit may be attached directly to contacts 64 on the top surface of the display panel 52. The flexible printed circuit may be bent and connected to a rigid printed circuit board within the electronic device. The flexible printed circuit provides control and data signals to the display panel via contacts 64. This type of configuration may be less robust and may take up more space than desired within the electronic device.

[0053] 5, side-wrap conductive traces can be used to electrically connect contacts 64 on the top surface of the display panel 52 to a flexible printed circuit. A flexible printed circuit 66 is attached to the bottom surface of the substrate 60 (e.g., the bottom surface of the display panel) by an adhesive layer 68. The adhesive layer 68 can be a pressure sensitive adhesive or another desired type of adhesive.

[0054] A system in package (SiP) 70 may be mounted on the flexible printed circuit 66. The system in package may include a display driver integrated circuit 78. The display driver integrated circuit may provide control and data signals to the pixels 22 via the side wrap conductive traces 72 for operating the pixels 22. Signals from the display driver integrated circuit 78 are communicated to the pixels 22 via the flexible printed circuit 66, contacts 80 on the flexible printed circuit 66, the side wrap traces 72, contacts 64 on the display panel 52, and the metal layer 62.

[0055] A first insulating layer 74 may be interposed between the conductive traces 72 and the edges of the display panel 52. A second insulating layer 76 may cover the conductive traces 72 such that the conductive traces are interposed between the first insulating layer 74 and the second insulating layer 76. The conductive traces 72 may conform to the edges of the display panel 52 and may therefore be referred to as being conformally wrapped around the edges of the display panel. The first insulating layer 74 may conform to the edges of the display panel 52. The conductive traces 72 may conform to the first insulating layer 74 (and, correspondingly, to the display panel 52). There is no air gap between the conductive traces 72 and the edges of the display panel 52.

[0056] The configuration of FIG. 5 has many advantages. Side-wrap conductive traces occupy minimal volume within an electronic device (space is at a premium). Side-wrap conductive traces allow for a narrow border to the display. Side-wrap conductive traces can be easily formed on multiple edges of a display panel, improving IR drop and corresponding power delivery. Side-wrap conductive traces can be robust during drop events during the manufacturing process and in real-time use.

[0057] The side-wrap conductive traces of Figure 5 can also be an effective signal routing method for a wide variety of display types. For example, the side-wrap conductive traces can be used in display panels having organic light-emitting diode (OLED) pixels, micro-LED pixels (as in Figure 5), or other types of pixels. Furthermore, the side-wrap conductive traces can provide effective and robust electrical connections in non-flat displays (e.g., flexible and / or foldable displays configured to bend along one or more bending axes, curved displays having one or more curved portions, displays having compound curvatures, etc.).

[0058] To deposit traces 72, very precise deposition of conductive material may be required. For example, traces 72 may be deposited (e.g., printed) on contacts 64, contacts 80, and insulating layer 74 with micron-level resolution. The traces may be printed with widths of less than 2 microns, less than 1 micron, etc., the traces may be separated by gaps of less than 5 microns, less than 3 microns, etc., and the traces may be printed on curved surfaces (e.g., surfaces with convex curvature, compound curvature, etc.), stepped surfaces, etc., while maintaining satisfactory electrical continuity.

[0059] FIG. 6 is a top view of the display panel of FIG. 5. As shown in FIG. 6, contacts 64 (each connected to a respective side wrap conductive trace 72) may be distributed around the entire periphery of the display panel 52. The display panel 52 includes a pixel array 28 in a central portion of the display panel. The display panel has first and second opposing edges (e.g., top and bottom) connected by a third and fourth opposing edges (e.g., left and right) (e.g., when viewed from above as in FIG. 6). Contacts 64 may be optionally interposed between the pixel array and the first edge, between the pixel array and the second edge, between the pixel array and the third edge, and between the pixel array and the fourth edge. The side wrap conductive traces 72 may be easily applied to all four edges of the display panel, and therefore there is no substantial increase in manufacturing cost or complexity to provide contacts along all four edges. Providing contacts around the display panel in this manner may improve the IR drop and corresponding power supply of the display. Providing contacts around the display panel in this manner also prevents congestion (and fan-out complications) of corresponding signal lines.

[0060] If desired, a multi-step interface may be provided between the conductive traces 72 and the flexible printed circuit 66. FIG. 7 is a side cross-sectional view of a flexible printed circuit having a multi-step interface. As shown in FIG. 7, the flexible printed circuit 66 includes a plurality of alternating insulating layers 66-I (e.g., formed from polyimide or another desired insulating material) and a plurality of conductive layers 66-C (e.g., formed from copper or another desired conductive material). Each adjacent pair of an insulating layer and a conductive layer can be considered a separate layer of the flexible printed circuit. A first plurality of contacts 80-1 is formed on the first conductive layer 66-C, and a second plurality of contacts 80-2 is formed on the second conductive layer 66-C. The conductive layer having the contacts 80-2 has an edge shifted by a distance 82 from an edge of the remainder of the flexible printed circuit (e.g., the conductive layer having the contacts 80-1). This exposes the portion of the conductive layer having contact 80-1, allowing trace 72 to be electrically connected to both conductive layers of the flexible printed circuit (instead of just the bottom conductive layer of the flexible printed circuit).

[0061] Some of the conductive traces 72 are electrically connected to contacts 80-1 and other conductive traces 72 are electrically connected to contacts 80-2. The precise deposition technique used for the conductive traces 72 can enable the traces to maintain continuity when traversing right angles formed by the multi-step interface of the flexible printed circuit.

[0062] 8 is a bottom view of the multi-step interface of the flexible printed circuit of FIG. 7. As shown, a plurality of contacts 80-1 are formed on a first layer (L1) of the flexible printed circuit (having corresponding conductive layers 66-C and insulating layers 66-I). The contacts 80-1 may be electrically connected to the patterned portions of the corresponding conductive layers 66-C. Meanwhile, the contacts 80-2 are formed on a second layer (L2) of the flexible printed circuit (having corresponding conductive layers 66-C and insulating layers 66-I). The edges of the layer L2 are shifted from the edges of the layer L1 by a distance 82. The contacts 80-2 may be electrically connected to the patterned portions of the corresponding conductive layers 66-C.

[0063] Trace 72-1 is electrically connected to contact 80-1 on layer L1. Specifically, trace 72-1 is electrically connected to a portion of layer L1 exposed by the shifted edge of layer L2. Trace 72-2 passes through the exposed portion of layer L1 and is electrically connected to contact 80-2 on layer L2. Traces 72 may be separated by a center-to-center pitch 84. The magnitude of pitch 84 may be greater than 3 microns, greater than 5 microns, greater than 10 microns, greater than 20 microns, greater than 50 microns, less than 3 microns, less than 5 microns, less than 10 microns, less than 20 microns, less than 50 microns, between 5 microns and 15 microns, etc. Contacts 80-1 may be separated by a center-to-center pitch 86. The magnitude of pitch 86 may be greater than 5 microns, greater than 10 microns, greater than 20 microns, greater than 50 microns, less than 5 microns, less than 10 microns, less than 20 microns, less than 50 microns, between 10 microns and 30 microns, between 15 microns and 25 microns, etc. Contacts 80-2 may be separated by the same center-to-center pitch as contacts 80-1 or a different center-to-center pitch than contacts 80-2 (e.g., any of the magnitudes listed above in connection with contact 80-1). The center-to-center pitch of contacts 80-1 and / or 80-2 may be greater than the center-to-center pitch of traces 72. The center-to-center pitch of contacts 80-1 and / or 80-2 may be at least 20%, at least 50%, at least 75%, at least 100%, 50% to 150%, etc., greater than the center-to-center pitch of traces 72.

[0064] In the multi-step configuration of Figures 7 and 8, conductive traces 72 having a small center-to-center pitch (for high resolution) can be electrically connected to corresponding contacts while maintaining satisfactory manufacturing tolerances for the contacts 80 on the flexible printed circuit.

[0065] 7 and 8 of a flexible printed circuit having contacts on two layers (e.g., a two-step configuration) is merely illustrative. If desired, the flexible printed circuit may have contacts on three layers (e.g., a three-step configuration), contacts on four layers, contacts on more than four layers, etc.

[0066] Figure 9 is a cross-sectional side view of an exemplary display having side-wrap conductive traces. Figure 9 illustrates how the insulating layer 74 can be provided with a curved surface (e.g., having a convex curvature). This can allow for easier deposition of the conductive traces 72 onto the insulating layer. If desired, the edge(s) of the display panel 52 having side-wrap traces can have a curvature (e.g., a convex curvature) to facilitate curvature of the insulating layer 74.

[0067] FIG. 9 also shows a planarization layer 88. In the portion of the display panel 52 having the pixel array 28, the planarization layer 88 may be flush with the pixels 22 (and may conform to the edge surfaces of the pixels 22). The planarization layer 88 may also function as a dam structure for the insulating layer 74. As shown in FIG. 9, an additional portion of the planarization layer 88 forms a dam structure 88-D. The insulating layer 74 is then deposited adjacent to the sides of the dam structure 88-D. Thus, the dam structure 88-D is formed from the same material (and during the same manufacturing step) as the planarization layer 88 in the pixel array. The dam structure 88-D may be formed on the flexible printed circuit 66. These dam structures may be formed from the same material as the planarization layer 88 in the pixel array.

[0068] In another possible configuration shown in Figures 10A and 10B, the planarization layer 88 defines channels for the conductive traces 72. As shown in Figure 10A, the planarization layer 88 extends over the edge of the display panel with the contacts 64. The planarization layer 88 can define multiple channels, each channel including an individual trace 72. As shown in Figure 10B, channels 90 are defined by the planarization layer 88 over the contacts 64. Individual traces 72 are then formed in each channel. As shown in Figure 10A, the traces 72 may exit the channels at the edge of the display panel and continue along the insulating layer 74. The planarization layer 88 may also be formed over the edges of the flexible printed circuit 66 and the contacts 80 to define channels in a similar manner.

[0069] 11 is a flow chart of an exemplary method for forming conductive traces between a first insulating layer and a second insulating layer. First, in step 1102, a first insulating layer 74 may be formed (e.g., on one or more of the top of the display panel 52, the edge of the display panel 52, the edge of the adhesive layer 68, the edge of the flexible printed circuit 66, the bottom of the flexible printed circuit 66, etc.). Next, in step 1104, one or more conductive traces 72 are formed on the insulating layer 74. Finally, in step 1106, a second insulating layer 76 is formed on the traces 72 and the insulating layer 74. The second insulating layer 76 conforms to the traces 72 and the insulating layer 74.

[0070] FIG. 12 is a flow chart of another exemplary method for forming conductive traces between a first insulating layer and a second insulating layer. First, in step 1202, a first insulating layer 74 may be formed (e.g., on one or more of the top of the display panel 52, the edge of the display panel 52, the edge of the adhesive layer 68, the edge of the flexible printed circuit 66, the bottom of the flexible printed circuit 66, etc.). Next, in step 1204, one or more channels 92 are formed (e.g., by etching) in the top surface of the insulating layer 74. The one or more channels may each be sized to include an individual conductive trace 72. In step 1206, one or more conductive traces 72 are formed on the insulating layer 74 in the respective channels 92. The conductive traces may be contained within the channels such that the top surfaces of the traces 72 do not extend beyond the top surface of the insulating layer 74. In the example of FIG. 12, the top surfaces of the traces 72 are flush with the top surface of the insulating layer 74. This configuration results in a planar surface having portions defined by traces 72 and portions defined by insulating layer 74. Finally, in step 1208, a second insulating layer 76 is formed over traces 72 and insulating layer 74. By forming the conductive traces within channels as in Figure 12, the robustness of the conductive traces (e.g., during a drop event) can be improved.

[0071] FIG. 13 is a cross-sectional side view of an exemplary system in package (SiP) that may be included in the display 14. As shown in FIG. 13, the SiP 70 includes a display driver integrated circuit (DDIC) 78. The DDIC has a number of output contacts 102 electrically connected to a redistribution layer 104. The redistribution layer 104 (sometimes referred to as a conductive redistribution layer 104) routes signals between the contacts 102 (connected to the DDIC 78) and contacts 106 (connected to the flexible printed circuit 66). As shown in FIG. 13, the contacts 106 of the SiP 70 may be connected (e.g., mechanically and electrically) to corresponding contacts 108 in the flexible printed circuit 66 by a conductive mounting structure 110. The conductive mounting structure 110 may be formed from solder, by way of example.

[0072] The contacts 106 (for a SiP-to-flex interface) may be larger in size (area) and / or have a larger pitch than the DDIC contacts 102. The total area of ​​each contact 106 may be at least 50% larger than the total area of ​​each contact 102, at least 100% larger than the total area of ​​each contact 102, at least 150% larger than the total area of ​​each contact 102, at least 200% larger than the total area of ​​each contact 102, at least 400% larger than the total area of ​​each contact 102, etc. The center-to-center pitch of each contact 106 may be at least 20% larger than the total area of ​​each contact 102, at least 50% larger than the total area of ​​each contact 102, at least 100% larger than the total area of ​​each contact 102, at least 200% larger than the total area of ​​each contact 102, etc.

[0073] In addition to the DDIC 78, the SiP 70 may include additional integrated circuits and / or other passive display components (eg, capacitors, resistors, etc.).

[0074] Any of the conductive components (e.g., traces 72 or other desired components) herein can include nanoparticles and / or nanowires. In one example, a conductive component (e.g., traces 72) can include both nanoparticles (e.g., spherical particles) and nanowires (e.g., rods having a diameter and a length greater than 5 times the diameter). Due to an increase in contact / fusion points, including both nanowires and nanoparticles can reduce resistance at lower sintering temperatures compared to conductive fillers without nanowires. Traces 72 may be formed from nanoparticles and / or nanowires formed from silver or another desired material. In one example, a single trace 72 can include both silver nanowires and silver nanoparticles.

[0075] According to one embodiment, there is provided an electronic device including a display panel having an upper surface, a lower surface, and an edge surface extending between the upper surface and the lower surface, the display panel including an array of display pixels on the upper surface, first conductive contacts on the upper surface, a flexible printed circuit attached to the lower surface, second conductive contacts on the flexible printed circuit, and a conductive trace that conformally wraps around the edge surface of the display panel to electrically connect the first conductive contacts to the second conductive contacts.

[0076] According to another embodiment, there is no air gap between the conductive traces and the edge surface of the display panel.

[0077] According to another embodiment, an electronic device includes a first insulating layer conforming to an edge surface of a display panel, with conductive traces formed on the first insulating layer.

[0078] According to another embodiment, an electronic device includes a second insulating layer covering the conductive traces, the conductive traces being interposed between the first and second insulating layers.

[0079] According to another embodiment, an electronic device includes a planarization layer having a first portion formed in an array of display pixels and a second portion that acts as a dam structure for a first insulating layer.

[0080] According to another embodiment, an electronic device includes a system in package mounted on a flexible printed circuit, the system in package including a display driver integrated circuit configured to provide signals to an array of display pixels using conductive traces.

[0081] According to another embodiment, a system-in-package includes a plurality of redistribution layers, third conductive contacts electrically connecting the display driver integrated circuit to the plurality of redistribution layers, and fourth conductive contacts electrically connecting the redistribution layers to a flexible printed circuit.

[0082] According to another embodiment, the third conductive contacts have a first center-to-center pitch and the fourth conductive contacts have a second center-to-center pitch that is greater than the first center-to-center pitch.

[0083] According to another embodiment, the top surface of the display panel has first opposing edges and second opposing edges connected by a third opposing edge and a fourth opposing edge, and first conductive contacts are formed along the first edge, the second edge, the third edge, and the fourth edge.

[0084] According to another embodiment, a flexible printed circuit includes a first layer having a first edge and a second layer having a second edge, the first edge being shifted relative to the second edge, and the first conductive contacts include a first subset of the conductive contacts on the first layer and a second subset of the conductive contacts on the second layer.

[0085] According to another embodiment, the conductive traces have a first center-to-center pitch, a first subset of the conductive contacts on the first layer have a second center-to-center pitch greater than the first center-to-center pitch, and a second subset of the conductive contacts on the second layer have a third center-to-center pitch greater than the first center-to-center pitch.

[0086] According to another embodiment, an electronic device includes a planarization layer having a first portion formed in an array of display pixels and a second portion defining a plurality of channels for conductive traces.

[0087] According to another embodiment, an electronic device includes an insulating layer conforming to an edge surface of a display panel, the insulating layer defining a plurality of channels, each channel including a respective one of the conductive traces.

[0088] According to another embodiment, the conductive traces include silver nanoparticles and silver nanowires.

[0089] According to one embodiment, there is provided an electronic device including a display panel having an array of display pixels and a flexible printed circuit attached to the display panel, the flexible printed circuit having a multi-step edge, the multi-step edge including a first layer and a second layer formed on the first layer, the first layer having a first edge and the second layer having a second edge shifted relative to the first edge, and conductive traces that wrap around an edge of the display panel to electrically connect the display panel to the flexible printed circuit, a first subset of the conductive traces electrically connected to the first layer of the flexible printed circuit and a second subset of the conductive traces electrically connected to the second layer of the flexible printed circuit.

[0090] According to another embodiment, an electronic device includes a layer of pressure sensitive adhesive attaching a flexible printed circuit to the underside of a display panel.

[0091] According to another embodiment, the conductive traces have a first center-to-center pitch and a first subset of the conductive traces are electrically connected to conductive contacts on a first layer having a second center-to-center pitch, the second center-to-center pitch being at least 50% greater than the first center-to-center pitch.

[0092] According to another embodiment, a first subset of the conductive traces pass through an exposed portion of the second layer to the first layer.

[0093] According to another embodiment, a second subset of the conductive traces are electrically connected to the exposed portion of the second layer.

[0094] According to one embodiment, an electronic device is provided that includes a display panel having an array of display pixels, a flexible printed circuit attached to the display panel, conductive traces that wrap around an edge of the display panel to electrically connect the display panel to the flexible printed circuit, and a system-in-package mounted on the flexible printed circuit, the system-in-package including a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive traces.

[0095] According to another embodiment, a system in package includes a plurality of redistribution layers, first conductive contacts electrically connecting a display driver integrated circuit to the plurality of redistribution layers, and second conductive contacts electrically connecting the redistribution layers to a flexible printed circuit.

[0096] According to another embodiment, the first conductive contacts have a first center-to-center pitch and the second conductive contacts have a second center-to-center pitch that is greater than the first center-to-center pitch.

[0097] The above are merely illustrative, and various modifications may be made by those skilled in the art without departing from the scope and spirit of the described embodiments. The above-described embodiments may be implemented individually or in any combination.

Claims

1. 1. An electronic device comprising: a display panel having an upper surface, a lower surface, and an edge surface extending between said upper surface and said lower surface, the display panel including an array of display pixels on said upper surface; a first conductive contact on the top surface; a flexible printed circuit attached to the underside; a second conductive contact on the flexible printed circuit; a conductive trace that conformally wraps around the edge surface of the display panel to electrically connect the first conductive contacts to the second conductive contacts.

2. 10. The electronic device of claim 1, wherein there are no air gaps between the conductive traces and the edge surface of the display panel.

3. a first insulating layer conforming to the edge surface of the display panel, the conductive traces being formed on the first insulating layer; The electronic device of claim 1 further comprising:

4. a second insulating layer covering the conductive traces, the conductive traces being interposed between the first insulating layer and the second insulating layer; The electronic device of claim 3 further comprising:

5. a planarization layer having a first portion formed within the array of display pixels and a second portion that serves as a dam structure for the first insulating layer; The electronic device of claim 3 further comprising:

6. a system-in-package mounted on the flexible printed circuit, the system-in-package including a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive traces; The electronic device of claim 1 further comprising:

7. The system in package, Multiple redistribution layers, a third conductive contact electrically connecting the display driver integrated circuit to the plurality of redistribution layers; and a fourth conductive contact electrically connecting the redistribution layer to the flexible printed circuit.

8. 8. The electronic device of claim 7, wherein the third conductive contacts have a first center-to-center pitch and the fourth conductive contacts have a second center-to-center pitch that is greater than the first center-to-center pitch.

9. 2. The electronic device of claim 1, wherein the top surface of the display panel has first and second opposing edges connected by a third and fourth opposing edges, and the first conductive contacts are formed along the first edge, the second edge, the third edge, and the fourth edge.

10. 2. The electronic device of claim 1, wherein the flexible printed circuit includes a first layer having a first edge and a second layer having a second edge, the first edge being shifted relative to the second edge, and the first conductive contacts include a first subset of conductive contacts on the first layer and a second subset of conductive contacts on the second layer.

11. 11. The electronic device of claim 10, wherein the conductive traces have a first center-to-center pitch, a first subset of the conductive contacts on the first layer have a second center-to-center pitch greater than the first center-to-center pitch, and a second subset of the conductive contacts on the second layer have a third center-to-center pitch greater than the first center-to-center pitch.

12. a planarization layer having a first portion formed within the array of display pixels and a second portion defining a plurality of channels for the conductive traces; The electronic device of claim 1 further comprising:

13. an insulating layer conforming to the edge surface of the display panel, the insulating layer defining a plurality of channels, each channel including a respective one of the conductive traces; The electronic device of claim 1 further comprising:

14. The electronic device of claim 1 , wherein the conductive traces comprise silver nanoparticles and silver nanowires.

15. 1. An electronic device comprising: a display panel having an array of display pixels; a flexible printed circuit attached to the display panel, the flexible printed circuit having a multi-step edge, the multi-step edge including a first layer and a second layer formed on the first layer, the first layer having a first edge and the second layer having a second edge shifted relative to the first edge; and conductive traces that wrap around an edge of the display panel to electrically connect the display panel to the flexible printed circuit, a first subset of the conductive traces being electrically connected to the first layer of the flexible printed circuit and a second subset of the conductive traces being electrically connected to the second layer of the flexible printed circuit.

16. a layer of pressure sensitive adhesive attaching the flexible printed circuit to the underside of the display panel; The electronic device of claim 15 further comprising:

17. 16. The electronic device of claim 15, wherein the conductive traces have a first center-to-center pitch and the first subset of the conductive traces are electrically connected to conductive contacts on the first layer having a second center-to-center pitch, the second center-to-center pitch being at least 50% greater than the first center-to-center pitch.

18. 16. The electronic device of claim 15, wherein the first subset of the conductive traces pass through an exposed portion of the second layer to the first layer.

19. 20. The electronic device of claim 18, wherein the second subset of the conductive traces are electrically connected to the exposed portion of the second layer.

20. 1. An electronic device comprising: a display panel having an array of display pixels; a flexible printed circuit attached to the display panel; a conductive trace that wraps around an edge of the display panel to electrically connect the display panel to the flexible printed circuit; a system-in-package mounted on the flexible printed circuit, the system-in-package including a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive traces.

21. The system in package, Multiple redistribution layers, first conductive contacts electrically connecting the display driver integrated circuit to the plurality of redistribution layers; and a second conductive contact electrically connecting the redistribution layer to the flexible printed circuit.

22. 21. The electronic device of claim 20, wherein the first conductive contacts have a first center-to-center pitch and the second conductive contacts have a second center-to-center pitch that is greater than the first center-to-center pitch.

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