Active Moat System for Magnetic Flux Trapping

Abstract

A superconducting system including a superconducting device is provided. The superconducting device includes a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, and at least one of the superconducting layers is a ground plane. The superconducting device further includes a superconducting circuit present in one or more of the plurality of superconducting layers and one or more active ports extending through the plurality of superconducting layers and the plurality of dielectric layers. By activating and deactivating the one or more active ports, at least one magnetic flux vortex generated by cryogenic cooling is removed from at least one of the plurality of superconducting layers into the one or more active ports.

Description

Technical Field

[0001] The present invention generally relates to superconducting circuits, and more particularly to an active moat system for flux trapping. (Government Interest) The present invention was made under a government contract. Accordingly, the United States government has certain rights in the invention as defined by that contract.

Background Art

[0002] Superconducting electronics is a unique technology that enables high-speed digital circuits with extremely low power consumption. However, superconducting electronics is still a new technology, and as a result, various technical problems to be solved still exist, many of which are found in other microelectronic integrated circuit technologies. However, there are two groups of problems specific to superconducting electronics. One of them is related to the need to cool superconducting circuits to very low cryogenic temperatures. The second group of specific problems is related to flux trapping. Flux trapping is affected by the background magnetic environment during the cooling and operation of superconducting integrated circuits. Flux trapping is widely recognized as one of the most serious problems that can cause integration limits in superconducting circuits.

[0003] The presence of parasitic magnetic flux during cooling and operation significantly limits the yield and performance of many superconducting circuits. Most of the circuits used in various superconducting electronics applications are composed of closed loops of superconducting wire, i.e., superconducting quantum interference devices (SQUIDs), which can be interrupted by one or more Josephson junctions. Due to the Meissner effect, it is prevented from trapping magnetic flux lines inside a defect-free superconducting film, but magnetic flux lines are easily trapped in such loops and SQUIDs. When a superconducting loop with trapped magnetic flux is cooled from a temperature higher than its superconducting critical temperature to a temperature lower than that, a permanent current proportional to the inductance of the loop and the amount of trapped magnetic flux will flow through the loop. Such a circulating current can reduce the performance of the circuit containing the loop. It can also degrade the performance of adjacent circuits with non-negligible inductive coupling.

[0004] Due to magnetic flux quantization, a superconducting loop is defined to trap magnetic flux in integer multiples of the magnetic flux quantum Φ0 = 2.07x10 -15 Wb. One magnetic flux vortex corresponds to Φ0, two magnetic flux vortices correspond to 2Φ0, and so on. A superconducting loop can trap two or more magnetic flux vortices. The amount of magnetic flux vortices trapped in a given loop, including a superconducting integrated circuit, is difficult to predict and characterize, and is partly determined by the potential energy profile of the circuit, which depends on the profile of the background magnetic field, the cooling rate, and the exact layout of the integrated circuit. Due to the difficulty of knowing in advance the impact of magnetic flux trapping on circuit performance and where the magnetic flux tends to be present, in the design of superconducting integrated circuits, a moat (opening) structure is usually adopted, which is arranged in the non-active part of the circuit and provides a preferential location for magnetic flux trapping that does not degrade circuit performance. These passive moats can occupy more than 15 - 20% of the area of the superconducting circuit and also require extensive modeling and experimental iterations to determine the optimal size and configuration. SUMMARY OF THE INVENTION

[0005] In one example, a superconducting system including a superconducting device is provided. The superconducting device includes a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, and at least one superconducting layer is a ground plane. The superconducting device further includes a superconducting circuit present in one or more of the plurality of superconducting layers and one or more active ports extending through the plurality of superconducting layers and the plurality of dielectric layers. By activating and deactivating the one or more active ports, at least one magnetic flux vortex generated by cryogenic cooling is removed from at least one of the plurality of superconducting layers into one or more of the active ports.

[0006] In another example, a superconducting device is provided. The superconducting device includes a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, and at least one superconducting layer is a ground plane. The superconducting device further includes a superconducting circuit present in one or more of the plurality of superconducting layers and an active port extending through the plurality of superconducting layers and the plurality of dielectric layers. The active port includes a heating element and an opening extending through the plurality of superconducting layers and the plurality of dielectric layers. By activating the active port to heat the surrounding area to make it normal and deactivating the active port to draw at least one vortex into the opening of the active port, at least one magnetic flux vortex generated by cryogenic cooling is removed from at least one of the plurality of superconducting layers into the active port.

[0007] In yet another example, a method for preparing a superconducting device for operation is provided. The method includes preparing a superconducting device having one or more active ports, the superconducting device including a plurality of superconducting layers and a plurality of dielectric layers alternating with the plurality of superconducting layers, at least one of the superconducting layers being a ground plane. The method further includes cooling the superconducting device to an extremely low temperature below the critical temperature of the superconducting material used to form a superconducting circuit operable within the superconducting device, and activating one or more active ports to create a heated normal conducting region around the one or more active ports, wherein the one or more active ports include heating elements disposed within openings extending through the plurality of superconducting layers and the plurality of dielectric layers. The method also includes deactivating the one or more active ports to draw vortices formed on at least one of the plurality of superconducting layers, which are generated by the extremely low temperature cooling, into the one or more active ports from the heated normal conducting region.

Brief Description of the Drawings

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DETAILED DESCRIPTION OF THE INVENTION

[0009] This disclosure generally relates to superconducting circuits, and more particularly to an active moat system for flux trapping in an integrated circuit (“chip” or “device”). The system includes an on-chip structure that consists of one or more active moats. An active moat can be formed by a heating (e.g., resistive) element disposed at an opening of the moat in a plurality of superconducting layers of a superconducting device and a plurality of dielectric layers interleaved with the plurality of superconducting layers, and at least one of the superconducting layers is a ground plane. The controller can be configured to apply a current to the heating element that raises the local temperature of the chip such that the superconducting film in the vicinity and surrounding the heating element becomes normal conducting. A plurality of active moats can be spaced around the integrated circuit so as to cover a substantial portion of the integrated circuit area. The size of a given thermal region around a given active moat can be controlled using a combination of current and time. If there are flux vortices pinned within the superconducting film(s) after cryogenic cooling, the flux vortices are released by the film around the flux vortices becoming normal conducting. Thereafter, by slowly decreasing the current flowing through the heating element, all the vortices are gradually focused within the opening of the active moat where the heating element is present.

[0010] The problem with using a regular array of multiple passive ports (e.g., each having an area of 2×2 micrometers) is that, in order to be effective in isolating magnetic flux, the multiple ports need to be spaced relatively closely (e.g., every 10 micrometers). This is because there can be defects in the ground plane that become energetically favorable pinning locations for vortices, and thus, to ensure that it is the most favorable spot for trapping magnetic flux, the multiple ports need to be spaced closely. The multiple ports occupy valuable chip area and limit the density of active circuitry. The ports extend through multiple superconducting layers and multiple dielectric layers alternating with the multiple superconducting layers, and one of the superconducting layers is the ground plane. Magnetic flux vortices bend stray magnetic field lines through the superconducting device, causing an impact on the function of the superconducting circuit. The ports form a set of concentric metallic boundaries around the openings within each superconducting layer to control the stray magnetic flux lines to remain within the port when a vortex is drawn into the port.

[0011] An active port system can extend relatively far in a controllable manner the trapping potential of a single port and then contract to focus the vortices within the port. The active ports can be distributed and arranged to cover an area such as 100 micrometers × 100 micrometers compared to the typical spacing of passive ports every 10 micrometers. An array of relatively sparsely arranged active ports (e.g., 100 active ports) can achieve an effect equal to or greater than that of an array of densely arranged passive ports (e.g., 10,000 ports), with one active port being able to cover the area of 100 passive ports. This secures more chip area available for active circuitry. This system also enables the removal of vortices on the chip without warming the entire cryogenic holding device as is done in some superconducting systems.

[0012] In another example, the system can include a plurality of passive ports distributed around one or more active ports. As will be appreciated, heating elements such as resistors within the active ports consume power. By using a combination of active and passive ports, power consumption can be reduced compared to an all-active port configuration, and the passive port configuration that occupies space on the device can be reduced compared to an all-passive port configuration. In another example, an active port is disposed within a superconducting device, and according to a current profile, a current is ramped up relatively rapidly through the active port and then decreased at a relatively slow rate to first remove vortices and then induce the vortices into the active port well away from sensitive circuits.

[0013] FIG. 1 shows a block diagram of an exemplary superconducting system 10 employing an active port system. The superconducting system 10 includes a superconducting device 12 having one or more active ports 16 controlled by an active port controller 20. The superconducting device 12 can be an integrated circuit device and can include superconducting circuits 14 such as superconducting gates, SQUIDs, RQL circuits, transmission lines, and other superconducting devices. The superconducting device 12 is fabricated from a plurality of superconducting layers and dielectric layers alternately arranged with the plurality of superconducting layers, and at least one of the plurality of superconducting layers is a ground plane. The superconducting device 12 includes one or more active ports 16 and optionally a plurality of passive ports 18 distributed throughout the superconducting device. The active port controller 20 can be disposed on the integrated circuit or can be disposed away from the integrated circuit (i.e., off-chip). The active ports 16 and any passive ports 18 penetrate through a plurality of superconducting layers and dielectric layers including a ground plane. The active ports 16 include heating elements such as resistors disposed within openings in the plurality of superconducting layers and dielectric layers, and the passive ports include only the openings in the plurality of superconducting layers and dielectric layers.

[0014] The active mode controller 20 controls the current flowing through the resistor in the active mode 16. The active mode controller 20 is shown as existing off-chip from the superconducting device 12. However, the active mode controller 20 may be present on the chip 12. The active mode controller 20 is configured to generate a current flowing through a given resistor of a given mode for a plurality of active modes in the example of FIG. 1. FIG. 2 shows an example of a current profile 30 for supplying current to a given resistor of a given mode. A single profile can be used for each of the plurality of active modes. Alternatively, custom current profiles can be employed for different modes based on the size of the heating region of the active mode, the density of superconducting circuits within the region, and / or the sensitivity of superconducting circuits in different regions. The exemplary current profile 30 of FIG. 2 has a steep ramp up gradient to rapidly initiate heating and expansion of the heating region, followed by a short stabilization period during the operating phase. Then, a slow and longer ramp down time ensures that many vortices are drawn into a given active mode during the deactivation phase. It should be understood that various different current profiles can be used based on a given superconducting circuit design. For example, a slow ramp up time and a fast ramp down time, or similar ramp up and ramp down times, may be appropriate for a given application. In addition, the current configuration profile can be executed during a single current configuration profile cycle or multiple times over a plurality of current configuration profile cycles.

[0015] Figures 3 to 7 show top views of an exemplary superconducting device 40 having a topmost superconducting ground plane 42. A plurality of superconducting layers and dielectric layers are present under the superconducting ground plane 42. The resistor 48 is disposed within the opening 46 of the superconducting device 40 to form an active mote 44 and is wired to a current bias via the control line 54 and the return line 56. The opening 46 penetrates the ground plane 42 and extends through one or more layers reaching all of the superconducting and dielectric layers of the superconducting device 40. The superconducting device 40 is first cooled to an extremely low temperature below the critical temperature of the superconducting material used to form a superconducting circuit operable within the superconducting device. When current flows through the resistor 48, the resistor 48 releases heat into the surrounding area of the superconducting device 40. That heat raises the temperature of the surrounding area of the superconducting device 40, making the superconducting metal normal-conducting. However, since the superconducting device 40 is cooled by a cryogenic holding device or a cryogenic liquid in which the superconducting device 40 is immersed, it is considered that the temperature of the superconducting device 40 is highest at the resistor 48 and reaches an equilibrium where it decreases radially from the resistor 48 within the surrounding area. When sufficient current flows, it is considered that a “normal-conducting region” is formed around the resistor 48 where the temperature of the superconducting device 40 exceeds the critical temperature Tc of the superconducting material of the superconducting layer including the ground plane 42.

[0016] The superconducting quantum interference device (SQUID) 52 is spaced apart from the active mote. The SQUID 52 is very sensitive to the nearby magnetic flux that may be trapped while the superconducting metal is cooled from room temperature through the critical temperature of the superconducting material of the superconducting device 40. Thus, for example, current flows through the resistor 48 according to a current configuration profile to facilitate the removal of any pinned vortices within the superconducting device 30 caused by lowering the temperature of the superconducting material below the critical temperature.

[0017] FIG. 3 shows a top view of an exemplary superconducting device 40 having a top superconducting ground plane 42, where a flux vortex 50 is pinned in the vicinity of a sensitive SQUID 52 within the superconducting device 40. The SQUID 52 can be present in a layer below or above the top superconducting ground plane 42. In one example, the SQUID can be disposed on the ground plane 42. FIG. 4 shows a top view of an exemplary superconducting device 40 having a top superconducting ground plane 42, where heat is released from the resistor 48 by the current injected from the control line 54 and the return line 56 into the resistor 48, and a heated normal-conducting region 58 is formed at a slow rate in the layer above and below the ground plane 42. FIG. 5 shows a top view of an exemplary superconducting device 40 having a top superconducting ground plane 42, where as the current flowing through the resistor increases and is held for a predetermined period, the heat released from the resistor 48 causes the heated normal-conducting region 58 to expand until it encompasses the vortex pinning location. At this point, the vortex 50 is released, and it is believed that the magnetic flux quanta enter the heated normal-conducting region 58, and the circulating current diffuses to generate a boundary circulating current 60 around the boundary of the heated normal-conducting region 58.

[0018] FIG. 6 shows a top view of an exemplary superconducting device 40 having a top superconducting ground plane 42, where heat is released from the resistor 48 when the current decreases, and the heated normal-conducting region 58 contracts while the magnetic flux quanta from the vortex 50 remain within the heated normal-conducting region 58. FIG. 7 shows a top view of an exemplary superconducting device 40 having a top superconducting ground plane 42 in a state where heat is being released from the resistor 48 when the current transitions to zero. Here, the magnetic flux quanta are inside the ground plane 42 as well as the openings 46 of the other superconducting and dielectric layers, and the circulating current 60 flows around the openings 46 of each superconducting layer. Thereby, the stray magnetic flux lines due to the circulating current are confined within the openings 46 of the active port 44. Since the active port 44 is sufficiently far from the SQUID 52, it is believed that the circulating current 60 due to the isolated magnetic flux does not interfere with sensitive circuits such as the SQUID 52.

[0019] The same sequence shown in FIGS. 3-7 can be repeated for a plurality of active ports existing on the superconducting device 40. FIG. 8 shows a plan view of an exemplary superconducting device 70 having a plurality of active ports 74 disposed in different heating regions of the superconducting device 70. Each of the plurality of active ports 74 is disposed within an opening 76 in the superconducting device 70 and includes a resistor 78 wired to a current bias via an individual control line 80 and an individual return line 82. In one example, dedicated control and return lines are provided for individual active ports. In another example, the same control and return lines can be used for each of the plurality of active ports. The opening 76 penetrates the ground plane 72 and extends through one or more layers all the way to all the layers of the superconducting device 70. When current flows through each resistor 78, each resistor 78 releases heat to an individual surrounding region on the superconducting device 70. The active ports 74 are spaced apart to provide a normal conducting region heated in different regions of the superconducting device 70 to cover a substantial portion of the integrated circuit region.

[0020] The first SQUID 84 and the second SQUID 86 are disposed on the superconducting device 70. The first and second SQUIDs can be disposed above, below, or on the active layer within the ground plane 72. Although not shown, a number of various other superconducting circuits can exist within the superconducting device 70. A combination of current and time can be used to control the size of a given thermal region surrounding a given active port. If there are flux vortices pinned within the film(s), they are released when the surrounding film(s) become normal conducting. The current flowing through the resistor 78 then decreases at a slow rate and all the vortices are gradually focused into the individual openings 76 of the individual active ports 74 within the individual regions of the superconducting device 70, removing any flux vortices that could affect the functioning of the first SQUID 84, the second SQUID 86, and other superconducting circuits during normal operation.

[0021] FIG. 9 shows a plan view of an exemplary superconducting device 100 having a plurality of active ports 104 and a plurality of passive ports 120 disposed in different heating regions of the superconducting device 100. Each of the plurality of active ports 104 is disposed within an opening 106 in the superconducting device 100 and includes a resistor 108 wired to a current bias via an individual control line 110 and an individual return line 112. In one example, dedicated control and return lines are provided for individual active ports, and in another example, the same control and return lines can be used for each of the plurality of active ports 104. The opening 106 penetrates the ground plane 102 and extends through one or more layers all the way to all layers of the superconducting device 100. The plurality of passive ports 120 are disposed around each of the plurality of active ports 104. The plurality of passive ports 120 enable a reduction in the number of active ports 104 while ensuring that they can remove magnetic flux vortices throughout the superconducting device 100. The first SQUID 114 and the second SQUID 116 are disposed on the superconducting device 100. The first and second SQUIDs can be disposed above, below, or on the active layer within the ground plane 102. Although not shown, a number of various other superconducting circuits can be present within the superconducting device 100.

[0022] When current flows through each resistor 108, each resistor 108 releases heat into the individual surrounding regions on the superconducting device 100. The active motes 104 are spaced apart to provide a normal-conducting region heated in different regions of the superconducting device 100 so as to cover a substantial portion of the integrated circuit region. Using a combination of current and time, the size of a given thermal region surrounding a given active mote can be controlled. If there are flux vortices pinned within the film(s), they are released when the surrounding film(s) become normal-conducting. Thereafter, the current flowing through the resistors 108 decreases at a slow rate, and all the vortices can gradually converge within the individual passive motes 120 disposed around a given heating region. Vortices not trapped within the passive motes are ultimately drawn into the individual apertures 106 of the individual active motes 104 within the individual regions of the superconducting device 100, removing any flux vortices that could affect the functioning of the first SQUID 114, the second SQUID, and other superconducting circuits 116 during normal operation.

[0023] Considering the structural and functional features described above, the methods according to various aspects of the present invention will be better understood by referring to FIG. 10. For the sake of simplicity, the method of FIG. 10 is shown and described as being executed sequentially, but according to the present invention, some aspects may be performed in a different order than shown and described herein and / or simultaneously with other aspects, and it should be understood and recognized that the present invention is not limited by the order in which it is illustrated. Further, not all of the features shown are required to implement the method according to one aspect of the present invention.

[0024] Figure 10 shows an example of a method 150 for preparing a superconducting device for operation. At 152, a superconducting device is prepared that includes one or more active ports and optionally one or more passive ports. At 154, the superconducting device is placed within a cryogenic system and cooled to an extremely low temperature below the critical temperature of the superconducting material used to form an operable superconducting circuit within the superconducting device. The method then proceeds to 156. At 156, one or more active ports are activated, for example, by relatively rapidly ramping up a current to heating elements of the one or more active ports. Thereby, a heated normal-conducting region is formed in the region surrounding the one or more active ports. The current to the heating elements is held at a given level for a predetermined period during the operating phase to allow for the expansion of the heated region. At 158, the current to the heating elements decreases at a relatively slow rate compared to the rise time to draw vortices generated by the extremely low temperature cooling into the active ports and any passive ports until the current reaches zero. At 160, the superconducting device begins normal functional operation.

[0025] The active port system described above has the potential to significantly reduce costs by minimizing the test time of superconducting integrated circuits. In testing superconducting integrated circuits, it is common to subject the integrated circuit to a number of thermal cycles where the chip is cooled below the superconducting transition temperature and then warmed again in order to properly trap magnetic flux within the ports of the ground plane so that the chip can function. In particular, when the chip is mounted on a liquid helium immersion probe and needs to be physically removed from the liquid and then re-immersed in the liquid at a slow rate, the thermal cycles can be time-consuming and costly in terms of labor. The active port system eliminates the need to warm the entire cryogenic apparatus by providing means to controllably heat and cool the chip in a manner that can be electronically automated. Thus, the active port system allows for an increase in test throughput and a reduction in the need for dedicated manual labor.

[0026] What is described above are examples of the present invention. Of course, it is not possible to describe all combinations of components or methods that may be considered in order to explain the invention, but those skilled in the art will recognize that many further combinations and permutations of the invention are possible. Accordingly, the present invention is intended to embrace all such changes, modifications, and variations that fall within the scope of this application, including the appended claims.

Claims

1. A superconducting system, comprising: a superconducting device, the superconducting device comprising: a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, at least one of the superconducting layers being a ground plane, the plurality of superconducting layers and the plurality of dielectric layers; a superconducting circuit present in one or more of the plurality of superconducting layers; one or more active ports extending through the plurality of superconducting layers and the plurality of dielectric layers, wherein at least one magnetic flux vortex generated by cryogenic cooling is removed from at least one of the plurality of superconducting layers into the one or more active ports by activating and deactivating the one or more active ports, the one or more active ports.

2. The system according to claim 1, wherein each active port of the one or more active ports is formed by a heating element present in an opening extending through the plurality of superconducting layers and the plurality of dielectric layers.

3. The system according to claim 2, wherein the heating element is a resistor.

4. For each individual active port of the one or more active ports, a control line coupled to a first end of the resistor for supplying a current to the resistor to generate heat for forming a normal conducting region heated around the individual active port, and a return line coupled to the other end of the resistor. The system according to claim 3, further comprising:

5. The system according to claim 1, further comprising an active port controller configured to activate and deactivate the one or more active ports.

6. The system according to claim 5, wherein the active port controller controls the amount of current flowing to each active port of the one or more active ports.

7. The amount of current flowing to each active port of the one or more active ports is based on a current profile having a relatively steep current rise time and a relatively slow current fall time to ensure that one or more vortices pinned to at least one of the plurality of superconducting layers are drawn into the one or more active ports during a current configuration profile cycle. The system according to claim 6.

8. The system of claim 1, wherein the one or more active ports include a plurality of active ports spaced apart from each other to provide normal-conducting regions heated in different regions of the superconducting device as a whole.

9. The system of claim 8, further comprising a plurality of passive ports distributed around the one or more active ports, wherein one or more magnetic flux vortices generated by cryogenic cooling are removed within one or more of the plurality of passive ports by activating and deactivating the active ports.

10. A superconducting device, comprising a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, wherein at least one of the plurality of superconducting layers is a ground plane, the plurality of superconducting layers and the plurality of dielectric layers, a superconducting circuit present in one or more of the plurality of superconducting layers, and an active port extending through the plurality of superconducting layers and the plurality of dielectric layers, the active port including a heating element and an opening extending through the plurality of superconducting layers and the plurality of dielectric layers, wherein the active port is activated to heat the surrounding region to make it normal-conducting, and the active port is deactivated to draw at least one magnetic flux vortex into the opening of the active port, so that at least one magnetic flux vortex generated by cryogenic cooling is removed from at least one of the plurality of superconducting layers into the active port.

11. The device of claim 10, wherein the heating element is a resistor.

12. The device of claim 11, further comprising a control line coupled to a first end of the resistor and a return line coupled to the other end of the resistor to receive a current flowing through the resistor to generate heat and form a heated normal-conducting region around the active port.

13. The device of claim 10, further comprising a plurality of passive ports distributed around the active port, wherein one or more magnetic flux vortices generated by cryogenic cooling are removed within one or more of the plurality of passive ports by activating and deactivating the active port and the plurality of active ports.

14. The device according to claim 13, wherein one or more vortices that are not drawn into the plurality of passive ports are drawn into the active port.

15. The device according to claim 10, further comprising a plurality of additional active ports spaced apart from each other to provide normal conducting regions heated in different regions throughout the superconducting device.

16. The device according to claim 15, further comprising a plurality of passive ports distributed around the active port and the plurality of additional active ports, wherein one or more vortices generated by cryogenic cooling are removed within one or more of the plurality of passive ports by activating and deactivating the active port and the plurality of additional active ports.

17. A method of preparing a superconducting device for operation, comprising: preparing a superconducting device having one or more active ports, the superconducting device including a plurality of superconducting layers and a plurality of dielectric layers alternately arranged with the plurality of superconducting layers, at least one superconducting layer being a ground plane, the step of preparing the superconducting device; cooling the superconducting device to a cryogenic temperature below the critical temperature of the superconducting material used to form a superconducting circuit operable within the superconducting device; activating the one or more active ports to create a heated normal conducting region around the one or more active ports, the active ports comprising heating elements disposed within openings extending through the plurality of superconducting layers and the plurality of dielectric layers, the step of activating the one or more active ports; deactivating the one or more active ports to draw a vortex formed on at least one of the plurality of superconducting layers generated by cryogenic cooling from the heated normal conducting region into the one or more active ports.

18. The method according to claim 17, wherein the activating step includes relatively rapidly ramping up a current to the heating element and holding the current at a given current for a period of time.

19. The method according to claim 17, wherein the deactivating step comprises lowering the current to the heating element at a rate relatively slow with respect to the rising current in order to draw vortices into the openings of the one or more active ports from the superconducting device.

20. The method according to claim 19, wherein the deactivating step comprises lowering the current to the heating element at a rate relatively slow with respect to the rising current in order to draw vortices from the superconducting device into the openings of the one or more active ports and the one or more passive ports of the superconducting device.

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