Method for etching polysilicon

The use of a composition containing choline hydroxide and periodic acid with optional surfactants addresses the inefficiencies in polysilicon etching by achieving high selectivity and controlled etching rates, reducing residual silicon residues and enhancing the precision of polysilicon removal in semiconductor devices.

JP2025519682APending Publication Date: 2025-06-26ENTEGRIS INC
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Patent Information

Application Number
JP2024573454
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-06-16
Filing Date
2023-06-16
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

Existing etching methods for polysilicon in semiconductor devices are inefficient, particularly when co-existing with silicon nitride and silicon oxide films, as they result in residual silicon residues and uneven etching rates.

Method used

A composition comprising choline hydroxide, an oxidizing agent such as periodic acid, and optionally a surfactant, which is used to selectively etch polysilicon while minimizing residual silicon residues and achieving high selectivity over silicon nitride and silicon oxide.

Benefits of technology

The composition achieves a high etching selectivity of polysilicon to silicon nitride and silicon oxide, exceeding 1000:1, with controlled etching rates and reduced residual silicon residues, thereby improving the precision and efficiency of polysilicon removal in semiconductor devices.

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Abstract

The present invention provides a composition useful for etching polysilicon in the presence of silicon oxide and silicon nitride. The composition includes choline hydroxide, an oxidizing agent such as periodic acid, and optionally a surfactant, and is generally useful in the etching of polysilicon, particularly in both the operations of polysilicon trim and polysilicon exhume. The use of the added oxidizing agent has been found to reduce the selectivity of silicon etching based on the silicon crystal orientation, which has been found to reduce the presence of residual silicon residues such as roughness and silicon (111) residues after the etching process.
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Description

[Technical field]

[0001] The present invention generally relates to compositions and methods for selectively etching polysilicon films in the presence of silicon nitride and silicon oxide films.

[0002] Related Applications This disclosure claims priority to U.S. Provisional Patent No. 63 / 352,917, having a filing date of June 16, 2022. The priority document is hereby incorporated by reference. [Background technology]

[0003] Processing semiconductor and microelectronic devices involves various steps of depositing layers of material and removing material by a chemical process called "etching." With etching, a thin mask layer is placed over the layer of deposited material. Openings are then formed in the mask to expose selected portions of the substrate. The masked substrate is then contacted with an etchant, which contacts the underlying substrate material through the openings in the mask and chemically dissolves and removes the substrate material to form openings (three-dimensional spaces) in the substrate.

[0004] One such sacrificial material is polysilicon. Typical removal methods for polysilicon include dry etching and wet etching methods. For anisotropic wet etching, bases such as tetramethylammonium hydroxide (TMAH), alkali metal hydroxides, etc. have been used. However, residual alkali metal ions are undesirable on the surface of the final device product, and TMAH is not preferred because it is a neurotoxin. In addition, TMAH and KOH also exhibit higher etch rates for n-doped polysilicon than for p-doped polysilicon; this phenomenon is undesirable because the removal rates of all polysilicon species are essential for certain applications where multiple polysilicon surfaces are present.

[0005] Accordingly, there remains a need for an etching composition for removing polysilicon material from a microelectronic device substrate, and more particularly, for selectively removing polysilicon within such a device substrate that also contains silicon nitride and silicon oxide surfaces. SUMMARY OF THE INVENTION

[0006] Briefly, the present invention provides a composition useful for etching polysilicon in the presence of silicon oxide and silicon nitride. The composition includes choline hydroxide, an oxidizing agent such as periodic acid, and optionally a surfactant, and is generally useful in the etching of polysilicon, particularly in both the operations of polysilicon trim and polysilicon exhume. The use of the added oxidizing agent has been found to reduce the selectivity of silicon etching based on the silicon crystal orientation, which has been found to reduce the presence of residual silicon residues such as roughness and silicon (111) residues after the etching process. In certain embodiments, the device substrate includes a polysilicon, silicon nitride, and silicon oxide surface, and the etching selectivity of polysilicon with respect to silicon nitride and silicon oxide is greater than about 1000:1.

[0007] In some applications, polysilicon of 1 to 10 microns is completely removed from the trench. In these applications, a high removal rate is required, and as a result, the process is achieved in an acceptable time. Using a temperature of 30°C to 90°C, a rate exceeding 100 Å / min and a processing time of 15 to 360 minutes can be achieved.

[0008] In other applications, it is desirable to partially remove polysilicon from the microelectronic device. In this case, a small amount of about 50 Å can be removed. A removal rate in the range of 10 to 100 Å / min is desirable to facilitate control of the amount removed. These lower rates can be achieved by processing at a lower temperature and controlling the composition of the etching formulation.

[0009] The composition of the present invention also helps to avoid the use of TMAH, which is known to be a neurotoxin, and the use of alkali metal hydroxides such as KOH that can contaminate the surface with mobile ions.

Brief Description of the Drawings

[0010]

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Best Mode for Carrying Out the Invention

[0011] As used in this specification and the appended claims, the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. As used in this specification and the appended claims, the term "or" is generally used in the sense of "and / or" unless the context clearly dictates otherwise.

[0012] The term "about" generally refers to a range of numerical values that are considered equivalent to the recited value (e.g., having the same function or result). In many cases, the term "about" may include numerical values that are rounded to the nearest significant digit.

[0013] Numerical ranges expressed using endpoints include all numerical values encompassed within that range (e.g., 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.80, 4, 5). In a first aspect, the present invention provides a. choline hydroxide, b. water, c. an oxidizing agent, optionally, d. a surfactant A composition comprising.

[0014] In certain embodiments, the oxidizing agent is selected from oxidizing agents such as iodic acid and periodic acid, permanganic acid, and persulfuric acid. In one embodiment, the oxidizing agent is present in an amount of about 15 weight percent or less. In another embodiment, the oxidizing agent is periodic acid and is present in an amount of about 0.1 to about 1% by weight based on the total weight of the composition.

[0015] In one embodiment, the iodine-containing oxidizing agent is selected from H5IO6, HIO4, or a mixture thereof.

[0016] In certain embodiments, the composition further comprises at least one surfactant. As used herein, the term "surfactant" refers to an organic compound that reduces the surface tension (or interfacial tension) between two liquids or between a liquid and a solid, and typically refers to an organic amphiphilic compound containing a hydrophobic group (e.g., a hydrocarbon (e.g., an alkyl) "tail") and a hydrophilic group. When present, surfactants for use in the compositions described herein include, but are not limited to, zwitterionic salts, cationic surfactants, anionic surfactants, zwitterionic surfactants, nonionic surfactants, and combinations thereof. Exemplary surfactants include decylphosphonic acid, dodecylphosphonic acid (DDPA), dodecylbenzenesulfonic acid (DDBSA), other R 1 benzenesulfonic acid or salts thereof (where R 1 is a straight-chain or branched C8-C 18(which is an alkyl group). Nonionic surfactants include, but are not limited to, polyoxyethylene lauryl ether, dodecenyl succinic acid monodiethanolamide, ethylenediamine tetrakis(ethoxylate-block-propoxylate) tetrol, polyethylene glycol, polypropylene glycol, polyethylene or polypropylene glycol ether, block copolymers based on ethylene oxide and propylene oxide, polyoxypropylene sucrose ether, t-octylphenoxypolyethoxyethanol, 10-ethoxy-9,9-dimethyldecan-1-amine, polyoxyethylene(9) nonylphenyl ether, branched polyoxyethylene(40) nonylphenyl ether, branched-chain dinonylphenyl polyoxyethylene, nonylphenol alkoxylate, polyoxyethylene sorbitol hexaoleate, polyoxyethylene sorbitol tetraoleate, polyethylene glycol sorbitan monooleate, sorbitan monooleate, alcohol alkoxylate, alkyl polyglucoside, ethyl perfluorobutyrate, 1,1,3,3,5,5-hexamethyl-1,5-bis[2-(5-norbornen-2-yl)ethyl]trisiloxane, monomer octadecylsilane derivative, siloxane modified polysilazane, silicone polyether copolymer, and ethoxylated fluorosurfactant.Cationic surfactants include, but are not limited to, cetyltrimethylammonium bromide (CTAB), heptadecafluorooctanesulfonic acid, tetraethylammonium, stearyltrimethylammonium chloride, 4-(4-diethylaminophenylazo)-1-(4-nitrobenzyl)pyridinium bromide, cetylpyridinium chloride monohydrate, benzalkonium chloride, benzethonium chloride, benzyldimethyldodecylammonium chloride, benzyldimethylhexadecylammonium chloride, hexadecyltrimethylammonium bromide, dimethyldioctadecylammonium chloride, dodecyltrimethylammonium chloride, hexadecyltrimethylammonium p-toluenesulfonate, didodecyldimethylammonium bromide, di(hydrogenated tallow)dimethylammonium chloride, tetraheptylammonium bromide, tetrakis(decyl)ammonium bromide, and oxyphenonium bromide, guanidine hydrochloride (C(NH2)3Cl) or triflate salts, such as tetrabutylammonium trifluoromethanesulfonate, dimethyldioctadecylammonium chloride, dimethyldihexadecylammonium bromide, di(hydrogenated tallow)dimethylammonium chloride, and polyoxyethylene(16)tallow ethylmonium ethosulfate. Anionic surfactants contemplated include, but are not limited to, poly(sodium acrylate salt), polyammonium acrylate, polyoxyethylene lauryl ether sodium, sodium dihexyl sulfosuccinate, sodium dodecyl sulfate, dioctyl sulfosuccinate, 2-sulfosuccinate, 2,3-dimercapto-1-propanesulfonate, sodium dicyclohexyl sulfosuccinate, sodium 7-ethyl-2-methyl-4-undecyl sulfate, phosphate fluorosurfactant, fluorosurfactant, and polyacrylate.The zwitterionic surfactant includes, but is not limited to, acetylene diol or modified acetylene diol, ethylene oxide alkylamine, N,N-dimethyldodecylamine N-oxide, sodium cocoaminopropionate, 3-(N,N-dimethylmyristylammonio) propane sulfonate, and (3-(4-heptyl)phenyl-3-hydroxypropyl) dimethylammonio propane sulfonate. In one embodiment, the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl) phenyl ether.

[0017] The amount of the surfactant in the etching composition can be an amount that provides the desired overall performance in combination with the other materials of the etching composition. For example, the composition can contain an amount of the surfactant that can range from about 0.001% to about 10% by weight.

[0018] In certain embodiments, the composition further includes one or more amines, particularly amines such as primary and secondary amines. Exemplary amines include diethylenetriamine (CAS number: 111-40-0), triethylenetetramine (CAS number: 112-24-3), tetramethylenepentaamine (CAS number: 112-57-2), piperazine (CAS number: 110-85-0), and piperidine (CAS number: 110-89-4).

[0019] As used herein, the term "microelectronic device" (or "microelectronic device substrate" or simply "substrate") is used in a manner consistent with the generally understood meaning of this term in the technical fields of electronics, microelectronics, and semiconductor fabrication, and includes, for example, various different types of: semiconductor substrates; integrated circuits; solid state memory devices; hard memory disks; read, write, and read-write heads and their mechanical or electronic components; flat panel displays; phase change memory devices; solar panels and other products including one or more solar cell devices; photovoltaic cells; and any of microelectromechanical systems (MEMS) fabricated for use in microelectronics, integrated circuit, energy harvesting, or computer chip applications. It is understood that the term "microelectronic device" can refer to any microelectronic device or microelectronic device substrate during any process in which it contains, or is prepared to contain, functional electronic (energized) structures, functional semiconductor structures, and insulating structures for the ultimate electronic use in a microelectronic device or microelectronic assembly.

[0020] As used herein, the term "silicon nitride" is given a meaning consistent with the meaning of the term as used in the microelectronics and semiconductor fabrication industries. Consistent therewith, silicon nitride refers to a material including thin films made of commercially useful low levels of other materials or impurities and, potentially, amorphous silicon nitride having a deformed form close to the nominal stoichiometry of Si3N4. Silicon nitride may be present as part of a microelectronic device substrate, for example as a barrier layer or an insulating layer, as a functional mechanism of the device, or may be present to function as a material facilitating a multi-step fabrication method for preparing a microelectronic device.

[0021] As used herein, the term "silicon oxide" is given a meaning consistent with that used in the microelectronics and semiconductor manufacturing industries. Consistent therewith, silicon oxide refers to a thin film made of silicon oxide SiO x where x is from 1 to 2. Silicon oxide can be disposed on a substrate by any method, for example, by chemical vapor deposition from TEOS or another source, or by oxidation of silicon. Silicon oxide may advantageously contain other materials or impurities at useful low levels that are commercially available. Silicon oxide may be present as part of a microelectronic device substrate, for example, as an insulating layer, as a mechanism of a microelectronic device.

[0022] As used herein, "polysilicon" or polycrystalline Si or poly-Si is understood by those skilled in the art to be silicon in a polycrystalline form consisting of a plurality of small silicon crystals. This is typically deposited using low pressure chemical vapor deposition (LPCVD) and is often doped n-type polysilicon or p-type polysilicon. As will be readily understood by those skilled in the art, the degree of doping can vary widely from low concentration doping (e.g., in the range of 10 13 cm -3 ~10 18 cm -3 to high concentration doping (e.g., more than 10 18 cm -3 ). Examples of p-doped materials include polysilicon doped with dopant species from Group IIIA of the periodic table, such as boron, aluminum, gallium, and / or indium. n-doped materials can be, for example, polysilicon doped with dopant species from Group IV of the periodic table (silicon, germanium, or tin) or Group V dopant species (phosphorus, arsenic, antimony, or bismuth).

[0023] Embodiments of a particular etching composition include an aqueous solution composition that contains choline hydroxide, an oxidizing agent or silicon nitride in an amount effective to improve the etching rate of polysilicon relative to silicon nitride; and optionally a surfactant, consisting essentially of, or consisting of these components. These compositions and other exemplary compositions can include, consist of, or consist essentially of the recited and optional ingredients. Throughout this specification, as a general convention, a composition of a substance such as an etching composition described, or its ingredients or components, is said to "consist essentially of" a particular group of ingredients or materials, and refers to a composition that contains a particular ingredient or material with other ingredients or materials in minor or trace amounts, for example, other ingredients or materials in an amount of 5, 2, 1, 0.5, 0.1, or 0.05 parts by weight or less.

[0024] In certain embodiments, the compositions of the present invention do not require other types of ingredients that are not typically included in etching compositions, such as solid materials like pH adjusters and abrasives, and may be excluded.

[0025] The compositions of the present invention can be prepared by any method useful for producing the described etching compositions. By one method, aqueous or solid ingredients can be optionally heated, combined, and mixed to homogeneity.

[0026] In a second aspect, the present invention provides a method for etching polysilicon on a microelectronic device having a silicon nitride and polysilicon surface, the method comprising contacting the device with a. choline hydroxide, b. water, c. an oxidizing agent, and d. optionally a surfactant in a composition under conditions effective to etch the polysilicon.

[0027] In certain embodiments, the microelectronic device substrate further comprises an exposed silicon oxide surface.

[0028] As described above, the compositions described herein can be useful in methods for removing polysilicon from the surface of a microelectronic device substrate. The substrate can contain one or more of other materials useful in microelectronic devices, such as insulators, barrier layers, conductive materials, semiconducting materials, or materials useful in the processing of microelectronic devices (e.g., in particular, photoresists, masks). Examples of substrates have surfaces that include silicon nitride, doped silicon, and PETEOS (oxide deposited using plasma enhanced tetraethyl orthosilicate) as well as polysilicon.

[0029] The compositions of the present invention can, in use, provide useful etching performance based on the requirements and expectations of commercial performance, and can provide improved performance with respect to the etching rate and selectivity of polysilicon relative to silicon dioxide and silicon nitride compared to comparative etching compositions.

[0030] This method can be carried out with known commercially available equipment. Generally, to etch a substrate to selectively remove the material on the surface of the substrate, an etching composition can be applied to the surface and contacted with the surface structure to chemically selectively remove a particular structure.

[0031] In the etching process, the composition can be applied to the surface by any suitable method, such as by spraying the composition onto the surface; by immersing the substrate in the etching composition (in a static or dynamic volume of the composition); by contacting the surface with another material, such as a pad or fibrous absorbent applicator element, onto which the etching composition has been absorbed; by contacting the substrate with an amount of the etching composition in a circulation pool; or by any other suitable means, method or technique for removably contacting the etching composition with the surface of a microelectronic substrate containing silicon-germanium and silicon. The application may be in a batch or single-sheet apparatus for dynamic or static cleaning.

[0032] The conditions of a useful etching process (such as time and temperature) can be any that have been found to be effective or advantageous. Generally, the etching composition is contacted with the surface for a time sufficient to selectively remove silicon nitride, such as by immersion in a bath of the etching composition. The exposure time to the etching composition and the temperature of the etching composition can be effective to remove a desired amount of silicon nitride from the surface of the substrate. The amount of time of the etching process should not be too short, because this can mean that the etching rate of polysilicon is too high, thereby making process control difficult and the quality of the microelectronic device at the end of the etching process can be degraded. Of course, the amount of time required for the etching process is preferably not overly long in order to enable good efficiency and throughput of the etching process and semiconductor manufacturing line. Examples of times useful for trimming operations can range from about 1 minute to about 30 minutes in the temperature ranges described herein, and for digging operations can range from about 30 minutes to about 360 minutes. Such contact times and temperatures are illustrative and any other suitable time and temperature conditions effective to achieve the required removal selectivity may be used.

[0033] The etching process described herein may be useful for etching polysilicon materials from the surface of any type of substrate. Examples of the etching process may exhibit a significant increase in polysilicon etching rate and a high selectivity for silicon oxide and silicon nitride of greater than about 150, at least about 2000 or at least about 4000 in certain embodiments.

[0034] After the selective etching of the desired amount of polysilicon is completed, the etching composition remaining on the surface of the etched microelectronic device can be removed from the surface by any desired useful method, such as rinsing, washing, or other removal processes. For example, after etching, the microelectronic device substrate can be rinsed with a rinse solution of deionized water (e.g., at a temperature in the range of about 20°C to about 90°C), followed by drying, such as spin drying, N2, vapor drying, etc. After rinsing, the substrate surface may be measured for the presence and amount of particles on the surface.

[0035] The compositions described herein can be easily formulated by simply adding each raw material and mixing to a homogeneous state. Further, the compositions can be easily formulated as a single-package formulation or a multi-component formulation that is mixed at the time of use or before that, preferably as a multi-component formulation. The individual parts of the multi-component formulation may be mixed in a tool, or in a mixing zone / area such as an in-line mixer, or in a storage tank upstream of the tool. It is contemplated that the various parts of the multi-component formulation may be mixed together to contain any combination of raw materials / components that form the desired composition. The concentration of each raw material may vary widely in certain multi-aqueous compositions, i.e., it may be more diluted or more concentrated, and the multi-aqueous composition may variously and alternatively contain, consist of, or consist essentially of any combination of raw materials consistent with the disclosure herein. Thus, in a third aspect, the present invention provides a kit comprising two or more of choline hydroxide, an oxidizing agent, optionally a surfactant, and optionally an amine in two or more containers.

[0036] The kit container must be suitable for storing and transporting the semi-aqueous composition components. For example, there is the NOWPak® container (Entegris, Inc.). One or more containers containing the components of the composition preferably include means for fluidly connecting the components for blending and dispensing within the one or more containers. For example, referring to the NOWPak® container, a gas pressure can be applied outside the liner within the one or more containers to expel at least a portion of the contents of the liner, and thus enable fluid communication for blending and dispensing. Alternatively, a gas pressure can be applied to the headspace of a conventional pressurized container, or a pump can be used to enable fluid communication. Further, the system preferably includes a dispensing port for dispensing the blend composition to a processing tool.

[0037] A polymeric film material that is substantially chemically inert, impurity-free, flexible and elastic, such as high density polyethylene, can be used to fabricate the liner for the one or more containers. Desirable liner materials are generally processed without co-extrusion or the need for a barrier layer and without any pigments, UV inhibitors, or processing aids that could adversely affect the purity requirements of the components placed within the liner. Examples of desirable liner materials include films containing virgin (additive-free) polyethylene, virgin polytetrafluoroethylene (PTFE), polypropylene, polyurethane, polyvinylidene chloride, polyvinyl chloride, polyacetal, polystyrene, polyacrylonitrile, polybutylene, etc. The preferred thickness of such liner materials ranges from about 5 mils (0.005 inches) to about 30 mils (0.030 inches), for example a thickness of 20 mils (0.020 inches).

[0038] Regarding the container for the kit, the disclosures of the following patents and patent applications are hereby incorporated by reference in their entireties: U.S. Patent No. 7,188,644 entitled "APPARATUS AND METHOD FOR MINIMIZING THE GENERATION OF PARTICLES IN ULTRAPURE LIQUIDS"; and U.S. Patent No. 6,698,619 entitled "RETURNABLE AND REUSABLE, BAG-IN-DRUM FLUID STORAGE AND DISPENSING CONTAINER SYSTEM".

Example

[0039] Example 1. Referring to the data shown in FIGS. 1 - 3, a 12.5 wt% solution of choline hydroxide and water was utilized. The etching rates of polysilicon, silicon oxide, and silicon nitride were measured using spectroscopic ellipsometry on a blanket film before and after exposure to the choline hydroxide solution.

[0040] This data indicates that the selectivity of silicon oxide and silicon nitride is satisfactory at all temperatures (the etching rate of silicon nitride is <0.1 Å / min up to 80 °C). The polysilicon etching rate is sufficient for applications that require substantial polysilicon removal at T > 25 °C. For applications that require less polysilicon removal, lower temperatures are preferred so that the removal amount can be appropriately controlled.

[0041] Example 2. Referring to the data shown in FIGS. 4-6, the composition of the present invention containing choline hydroxide, periodic acid, and surfactant Triton™ X-100 was tested at room temperature for polysilicon trimming applications. The polysilicon etching rate was measured over a period of time so that the etching time for 90 Å removal could be interpolated. Further, the film was processed to remove 90 Å and the roughness (Ra) was measured by ellipsometry. This data indicates that optimal results were obtained with 2-2.4 weight percent choline hydroxide, 0.04-0.05 weight percent Triton™ X-100, and 0.03-0.045 weight percent periodic acid.

[0042] Aspect In a first aspect, the present invention provides a. choline hydroxide, b. water, c. an oxidizing agent, and d. optionally a surfactant in a composition.

[0043] In a second aspect, the present invention provides the composition of the first aspect, wherein the oxidizing agent is selected from iodine-containing oxidizing agents, permanganic acid, and persulfuric acid.

[0044] In a third aspect, the present invention provides the composition of the second aspect, wherein the iodine-containing oxidizing agent is selected from H5IO6, HIO4, or a mixture thereof.

[0045] In a fourth aspect, the present invention provides the composition of any one of the first to third aspects, wherein a surfactant is present and is a nonionic surfactant.

[0046] In a fifth aspect, the present invention provides the composition of any one of the first to fourth aspects, wherein a surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0047] In a sixth aspect, the present invention provides a composition according to any one of the first to fifth aspects, wherein the oxidizing agent is selected from H5IO6, HIO4, or a mixture thereof, a surfactant is present, and the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0048] In a seventh aspect, the present invention provides a composition according to any one of the first to sixth aspects, further comprising one or more amines.

[0049] In an eighth aspect, the present invention provides a composition according to the seventh aspect, wherein the amine is selected from diethylenetriamine, triethylenetetramine, tetramethylenepentaamine, piperazine, and piperidine.

[0050] In a ninth aspect, the present invention provides a composition according to any one of the first to sixth aspects, comprising about 2 to about 2.4 weight percent choline hydroxide, about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent periodic acid, based on the total weight of the composition.

[0051] In a tenth aspect, the present invention provides a method for etching polysilicon on a microelectronic device having a silicon nitride and polysilicon surface, the method comprising contacting the device with a composition comprising a. choline hydroxide, b. water, c. an oxidizing agent, and d. optionally a surfactant under conditions effective to etch the polysilicon.

[0052] In an eleventh aspect, the present invention provides a method according to the tenth aspect, wherein the oxidizing agent is selected from H5IO6, HIO4, or a mixture thereof, a surfactant is present, and the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0053] In a 12th aspect, the present invention provides a method according to the 10th aspect, wherein the composition comprises from about 2 to about 2.4 weight percent choline hydroxide, from about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and from about 0.03 to about 0.045 weight percent periodic acid.

[0054] In a 13th aspect, the present invention provides a method according to any one of the 10th, 11th, or 12th aspects, wherein the composition further comprises one or more amines.

[0055] In a 14th aspect, the present invention provides a method according to the 13th aspect, wherein the amine is selected from diethylenetriamine, triethylenetetramine, tetramethylenepentaamine, piperazine, and piperidine.

[0056] In a 15th aspect, the present invention provides a method according to any one of the 10th to 13th aspects, which is carried out at a temperature of less than about 30°C.

[0057] In a 16th aspect, the present invention provides a method according to any one of the 10th to 13th aspects, which is carried out at a temperature of greater than about 30°C to about 90°C.

[0058] In a 17th aspect, the present invention provides a method according to any one of the 10th to 13th aspects, wherein the microelectronic device further comprises a silicon oxide surface and the etch selectivity of polysilicon with respect to silicon nitride and silicon oxide is greater than about 1000:1.

[0059] In an 18th aspect, the present invention provides a method according to any one of the 10th to 13th aspects, wherein the polysilicon is doped with phosphorus.

[0060] In a 19th aspect, the present invention provides a method according to any one of the 10th to 13th aspects, in which only a part of the polysilicon is removed and the resulting polysilicon surface has a roughness (Ra) of about 1 nm or less when determined by an atomic force microscope (AFM).

[0061] In a 20th aspect, the present invention provides a kit comprising one or more of choline hydroxide, water, an oxidizing agent, a surfactant, and an amine in two or more containers.

[0062] In a 21st aspect, the present invention provides a kit according to the 20th aspect, in which the oxidizing agent is selected from H5IO6, HIO4, or a mixture thereof, and the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0063] Although several exemplary embodiments of the present disclosure have been described as above, those skilled in the art will readily understand that still other embodiments can be made and used within the scope of the appended claims. Many of the advantages of the present disclosure to which this document is directed have been described in the foregoing description. However, it will be understood that the present disclosure is merely illustrative in many respects. Of course, the scope of the present disclosure is expressed in the language of the appended claims.

Claims

1. a. choline hydroxide, b. water, c. an oxidizing agent, and d. optionally a surfactant A composition comprising.

2. The composition according to claim 1, wherein the oxidizing agent is selected from iodine-containing oxidizing agents, permanganic acid and persulfuric acid.

3. The iodine-containing oxidizing agent is H 5 IO 6 、HIO 4 、 or a mixture thereof, and the composition according to claim 2.

4. The composition according to claim 1, wherein a surfactant is present and it is a non-ionic surfactant.

5. The composition according to claim 1, wherein a surfactant is present and it is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

6. The oxidizing agent is H 5 IO 6 , HIO 4 , or a mixture thereof, and a surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, the composition according to claim 1.

7. The composition according to claim 1, further comprising one or more amines.

8. The composition according to claim 7, wherein the amine is selected from diethylenetriamine, triethylenetetramine, tetramethylenepentaamine, piperazine, and piperidine.

9. The composition according to claim 1, comprising about 2 to about 2.4 weight percent choline hydroxide, about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent periodic acid, based on the total weight of the composition.

10. A method for etching polysilicon on a microelectronic device having a silicon nitride and polysilicon surface, the method comprising contacting the device with a. choline hydroxide, b. water, c. an oxidizing agent, and d. optionally a surfactant A composition comprising under conditions effective to etch the polysilicon.

11. The oxidizing agent is H 5 IO 6 , HIO 4 , or a mixture thereof, and a surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, the method according to claim 10.

12. The method according to claim 10, wherein the composition comprises about 2 to about 2.4 weight percent choline hydroxide, about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent periodic acid.

13. The method according to claim 10, wherein the composition further comprises one or more amines selected from diethylenetriamine and triethylenetetramine.

14. The method according to claim 10, which is carried out at a temperature of less than about 30°C.

15. The method according to claim 10, which is carried out at a temperature of greater than about 30°C to about 90°C.

16. The method according to claim 10, wherein the microelectronic device further comprises a silicon oxide surface, and the etching selectivity of polysilicon with respect to silicon nitride and silicon oxide is greater than about 1000:

1.

17. The method according to claim 10, wherein the polysilicon is doped with phosphorus.

18. The method according to claim 10, wherein only a part of the polysilicon is removed, and the resulting polysilicon surface has a roughness (Ra) of about 1 nm or less as determined by an atomic force microscope (AFM).

19. A kit comprising one or more of choline hydroxide, water, an oxidizing agent, a surfactant, and an amine in two or more containers.

20. The oxidizing agent is H 5 IO 6 , HIO 4 , or a mixture thereof, and the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether. The kit according to claim 19.

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