Stencil mask and its use in lithographic production

Abstract

The present disclosure relates to a stencil mask, a method for manufacturing a stencil mask, and the use of a stencil mask in nanoscale device nanofabrication, which includes imprinting a deposition pattern for a nanoscale device onto a substrate. One embodiment is a stencil mask for manufacturing a nanoscale device on a substrate, the stencil mask including a film having an upper surface and a bottom surface and having a thickness of at least 500 nm therebetween, apertures of a predefined pattern extending through the film, each aperture having a width and a length on the upper surface of the film, at least the width and / or the length of one of the apertures being less than 100 nm, each aperture being defined by an inner sidewall extending between the upper surface and the bottom surface of the film, and a set of separation nanostructures on the upper surface of the film for separating the upper surface of the film from the upper surface of the substrate.

Description

Technical Field

[0001] The present disclosure relates to stencil masks, methods for manufacturing stencil masks, and the use of stencil masks in nanoscale device nanofabrication, which includes imprinting a deposition pattern for a nanoscale device onto a substrate.

Background Art

[0002] Background The fields of research in nanotechnology and nanofabrication are very important in the development of quantum computing, leading to the realization and performance improvement of today's quantum bit (qubit) prototypes. Past leaps in the fabrication of solid qubits have been brought about by the advancement of nanofabrication tools. This has enabled the implementation of cleaner, faster, and more accurate nanofabrication processes, improving the overall characteristics of the qubits.

[0003] Typically, the fabrication of qubit platforms used in solid-state quantum computing requires extreme environments. For this reason, ultra-high vacuum systems with precisely controlled pressure and temperature are used for material deposition and qubit fabrication. For example, semiconductor growth is usually carried out at temperatures of several hundred degrees Celsius, while metal deposition ranges from cryogenic temperatures to several hundred degrees Celsius.

[0004] Stencil lithography is one of the technologies used for the selective fabrication of nanoscale electronic and quantum devices. One of its advantages compared to conventional nanofabrication technologies is that it is a technology that does not require an organic polymer resist, which enables the fabrication of cleaner devices. General device nanofabrication technologies mean coating the device host substrate with a layer of organic resist, which is usually exposed to electrons or photons in order to define the device design before material deposition. Subsequently, the remaining resist usually needs to be removed by wet chemical treatment, and there is a risk of leaving unwanted contaminants on the surface of the substrate. Stencil mask lithography can directly deposit the desired material in the pattern that defines the device. This fabrication technology ensures the cleanliness of the substrate throughout the fabrication process.

[0005] Previously disclosed stencil lithography masks include a thin film in the range of one-tenth of nm in thickness on which an imprinted pattern of apertures is defined. By placing it on a substrate and depositing a deposition material thereon, only the material passing through the pattern of the apertures is deposited on the substrate, generating a material pattern of one or more devices under the mask. However, several disadvantages occur by using this method. The film is usually very fragile, single-use, and it has been shown that due to the limited thickness, the deposition height is relatively widely dispersed. SUMMARY OF THE INVENTION MEANS FOR SOLVING THE PROBLEM

[0006] Overview Therefore, as presented herein, it is necessary to address the problems of stencil lithography masks known in the prior art.

[0007] Solutions to past limitations can be achieved by a stencil mask, e.g., a stencil mask for manufacturing at least one nanostructure device on a substrate, the stencil mask comprising the following - A film having an upper surface and a bottom surface, preferably with a thickness between the upper surface and the bottom surface of at least 200 nm, preferably at least 500 nm, more preferably at least 1 μm, or even 1.5 or 2 μm - An aperture of a predefined pattern extending through the film, each aperture having a certain width and a certain length on the upper surface of the film, preferably at least the width and / or length of one of said apertures being less than 500 nm, preferably less than 200 nm, most preferably less than 100 nm, perhaps even less than 50 nm, and each aperture being defined by an inner sidewall extending between the upper surface and the bottom surface of the film

[0008] Preferably, the mask also includes on the upper surface of the film one or more structural elements, e.g., a set of separation nanostructures, for separating the upper surface of the film from the upper surface of the substrate

[0009] Typically, the stencil mask includes a film of Si or another material compatible with the nanofabrication process. The main advantage of the stencil mask of the present disclosure is the film thickness, which can be at least one order of magnitude greater than that of the film of a conventional stencil mask disclosed in the prior art, and yet can be used to accurately define apertures extending through the film. Thus, the achievable aspect ratio of the aperture to the film is very high. For example, it is the aspect ratio defined as the minimum dimension (e.g., width or length) of the aperture in the plane of the film relative to the film thickness. Therefore, the aspect ratio of the aperture relative to the mask thickness can be obtained by dividing the mask thickness by the aperture width. The achievable aspect ratio of the stencil mask of the present disclosure is at least 2, preferably at least 5, more preferably at least 10, even more preferably at least 50, most preferably at least 100, possibly up to 200, or even higher than that.

[0010] The present disclosure further relates to a method of manufacturing a stencil mask. Preferably, the stencil mask disclosed herein, also known as a hard stencil mask, can be fabricated via a cleaning-oxidation-removal-etching (CORE) nanofabrication process. The process enables etching of an aperture pattern in a Si or SiN substrate / film with a thickness > 1 μm. The CORE nanofabrication process is capable of etching apertures with a width of less than 10 nm, which means that the ultra-high aspect ratio of the aperture width of the stencil mask of the present disclosure relative to the film thickness is at least 5, preferably at least 10, more preferably at least 50, most preferably at least 100, possibly up to 200, or higher than that. The ability to define ultra-high aspect ratio apertures makes the CORE process suitable for fabricating hard stencil masks for lithography purposes.

[0011] The inner sidewalls of the aperture, e.g., the inner sidewalls defined via a CORE nanofabrication process, can have a line edge roughness of less than 10%, preferably less than 5% or even less than 2% with respect to the (smallest) width of the aperture. That is, they are substantially or completely smooth and scallop-free. Additionally, the inner sidewalls of the aperture pattern can be fabricated to be parallel to each other and perpendicular to the plane of the mask, not parallel to each other and not parallel to the plane of the mask, and not parallel to each other.

[0012] The present disclosure further relates to a method for manufacturing at least one nanoscale device pattern on a substrate using a stencil mask of the present disclosure. In a preferred embodiment, a deposition material is deposited on a hard stencil mask to define a pattern on a substrate disposed beneath the mask. Due to the high aspect ratio of the aperture, only the material deposited at an angle that exactly matches the depthwise extension of at least one wall of the aperture is deposited on the surface of the underlying substrate. The present disclosure further relates to one or more nanoscale devices manufactured according to the method, e.g., qubits, semiconductor devices, superconducting devices, semiconductor-superconducting devices, combinations of any of these, or other quantum and non-quantum devices for nanoelectronic experiments.

[0013] Thus, it is possible to overcome the brittleness, angular resolution, and reusability problems of conventional stencil masks using the stencil masks disclosed herein.

[0014] The present disclosure will be described in more detail below with reference to the accompanying drawings:

Brief Description of the Drawings

[0015]

Figure 1

Figure 2

Figure 3

DETAILED DESCRIPTION OF THE INVENTION

[0016] Detailed Description Hard Stencil Mask In a preferred embodiment, the stencil mask of the present disclosure for manufacturing a nanoscale device includes the following: a film having an upper surface and a bottom surface, the thickness between them being at least 200 nm, preferably at least 500 nm, more preferably at least 1 μm, or even 1.5 or 2 μm; apertures of a predefined pattern extending through the film, each aperture having a certain width and a certain length on the upper surface (and also on the bottom surface) of the film, and at least the (minimum) width and / or (minimum) length of one of the apertures being less than 200 nm, preferably less than 100 nm, more preferably less than 50 nm. Each aperture is defined by an inner sidewall extending between the upper surface and the bottom surface of the film, and a set of separation nanostructures on the upper surface of the film for separating the upper surface of the film from the upper surface of the substrate.

[0017] By arranging the separation nanostructures along the surface of the hard stencil mask, the pressure, weight, and force strongly promoted on the substrate can be evenly distributed.

[0018] In a preferred embodiment of the present disclosure, the material composition of the mask is selected from the group consisting of Si, SiN, SiGe, and Ge. The cross-sectional shape of the aperture on the upper surface and / or the bottom surface of the film may be any shape, such as circular, annular, elliptical, square, rectangular, triangular, pentagonal, etc. The width of the aperture may be between 10 nm and 1 μm, and possibly up to 10 μm. The length of the aperture may be 10 nm, or at least 500 nm, possibly up to 1 μm, or up to 10 μm or even 500 μm.

[0019] As used herein, the aperture angle is defined as the angle formed between the extension of the inner sidewall of the aperture and the plane formed by the upper surface of the film. At least one of the inner sidewalls of at least one of the apertures can define an angle between 10 and 170 degrees, for example 90 degrees, with the upper surface of the film. At least two of the inner walls of at least one of the apertures may be parallel to each other. Similarly, at least two of the inner walls of at least one of the apertures may not be parallel to each other. At least one of the apertures may be substantially cylindrical. At least one of the apertures may be tapered. At least one of the apertures can define an extension in the depth direction through the film, and this extension through the film is perpendicular to the upper surface of the film (illustrated in FIGS. 1 and 2). At least one of the apertures can define an extension in the depth direction through the film, and this extension through the film forms an angle between 10 and 90 degrees with the upper surface of the film.

[0020] A major advantage of the stencil mask of the present disclosure is that it can smooth at least one (or all) of the inner sidewalls of at least one (or all) of the apertures. For example, the surface roughness of at least one of the inner sidewalls of the aperture may be less than 10 nm, preferably less than 5 nm, and most preferably less than 1 nm. Here, the surface roughness is understood to be either the maximum extension or the average extension of the surface variation. Another way to characterize the surface roughness is the line edge roughness. The stencil mask of the present disclosure can be realized with at least one pair of inner sidewalls of less than 20%, preferably less than 10%, most preferably less than 5%, or even less than 2% or 1%. This can also be realized for apertures with a (minimum) width of less than 100 nm. That is, at least one of the inner sidewalls of the aperture can be substantially scallop-free. Scallop roughness is a known effect in the art and can occur during known dry etching processes, where the inner sidewalls of a defined aperture generate nanometer-sized inner protrusions towards the inside of the substrate inside the aperture. The stencil mask of the present disclosure can realize apertures with substantially scallop-free inner sidewalls for even narrower ranges of widths than previously described.

[0021] In one embodiment, at least one of at least one of the inner sidewalls of the aperture is not parallel to each other. For example, they are sidewalls with positive or negative tapers, and the distance between the sidewalls at the starting point of the aperture is longer or shorter, respectively, than the distance between the sidewalls at the ending point of the aperture. Thus, the size of the aperture on the upper surface of the film may be different from the size of the corresponding aperture on the bottom surface of the film. Such sidewalls can be achieved by changing the fabrication parameters accordingly during the CORE process.

[0022] The set of separated nanostructures can include a set of nanopillars, preferably nanopillars uniformly arranged on the upper surface of the stencil mask film. The separated nanostructures are preferably separated by at least 1 μm from any aperture of the film. The material composition of the separated nanostructures can be selected from the group of Si, SiN, SiGe, and Ge, or other materials compatible with ultra-high vacuum, high vacuum, or vacuum. Further, the separated nanostructures can be configured to separate the upper surface of the film from the upper surface of the substrate by a fixed distance. This distance can range from 0 nm where the upper surface of the stencil mask film effectively contacts the substrate, to one-tenth of a μm or even up to several hundred μm. Stencil mask fabrication

[0023] A preferred nanofabrication method of the stencil mask disclosed herein is the cleaning-oxidation-removal-etching (CORE) nanofabrication process. The process enables nanofabrication of fine structures with an ultra-high aspect ratio of up to 200 in a semiconductor substrate.

[0024] The fabrication process of one embodiment of the stencil lithography mask device disclosed herein is shown in FIG. 1. A first blank Si mask 100 without apertures, preferably having a thickness of 2 μm, is prepared. The following detailed fabrication steps are not limited to a specific thickness of the Si mask, and the thickness may range from 100 nm to several μm.

[0025] The silicon mask has a set of nanopillars 101 uniformly distributed around the surface. Such nanopillars may be composed of SiO x , or other mechanically resistant materials, such as Si, SiGe, SiN, or Ge. The nanopillars can have a height ranging from 0 nm to several μm relative to the level 103 of the height of the mask where they are located. The nanopillars are located on the proximal surface 103 of the mask in the substrate, and the surface on the opposite side of the mask is the distal surface 104 of the mask.

[0026] In stencil mask nanofabrication, the CORE process can generate apertures with smooth sidewalls in the Si film with any width. This is particularly relevant when defining small-width apertures, e.g., <50 nm aperture patterns, and smooth-sidewall apertures with small or no linewidth roughness can be fabricated along the entire depth of the film constituting the mask. The strength of the CORE nanofabrication process depends on the ability to fabricate apertures with extremely thin, smooth, and scallop-free sidewalls of <50 nm in a thick substrate, e.g., a substrate 2 μm or thicker.

[0027] In the first fabrication step of the stencil mask shown in Figure 1B, two layers composed of 10 nm of Cr 111 and 10 nm of Si 112 are deposited on the proximal surface of the substrate of the Si mask 110.

[0028] In the second fabrication step shown in Figure 1C, an additional layer of zep520 organic resist 121 is spin-deposited on the previously deposited layer 120. Standard electron lithography exposure is performed on the resist, and only the areas on the resist that follow a pre-defined pattern are exposed. The exposed resist is developed, and a resist mask with the imprinted exposed pattern 122 remains on the underlying Si layer.

[0029] In the next fabrication step shown in Figure 1D, the deposited 10 nm layer of Si is etched to expose the pattern 131 of the underlying deposited Cr layer. Then, in Figure 1E, as shown in the stencil mask 140, the top layer of the zep520 organic resist is removed and the Cr is etched, leaving the exposed pattern 141 of the underlying Si that constitutes the original mask.

[0030] In the final fabrication step, the CORE process is performed on the stencil mask 150 using parameters equivalent to those disclosed in the prior art. As a result, an aperture pattern 151 is created on the Si mask. The sidewalls of the aperture are smooth compared to other dry etching techniques. That is, this means that the roughness and scallop size normally caused by other similar dry etching processes are less than 5 nm and there is no scalloping effect. Finally, the Cr remaining on the surface of the Si mask is removed, leaving a clean Si stencil mask with the aperture pattern.

[0031] The configuration of the sidewalls of each aperture can be designed by adjusting the fabrication parameters of the CORE process. In one embodiment, the pair of sidewalls defining the aperture are parallel to each other. This implies that the aperture traverses the thickness of the Si mask perpendicular to the plane of the surface of the mask.

[0032] The characteristics of the CORE process compared to other fabrication methods are that in a film with a thickness of at least >1 μm, it can generate a pattern of thin apertures with a very high aspect ratio as small as 10 nm while having smooth sidewalls. The typical film thickness disclosed in prior art studies usually implies a thickness much smaller than 1 μm, but those skilled in the art will understand that the film definition in the embodiments disclosed herein is used because it is similar, but does not imply a thickness <1 μm. Method for manufacturing a device

[0033] The present disclosure further relates to a method for manufacturing at least one nanoscale device pattern on a substrate. In one embodiment, the method includes the steps of providing at least one of the stencil masks of the present disclosure, attaching and aligning the upper surface of the film of the stencil mask to the upper surface of the substrate with respect to a deposition material source, depositing at least a first type of deposition material on the stencil mask, whereby at least a first nanoscale device pattern is generated on the upper surface of the substrate according to at least a first portion of a predefined pattern of apertures in the film. Then, if desired, at least a second type of deposition material is deposited on the stencil mask, whereby at least a second nanoscale device pattern is generated on the upper surface of the substrate according to at least a second portion of a predefined pattern of apertures in the film. The first and second types of deposition materials may be the same material or different materials. This deposition process can be repeated for different or the same materials until the desired nanoscale device pattern is obtained. That is, the deposition step can be repeated more than once for one stencil mask.

[0034] The disclosed method of the manufacturing method enables the creation of a multi-stack layer of materials without the need to break the ultra-high vacuum during the process. For example, complementary steps, such as oxidation, annealing, metallization, or ion implantation, can be performed between the material deposition steps. Thus, it is possible to create a complex stack of materials using a single stencil mask and varying the deposition angle of the pattern made according to this.

[0035] Another advantage of the stencil mask of the present disclosure is that the stencil mask can be reversibly attached to the substrate, and the deposited material can be removed from the stencil mask, so that the stencil mask can be reused. The deposited material on the mask can be removed, for example, via selective wet etching. The deposition of the material can be performed in a series of steps ordered such that the removal of the remaining material can be performed by an etching technique. The deposition of the material can be performed at a deposition rate, temperature, and vacuum chamber pressure such that the removal of the remaining material is performed by an etching or thermal annealing process.

[0036] The spatial positioning of at least one source of at least the first and / or second deposition material can be controlled to define a deposition material angle with respect to the bottom surface of the film. In this sense, the deposition material angle can at least partially define at least one nanostructure device pattern deposited through the pattern of apertures in the film.

[0037] The angular dispersion of the deposited material on the upper surface of the substrate can be determined by the aspect ratio of the thickness of the film of the stencil mask and the width of the aperture in the pattern, and the separation distance between the upper surface of the film and the upper surface of the substrate. Additionally, the angular dispersion of the deposited material can be determined by the height of the nanopillars located on the proximal surface of the substrate, and an increase in height induces a higher angular dispersion of the deposited material. At a nanopillar height equal to 0 nm, the angular dispersion is suppressed and a defined pattern is imprinted directly on the substrate surface.

[0038] In another preferred embodiment of the fabricated stencil mask 201 shown in FIG. 2A, due to the high aspect ratio of the fabricated aperture 202, if the vapor deposition material source is not aligned with the aperture, the deposited material can be blocked by the sidewalls of the aperture. FIG. 2B shows a vapor deposition example 210 where the source, mask, and substrate are aligned. The vapor deposition source 211 deposits at least material on the mask with a certain angular dispersion defined by the maximum angle of the vapor deposition material 212 allowed to pass through the opening of the stencil mask 213. The deposit 216 is created on the underlying substrate 214, and the substrate 214 is separated by a distance by the nanopillars 215. The SEM image of FIG. 2B shows the deposits 217, 218, and 219 of the material using the stencil mask by the mask shown in FIG. 2A.

[0039] FIG. 2C shows a vapor deposition example 220 where the source, mask, and substrate are not aligned. The vapor deposition source 221 deposits at least material on the mask with a certain angular dispersion defined by the maximum angle of the vapor deposition material 212 allowed to pass through the opening of the stencil mask 223. In this case, due to the high aspect ratio of the aperture and the relative directionality of the vapor deposition source with respect to the stencil mask, the material deposition at this angle is blocked by the stencil mask 223, and no material reaches the substrate 224. This example uses an embodiment of the stencil mask with the same nanopillar separation 225 as the case shown in FIG. 2B. The SEM image of FIG. 2C shows the deposition of materials 226 and 227 by using the stencil mask. Only the apertures on the mask that generated the deposits 226 and 227 were aligned with the source of the material vapor deposition.

[0040] In contrast to the case shown in FIG. 2B, in FIG. 2C, the aperture in the central part of the design is not aligned with the mask, and the misalignment of the mask with respect to the vapor deposition source alone results in effective blocking of the material. A second source of material, including the same or different elements, can create additional deposits without the need for mask exchange by vapor depositing in an aligned configuration of the mask.

[0041] In yet another preferred embodiment, the stencil mask may be a substantially chemically stable wet etching agent that is reactive with the material vapor-deposited from the source. As the material deposits on the mask, clogging may occur in the thinnest apertures, and any further material deposition through the mask may be stopped. By immersing the mask in the wet etching solution, the metal can be removed and the mask can be used for additional deposition.

[0042] Typical material deposits using the disclosed stencil mask may contain an amount of deposited material insufficient to clog the apertures.

[0043] A series of typical material depositions using the disclosed stencil mask can be performed at different deposition rates depending on the properties of the material being deposited, the desired crystal quality of the deposited layer of material, or the thickness of the apertures in the stencil mask.

[0044] A series of typical material depositions using the disclosed stencil mask can be performed at different temperatures depending on the properties of the material being deposited, the desired crystal quality of the deposited layer of material, or the thickness of the apertures in the stencil mask.

[0045] A series of different material depositions can be deposited using the same stencil mask, with each deposition being performed with the vapor deposition source aligned in a different direction relative to the mask and the substrate, thereby enabling different patterns to be imprinted within the same system of stencil mask and substrate.

[0046] The pattern to be imprinted on the surface of the substrate can be designed based on and taking into account the variable factors that affect these depositions. A series of deposition steps can be performed, each step at a different temperature, pressure, mask orientation, and other parameters, until the stack of all desired materials is fabricated.

[0047] Figure 3 shows a method 300 for manufacturing at least one nanostructure device on a substrate. The method includes steps of preparing a stencil mask (step 301); mounting and aligning the stencil mask on the upper surface of the substrate with reference to a deposition material source (step 302); depositing at least a first type of deposition material on the stencil mask, so that at least a first nanostructure device pattern is formed on the upper surface of the substrate according to at least a first portion of a predefined pattern of apertures in the film (step 303); optionally depositing at least a second type of deposition material on the stencil mask, so that at least a second nanostructure device pattern is formed on the upper surface of the substrate according to at least a second portion of the predefined pattern of apertures in the film (step 304); and removing the mask from the substrate, so that the nanostructure device pattern(s) is / are exposed on the upper surface of the substrate.

[0048] Item 1. A stencil mask for manufacturing at least one nanostructure device on a substrate, comprising: a. a film having an upper surface and a bottom surface, the thickness between them being at least 200 nm, preferably at least 500 nm, more preferably at least 1 μm, or even 1.5 or 2 μm; b. apertures of a predefined pattern extending through the film, each aperture having a width and a length on the upper surface of the film, at least the width and / or the length of one of the apertures being less than 100 nm, and each aperture being defined by an inner sidewall extending between the upper surface and the bottom surface of the film; and c. a set of separation nanostructures on the upper surface of the film for separating the upper surface of the film from the upper surface of the substrate. The stencil mask as described in item 1. 2. The stencil mask according to item 1, wherein the material composition of the mask is selected from the group consisting of Si, SiN, SiGe, and Ge. 3. The aspect ratio of the film thickness to the width of the fine structure of the pattern is at least 2, preferably at least 5, more preferably at least 10, most preferably at least 50, and probably up to 200, the stencil mask according to any one of the preceding items. 4. The width of the aperture is at least 10 nm and probably up to 10 μm, the stencil mask according to any one of the preceding items. 5. The length of the aperture is at least 10 nm or at least 500 nm and probably up to 500 μm, the stencil mask according to any one of the preceding items. 6. The aperture in the film is defined by a cleaning-oxidation-removal-etching nanofabrication process, the stencil mask according to any one of the preceding items. 7. At least one of the inner sidewalls of at least one of the apertures defines an angle between 10 and 170 degrees with the upper surface of the film, the stencil mask according to any one of the preceding items. 8. At least two of the inner sidewalls of at least one of the apertures are parallel to each other, the stencil mask according to any one of the preceding items. 9. At least two of the inner sidewalls of at least one of the apertures are not parallel to each other, the stencil mask according to any one of the preceding items. 10. At least one of the apertures is substantially cylindrical, the stencil mask according to any one of the preceding items. 11. At least one of the apertures is tapered, the stencil mask according to any one of the preceding items. 12. At least one of the apertures defines an extension in the depth direction through the film, and this extension through the film is perpendicular to the upper surface of the film, the stencil mask according to any one of the preceding items. 13. At least one of the apertures defines an extension in the depth direction through the film, and this extension through the film forms an angle between 10 and 90 with the upper surface of the film, the stencil mask according to any one of the preceding items. 14. The stencil mask according to any one of the preceding items, wherein at least one of the inner side walls of the aperture is smooth. 15. The stencil mask according to any one of the preceding items, wherein the surface roughness of at least one of the inner side walls of the aperture is less than 5 nm. 16. The stencil mask according to any one of the preceding items, wherein at least one of the inner side walls of the aperture is substantially scallop-free.

[0049] 17. The stencil mask according to any one of the preceding items, wherein the line edge roughness of at least one pair of inner side walls of at least one of the apertures is less than 20%, preferably less than 10%, and most preferably less than 5%. 18. The stencil mask according to any one of the preceding items, wherein the line edge roughness of at least one pair of inner side walls of at least one of the apertures having a width of less than 100 nm is less than 20%, preferably less than 10%, and most preferably less than 5%. 19. The stencil mask according to any one of the preceding items, wherein the separation nanostructures include a set of nanopillars, preferably a set of nanopillars uniformly arranged on the upper surface of the film. 20. The stencil mask according to any one of the preceding items, wherein the separation nanostructures are separated from any aperture of the film by at least 1 μm. 21. The stencil mask according to any one of the preceding items, wherein the material composition of the separation nanostructures is selected from the group consisting of Si, SiN, SiGe, and Ge. 22. The stencil mask according to any one of the preceding items, wherein the separation nanostructures are configured to separate the surface of the film by a fixed distance from the surface of the substrate. 23. A method for manufacturing at least one nanoscale device pattern on a substrate, comprising: a. preparing a stencil mask; b. attaching and aligning the stencil mask to the upper surface of the substrate with respect to a deposition material source. c. Depositing at least a first type of deposition material onto the stencil mask, whereby at least a first nanoscale device pattern is generated on the upper surface of the substrate according to at least a first portion of a predefined pattern of apertures in the membrane, d. Optionally, depositing at least a second type of deposition material onto the stencil mask, whereby at least a second nanoscale device pattern is generated on the upper surface of the substrate according to at least a second portion of a predefined pattern of apertures in the membrane, and e. Removing the mask from the substrate, whereby the nanoscale device pattern(s) is / are exposed on the upper surface of the substrate A method comprising. 24. The method according to item 23, wherein the stencil mask is fabricated via a clean-oxidize-remove-etch (CORE) nanofabrication process. 25. The method according to any one of items 23 to 24, further comprising the step of removing the deposited deposition material from the stencil mask, whereby the stencil mask becomes reusable. 26. The method according to any one of items 23 to 25, wherein the spatial positioning of at least one source of at least the first and / or second deposition material is controlled to define a deposition material angle with respect to the bottom surface of the membrane. 27. The method according to item 26, wherein the deposition material angle at least partially defines at least one nanoscale device pattern deposited through the pattern of apertures in the membrane. 28. The method according to any one of items 23 to 27, wherein the angular dispersion of the deposition material deposited on the upper surface of the substrate is determined by the aspect ratio of the thickness of the membrane of the stencil mask and the width of the apertures in the pattern, and the separation distance between the upper surface of the membrane and the upper surface of the substrate. 29. The method according to any one of items 23 to 28, wherein the mask is reversibly attached to the substrate. 30. The method according to any one of items 25 to 29, wherein the deposition material deposited on the mask is removed via selective wet etching. 31. The method according to any one of items 23 to 30, wherein the steaming step is repeated more than once for one stencil mask. 32. The method according to any one of items 23 to 31, wherein the stencil mask is the stencil mask according to any one of items 1 to 22.

Claims

1. A stencil mask for manufacturing at least one nanostructure device on a substrate, - a film having an upper surface and a bottom surface, the thickness between them being at least 500 nm, - apertures of a predefined pattern extending through the film, each aperture having a width and a length on the upper surface of the film, at least one of the width and / or the length of one of the apertures being less than 100 nm, and each aperture being defined by an inner sidewall extending between the upper surface and the bottom surface of the film, and - a set of separation nanostructures on the upper surface of the film for separating the upper surface of the film from the upper surface of the substrate The stencil mask comprising.

2. The stencil mask according to claim 1, wherein the material composition of the mask is selected from the group of Si, SiN, SiGe, and Ge.

3. The stencil mask according to any one of the preceding claims, wherein the aspect ratio of the thickness of the film to at least one of the widths of the apertures is at least 5.

4. The stencil mask according to any one of the preceding claims, wherein the thickness of the film is at least 500 nm, preferably at least 1 μm, more preferably at least 2 μm, or even more preferably at least 5 μm.

5. The stencil mask according to any one of the preceding claims, wherein the width of the aperture is at least 10 nm and possibly up to 10 μm.

6. The stencil mask according to any one of the preceding claims, wherein the length of the aperture is at least 10 nm or at least 500 nm and possibly up to 500 μm.

7. The stencil mask according to any one of the preceding claims, wherein the apertures in the film are defined by a cleaning-oxidation-removal-etching nanofabrication process.

8. The stencil mask according to any one of the preceding claims, wherein at least one of the inner sidewalls of at least one of the apertures defines an angle between 10 and 170 degrees with the upper surface of the film.

9. The stencil mask according to any one of the preceding claims, wherein at least two of the inner sidewalls of at least one of the apertures are parallel to each other.

10. The stencil mask according to any of the preceding claims, wherein at least one of the inner side walls of the aperture is substantially smooth and scallop-free. **Claim 11** The stencil mask according to any of the preceding claims, wherein the surface roughness of at least one of the inner side walls of the aperture is less than 5 nm. **Claim 12** The stencil mask according to any of the preceding claims, wherein the set of separation nanostructures is configured to separate the surface of the film by a fixed distance from the surface of the substrate. **Claim 13** The stencil mask according to any of the preceding claims, wherein the set of separation nanostructures includes a set of nanopillars, preferably a set of nanopillars uniformly arranged on the upper surface of the film. **Claim 14** The stencil mask according to any of the preceding claims, wherein the set of separation nanostructures is separated from any aperture of the film by at least 1 μm. **Claim 15** The material composition of the separation nanostructure is selected from the group consisting of Si, SiO ｘ , SiN, SiGe, and Ge, the stencil mask according to any one of the preceding claims. **Claim 16** A method for manufacturing at least one nanoscale device pattern on a substrate, comprising: a. preparing a stencil mask; b. attaching and aligning the mask on the upper surface of the substrate with respect to a deposition material source such that the separation nanostructures separate the upper surface of the mask film from the upper surface of the substrate; c. depositing at least a first type of deposition material on the stencil mask, whereby at least a first nanoscale device pattern is formed on the upper surface of the substrate according to at least a first portion of a predefined pattern of apertures in the film; d. optionally, depositing at least a second type of deposition material on the stencil mask, whereby at least a second nanoscale device pattern is formed on the upper surface of the substrate according to at least a second portion of a predefined pattern of apertures in the film; and e. removing the mask from the substrate, whereby the nanoscale device pattern(s) is / are exposed on the upper surface of the substrate. A method comprising the above steps. **Claim 17** The method according to claim 16, further comprising removing the deposited deposition material from the stencil mask, whereby the stencil mask can be reused. **Claim 18** The method according to any one of claims 16 to 17, wherein the spatial positioning of at least one source of at least the first and / or second deposition material is controlled to define a deposition material angle with respect to the bottom surface of the film.

19. The method according to any one of claims 16 to 18, wherein the angular dispersion of the deposited material on the upper surface of the substrate is determined by the aspect ratio of the thickness of the film of the stencil mask and the width of the aperture in the pattern, and the separation distance between the upper surface of the film and the upper surface of the substrate.

20. The method according to any one of claims 16 to 19, wherein the mask is reversibly attached to the substrate.

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