Method for manufacturing a semiconductor device

Abstract

The present invention relates to a method for manufacturing a semiconductor device. According to one embodiment, a method for manufacturing a semiconductor device may include a gap-fill process for forming a gap-fill oxide film by filling a gap-fill oxide inside a trench formed on a substrate. In one embodiment, the gap-fill process may include a high-pressure oxidation (HPO) process. According to this embodiment, a semiconductor device having improved electrical characteristics can be manufactured.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device.

Background Art

[0002] When manufacturing a semiconductor device, an element isolation technique is used to electrically isolate individual elements such as transistors and capacitors from each other. In recent years, in the field of manufacturing high-integration memory devices, the STI (Shallow Trench Isolation) technique has been applied, in which trenches are formed in a substrate, and a gap-fill oxide film is embedded in the trenches to form element isolation regions.

[0003] FIG. 1 is a cross-sectional view showing an element isolation region of a semiconductor device according to the prior art.

[0004] As shown in the figure, a semiconductor device 1 according to the prior art includes a substrate 11 and an element isolation region formed in the substrate 11. According to the prior art, in the process of forming the element isolation region, a liner nitride film 13 is formed inside the trench 12, and a liner oxide film 14 is formed on the liner nitride film 13. After the liner oxide film 14 is formed, a gap-fill oxide is gap-filled inside the trench 12 to form a gap-fill oxide film 15, and planarization is performed by a chemical mechanical polishing (CMP) process, thereby completing the element isolation region.

[0005] When the width of the trench in which the element isolation region is formed is 30 nm or less, due to the high aspect ratio and the necessity of a low-temperature process, in the case of plasma and thermochemical vapor deposition, limitations in gap filling occur, and it is essential to develop a gap filling process using a substance with flow characteristics. In a typical method using flow characteristics, there is a coating method using SOG (Spin-On-Glass). However, in the case of the coating method using SOG, it is difficult to ensure the subsequent heat treatment conditions accompanied by densification and stabilization of the gap-fill oxide film, and due to voids (V1, V2) in the gap-fill oxide film and the breakage phenomenon of the gap-fill oxide film, deterioration of the electrical characteristics of the semiconductor device may occur.

[0006] Due to the above-described problems, a gap-fill oxide film can be formed using a chemical vapor deposition (CVD) method rather than a coating method. However, according to the CVD method, during subsequent heat treatment, due to deterioration of the adhesion of the gap-fill oxide and changes due to stress, etc., a breakage phenomenon of the gap-fill oxide film and, thereby, deterioration of the electrical characteristics of the semiconductor device may occur.

Summary of the Invention

Problems to be Solved by the Invention

[0007] An object of the present specification is to provide a method for manufacturing a semiconductor device capable of reducing voids generated in a gap-fill oxide film and reducing the breakage phenomenon of the gap-fill oxide film.

[0008] An object of the present specification is to provide a method for manufacturing a semiconductor device having improved electrical characteristics as compared with the prior art.

[0009] The object of the present specification is not limited to the objects mentioned above, and other objects and advantages of the present specification not mentioned can be more clearly understood from the embodiments of the present specification described below. Also, the objects and advantages of the present specification can be realized by the components described in the claims and combinations thereof.

Means for Solving the Problem

[0010] A method for manufacturing a semiconductor device according to an embodiment may include a gap-fill step of embedding a gap-fill oxide inside a trench formed on a substrate to form a gap-fill oxide film.

[0011] In one embodiment, the gap-fill step may include a High Pressure Oxidation (HPO) step.

[0012] In one embodiment, the HPO step can be performed in a processing apparatus in which at least one of O2, O3, H2O, D2O, N2O, CO, and CO2 is supplied.

[0013] In one embodiment, when the HPO step is performed, the internal pressure of the processing apparatus can be maintained at 2 to 50 atmospheres.

[0014] In one embodiment, when the HPO step is performed, the internal temperature of the processing apparatus can be maintained at 200 to 1000 °C.

[0015] In one embodiment, after a Flowable Chemical Vapor Deposition (FCVD) step using the gap-fill oxide is performed, the HPO step is performed, whereby the gap-fill oxide film may be formed.

[0016] A method for manufacturing a semiconductor device according to another embodiment may include a step of etching a substrate to form a trench, a step of forming a liner layer on an inner surface of the trench, a step of forming a gap-fill oxide film for gap-filling the inside of the trench on the liner layer, and a step of planarizing the gap-fill oxide film.

[0017] In other embodiments, the gap-fill oxide film may be formed by a gap-fill process including an HPO (High Pressure Oxidation) process.

[0018] In other embodiments, the HPO process can be performed in a processing apparatus to which at least one of O2, O3, H2O, D2O, N2O, CO, and CO2 is supplied.

[0019] In other embodiments, when the HPO process is performed, the internal pressure of the processing apparatus can be maintained at 2 to 50 atmospheres.

[0020] In other embodiments, when the HPO process is performed, the internal temperature of the processing apparatus can be maintained at 200 to 1000 °C.

[0021] In other embodiments, after the FCVD (Flowable Chemical Vapor Deposition) process is performed, the gap-fill oxide film can be formed by performing the HPO process.

[0022] In other embodiments, the liner layer may have a single-layer or multi-layer structure composed of at least one component of a nitride film, an oxide film, and polysilicon.

Advantages of the Invention

[0023] According to the embodiment, in the process of generating the element isolation region of the semiconductor element, the voids generated in the gap-fill oxide film are reduced, and the density of the gap-fill oxide film is increased. Also, in the process of generating the element isolation region of the semiconductor element, the breakage phenomenon of the gap-fill oxide film can be reduced. Thereby, it becomes possible to manufacture a semiconductor element having improved electrical characteristics as compared with the prior art.

Brief Description of the Drawings

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Embodiments for Carrying Out the Invention

[0025] The above-mentioned objectives, features, and advantages will be described in detail below with reference to the accompanying drawings, so that those having ordinary knowledge in the technical field to which this specification pertains can easily implement the embodiments of this specification. In the description of this specification, when it is determined that a specific description of the known technology related to this specification obscures the gist of this specification, the detailed description will be omitted. Hereinafter, preferred embodiments of this specification will be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings indicate the same or similar components.

[0026] The embodiments of this specification include a gap-fill process for a trench formed on a substrate, and can be applied without limitation to any manufacturing method of a semiconductor device that forms a gap-fill oxide film by the gap-fill process.

[0027] Hereinafter, with reference to the accompanying drawings, the features of the present invention will be described using the STI (Shallow Trench Isolation) technology as an example, but it is obvious to those skilled in the art that the present invention is not limited thereto.

[0028] Figures 2 to 7 show the formation process of the element isolation region of a semiconductor device according to an embodiment.

[0029] First, as shown in Figure 2, a first pad oxide film 22, a pad nitride film 23, and a second pad oxide film 24 are sequentially deposited on a semiconductor substrate 21. In other embodiments, the second pad oxide film 24 may not be deposited.

[0030] The semiconductor substrate 21 may be composed of at least one component of Si and SiGe. In one embodiment, the semiconductor substrate 21 may be a single layer composed of Si or a single layer composed of SiGe. In other embodiments, the semiconductor substrate 21 may have a multilayer structure in which a first layer composed of Si and a second layer composed of SiGe are alternately laminated.

[0031] Next, through the patterning process and etching process using the element isolation mask, a part of the first pad oxide film 22, the pad nitride film 23, and the second pad oxide film 24 is etched, thereby forming a trench 200 that becomes the element isolation region of the semiconductor substrate 21.

[0032] Next, a liner layer may be formed on the semiconductor element 2. For example, as shown in FIGS. 3 and 4, a liner nitride film 25 is first laminated on the semiconductor element 2, and the liner nitride film 25 is oxidized to form a liner oxide film 26, thereby forming a liner layer 25, 26 composed of two layers.

[0033] The liner nitride film 25 is for compensating the compressive stress caused by the gap-fill oxide embedded in the trench 200. That is, since the compressive stress applied to the semiconductor substrate 21 by the gap-fill oxide is offset by the tensile stress of the liner nitride film 25, it is possible to prevent the electrical characteristics of the semiconductor element 2 from deteriorating due to the element isolation region.

[0034] In particular, the liner nitride film 25 functions to block the diffusion of defects generated in the active region of the semiconductor element 2 into the inside of the element isolation region and improve the refresh characteristics of the cell region. In the liner nitride film 25, a silicon nitride film (Si3N4) can be used. The liner nitride film 25 can be formed by low-pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition) or plasma-enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition), but is not limited thereto.

[0035] Although not shown, before the liner nitride film 25 is formed, the surface of the trench 200 may be oxidized to form a wall oxide film on the surface of the trench 200. The wall oxide film is for rectifying defects such as lattice defects and plasma damage that may occur during the formation process of the trench 200. When the wall oxide film is formed, the liner nitride film 25 may be formed on the wall oxide film.

[0036] The liner oxide film 26 is for preventing damage to the liner nitride film 25 due to the formation of the gap-fill oxide film 27 when the gap-fill oxide is embedded inside the trench 200 to form the gap-fill oxide film 27.

[0037] FIGS. 3 and 4 show an embodiment having a multilayer structure including a liner layer 25, 26 composed of a liner nitride film 25 and a liner oxide film 26 laminated on the liner nitride film 25. However, in other embodiments, the liner layer may be composed of a liner oxide film and a liner nitride film laminated on the liner oxide film. In still other embodiments, the liner layer may be composed of a liner oxide film and a polysilicon layer laminated on the liner oxide film.

[0038] In still other embodiments, the liner layer may have a single-layer structure. For example, the liner layer may include only a polysilicon layer.

[0039] Next, as shown in FIG. 5, the gap-fill oxide film 27 is formed by embedding the gap-fill oxide inside the trench 200.

[0040] In one embodiment, the gap-fill oxide film 27 may be formed by a gap-fill process including a FCVD (Flowable Chemical Vapor Deposition) process and a high-pressure oxidation (High Pressure Oxidation, HPO) process performed after the FCVD process.

[0041] In one embodiment, an FCVD process may be performed first to form the gap-fill oxide film 27. According to the FCVD process, a film that is flowable like a liquid or a gel and contains an Si component can be deposited inside the trench 200 as the gap-fill oxide. After the gap-fill oxide is embedded inside the trench 200, curing or annealing can be performed so that the substances in the gap-fill oxide bond to each other.

[0042] After the FCVD process is performed, an HPO process can be performed. When the HPO process is performed, at least one of the gases O2, O3, H2O (steam), D2O (steam), N2O, CO, and CO2 may be supplied into the processing apparatus (e.g., a chamber or a furnace) in which the substrate 21 is loaded. Also, when the HPO process is performed, the internal atmospheric pressure of the processing apparatus in which the substrate 21 is loaded can be maintained at 2 to 50 atmospheres. Also, when the HPO process is performed, the internal temperature of the processing apparatus in which the substrate 21 is loaded can be maintained at 200°C to 1000°C. By performing the HPO process under such conditions, the gap-fill oxide film 27 can be formed.

[0043] As described above, in the manufacturing process of the semiconductor device according to one embodiment, the gap-fill oxide film 27 may be generated by the HPO process performed in a high-pressure (2 to 50 atmospheres) oxygen atmosphere and a low-temperature (200°C to 1000°C) environment after the FCVD process is performed.

[0044] When the gap-fill oxide film 27 is formed by sequentially performing the FCVD and HPO processes as described above, voids that may be generated by foreign substances removed during the formation process of the gap-fill oxide film 27 or physical changes of the film (stress generated as the film changes to a solid) that may occur by curing or annealing during the FCVD process are filled with at least one gas among O2, O3, H2O (steam), D2O (steam), N2O, CO, and CO2, so that the density of the gap-fill oxide film 27 can be higher than that of the conventional one. Thus, when the quality of the gap-fill oxide film 27 is improved, the electrical characteristics of the semiconductor element 2 can be improved compared to the conventional ones.

[0045] Next, as shown in FIG. 6, by performing a Chemical Mechanical Polishing (CMP) process using the liner oxide film 26 as a polishing stop film, the gap-fill oxide film 27 is planarized.

[0046] Next, as shown in FIG. 7, by sequentially removing the liner oxide film 26, the liner nitride film 25, the second pad oxide film 24, and the pad nitride film 23, the element isolation region is completed.

[0047] FIG. 8 is a cross-sectional view of a capacitor element including a gap-fill oxide film. Further, FIG. 9 is a graph showing leakage current values measured when a voltage is applied to capacitor elements each including a gap-fill oxide film according to the prior art and a gap-fill oxide film according to an embodiment, and FIG. 10 is a graph showing charge holding times measured when a voltage is applied to capacitor elements each including a gap-fill oxide film according to the prior art and a gap-fill oxide film according to an embodiment.

[0048] The capacitor element shown in FIG. 8 is for confirming the electrical characteristics of a semiconductor element including a gap-fill oxide film according to the prior art and the electrical characteristics of a semiconductor element including a gap-fill oxide film according to an embodiment.

[0049] Referring to FIG. 8, a capacitor element 3 according to an embodiment includes a substrate 31, an oxide film 32, a dielectric layer 33, and an electrode 34.

[0050] The substrate 31 is made of a material such as silicon (Si) and can be doped to be P-type.

[0051] In other embodiments, the substrate 31 may be made of at least one component of Si and SiGe. For example, the substrate 31 may be a single layer made of Si or a single layer made of SiGe. In other examples, the substrate 31 may have a multilayer structure in which a first layer made of Si and a second layer made of SiGe are alternately laminated.

[0052] The oxide film 32 is an insulating layer and may be formed by at least one of HDP (High Density Plasma), FCVD (Flowable Chemical Vapor Deposition), and HPO (High Pressure Oxidation) processes.

[0053] The dielectric layer 33 is made of a dielectric (for example, HfO3) and functions to induce charges between the substrate 31 and the electrode 34.

[0054] The electrode 34 may be made of a metal material (for example, TiN).

[0055] FIGS. 9 and 10 show the electrical characteristics of the capacitor element 3 measured when a voltage is applied to the capacitor element 3 shown in FIG. 8, that is, the leakage current and the retention time. In FIGS. 9 and 10, M1 represents a capacitor element in which the oxide film 32 is formed by an HDP process, M2 represents a capacitor element formed by performing an HDP process after performing an FCVD process on the oxide film 32, and M3 represents a capacitor element formed by performing an HPO process after performing the FCVD process according to the above-described embodiment on the oxide film 32.

[0056] As shown in FIG. 9, after performing the FCVD process according to an embodiment, the leakage current magnitude of the capacitor element (M3) including the oxide film 32 formed by further performing the HPO process is smaller than the leakage current magnitudes of the capacitor elements (M1, M2) including the oxide films formed by other processes. Also, as shown in FIG. 10, after performing the FCVD process according to an embodiment, the charge retention time of the capacitor element (M3) including the oxide film 32 formed by further performing the HPO process is larger than the charge retention times of the capacitor elements (M1, M2) including the oxide films formed by other processes.

[0057] Therefore, a semiconductor element including an oxide film formed by further performing the HPO process after performing the FCVD process according to an embodiment can exhibit more excellent electrical characteristics compared to a semiconductor element including an oxide film formed by the HDP process or an oxide film formed by further performing the HDP process after performing the FCVD process.

[0058] FIG. 11 is a graph showing the etching rates of a gap-fill oxide film according to the prior art and a gap-fill oxide film according to an embodiment.

[0059] In FIG. 11, F1 represents a gap-fill oxide film formed by a normal wet oxidation process, F2 represents a gap-fill oxide film formed by the HDP process. Also, F3 represents a gap-fill oxide film formed by further performing the HDP process after performing the FCVD process, and F4 represents a gap-fill oxide film formed by further performing the HPO process after performing the FCVD process according to an embodiment.

[0060] FIG. 11 shows the etching rates (Wet Etching Rate, WER) measured when each of the gap-fill oxide films (F1 to F4) is wet-etched under the same conditions. As shown in FIG. 11, after performing the FCVD process according to one embodiment, the etching rate of the gap-fill oxide film (F4) formed by further performing the HPO process is lower than the etching rates of the other gap-fill oxide films (F1, F2, F3). These results mean that the density of the gap-fill oxide film (F4) formed by further performing the HPO process after performing the FCVD process according to one embodiment is higher than the densities of the gap-fill oxide films (F1, F2, F3) formed by other processes. Therefore, when a gap-fill oxide film is formed by performing the HPO process after performing the FCVD process as in one embodiment, the gap-fill oxide film becomes denser and more stable, and the density of the gap-fill oxide film increases, so that the breakage phenomenon of the gap-fill oxide film can be prevented during the formation process of the element isolation region.

[0061] As described above, in the method for manufacturing a semiconductor device according to the present invention, a gap-fill oxide film is formed by performing a gap-fill process including a high-pressure oxidation (High Pressure Oxidation, HPO) process. In particular, a semiconductor device including an oxide film formed by further performing the HPO (High Pressure Oxidation) process after performing the FCVD (Flowable Chemical Vapor Deposition) process exhibits excellent electrical characteristics compared to a semiconductor device including an oxide film formed by a conventional process.

[0062] On the other hand, as still another embodiment, a gap-fill oxide film can be formed by performing the HDP process after sequentially performing the FCVD process and the HPO process.

[0063] As described above, this specification has been described with reference to the exemplary drawings. However, this specification is not limited to the embodiments and drawings disclosed herein, and various modifications can be made by those of ordinary skill in the art. In addition, in the embodiments of this specification described above, even if the effects due to the configuration of this specification are not explicitly described, the effects predictable by the configuration should also be recognized.

Claims

1. In a method for manufacturing a semiconductor device, a gap-fill oxide is embedded inside a trench formed on a substrate, and a gap-fill process for forming a gap-fill oxide film is included, wherein the gap-fill process includes a HPO (High Pressure Oxidation) process, A method for manufacturing a semiconductor device.

2. The above HPO process is carried out in a processing apparatus to which at least one of ２ O ３ O ２ H ２ O ２ OD ２ ON, CO, CO The method for manufacturing a semiconductor device according to Claim 1.

3. When the HPO process is performed, the internal pressure of the processing apparatus is maintained at 2 to 50 atmospheres, The method for manufacturing a semiconductor device according to Claim 1.

4. When the HPO process is performed, the internal temperature of the processing apparatus is maintained at 200 to 1000 °C, The method for manufacturing a semiconductor device according to Claim 1.

5. After a FCVD (Flowable Chemical Vapor Deposition) process using the gap-fill oxide is performed, the HPO process is performed, thereby forming the gap-fill oxide film, The method for manufacturing a semiconductor device according to Claim 1.

6. etching the substrate to form a trench; forming a liner layer on the inner surface of the trench; forming a gap-fill oxide film on the liner layer to gap-fill the inside of the trench; planarizing the gap-fill oxide film; including, wherein the gap-fill oxide film is formed by a gap-fill process including a HPO (High Pressure Oxidation) process, A method for manufacturing a semiconductor device.

7. The above HPO process is carried out in a processing apparatus to which at least one of ２ O ３ O ２ H ２ DO ２ NO ２ CO, CO The method for manufacturing a semiconductor device according to Claim 6.

8. When the HPO process is performed, the internal pressure of the processing apparatus is maintained at 2 to 50 atmospheres, The method for manufacturing a semiconductor device according to Claim 6.

9. When the HPO process is performed, the internal temperature of the processing apparatus is maintained at 200 to 1000 °C, The method for manufacturing a semiconductor device according to Claim 6.

10. After a FCVD (Flowable Chemical Vapor Deposition) process is performed, the HPO process is performed, thereby forming the gap-fill oxide film, The method for manufacturing a semiconductor device according to Claim 6.

11. The liner layer has a single-layer or multi-layer structure composed of at least one component among a nitride film, an oxide film, and polysilicon, The method for manufacturing a semiconductor device according to Claim 6.

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