Printed circuit board

The printed circuit board design with conformal insulating and metal layers surrounding wiring patterns addresses signal interference in high-density wiring, enhancing signal quality and density.

JP2026000837APending Publication Date: 2026-01-06SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
JP2025032308
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-18
Filing Date
2025-02-28
Publication Date
2026-01-06

AI Technical Summary

Technical Problem

As the distance between patterns decreases in high-density wiring on printed circuit boards, signal interference increases, and existing methods to reduce interference, such as placing ground layers above or below signal lines, are insufficient.

Method used

A printed circuit board design featuring a conformal insulating film and metal layer surrounding wiring patterns on multiple sides, with additional insulating layers, to create a structure that reduces signal interference while maintaining close spacing.

Benefits of technology

The design effectively reduces signal interference and maintains high wiring density, improving signal characteristics and reducing product thickness.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a printed circuit board capable of reducing signal interference while maintaining a short distance between a plurality of wiring patterns.SOLUTION: The printed circuit board 100A includes a first insulating layer 111, a plurality of first wiring patterns 121 disposed on the first insulating layer and spaced apart from each other, a first insulating film 131 disposed on the first insulating layer and covering the plurality of first wiring patterns along surfaces of the plurality of first wiring patterns, a first metallic layer 141 covering the first insulating film along surfaces of the first insulating film, and a second insulating layer 112 covering the first metallic layer and filling at least a portion of spaces between the plurality of first wiring patterns.SELECTED DRAWING: Figure 3
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Description

[Technical Field]

[0001] The present invention relates to printed circuit boards. [Background technology]

[0002] Demand for multi-chip packages, in which multiple chips are mounted on a board, is increasing. Furthermore, as the number of chip input / output ports increases, higher wiring density is also required on the board. However, as the distance between patterns decreases when high-density wiring is achieved, signal interference increases. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2024-72765 Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in view of the above-mentioned problems of the conventional art, and an object of the present invention is to provide a printed circuit board with reduced signal interference. [Means for solving the problem]

[0005] One of the various solutions proposed throughout this specification is to form an insulating film on a first insulating layer that conformally covers the multiple wiring patterns, form a metal layer on the insulating film that conformally covers the insulating film, and form a second insulating layer on the metal layer that covers the metal layer, thereby surrounding at least three sides of the multiple wiring patterns with metal.

[0006] In order to achieve the above-mentioned object, a printed circuit board according to one embodiment of the present invention comprises a first insulating layer, a plurality of first wiring patterns arranged spaced apart from one another on the first insulating layer, a first insulating film arranged on the first insulating layer and covering each of the plurality of first wiring patterns along the surface of each of the plurality of first wiring patterns, a first metal layer covering the first insulating film along the surface of the first insulating film, and a second insulating layer covering the first metal layer and filling at least a portion of the spaces spaced apart from one another between the plurality of first wiring patterns.

[0007] In order to achieve the above object, another aspect of the present invention provides a printed circuit board comprising an insulating layer, a plurality of wiring patterns arranged on the insulating layer at a distance from each other, an insulating film arranged on the insulating layer and covering each of the plurality of wiring patterns along the shape of each of the plurality of wiring patterns, and a first metal layer covering the insulating film, wherein the insulating layer and the insulating film each contain the same type of insulating material. [Effects of the Invention]

[0008] One of the various advantages of the present invention is that it provides a printed circuit board that can reduce signal interference while maintaining a short distance between multiple wiring patterns. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram illustrating an example of an electronic device system. [Figure 2] FIG. 1 is a perspective view schematically illustrating an example of an electronic device. [Figure 3] 1 is a cross-sectional view schematically illustrating a first example of a printed circuit board. [Figure 4] 4 is a plan view schematically showing a cross section taken along line AA' of the printed circuit board of FIG. 3.

[0023] FIG. [Figure 5] FIG. 10 is a cross-sectional view schematically illustrating a second example of a printed circuit board. [Figure 6] FIG. 10 is a cross-sectional view schematically illustrating a third example of a printed circuit board. [Figure 7] FIG. 10 is a cross-sectional view schematically illustrating a fourth example of a printed circuit board. [Figure 8] FIG. 10 is a cross-sectional view schematically illustrating a fifth example of a printed circuit board. [Figure 9] FIG. 10 is a cross-sectional view schematically illustrating a sixth example of a printed circuit board. [Figure 10] FIG. 10 is a cross-sectional view schematically illustrating a seventh example of a printed circuit board. [Figure 11] FIG. 10 is a cross-sectional view schematically illustrating an eighth example of a printed circuit board. [Figure 12] FIG. 13 is a cross-sectional view schematically illustrating a ninth example of a printed circuit board. [Figure 13] FIG. 16 is a cross-sectional view schematically illustrating a tenth example of a printed circuit board. [Figure 14] FIG. 13 is a cross-sectional view schematically illustrating an eleventh example of a printed circuit board. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, specific examples of embodiments of the present invention will be described in detail with reference to the drawings. The shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation.

[0011] ≪Electronic equipment≫

[0012] FIG. 1 is a block diagram schematically illustrating an example of an electronic device system.

[0013] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These components are combined with other electronic components described below to form various signal lines 1090.

[0014] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; logic chips such as analog-to-digital converters and ASICs (application-specific ICs); and other types of chip-related electronic components. Furthermore, these chip-related components 1020 can be combined with each other. The chip-related components 1020 can be in the form of a package including the above-mentioned chips or electronic components.

[0015] The network-related components 1030 may include, but are not limited to, Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and any other wireless and wired protocols designated as such, as well as any of numerous other wireless or wired standards or protocols. The network-related components 1030 may also be combined with the chip-related components 1020.

[0016] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, they are not limited to these, and may also include passive elements in the form of chip components used for various other applications. In addition, the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.

[0017] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. Other electronic components may also include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. In addition, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0018] The electronic device 1000 may be a smartphone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automobile, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0019] FIG. 2 is a perspective view schematically illustrating an example of an electronic device.

[0020] Referring to the drawing, the electronic device is, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. Furthermore, other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are housed inside the smartphone 1100. Some of the components 1120 are the chip-related components described above, such as, but not limited to, a component package 1121. The component package 1121 is in the form of a printed circuit board on which electronic components, including active and / or passive components, are mounted on the surface. Alternatively, the component package 1121 is in the form of a printed circuit board in which active and / or passive components are embedded. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.

[0021] <Printed circuit board>

[0022] FIG. 3 is a cross-sectional view that schematically shows a first example of the printed circuit board, and FIG. 4 is a plan view that schematically shows a cross section taken along line AA' of the printed circuit board of FIG.

[0023] Referring to the drawings, a printed circuit board 100A according to this embodiment includes a first insulating layer 111, a plurality of wiring patterns 121 spaced apart from one another on the first insulating layer 111, an insulating film 131 disposed on the first insulating layer 111 and covering each of the plurality of wiring patterns 121 along the surface of each of the plurality of wiring patterns 121, a first metal layer 141 covering the insulating film 131 along the surface of the insulating film 131, and a second insulating layer 112 covering the first metal layer 141 and filling at least a portion of the spaces between the plurality of first wiring patterns 121. Meanwhile, the terms "along the surface" and / or "along the shape" mean that the insulating film 131 is formed substantially conformally to the outer surface of the target structure. For example, the insulating film 131 continuously covers the first insulating layer 111 and the plurality of wiring patterns 121 with a substantially constant thickness, and the first metal layer 141 continuously covers the insulating film 131 with a substantially constant thickness.

[0024] However, as mentioned above, signal interference increases as the distance between patterns decreases when high-density wiring is implemented. Therefore, it is considered to place a ground layer above and / or below the signal line to attenuate the influence on adjacent wiring. However, in the case of high-density wiring, it is difficult to sufficiently reduce signal interference by simply placing a ground layer above and / or below the signal line. Therefore, it is considered to reduce signal interference by inserting a ground line between the signal lines. However, in this case, the physical wiring density increases and the cross-sectional area of ​​the signal wiring decreases.

[0025] Meanwhile, in the printed circuit board 100A according to this embodiment, as described above, an insulating film 131 is formed with a predetermined thickness along the surfaces of the plurality of wiring patterns 121, and a first metal layer 141 is formed with a predetermined thickness along the surfaces of the insulating film 131, thereby substantially surrounding at least three sides of each of the plurality of wiring patterns 121 with metal. Each of the plurality of wiring patterns 121 includes a signal pattern, and the first metal layer 141 includes a ground pattern. Therefore, signal interference can be reduced while maintaining a close distance between the plurality of wiring patterns 121. This improves signal characteristics, reduces product thickness, and increases wiring density. Furthermore, forming a second insulating layer 112 covering the first metal layer 141 provides a flat insulating surface, thereby facilitating the formation of a plurality of wiring patterns, etc., on the second insulating layer 112, as described below.

[0026] Meanwhile, the printed circuit board 100A according to this embodiment further includes a second metal layer 142 disposed on the side of the first insulating layer 111 opposite to the side on which the plurality of wiring patterns 121 are disposed. The second metal layer 142 includes a ground pattern. In this case, each of the plurality of wiring patterns 121 is substantially surrounded by metal on at least four sides by the first and second metal layers (141, 142). This makes it possible to more effectively reduce signal interference. This makes it possible to more effectively improve signal characteristics and increase wiring density.

[0027] Meanwhile, the first insulating layer 111, the second insulating layer 112, and the insulating film 131 each include an inorganic insulating material and / or an organic insulating material. For example, the first and second insulating layers (111, 112) include the same type of insulating material, and the insulating film 131 includes a different type of insulating material. For example, the first and second insulating layers (111, 112) include an organic insulating material, and the insulating film 131 includes an inorganic insulating material. However, this is not limited thereto. For example, the first insulating layer 111 and the insulating film 131 may include the same type of insulating material, and the second insulating layer 112 may include a different type of insulating material. For example, the first insulating layer 111 and the insulating film 131 may include an inorganic insulating material, and the second insulating layer 112 may include an organic insulating material. Meanwhile, when the first insulating layer 111 and the insulating film 131 include an inorganic insulating material, the insulating properties around at least four sides of each of the multiple wiring patterns 121 can be improved. Furthermore, if the second insulating layer 112 contains an organic insulating material, this is advantageous for planarization.

[0028] On the other hand, the multiple wiring patterns 121 are fine circuits with a line L / space S of less than 10 μm / 10 μm, for example, within 5 μm / 5 μm or 2 μm / 2 μm. The thicknesses of the first metal layer 141 and the insulating film 131 are thinner than the thicknesses of the multiple wiring patterns 121. For example, the first metal layer 141 and the insulating film 131 are thin films with a thickness of less than 2 μm or less than 1 μm, but are not limited to this.

[0029] On the other hand, each of the multiple wiring patterns 121 has a rectangular shape in which the width of the surface adjacent to the first insulating layer 111 on the cross section is substantially the same as the width of the surface on the opposite side, but is not limited to this.

[0030] The components of the printed circuit board 100A according to the first embodiment will be described in more detail below with reference to the drawings.

[0031] The first and second insulating layers (111, 112) and the insulating film 131 each include an insulating material. The insulating material includes an organic insulating material and / or an inorganic insulating material. The organic insulating material includes a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material containing a resin together with an inorganic filler, an organic filler, and / or glass fiber (glass fiber, glass cloth, glass fabric). For example, the organic insulating material is a non-photosensitive insulating material such as CCL (Copper Clad Laminate), ABF (Ajinomoto Build-up Film), or PPG (Prepreg), but is not limited thereto. Other polymer materials may also be used. The organic insulating material may also be a photosensitive insulating material such as PID (Photo Imageable Dielectric). The inorganic insulating material includes an inorganic oxide film that can be formed by ALD (Atomic Layer Deposition), MVD (Molecular Vapor Deposition), etc., and includes, for example, at least one of Al2O3, TiO2, ZnO, ZnO2, ZrO2, SnO, SnO2, HfO2, and SiO2, preferably Al2O3, but is not limited to these, and may also include other inorganic materials.

[0032] Each of the plurality of wiring patterns 121 includes a metal material. Examples of the metal material include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. Each of the plurality of wiring patterns 121 includes a signal pattern. Each of these patterns has a line shape. Each of the plurality of wiring patterns 121 includes an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0033] The first and second metal layers 141 and 142 each include a metal material. Examples of the metal material include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to copper. The first and second metal layers 141 and 142 each include a ground pattern. These patterns each have a plane shape. The first metal layer 141 is formed by a deposition method such as sputtering. For example, it includes a sputtering layer. However, it is not limited thereto and may include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). The second metal layer 142 may include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtered layer may be included instead of an electroless plated layer (or chemical copper), or both may be included if desired.

[0034] FIG. 5 is a cross-sectional view schematically illustrating a second example of the printed circuit board.

[0035] Referring to the drawings, the printed circuit board 100B according to this embodiment has a substantially trapezoidal shape, with each of the multiple wiring patterns 121 having a cross-sectional width adjacent to the first insulating layer 111 that is wider than the width of the opposite side. This configuration makes it easier for the insulating film 131 and the first metal layer 141 to surround each of the multiple wiring patterns 121. It also makes it easier to form the insulating film 131 and the first metal layer 141 through a deposition process. This trapezoidal shape can be achieved by forming a pattern through a plating process and then narrowing the upper portion of the pattern through an appropriate amount of etching. Alternatively, the trapezoidal shape can be achieved by forming a photoresist pattern in an inverse tapered shape and then performing plating or dry deposition. Other methods may also be used. Other details are essentially the same as those described above, and therefore, a repeated description will be omitted.

[0036] FIG. 6 is a cross-sectional view schematically showing a third example of the printed circuit board.

[0037] 1, the printed circuit board 100C according to this embodiment further includes, in the printed circuit board 100A according to the first embodiment described above, a third insulating layer 113 disposed on the second insulating layer 112, a plurality of second wiring patterns 122 disposed at a distance from the third insulating layer 113, a second insulating film 132 disposed on the third insulating layer 113 and covering each of the second wiring patterns 122 along the surface of each of the second wiring patterns 122, a third metal layer 143 covering the second insulating film 132 along the surface of the second insulating film 132, a fourth insulating layer 114 covering the third metal layer 143 and filling at least a portion of the spaces between the second wiring patterns 122, and a fourth metal layer 144 disposed between the second and third insulating layers (112, 113). For example, the printed circuit board 100C has a multilayer printed circuit board structure. The same applies to the third and fourth insulating layers (113, 114), the second insulating film 132, the plurality of second wiring patterns 122, and the third and fourth metal layers (143, 144), respectively. The structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100C according to this embodiment, as necessary. Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0038] FIG. 7 is a cross-sectional view schematically showing a fourth example of the printed circuit board.

[0039] Referring to the drawings, the printed circuit board 100D according to this embodiment has a thinner second insulating layer 112 than the printed circuit board 100C according to the third embodiment described above. For example, the insulating distance between the first and second wiring patterns (121, 122) is smaller. In this case, the fourth metal layer 144 is omitted. For example, the second wiring patterns 122 and the second insulating film 132 are respectively disposed directly on the second insulating layer 112. For example, the first metal layer 141 can replace the role of the fourth metal layer 144. Also, the second metal layer 142 is omitted. For example, if signal interference can be sufficiently blocked by surrounding at least three sides with metal, the second metal layer 142 is also omitted. In this case, a thin multilayer printed circuit board structure can be realized. However, the present invention is not limited thereto, and the fourth metal layer 144 may be omitted but the second metal layer 142 may not be omitted. If necessary, the structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100D according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0040] FIG. 8 is a cross-sectional view schematically illustrating a fifth example of the printed circuit board.

[0041] 1, the printed circuit board 100E according to this embodiment has the same configuration as the printed circuit board 100D according to the fourth embodiment except that the first and second pad patterns (151-1, 151-2) are respectively arranged on the first insulating layer 111, the second and second pad patterns (152-1, 152-2) are respectively arranged on the second insulating layer 112, the third and third pad patterns (153-1, 153-2) are respectively arranged on the fourth insulating layer 114, the first via pattern 161 that penetrates the first insulating layer 111 and connects the first pad pattern 151-1 and the second metal layer 142 to each other, and the second insulating layer 114. The printed circuit board further includes a 2-1 via pattern 162-1 that penetrates through the second insulating layer 112 to connect the 1-1 and 2-1 pad patterns (151-1, 152-1) to each other, a 2-2 via pattern 162-2 that penetrates through the second insulating layer 112 to connect the 1-2 and 2-2 pad patterns (151-2, 152-2) to each other, a 3-1 via pattern 163-1 that penetrates through the fourth insulating layer 114 to connect the 2-1 and 3-1 pad patterns (152-1, 153-1) to each other, and a 3-2 via pattern 163-2 that penetrates through the fourth insulating layer 114 to connect the 2-2 and 3-2 pad patterns (152-2, 153-2) to each other. For example, this is a multilayer printed circuit board structure in which pad patterns of different layers are connected to each other through vias.

[0042] Meanwhile, the first insulating film 131 and the first metal layer 141 cover at least a portion of the 1-1 and 1-2 pad patterns (151-1, 151-2), respectively. The second insulating film 132 and the third metal layer 143 cover at least a portion of the 2-1 and 2-2 pad patterns (152-1, 152-2), respectively. The first metal layer 141 covers the upper surface of the 1-1 pad pattern 151-1 so that the upper surface is not exposed, and the 2-1 via pattern 162-1 contacts at least a portion of the first metal layer 141. The first metal layer 141 does not cover the exposed upper surface of the 1-2 pad pattern 151-2, and the 2-2 via pattern 162-2 is spaced apart from the first metal layer 141. The third metal layer 143 covers the upper surface of the 2-1 pad pattern 152-1 so as not to expose the upper surface, and the 3-1 via pattern 163-1 contacts at least a portion of the third metal layer 143. The third metal layer 143 does not cover the exposed upper surface of the 2-2 pad pattern 152-2, and the 3-2 via pattern 163-2 is spaced apart from the third metal layer 143.

[0043] Meanwhile, the 1-1, 1-2, 2-1, 2-2, 3-1, and 3-2 pad patterns (151-1, 151-2, 152-1, 152-2, 153-1, and 153-2) each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. The 1-1, 2-1, and 3-1 pad patterns (151-1, 152-1, and 153-1) each include a ground pattern. The 1-2, 2-2, and 3-2 pad patterns (151-2, 152-2, and 153-2) each include a signal pattern. Each of these patterns has a pad shape. The pad patterns 1-1, 1-2, 2-1, 2-2, 3-1, and 3-2 (151-1, 151-2, 152-1, 152-2, 153-1, and 153-2) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0044] Meanwhile, the first, second-first, second-second, third-first, and third-second via patterns (161, 161-1, 161-2, 163-1, 163-2) each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. The first, second-first, and third-first via patterns (161, 162-1, 163-1) each include a ground via. The second-second and third-second via patterns (162-2, 163-2) each include a signal via. These vias each have a tapered cross-section with a wider upper end than a lower end. The first, second, second, third, and third via patterns (161, 161-1, 161-2, 163-1, 163-2) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0045] If necessary, the structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100E according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0046] FIG. 9 is a cross-sectional view schematically showing a sixth example of the printed circuit board.

[0047] Referring to the drawings, the printed circuit board 100F according to this embodiment further includes a third insulating layer 113 disposed between the second insulating layer 112 and the plurality of second wiring patterns 122 and between the second insulating layer 112 and the second insulating film 132 in the printed circuit board 100E according to the fifth embodiment described above. The first and third insulating layers (111, 113) each include an inorganic insulating material and are formed to a thinner thickness. If necessary, the structural features of the printed circuit board 100B according to the second embodiment may be applied to the printed circuit board 100F according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant description will be omitted.

[0048] FIG. 10 is a cross-sectional view schematically showing a seventh example of the printed circuit board.

[0049] 1, the printed circuit board 100G according to this embodiment has the same configuration as the printed circuit board 100D according to the fourth embodiment, except that the first and second pad patterns (151-1, 151-2) are respectively arranged on the first insulating layer 111, the second and second pad patterns (152-1, 152-2) are respectively arranged on the second insulating layer 112, the third and third pad patterns (153-1, 153-2) are respectively arranged on the fourth insulating layer 114, the first via pattern 161 that penetrates the first insulating layer 111 and connects the first pad pattern 151-1 and the second metal layer 142 to each other, and the second insulating layer 114 The printed circuit board further includes a 2-1 via pattern 162-1 that penetrates through the second insulating layer 112 to connect the 1-1 and 2-1 pad patterns (151-1, 152-1) to each other, a 2-2 via pattern 162-2 that penetrates through the second insulating layer 112 to connect the 1-2 and 2-2 pad patterns (151-2, 152-2) to each other, a 3-1 via pattern 163-1 that penetrates through the fourth insulating layer 114 to connect the 2-1 and 3-1 pad patterns (152-1, 153-1) to each other, and a 3-2 via pattern 163-2 that penetrates through the fourth insulating layer 114 to connect the 2-2 and 3-2 pad patterns (152-2, 153-2) to each other. For example, this is a multilayer printed circuit board structure in which pad patterns of different layers are connected to each other through vias.

[0050] Meanwhile, the first insulating film 131 and the first metal layer 141 cover at least a portion of the 1-1 and 1-2 pad patterns (151-1 and 151-2), respectively. The second insulating film 132 and the third metal layer 143 cover at least a portion of the 2-1 and 2-2 pad patterns (152-1 and 152-2), respectively. A relatively narrow opening exposing the top surface of the 1-1 pad pattern 151-1 is formed in the first insulating film 131 and the first metal layer 141, and the 2-1 via pattern 162-1 fills this opening to contact at least a portion of the first metal layer 141 and the first insulating film 131. A relatively wide opening exposing the top surface of the 1-2 pad pattern 151-2 is formed in the first metal layer 141, and the 2-2 via pattern 162-2 is spaced apart from the first metal layer 141. The 1-2 via pattern 161-2 contacts at least a portion of the first insulating film 131. A relatively narrow opening exposing an upper surface of the 2-1 pad pattern 152-1 is formed in the second insulating film 132 and the third metal layer 143, and the 3-1 via pattern 163-1 fills this opening to contact at least a portion of the third metal layer 143 and the second insulating film 132. A relatively wide opening exposing an upper surface of the 2-2 pad pattern 152-2 is formed in the third metal layer 143, and the 3-2 via pattern 163-2 is spaced apart from the third metal layer 143. The 2-2 via pattern 162-2 contacts at least a portion of the third insulating film 133.

[0051] Meanwhile, the 1-1, 1-2, 2-1, 2-2, 3-1, and 3-2 pad patterns (151-1, 151-2, 152-1, 152-2, 153-1, and 153-2) each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. The 1-1, 2-1, and 3-1 pad patterns (151-1, 152-1, and 153-1) each include a ground pattern. The 1-2, 2-2, and 3-2 pad patterns (151-2, 152-2, and 153-2) each include a signal pattern. Each of these patterns has a pad shape. The pad patterns 1-1, 1-2, 2-1, 2-2, 3-1, and 3-2 (151-1, 151-2, 152-1, 152-2, 153-1, and 153-2) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0052] Meanwhile, the first, second-first, second-second, third-first, and third-second via patterns (161, 161-1, 161-2, 163-1, 163-2) each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. The first, second-first, and third-first via patterns (161, 162-1, 163-1) each include a ground via. The second-second and third-second via patterns (162-2, 163-2) each include a signal via. Each of these vias has a tapered cross section, with the width at the top end being wider than the width at the bottom end. Some of the vias are multi-step vias with stepped sides. The first, second, second, third, and third via patterns (161, 161-1, 161-2, 163-1, 163-2) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0053] If necessary, the structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100G according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0054] FIG. 11 is a cross-sectional view schematically showing an eighth example of the printed circuit board.

[0055] Referring to the drawings, the printed circuit board 100H according to this embodiment further includes a third insulating layer 113 disposed between the second insulating layer 112 and the plurality of second wiring patterns 122 and between the second insulating layer 112 and the second insulating film 132 in the printed circuit board 100G according to the seventh embodiment described above. The first and third insulating layers (111, 113) each include an inorganic insulating material and are formed to a thinner thickness. If necessary, the structural features of the printed circuit board 100B according to the second embodiment may be applied to the printed circuit board 100H according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant description will be omitted.

[0056] FIG. 12 is a cross-sectional view schematically showing a ninth example of the printed circuit board.

[0057] 1, the printed circuit board 100I according to this embodiment has the same configuration as the printed circuit board 100D according to the fourth embodiment, except that it includes a first-third pad pattern 151-3 arranged on the first insulating layer 111, a second-third pad pattern 152-3 arranged on the second insulating layer 112, a third-third pad pattern 153-3 arranged on the fourth insulating layer 114, a first via pattern 161 that penetrates the first insulating layer 111 to connect the first-third pad pattern 151-3 and the second metal layer 142, and a second via pattern 162 that penetrates the second insulating layer 112 to connect the second-third pad pattern 152-3 and the second metal layer 142. The wiring board further includes a 2-3 via pattern 162-3 connecting the 1-3 and 2-3 metal layers 141 to each other, a 2-4 via pattern 162-4 connecting the 1-3 and 2-3 pad patterns (151-3, 152-3) through the second insulating layer 112 to each other, a 3-3 via pattern 163-3 connecting the 3-3 pad pattern 153-3 and the third metal layer 143 to each other through the fourth insulating layer 114, and a 3-4 via pattern 163-4 connecting the 2-3 and 3-3 pad patterns (152-3, 153-3) through the fourth insulating layer 114 to each other. For example, this is a multilayer printed circuit board structure in which pad patterns of different layers are connected to each other through vias.

[0058] Meanwhile, the first insulating film 131 and the first metal layer 141 each cover at least a portion of the 1-3 pad pattern 151-3. The second insulating film 132 and the third metal layer 143 each cover at least a portion of the 2-3 pad pattern 152-3. The 2-3 via pattern 162-3 contacts at least a portion of the first metal layer 141 covering the 1-3 pad pattern 151-3. The 2-4 via pattern 162-4 is spaced apart from the first metal layer 141. The 2-4 via pattern 162-4 contacts at least a portion of the first insulating film 131. The 3-3 via pattern 163-3 contacts at least a portion of the third metal layer 143 covering the 2-3 pad pattern 152-3. The 3-4 via pattern 163-4 is spaced apart from the third metal layer 143. The third-fourth via pattern 163-4 is in contact with at least a portion of the second insulating film 132.

[0059] Meanwhile, the first, second, and third pad patterns (151-3, 152-3, 153-3) each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to copper (Cu). The first, second, and third pad patterns (151-3, 152-3, 153-3) each include a ground pattern. Each of these patterns has a pad shape. The first, second, and third pad patterns (151-3, 152-3, 153-3) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtered layer may be included instead of an electroless plated layer (or chemical copper), or both may be included if desired.

[0060] Meanwhile, the first, 2-3, 2-4, 3-3, and 3-4 via patterns (161, 161-3, 161-4, 163-3, and 163-4) each include a metal material. The metal material includes copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes copper (Cu), but is not limited to these. The first, 2-3, 2-4, 3-3, and 3-4 via patterns (161, 161-3, 161-4, 163-3, and 163-4) each include a ground via. Each of these vias has a tapered cross section in which the width at the top end is wider than the width at the bottom end. The first, second, third, fourth, third, and fourth via patterns (161, 161-3, 161-4, 163-3, 163-4) each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0061] If necessary, the structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100I according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0062] FIG. 13 is a cross-sectional view schematically showing a tenth example of the printed circuit board.

[0063] Referring to the drawings, the printed circuit board 100J according to this embodiment further includes a third insulating layer 113 disposed between the second insulating layer 112 and the plurality of second wiring patterns 122 and between the second insulating layer 112 and the second insulating film 132 in the printed circuit board 100I according to the ninth embodiment described above. The first and third insulating layers (111, 113) each include an inorganic insulating material and are formed to a thinner thickness. If necessary, the structural features of the printed circuit board 100B according to the second embodiment may be applied to the printed circuit board 100J according to this embodiment. Other details are substantially the same as those described above, and therefore, redundant description will be omitted.

[0064] FIG. 14 is a cross-sectional view schematically illustrating an eleventh example of the printed circuit board.

[0065] Referring to the drawings, the printed circuit board 100K according to this embodiment has a shape that is an inverted version of the printed circuit board 100A according to the first embodiment described above. For example, it has an intaglio pattern structure. For example, a plurality of wiring patterns 121' are disposed spaced apart from one another on the lower surface of a first insulating layer 111'. An insulating film 131' covering each of the wiring patterns 121' is disposed on the lower surface of the first insulating layer 111' along the surface of each of the wiring patterns 121', and a first metal layer 141' covering the insulating film 131' is disposed along the surface of the insulating film 131'. A second insulating layer 112' is disposed below the first metal layer 141' to cover it. A second metal layer 142' is disposed on the upper surface of the first insulating layer 111'. If necessary, a pad pattern 151' is further disposed on the lower surface of the first insulating layer 111', and the insulating film 131' and the first metal layer 141' each cover at least a portion of the pad pattern 151'. The insulating film 131' and the first insulating layer 111' each have openings that expose the pad pattern 151', and each opening is filled with a via pattern 171', 172'. Therefore, the first and second metal layers 141', 142' are connected to each other through the pad pattern 151' and the via pattern 171', 172'.

[0066] On the other hand, the contents described above for the first and second insulating layers (111, 112), insulating film 131, multiple wiring patterns 121, and first and second metal layers (141, 142) are applied substantially in the same manner to each of the first and second insulating layers (111', 112'), insulating film 131', multiple wiring patterns 121, and first and second metal layers (141', 142').

[0067] Meanwhile, the pad pattern 151' and the via patterns 171', 172' each include a metal material. The metal material may include, but is not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material includes, but is not limited to, copper (Cu). The pad pattern 151' includes a ground pattern and has a pad shape. The via patterns 171', 172' include ground vias and have a tapered cross section with a wider upper end width than a lower end width. The pad pattern 151' and the via patterns 171', 172' each include an electroless plating layer (e.g., chemical copper) and / or an electrolytic plating layer (e.g., electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included if necessary.

[0068] If necessary, the structural features of the printed circuit board 100B according to the second example may be applied to the printed circuit board 100K according to this embodiment. If necessary, the structure of the printed circuit board 100K according to this embodiment may be combined with the structure of each of the printed circuit boards according to the third to tenth examples (100C, 100D, 100E, 100F, 100G, 100H, 100I, and 100J). Other details are substantially the same as those described above, and therefore, redundant explanations will be omitted.

[0069] In this specification, the term "cover" includes not only "to cover entirely" but also "to cover at least partially," and not only "to cover directly" but also "to cover indirectly." The term "fill" includes not only "to fill completely" but also "to fill at least partially" and "to fill roughly." The term "surround" includes not only "to surround completely" but also "to surround partially" and "to surround roughly." The term "expose" includes not only "to expose completely" but also "to expose partially," and "expose" means exposing a corresponding component from something that embeds it.

[0070] In this specification, "substantially" includes process errors, positional deviations, measurement errors, etc. that occur during the manufacturing process. For example, a "substantially constant" thickness includes not only a completely constant thickness but also a roughly constant thickness. Furthermore, "substantially coplanar" includes not only a completely coplanar thickness but also a roughly coplanar thickness.

[0071] In this specification, the term "cross section" refers to the cross-sectional shape of an object cut vertically or the cross-sectional shape of an object when viewed from the side, and the term "planar" refers to the planar shape of an object cut horizontally or the planar shape of an object when viewed from the top or bottom.

[0072] In this specification, for convenience, terms such as "lower side," "bottom," and "lower surface" are used to refer to the downward direction based on the cross section of the drawing, and terms such as "upper side," "upper surface," and "upper surface" are used to refer to the opposite direction. However, these are definitions of directions for convenience of explanation, and the scope of the claims is not particularly limited by such directional descriptions, and the concepts of "up" and "down" may change at any time.

[0073] In this specification, the term "connected" refers not only to direct connection but also to indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" refers to both physical and non-physical connection. Furthermore, terms such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope of the invention.

[0074] In this specification, thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness, etc. are measured using a scanning microscope or optical microscope based on a cross section obtained by polishing or cutting a printed circuit board. The cut section may be a vertical or horizontal section, and each value is measured based on the required cut section. For example, the width of the top and / or bottom ends of a via is measured on a cross section cut along the central axis of the via. If the value is not constant, the value is determined as the average of values ​​measured at any five points.

[0075] The term "one example" used in this specification does not mean the same embodiment, but is provided to emphasize and describe different unique features. However, the one example presented above does not exclude being embodied in combination with features of other examples. For example, even if a feature described in a particular example is not described in other examples, it can be understood that the feature is related to the other examples unless there is a description in the other examples that contradicts or contradicts the feature.

[0076] The terms used in this specification are merely used to describe an example and are not intended to limit the present invention. In this case, the singular expression includes the plural expression unless the context clearly indicates otherwise.

[0077] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical concept of the present invention. [Explanation of symbols]

[0078] 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K Printed Circuit Board 111, 111' First insulating layer 112, 112' second insulating layer 113, 114 Third and fourth insulating layers 121, 121' (first) wiring pattern 122 Second wiring pattern 131, 131' (first) insulating film 132 Second insulating film 141, 141' 1st metal layer 142, 142' 2nd metal layer 143, 144 3rd and 4th metal layer 151, 151' pad pattern 151-1, 151-2, 151-3 Pad patterns 1-1 to 1-3 152-1, 152-2, 152-3 Pad patterns 2-1 to 2-3 153-1, 153-2, 153-3 Pad patterns 3-1 to 3-3 161 First via pattern 161-1, 161-2, 161-3, 161-4 1-1 to 1-4 via patterns 162-1, 162-2, 162-3 2-1 to 2-3 via patterns 163-1, 163-2, 163-3, 163-4, 3-1 to 3-4 via patterns 171', 172' via patterns 1000 electronic equipment 1010 mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 camera module 1060 Antenna Module 1070 display 1080 battery 1090 signal line 1100 smartphones 1110 motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker

Claims

1. a first insulating layer; a plurality of first wiring patterns disposed on the first insulating layer at a distance from each other; a first insulating film disposed on the first insulating layer and covering each of the first wiring patterns along a surface of each of the first wiring patterns; a first metal layer covering the first insulating film along a surface of the first insulating film; a second insulating layer covering the first metal layer and filling at least a portion of the spaces separating the plurality of first wiring patterns from one another.

2. a second metal layer disposed on the first insulating layer opposite to the side on which the plurality of first wiring patterns are disposed; 2. The printed circuit board according to claim 1, wherein each of the plurality of first wiring patterns is substantially surrounded by metal on at least four sides by the first metal layer and the second metal layer.

3. each of the plurality of first wiring patterns includes a signal pattern; The printed circuit board according to claim 2 , wherein the first metal layer and the second metal layer each include a ground pattern.

4. The printed circuit board according to claim 1 , wherein the thickness of each of the first metal layer and the first insulating film is thinner than the thickness of each of the plurality of first wiring patterns.

5. the first insulating layer and the first insulating film each contain an inorganic insulating material; The printed circuit board of claim 1 , wherein the second insulating layer comprises an organic insulating material.

6. 2. The printed circuit board according to claim 1, wherein each of the plurality of first wiring patterns has a trapezoidal shape in which the width of the side adjacent to the first insulating layer is wider than the width of the opposite side in cross section.

7. a plurality of second wiring patterns disposed on the second insulating layer at a distance from each other; a second insulating film disposed on the second insulating layer and covering each of the second wiring patterns along a surface of each of the second wiring patterns; a third metal layer covering the second insulating film along a surface of the second insulating film; 2. The printed circuit board according to claim 1, further comprising: a fourth insulating layer covering the third metal layer and filling at least a portion of the spaces separating the plurality of second wiring patterns.

8. 8. The printed circuit board according to claim 7, further comprising a third insulating layer disposed between the second insulating layer and the plurality of second wiring patterns and between the second insulating layer and the second insulating film.

9. the first insulating layer, the third insulating layer, the first insulating film, and the second insulating film each contain an inorganic insulating material; The printed circuit board of claim 8 , wherein the second insulating layer and the fourth insulating layer each include an organic insulating material.

10. a fourth metal layer disposed between the second insulating layer and the third insulating layer; 9. The printed circuit board according to claim 8, wherein each of the plurality of second wiring patterns is substantially surrounded by metal on at least four sides by the third metal layer and the fourth metal layer.

11. a first pad pattern and a second pad pattern disposed on the first insulating layer; a second-1 pad pattern and a second-2 pad pattern disposed on the second insulating layer, respectively; a second-first via pattern penetrating the second insulating layer and connecting the first-first pad pattern and the second-first pad pattern to each other; a second-second via pattern penetrating the second insulating layer and connecting the first-second pad pattern and the second-second pad pattern to each other, the first insulating film and the first metal layer cover at least a portion of the first pad pattern and the second pad pattern, respectively; the second insulating film and the third metal layer cover at least a portion of the 2-1 pad pattern and the 2-2 pad pattern, respectively; the 2-1 via pattern contacts at least a portion of the first metal layer; The printed circuit board of claim 8, wherein the second-2 via pattern is spaced apart from the first metal layer.

12. a first-third pad pattern disposed on the first insulating layer; a second-third pad pattern disposed on the second insulating layer; a second-third via pattern penetrating the second insulating layer and connecting the first metal layer and the second-third pad pattern; a second-fourth via pattern penetrating the second insulating layer and connecting the first-third pad pattern and the second-third pad pattern to each other, the first insulating film and the first metal layer each cover at least a portion of the first-third pad pattern; the second insulating film and the third metal layer each cover at least a portion of the second-third pad pattern; the second-third via pattern contacts at least a portion of the first metal layer; The printed circuit board of claim 8, wherein the second to fourth via patterns are spaced apart from the first metal layer.

13. an insulating layer; a plurality of wiring patterns disposed on the insulating layer at a distance from each other; an insulating film disposed on the insulating layer and covering each of the plurality of wiring patterns along the shape of each of the plurality of wiring patterns; a first metal layer covering the insulating film; The insulating layer and the insulating film comprise the same type of insulating material.

14. The printed circuit board of claim 13 , wherein the insulating layer and the insulating film each include an inorganic insulating material.

15. a second metal layer disposed on the insulating layer opposite to the side on which the plurality of wiring patterns are disposed; 14. The printed circuit board according to claim 13, wherein each of the plurality of wiring patterns is substantially surrounded by metal on at least four sides by the first metal layer and the second metal layer.

Citation Information

Patent Citations

  • Printed circuit board and method for manufacturing the same

    JP2024072765A