Method for manufacturing wiring board and wiring board

By using conductive paste-filled through holes to supply power to the base pattern, the method addresses uneven plating thickness issues in wiring boards, achieving uniformity and cost-effectiveness in manufacturing.

JP2026001247APending Publication Date: 2026-01-07FUJIKURA LTD
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Patent Information

Application Number
JP2022187668
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-11-24
Publication Date
2026-01-07

AI Technical Summary

Technical Problem

Existing methods for manufacturing wiring boards using electrolytic plating face challenges in evenly supplying power to conductive layers, particularly in areas far from the power supply, leading to uneven thickness of the conductive layer due to long power transmission distances.

Method used

A method involving the use of through holes filled with conductive paste to form a first conductor portion, a base pattern connected to this conductor via a power supply pattern, and electrolytic plating to evenly supply power through these conductors, ensuring uniform thickness of the plating layer.

Benefits of technology

This approach allows for the formation of a wiring pattern with minimal thickness variation by ensuring even power distribution, reducing environmental impact and costs compared to alternative methods.

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Abstract

To provide a method of manufacturing a wiring board capable of forming a wiring pattern having a small variation in thickness.SOLUTION: A first step of preparing the base material 10 having the first through holes 15, a second step of forming the first through conductor portions 25 by filling the first through holes 15 with the first conductive paste and solidifying the first conductive paste, and a third step of forming the base wiring pattern 23 connected to the first through conductor portions 25 by printing the second conductive paste on the upper surface 11 of the base material 10 and solidifying the second conductive paste. A fourth step of forming the plating layer 24 on the base wiring pattern 23. The method for manufacturing the wiring board 1A according to claim 1.SELECTED DRAWING: Figure 3
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Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a wiring board, and to a wiring board. [Background technology]

[0002] A method for manufacturing a printed wiring board is known, which includes the steps of applying a conductive ink containing metal nanoparticles onto an insulating substrate made of a thermoplastic resin by inkjet printing or flexographic printing, followed by drying and baking to form a first conductive layer, and forming a second conductive layer on the first conductive layer by electrolytic plating (see, for example, Patent Document 1). For example, electrolytic copper plating can be used as this electrolytic plating, and electrolytic copper plating can be performed while passing a current between the first conductive layer and a copper plate (see, for example, Patent Document 1 (paragraph

[0068] )). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-74055 Summary of the Invention [Problem to be solved by the invention]

[0004] In the electrolytic plating described above, power is typically supplied to the first conductive layer from a power supply connected to the end of the first conductive layer. However, in areas far from the end of the first conductive layer, the power transmission distance from the power supply is long, resulting in an insufficient power supply and a thin plating layer. While it is possible to supply power evenly by connecting a power supply to an intermediate portion of the first conductive layer other than the end, it can be difficult to connect a power supply to the intermediate portion, especially when the first conductive layer has a complex planar shape. This makes it difficult to supply power evenly to the first conductive layer, resulting in an uneven thickness of the conductive layer.

[0005] The problem to be solved by the present invention is to provide a method for manufacturing a wiring board that can form a wiring pattern with little variation in thickness, and a wiring board manufactured by the manufacturing method. [Means for solving the problem]

[0006] [1] Aspect 1 of the present invention is a method for manufacturing a wiring board, comprising: a first step of preparing a substrate having a first through hole; a second step of forming a first through conductor portion by filling the first through hole with a first conductive paste and solidifying it; a third step of forming a base pattern that connects to the first through conductor portion by printing a second conductive paste on a main surface of the substrate and solidifying it; and a fourth step of forming a plating layer on the base pattern by performing electrolytic plating while supplying power to the base pattern via the first through conductor portion.

[0007] [2] A second aspect of the present invention may be a method for manufacturing a wiring board according to the first aspect, wherein the base pattern includes an underlying wiring pattern connected to the first through conductor portion and a first power supply pattern connected to the underlying wiring pattern via the first through conductor portion, and the fourth step includes supplying power from a power supply device to the first through conductor portion via the first power supply pattern.

[0008] [3] A third aspect of the present invention may be a method for manufacturing a wiring board according to the second aspect, further comprising a fifth step of forming a second power supply pattern surrounding the base pattern by printing and solidifying a third conductive paste on the main surface before the fourth step, wherein the first power supply pattern connects the first through conductor portion and the second power supply pattern, and the fourth step supplies power from the power supply device to the first through conductor portion via the first and second power supply patterns.

[0009] [4] A fourth aspect of the present invention may be a method for manufacturing a wiring board according to the third aspect, further comprising a sixth step of removing the second power supply pattern by cutting the substrate inside the second power supply pattern after the fourth step.

[0010] [5] A fifth aspect of the present invention is a method for manufacturing a wiring board according to the second aspect, wherein the first power supply pattern includes a linear pattern having one end connected to the first through conductor portion, and a pad connected to the other end of the linear pattern and wider than the linear pattern; the method for manufacturing a wiring board further includes a seventh step, prior to the fourth step, of holding the substrate with a conductive jig so that the pad contacts the conductive jig; and an eighth step, after the fourth step, of cutting the substrate outside the pad; and the fourth step may include supplying power from the power supply device to the pad via the conductive jig.

[0011] [6] A sixth aspect of the present invention may be a method for manufacturing a wiring board according to the fifth aspect, wherein the substrate has a second through hole provided at a position corresponding to the pad, and the pad includes a first pad formed on a first main surface of the substrate, a second through conductor portion formed in the second through hole and connected to the first pad, and a second pad formed on a second main surface opposite the first main surface of the wiring board and connected to the first pad via the second through conductor portion, and the seventh step may be a method for manufacturing a wiring board comprising clamping the substrate by clamping the first and second pads with the conductive jig.

[0012] [7] A seventh aspect of the present invention may be a method for manufacturing a wiring board according to any one of the second to sixth aspects, wherein the underlying wiring pattern includes a first main surface wiring pattern formed on a first main surface of the base material, and the first power supply pattern is provided on a second main surface of the base material opposite to the first main surface, and includes a first intersecting pattern that intersects with the first main surface wiring pattern in a transmitted plan view.

[0013] [8] Aspect 8 of the present invention may be a method for manufacturing a wiring board according to aspect 7, wherein the underlying wiring pattern includes a coil pattern having a spiral shape, and the first intersection pattern extends from the inside to the outside of the coil pattern so as to intersect with a portion of the coil pattern in a transmitted planar view.

[0014] [9] A ninth aspect of the present invention is a wiring board manufactured by the wiring board manufacturing method according to any one of the first to eighth aspects. [Effects of the Invention]

[0015] In the present invention, by supplying power to the base pattern through the first through conductor, power can be supplied evenly to the base pattern, and therefore a plating layer with little thickness variation can be formed on the base pattern, thereby forming a wiring pattern with little thickness variation. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a plan view showing a wiring board according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] 3(A) to 3(E) are cross-sectional views showing a method for manufacturing a wiring board according to the first embodiment of the present invention. [Figure 4] FIG. 4 is a plan view showing the wiring board to be plated in FIG. 3(B). [Figure 5] FIG. 5 is a plan view showing a wiring board according to the second embodiment of the present invention. [Figure 6] FIG. 6 is a perspective view illustrating contact between a double-sided pad portion and a conductive jig in the second embodiment of the present invention. [Figure 7] FIG. 7 is a plan view showing a wiring board to be plated in the second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0018] <<First Embodiment>> FIG. 1 is a plan view showing a wiring board 1A in the first embodiment, FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1, and FIGS. 3(A) to 3(E) are cross-sectional views showing a method for manufacturing a wiring board in the first embodiment.

[0019] The wiring board 1A in this embodiment is not particularly limited, but examples thereof include a membrane substrate and a flexible printed circuit (FPC). As shown in FIG. 1, a short rectangular FPC equipped with a coil circuit is shown as an example of the wiring board 1A in this embodiment, but the wiring board 1A is not limited to this. The circuit equipped on the wiring board 1A is not limited to a coil circuit, and the shape of the wiring board 1A may also be a long strip.

[0020] As shown in FIG. 1, this wiring board 1A includes a substrate 10 and a wiring pattern 20. The substrate 10 is a flexible film having a short rectangular planar shape. The planar shape of the substrate 10 is not limited to a short rectangular shape. The planar shape of the substrate 10 may also be a long strip shape. The planar shape of the substrate 10 can be processed into a desired planar shape using a contour processing device equipped with a mold, a laser, or the like.

[0021] The substrate 10 is made of an electrically insulating material such as a resin material. Although not particularly limited, examples of the material that constitutes the substrate 10 include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), liquid crystal polymer (LCP), polyetherimide (PEI), polyether ether ketone (PEEK), and aramid.

[0022] The substrate 10 in this embodiment has a plurality of (12 in this example) first through holes 15a to 15l. In the following description, the plurality of first through holes 15a to 15l may be collectively referred to as "first through holes 15." As shown in FIG. 3, the first through holes 15 penetrate from the upper surface 11 to the lower surface 12 of the substrate 10. The first through holes 15 can be formed using a drilling device equipped with a drill, a laser, or the like.

[0023] 1, a conductive wiring pattern 20 is formed on a substrate 10. The wiring pattern 20 has a coil pattern 21 and a first power supply pattern 30.

[0024] The coil pattern 21 is a pattern used as a coil of a coil substrate. The coil pattern 21 has a spiral shape. Specifically, the coil pattern 21 includes a plurality of (three in this example) loop patterns 22a to 22c. In the following description, the plurality of loop patterns 22a to 22c may be collectively referred to as "loop pattern 22."

[0025] The loop pattern 22a has a rectangular annular shape that follows the outer edge of the substrate 10. An end 20a of the loop pattern 22a extends to the outer edge of the substrate 10. A loop pattern 22b is provided inside the loop pattern 22a. The loop pattern 22b has a rectangular annular shape that extends substantially parallel to the loop pattern 22a and is connected to the loop pattern 22a. A loop pattern 22c is provided inside the loop pattern 22b. The loop pattern 22c has a rectangular annular shape that extends substantially parallel to the loop pattern 22b and is connected to the loop pattern 22b. That is, the loop patterns 22a to 22c form a rectangular spiral shape made of a single wiring. The number of turns of the coil pattern is not particularly limited to the above, and the shapes of the loop patterns 22a to 22c are also not particularly limited to the above.

[0026] When a coil substrate is fabricated using this wiring board 1A, an IC chip or the like including a memory, a control circuit, or the like is mounted on the wiring board 1A. As an example, and not limited to this, an IC chip electrically connected to an end of the innermost loop pattern 22c (first through conductor portion 25l described below) can be disposed inside the innermost loop pattern 22c, and further electrically connected to end 20a of the outermost loop pattern 22a via a jumper or the like. Electronic components other than IC chips may also be mounted on the coil substrate.

[0027] As shown in FIGS. 1 and 2, the loop pattern 22 has an underlying wiring pattern 23, a plating layer 24, and a plurality of (12 in this example) first through conductor portions 25a to 25l.

[0028] As shown in FIG. 2, the base wiring pattern 23 is formed by printing and solidifying a conductive paste on the upper surface 11 of the substrate 10. In this embodiment, the entire base wiring pattern 23 is formed on the upper surface 11 of the substrate 10. This base wiring pattern 23 is a base for plating, and has a spiral shape similar to the coil pattern 21. Note that the upper surface 11 in this embodiment corresponds to an example of the "first main surface" in the present invention, and the entire base wiring pattern 23 in this embodiment corresponds to an example of the "first main surface-side wiring pattern" in the present invention.

[0029] The conductive paste constituting the base wiring pattern 23 is composed of conductive particles and a binder resin mixed with water or a solvent and various additives. The conductive paste constituting the base wiring pattern 23 corresponds to an example of the "second conductive paste" in the present invention.

[0030] Specific examples of conductive particles include metal-based materials and carbon-based materials. Specific examples of metal-based materials include silver, copper, nickel, tin, bismuth, zinc, indium, palladium, and alloys thereof. Specific examples of carbon-based materials include graphite, carbon black (furnace black, acetylene black, ketjen black), carbon nanotubes, carbon nanofibers, and mixtures thereof. Alternatively, a mixture of both a metal material and a carbon-based material may be used as the conductive particles.

[0031] Specific examples of binder resins include acrylic resins, polyester resins, epoxy resins, vinyl resins, urethane resins, phenolic resins, polyimide resins, silicone resins, fluororesins, etc. Furthermore, examples of solvents contained in the conductive paste include α-terpineol, butyl carbitol acetate, butyl carbitol, 1-decanol, butyl cellosolve, diethylene glycol monoethyl ether acetate, tetradecane, etc.

[0032] The plating layer 24 is formed on the underlying wiring pattern 23 by electrolytic plating, and covers the underlying wiring pattern 23. This plating layer 24 increases the thickness of the coil pattern 21 to a desired value. This plating layer 24 is made of a metal. Specific examples of metals that make up the plating layer 24 include copper, nickel, and gold.

[0033] The first through conductor 25 is formed by filling the inside of the first through hole 15 with a conductive paste and solidifying it. Specific examples of the conductive paste include the same materials as the specific examples of the conductive paste that constitute the above-mentioned underlying wiring pattern 23. The conductive paste that constitutes this first through conductor 25 corresponds to an example of the "first conductive paste" in the present invention.

[0034] 2, the first penetrating conductor 25 in this embodiment is connected to the underlying wiring pattern 23. The first penetrating conductor 25 is a conductor for supplying power to the underlying wiring pattern 23 in the electrolytic plating step of forming the plating layer 24.

[0035] 1, the first through conductor portions 25 in this embodiment are provided at the corners (bends) of the loop patterns 22a to 22c. Note that the first through conductor portions 25 do not need to be provided at the corners of the loop patterns 22a to 22c, and may be provided at portions other than the corners.

[0036] 1 and 2, the first power supply pattern 30 is formed by printing and solidifying a conductive paste on the lower surface 12 of the substrate 10. The lower surface 12 in this embodiment corresponds to an example of the "second main surface" in the present invention.

[0037] Specific examples of the conductive paste constituting the first power supply pattern 30 include materials similar to the specific examples of the conductive paste constituting the above-mentioned underlying wiring pattern 23. The conductive paste constituting the first power supply pattern 30 also corresponds to an example of the "second conductive paste" in the present invention.

[0038] When a coil substrate is fabricated using wiring board 1A, first power supply pattern 30 is electrically connected to coil pattern 21, but is a conductor portion that does not function as a coil circuit. As will be described in detail later, first power supply pattern 30 is used to supply power to first penetrating conductor portion 25 in the electrolytic plating step of forming plating layer 24.

[0039] The first power supply pattern 30 in this embodiment includes a plurality of (12 in this example) linear patterns 31a to 31l. In the following description, the plurality of linear patterns 31a to 31l may be collectively referred to as "linear pattern 31."

[0040] The linear patterns 31a to 31l are connected to the first through conductors 25a to 25l, respectively, and extend toward the outer edge of the substrate 10. As shown in Fig. 2, the linear patterns 31a to 31l in this embodiment are connected to the first through conductors 25a to 25l, respectively. Therefore, the linear patterns 31a to 31l are not directly connected to the coil pattern 21, but are electrically connected to the coil pattern 21 via the first through conductors 25a to 25l.

[0041] In FIG. 1, linear patterns 31a, 31e, and 31i extend along the X direction from first through conductors 25a, 25e, and 25i to the outer edge of substrate 10 on the +X direction side. Among linear patterns 31a, 31e, and 31i, linear pattern 31e extends from first through conductor 25e, which is located more inward on substrate 10 than loop pattern 22a. Therefore, linear pattern 31e intersects with loop pattern 22a in a transparent plan view (a plan view obtained by viewing wiring board 1A from above or below (the normal direction to the main surface of wiring board 1A (the Z direction in the examples of FIGS. 1 and 2))). Similarly, as shown in FIGS. 1 and 2, linear pattern 31i extends from first through conductor 25i, which is located more inward than loop patterns 22a and 22b, and therefore intersects with loop patterns 22a and 22b in a transparent plan view.

[0042] Furthermore, the linear patterns 31b, 31f, and 31j each extend along the Y direction from the first through conductors 25b, 25f, and 25j to the outer edge of the substrate 10 on the -Y direction side. Among these linear patterns 31b, 31f, and 31j, the linear pattern 31f extends from the first through conductor 25f, which is located more inward on the substrate 10 than the loop pattern 22a. Therefore, the linear pattern 31f intersects with the loop pattern 22a in a transparent plan view. Similarly, the linear pattern 31j extends from the first through conductor 25j, which is located more inward than the loop patterns 22a and 22b, and therefore intersects with the loop patterns 22a and 22b in a transparent plan view.

[0043] The linear patterns 31c, 31g, and 31k also have basically the same configuration as the linear patterns 31a, 31e, and 31i described above, and extend along the X direction from the first through conductors 25c, 25g, and 25k to the outer edge of the substrate 10 on the -X direction side. The linear pattern 31g intersects with the loop pattern 22a in a transparent plan view, and the linear pattern 31k intersects with the loop patterns 22a and 22b in a transparent plan view. Similarly, the linear patterns 31d, 31h, and 31l also have basically the same configuration as the linear patterns 31b, 31f, and 31j described above, and extend along the Y direction from the first through conductors 25d, 25h, and 25l to the outer edge of the substrate 10 on the +Y direction side. The linear pattern 31h intersects with the loop pattern 22a in a transparent plan view, and the linear pattern 31l intersects with the loop patterns 22a and 22b in a transparent plan view.

[0044] The linear patterns 31e to 31l in this embodiment correspond to an example of a "first intersecting pattern" in the present invention. The linear patterns 31a to 31l extend along the X direction or the Y direction, but are not limited thereto, and may extend along a direction other than the X direction or the Y direction on the lower surface 12 of the substrate 10.

[0045] Next, a method for manufacturing wiring board 1A as described above will be described with reference to Figures 3(A) to 3(E) and 4. Figures 3(A) to 3(E) are cross-sectional views showing the method for manufacturing wiring board 1A in the first embodiment, and Figure 4 is a plan view showing wiring board 50A to be plated in Figure 3(C). Note that Figure 3(C) is a cross-section taken along line IIIC-IIIC in Figure 4, and the cross-sections shown in Figures 3(A), 3(B), 3(D), and 3(E) correspond to the cross-section taken along line III-III in Figure 4.

[0046] First, as shown in FIG. 3(A), a substrate 10 having a first through hole 15 penetrating from the upper surface 11 to the lower surface 12 is prepared (substrate preparation step). As described above, the first through hole 15 is a through hole formed using a general drilling device. In the substrate preparation step, no metal film is formed on the inner surface of this first through hole 15, and the first through hole 15 is not a through hole with a metal plating film formed inside the through hole. This substrate preparation step corresponds to an example of the "first step" in the present invention.

[0047] Next, as shown in FIG. 3(B), a conductive paste is printed on the first through-holes 15 and the upper surface 11 of the substrate 10 and solidified (cured) to form an underlying wiring pattern 23, a first penetrating conductor 25, and an upper surface frame pattern 41 (described later) (first printing step). In this embodiment, the first through-holes 15 are filled with the conductive paste by printing. The first printing step in this embodiment corresponds to an example of the "second step" of the present invention, as well as to a part of the "third step" and a part of the "fifth step" of the present invention.

[0048] In addition, in this embodiment, the base wiring pattern 23 and the first penetrating conductor portion 25 are simultaneously formed by filling the inside of the first through hole 15 with a conductive paste by printing, but this is not limiting. The base wiring pattern 23 and the first penetrating conductor portion 25 may be formed in separate steps. Furthermore, the upper surface side frame pattern 41 may also be formed in a separate step from the base wiring pattern 23.

[0049] The conductive paste may be any of the above-described conductive pastes. The conductive paste may be printed by either a contact coating method or a non-contact coating method. Specific examples of contact coating methods include screen printing, gravure printing, offset printing, gravure offset printing, and flexographic printing. Specific examples of non-contact coating methods include inkjet printing, spray coating, dispense coating, and jet dispensing. The heat source for curing the conductive paste is not particularly limited, and examples include an electric heating oven, an infrared oven, a far-infrared oven (IR), a near-infrared oven (NIR), and a laser irradiation device. A heat treatment using a combination of these may also be performed.

[0050] Next, as shown in FIG. 3(C), a conductive paste is printed on the lower surface 12 of the substrate 10 and solidified (cured) to form a first power supply pattern 30 and a lower-surface frame pattern 42 (described later) (second printing step). The printing method and solidification method for the conductive paste are not particularly limited, but examples thereof include the printing method and solidification method described above. This second printing step corresponds to a part of the "third step" and a part of the "fifth step" in the present invention, and the "third step" and the "fifth step" are completed by this second printing step. The conductive paste used to form the upper-surface frame pattern 41 and the lower-surface frame pattern 42 corresponds to an example of the "third conductive paste" in the present invention.

[0051] In the present embodiment, the first through-holes 15 are filled with a conductive paste in the first printing step, but this is not limiting. The first power supply pattern 30 and the first through conductor portion 25 may be simultaneously formed by filling the first through-holes 15 with a conductive paste in the second printing step.

[0052] In this way, the wiring board 50A to be plated is produced. The wiring board 50A to be plated is a wiring board that will be subjected to electrolytic plating in a subsequent process (the electrolytic plating process shown in FIG. 3(D)). As shown in FIG. 4, the wiring board 50A to be plated differs from the above-described wiring board 1A in that (1) the substrate 10 is not contoured, (2) a second power supply pattern 40 is formed, and (3) the underlying wiring pattern 23 has not been subjected to electrolytic plating. However, other configurations are the same as those of the above-described wiring board 1A. Below, only the differences between the wiring board 50A to be plated and the wiring board 1A will be described, and the same components as those of the wiring board 1A will be assigned the same reference numerals and will not be described again.

[0053] Regarding the above-mentioned difference (1), as shown in Fig. 4, since the outer shape of substrate 10 in wiring board 50A to be plated is not processed, the area of ​​substrate 10 in wiring board 50A to be plated is larger than the area of ​​substrate 10 in wiring board 1A. By cutting substrate 10 of wiring board 50A to be plated along cutting line CL in a later process, an outer edge shaped along cutting line CL is formed in substrate 10 of wiring board 1A.

[0054] Regarding the above difference (2), as shown in Figures 3(C) and 4, the wiring board 50A to be plated has a second power supply pattern 40 outside the cutting line CL. This second power supply pattern 40 is a conductor portion that is electrically connected to the power supply device 100 in the electrolytic plating process (see Figure 3(C)).

[0055] The second power supply pattern 40 has an upper surface side frame pattern 41 and a lower surface side frame pattern 42. As shown in Fig. 4, the upper surface side frame pattern 41 is formed on the upper surface 11 of the substrate 10 and has a frame shape. The upper surface side frame pattern 41 surrounds the underlying wiring pattern 23 on the upper surface 11 and is connected to an end portion 23a of the underlying wiring pattern 23.

[0056] On the other hand, the lower surface side frame pattern 42 is formed on the lower surface 12 of the substrate 10, and has a frame shape similar to the upper surface side frame pattern 41. The lower surface side frame pattern 42 surrounds the first power supply pattern 30 on the lower surface 12, and is connected to the linear pattern 31 of the first power supply pattern 30.

[0057] Regarding the above difference (3), as shown in Fig. 3(C), the above-mentioned plating layer 24 is not formed on the underlying wiring pattern 23. As described above, the plating layer 24 is formed on the underlying wiring pattern 23 in the electrolytic plating process.

[0058] 3(D), electrolytic plating is performed while supplying power to the underlying wiring pattern 23 of the wiring board 50A to be plated, thereby forming a plating layer 24 on the underlying wiring pattern 23 (electrolytic plating step). This electrolytic plating step corresponds to an example of the "fourth step" in the present invention.

[0059] In the electrolytic plating process of this embodiment, while the wiring board 50A to be plated is immersed in a plating solution (not shown), power is supplied from the power supply device 100 to the base wiring pattern 23, thereby making the potential of the base wiring pattern 23 lower than the potential of the anode (not shown). Specifically, the power supply device 100 supplies power to the upper surface side frame pattern 41 and the lower surface side frame pattern 42 of the second power supply pattern 40.

[0060] 4, power supplied to the upper surface side frame pattern 41 is supplied to the base wiring pattern 23 via the end 23a of the base wiring pattern 23. Furthermore, power supplied to the lower surface side frame pattern 42 is supplied to the first through conductor 25 via the first power supply pattern 30. Then, power is supplied to the base wiring pattern 23 via the first through conductor 25.

[0061] In this manner, in this embodiment, power can be supplied to the base wiring pattern 23 via the first penetrating conductor portion 25, and therefore power can be supplied from a location other than the end portion 23a even to a portion where the power transmission distance from the end portion 23a of the base wiring pattern 23 becomes long. Therefore, power can be supplied uniformly to the base wiring pattern 23, and a plating layer 24 with little thickness variation can be formed on the base wiring pattern 23.

[0062] In particular, for loop patterns 23c and 23d that are located inside outermost loop pattern 23b among the base wiring pattern 23, it is difficult to provide a power supply pattern between them and the top surface side frame pattern 41. In contrast, in the present embodiment, power can be supplied to loop patterns 23c and 23d via the bottom surface side frame pattern 42, the first power supply pattern 30 connected to the bottom surface side frame pattern 42, and the first through conductors 25d to 25l connected to the first power supply pattern 30, so that power can be supplied uniformly throughout the entire base wiring pattern 23. Therefore, a plating layer 24 with little thickness variation can be formed even in areas where connection to the top surface side frame pattern 41 is difficult.

[0063] Furthermore, the method for manufacturing wiring board 1A in this embodiment can reduce the amount of unnecessary conductor parts that are discarded, compared to circuit formation by subtractive etching, thereby reducing the environmental impact.

[0064] Furthermore, the method for manufacturing wiring board 1A according to the present embodiment does not require a catalyst such as a palladium catalyst, which reduces costs compared to circuit formation by electroless plating, and also improves plating speed compared to electroless plating.

[0065] In this embodiment, the case where the wiring boards 50A to be plated are subjected to electrolytic plating processing one by one is illustrated, but this is not limited to this. For example, long wiring boards to be plated may be subjected to electrolytic plating processing continuously using a roll-to-roll plating device such as that disclosed in Japanese Patent No. 6655145.

[0066] 3(E), the substrate 10 is cut along cutting lines CL located inside the second power supply pattern 40 (external processing step). As a result, the second power supply pattern 40 is removed, and the portion of the linear pattern 31 located outside the cutting lines CL is also removed. This external processing step corresponds to an example of the "sixth step" of the present invention. In this manner, the wiring board 1A of the present embodiment is manufactured.

[0067] <<Second embodiment>> Figure 5 is a plan view showing wiring board 1B in the second embodiment, Figure 6 is an oblique view explaining the contact between double-sided pad portion 33 and conductive jig 200 in the second embodiment, and Figure 7 is a plan view showing wiring board 50B to be plated in the second embodiment.

[0068] As shown in FIG. 5, wiring board 1B of the second embodiment differs from wiring board 1A of the first embodiment mainly in that (1) some of loop patterns 22a-22c are formed on lower surface 12 of substrate 10, (2) some of linear patterns 31 are formed on upper surface 11 of substrate 10, and (3) double-sided pad portions 201, 33a-33l are formed instead of second power supply pattern 40. However, the rest of the configuration is the same as in the first embodiment. Below, wiring board 1B of the second embodiment will be described only in terms of differences from the first embodiment, and the same components as in the first embodiment will be assigned the same reference numerals and will not be described again.

[0069] Coil pattern 21 of wiring board 1B in the second embodiment includes loop patterns 22a to 22c, similar to coil pattern 21 in the first embodiment. Loop pattern 22a in the second embodiment includes a pair of upper surface side loop patterns 221a extending in the X direction and a pair of lower surface side loop patterns 222a extending in the Y direction. As in the first embodiment, upper surface side loop patterns 221a are formed on upper surface 11 of substrate 10, while lower surface side loop patterns 222a are formed on lower surface 12 of substrate 10.

[0070] Similar to the loop pattern 22a, the loop pattern 22b includes a pair of upper surface side loop patterns 221b extending in the X direction on the upper surface 11 of the substrate 10, and a pair of lower surface side loop patterns 222b extending in the Y direction on the lower surface 12 of the substrate 10. Similarly, the loop pattern 22c also includes a pair of upper surface side loop patterns 221c extending in the X direction on the upper surface 11 of the substrate 10, and a pair of lower surface side loop patterns 222c extending in the Y direction on the lower surface 12 of the substrate 10.

[0071] In the second embodiment, the linear patterns 31a, 31e, 31i and the linear patterns 31c, 31g, 31k of the first power supply pattern 30 are formed on the upper surface 11 of the substrate 10. The linear pattern 31e intersects with the lower surface-side loop pattern 222a in a transparent plan view, and the linear pattern 31i intersects with the lower surface-side loop patterns 222a and 222b in a transparent plan view. Similarly, the linear pattern 31g intersects with the lower surface-side loop pattern 222a in a transparent plan view, and the linear pattern 31k intersects with the lower surface-side loop patterns 222a and 222b in a transparent plan view.

[0072] In the second embodiment, a plurality of (12 in this example) double-sided pad sections 33a-33l are formed instead of the second power supply pattern 40 in the first embodiment. The double-sided pad sections 33a-33l are conductive and connected to one end of the linear patterns 31a-31l, respectively. Like the second power supply pattern 40, the double-sided pad sections 33a-33l function as external terminals to which power is supplied from the power supply device 100. In the following description, the multiple double-sided pad sections 33a-33l may be collectively referred to as "double-sided pad section 33."

[0073] 6, the double-sided pad portion 33 is the portion that comes into contact with the conductive jig 200. Since the double-sided pad portion 33 is covered by the conductive jig 200 during the electrolytic plating process, the plating layer 24 is not formed on the double-sided pad portion 33.

[0074] The double-sided pad section 33 has an upper surface pad 34, a lower surface pad 35, and a second through conductor section 36. The upper surface pad 34 in this embodiment corresponds to an example of a "first pad" in the present invention, and the lower surface pad 35 in this embodiment corresponds to an example of a "second pad" in the present invention.

[0075] The upper surface pads 34 are formed by printing and solidifying a conductive paste on the upper surface 11 of the substrate 10. Specific examples of the conductive paste include the same materials as the specific examples of the conductive paste that make up the above-mentioned underlying wiring pattern 23. The upper surface pads 34 are pads that are wider than the linear pattern 31. The upper surface pads 34 can be formed in the first printing step (see FIG. 3(B)) in the above-mentioned first embodiment.

[0076] The lower surface pads 35 are formed by printing and solidifying a conductive paste on the lower surface 12 of the substrate 10. Specific examples of the conductive paste include the same materials as the specific examples of the conductive paste that make up the above-mentioned underlying wiring pattern 23. The lower surface pads 35 are pads that are wider than the linear pattern 31. The lower surface pads 35 can be formed in the second printing step (see FIG. 3(C)) in the above-mentioned first embodiment.

[0077] The upper surface side pads 34 and the lower surface side pads 35 are connected to each other via second penetrating conductors 36. The second penetrating conductors 36 are formed by filling the second through holes 16 of the substrate 10 with a conductive paste and solidifying it. The second penetrating conductors 36 can be formed in the first and / or second printing steps in the first embodiment described above.

[0078] Furthermore, an end 20a of the loop pattern 22a is connected to a double-sided pad section 201. This double-sided pad section 201 has the same configuration as the double-sided pad section 33 described above.

[0079] The method for manufacturing wiring board 1B as described above will be described together with the structure of wiring board 50B to be plated in the second embodiment.

[0080] 7, the wiring board 50B to be plated of the second embodiment differs from the wiring board 1B described above in that (1) the substrate 10 has not been contoured, (2) the underlying wiring pattern 23 has not been subjected to electrolytic plating, and (3) a contact area CR with the conductive jig 200 is provided. However, the other configurations are the same as those of the wiring board 1B described above. Below, only the differences between the wiring board 50B to be plated and the wiring board 1B will be described, and the same components as those of the wiring board 1A will be assigned the same reference numerals and will not be described again. Furthermore, the differences (1) and (2) described above are the same as those of the wiring board 50A to be plated of the first embodiment, and therefore will not be described again.

[0081] The wiring board 50B to be plated can be produced in essentially the same manner as the substrate preparation process (see FIG. 3(A)), the first printing process (see FIG. 3(B)), and the second printing process (see FIG. 3(C)).

[0082] 6 and 7, the base material 10 of the wiring board 50B to be plated includes contact regions CR with the conductive jig 200 on the upper surface 11 and the lower surface 12. These contact regions CR are the portions that come into contact with the upper portion 200a and the lower portion 200b of the conductive jig 200 that holds the wiring board 50B to be plated in the electrolytic plating step (see FIG. 3(D)).

[0083] Prior to the electroplating step, the substrate 10 is sandwiched and held (clamped) by the conductive jig 200 at this contact region CR (holding step). The double-sided pad portions 33, 201 are contained within this contact region CR, and when the substrate 10 is sandwiched between the conductive jig 200, both the upper surface pads 34 and the lower surface pads 35 come into contact with the conductive jig 200. This holding step corresponds to an example of the "seventh step" of the present invention. Although not specifically shown, the upper portion 200a and the lower portion 200b in this embodiment have a frame-like shape corresponding to the contact region CR.

[0084] In the second embodiment, the electrolytic plating step is performed after the holding step. In the second embodiment, since a part of the underlying wiring pattern 23 to be plated is formed on the lower surface of the substrate 10, the electrolytic plating process is performed on both surfaces of the underlying wiring pattern 23.

[0085] In this electrolytic plating process, the conductive jig 200 is supplied with power from the power supply device 100 (see FIG. 3(D)), and supplies the power to the double-sided pad section 33. The power supplied to the double-sided pad section 33 is supplied to the underlying wiring pattern 23 via the linear pattern 31 and the first penetrating conductor section 25, as in the first embodiment.

[0086] Although not particularly shown, the first power supply pattern 30 in the second embodiment is formed on the same surface as the underlying wiring pattern 23, and therefore a plating layer may also be formed on the first power supply pattern 30. However, no plating layer is formed on the portion of the first power supply pattern 30 that is covered by the conductive jig 200.

[0087] After the electrolytic plating step is completed, the substrate 10 is removed from the conductive jig 200, and the substrate 10 is cut along the cutting line CL outside the double-sided pad portion 33 (external processing step). In the second embodiment, the cutting line CL is included in the contact region CR and is located outside the double-sided pad portions 33, 201. Therefore, as shown in FIG. 5, the double-sided pad portions 33, 201 remain on the wiring board 1B. The external processing step in the second embodiment corresponds to an example of the "eighth step" in the present invention.

[0088] In the manufacturing method of wiring board 1B in this second embodiment, as in the first embodiment, power can be supplied to underlying wiring pattern 23 via first penetrating conductor portion 25, so that plating layer 24 with little thickness variation can be formed on underlying wiring pattern 23.

[0089] Furthermore, in this embodiment, since base material 10 can be cut outside double-sided pad portions 33, 201, it is possible to manufacture wiring board 1B in which double-sided pad portions 33, 201 are not exposed at the outer edge. In other words, it is possible to manufacture wiring board 1B with a low risk of short circuits, etc.

[0090] It should be noted that the above-described embodiments have been described to facilitate understanding of the present invention, and are not intended to limit the present invention. Therefore, the elements disclosed in the above embodiments are intended to include all design modifications and equivalents that fall within the technical scope of the present invention. [Explanation of symbols]

[0091] 1A,1B…Wiring board 10...Base material 11…Top surface 12…Bottom surface 15...First through hole 16...Second through hole 20...Wiring pattern 20a...End 201...Double-sided pad section 21...Coil pattern 22, 22a~22c...Loop pattern 221a~221c...Upper loop pattern 222a~222c...Lower side loop pattern 23...Underlay wiring pattern 23a...end 23b~23d...Loop pattern 24...Plating layer 25a to 25l: first through conductor portions 30...First power supply pattern 31a~31l...Linear pattern 33, 33a to 33l...Double-sided pad section 34...Top pad 35...Bottom pad 36...Second through conductor portion 40...Second power supply pattern 41...Top frame pattern 42...Bottom frame pattern 50A, 50B...Plated wiring board 100…Power supply device 200...Conductive jig CL…cutting line CR…Contact area

Claims

1. A first step of preparing a substrate having a first through hole; a second step of filling the first through holes with a first conductive paste and solidifying the paste to form first through conductors; a third step of forming a base pattern connected to the first through conductor portion by printing and solidifying a second conductive paste on a main surface of the base material; a fourth step of forming a plating layer on the base pattern by performing electrolytic plating while supplying power to the base pattern through the first penetrating conductor portion.

2. 2. The method for manufacturing a wiring board according to claim 1, The base pattern is an underlying wiring pattern connected to the first through conductor portion; a first power supply pattern connected to the underlying wiring pattern via the first through conductor portion, The fourth step includes supplying power from a power supply device to the first through conductor portion via the first power supply pattern.

3. 3. The method for manufacturing a wiring board according to claim 2, The method for manufacturing a wiring board further includes, before the fourth step, a fifth step of printing a third conductive paste on the main surface and solidifying the paste to form a second power supply pattern surrounding the base pattern; the first power supply pattern connects the first through conductor portion and the second power supply pattern; The fourth step is a method for manufacturing a wiring board, in which power is supplied from the power supply device to the first through conductor portion via the first and second power supply patterns.

4. The method for manufacturing a wiring board according to claim 3, The method for manufacturing a wiring board further includes a sixth step, after the fourth step, of removing the second power supply pattern by cutting the base material inside the second power supply pattern.

5. 3. The method for manufacturing a wiring board according to claim 2, The first power supply pattern is a linear pattern having one end connected to the first through conductor portion; a pad connected to the other end of the linear pattern and wider than the linear pattern, The method for manufacturing the wiring board includes: a seventh step, which is performed before the fourth step, of holding the substrate with a conductive jig so that the pad contacts the conductive jig; an eighth step of cutting the substrate outside the pad after the fourth step, The fourth step includes supplying power from the power supply device to the pad via the conductive jig.

6. 6. The method for manufacturing a wiring board according to claim 5, the base member has a second through-hole provided at a position corresponding to the pad; The pad is a first pad formed on a first main surface of the substrate; a second through conductor portion formed in the second through hole and connected to the first pad; a second pad formed on a second main surface of the wiring board opposite to the first main surface, the second pad being connected to the first pad via the second through conductor portion; The seventh step includes clamping the base material by clamping the first and second pads with the conductive jig.

7. 3. The method for manufacturing a wiring board according to claim 2, the underlying wiring pattern includes a first main surface side wiring pattern formed on a first main surface of the base material, The first power supply pattern is provided on a second main surface of the substrate opposite the first main surface, and includes a first intersecting pattern that intersects with the first main surface side wiring pattern in a transmitted plan view.

8. The method for manufacturing a wiring board according to claim 7, the underlying wiring pattern includes a coil pattern having a spiral shape, The method for manufacturing a wiring board, wherein the first intersecting pattern extends from the inside to the outside of the coil pattern so as to intersect with a part of the coil pattern in a transparent plan view.

9. A wiring board manufactured by the method for manufacturing a wiring board according to any one of claims 1 to 8.

Citation Information

Patent Citations

  • Manufacturing method of printed wiring board

    JP2018074055A