Motor driver circuit and driving method

Abstract

To provide a motor driver circuit and a driving method capable of accurately detecting the position of a rotor.SOLUTION: The phase signal generator 250 generates a current phase signal φ indicating the position of the rotor of the three phase brushless motor based on at least one of the Hall signals HU, HV, and HW. The reference pulse signal generator 252 generates a reference pulse signal SREF that transitions at each edge of at least one of the Hall signals HU, HV, and HW. The feedback pulse signal generator 264 generates a feedback pulse signal SFB that transitions each time the current phase signal φ crosses a discrete reference phase θ. The error detector 258 compares the frequencies and phases of the reference pulse signal SREF and the feedback pulse signal SFB, and generates an error signal err. The slope of the current phase signal φ is feedback-controlled so that the error signal err approaches zero.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a driving technique for a three-phase brushless motor. [Background technology]

[0002] When driving a three-phase brushless motor, it is necessary to switch the drive phase depending on the rotor position. Three-phase brushless motor drive methods are classified into sensorless control and sensor-based control depending on the rotor position detection method. A typical sensor is a hall sensor, and hall sensor drive uses the output (called a hall signal) of a sensor such as a hall element to detect the rotor position.

[0003] When three-phase Hall elements are installed in the appropriate position relative to the motor to be driven and the magnetic flux of the magnet is ideally magnetized, the three-phase Hall signals have an ideal waveform with a 50% duty cycle and an even phase difference of 120°. However, if the three-phase Hall elements are installed in a misaligned position, the positions of the positive and negative edges of the Hall signal will deviate from the ideal waveform. Driving a motor based on Hall signals with errors can cause noise and vibration. In the 180-degree conduction method (sine wave drive method), the current flowing through the coil is controlled based on a sine wave or similar waveform according to the phase angle. Therefore, the rotor position (phase angle) must be accurately known. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-85418

[0005] [overview] The present disclosure has been made in view of the above-mentioned problems, and one purpose of an embodiment thereof is to provide a motor driver circuit and a driving method that are capable of accurately detecting the position of a rotor.

[0006] One aspect of the present disclosure relates to a motor driver circuit for driving a three-phase brushless motor. The motor driver circuit includes a phase signal generator that generates a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal. The phase signal generator includes a reference pulse signal generator that generates a reference pulse signal that transitions with each edge of the at least one Hall signal, a feedback pulse signal generator that generates a feedback pulse signal that transitions each time the current phase signal φ crosses a plurality of discrete reference phases θ, an error detector that includes a phase frequency detector that compares the frequency and phase of the reference pulse signal and the feedback pulse signal and generates an error signal according to the comparison result, a loop filter that filters the error signal, and an integration circuit that integrates the output of the loop filter to generate the current phase signal φ.

[0007] Another aspect of the present disclosure is a method for driving a sensor-equipped three-phase brushless motor. The method includes generating a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal. The step of generating the current phase signal φ includes generating a reference pulse signal that transitions with each edge of the at least one Hall signal, generating a feedback pulse signal that transitions each time the current phase signal φ crosses a plurality of discrete reference phases θ, comparing the frequencies and phases of the reference pulse signal and the feedback pulse signal using a phase frequency detector and generating an error signal according to the comparison result, filtering the error signal using a loop filter, and integrating an output of the loop filter to generate the current phase signal φ.

[0008] Any combination of the above components, or mutual substitution of components or expressions between methods, devices, systems, etc., are also valid aspects of the present invention or the present disclosure. Furthermore, the description in this section does not explain all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a circuit diagram of a motor circuit according to an embodiment. [Figure 2] FIG. 2 is a diagram showing the transition of the three-phase hall signals HU, HV, and HW when the motor is rotating. [Figure 3] FIG. 3 is a functional block diagram of the phase signal generator. [Figure 4] FIG. 4 is a diagram illustrating the operation of the phase signal generator of FIG.

[0010] [Detailed explanation] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. Furthermore, this summary is not an exhaustive overview of all possible embodiments, nor does it limit essential elements of the embodiments. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0011] A motor driver circuit according to one embodiment drives a three-phase brushless motor. The motor driver circuit includes a phase signal generator that generates a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal. The phase signal generator includes a reference pulse signal generator that generates a reference pulse signal that transitions with each edge of the at least one Hall signal, a feedback pulse signal generator that generates a feedback pulse signal that transitions each time the current phase signal φ crosses a plurality of discrete reference phases θ, an error detector that includes a phase frequency detector that compares the frequency and phase of the reference pulse signal and the feedback pulse signal and generates an error signal according to the comparison result, a loop filter that filters the error signal, and an integration circuit that integrates the output of the loop filter to generate the current phase signal φ.

[0012] This phase signal generator operates as a PLL (Phase Locked Loop) circuit. The PLL circuit feedback controls the slope of the current phase signal so that the phase and frequency of the feedback pulse signal approach those of a reference pulse signal based on the Hall signal, thereby generating a current phase signal synchronized with the Hall signal. If the installation position of the Hall element shifts, an accurate current phase signal can be generated by correcting the reference phase value according to the amount of shift.

[0013] In one embodiment, the reference pulse signal generator may include an exclusive OR (XOR) gate that receives the U-phase Hall signal, the V-phase Hall signal, and the W-phase Hall signal and generates a three-phase composite signal, and an edge detection circuit that receives the three-phase composite signal and generates a reference pulse signal.

[0014] In one embodiment, the integrator circuit may integrate the output of the loop filter to a first order.

[0015] In one embodiment, the integrator circuit may perform a second-order integration of the output of the loop filter.

[0016] In one embodiment, the multiple reference phases θ may be individually configurable.

[0017] In one embodiment, the loop filter may include a PI (proportional-integral) controller.

[0018] In one embodiment, the motor driver circuit may be monolithically integrated on a single semiconductor substrate. "Monolithic integration" includes cases where all of the circuit components are formed on a semiconductor substrate, or where the main circuit components are monolithically integrated, and some resistors and capacitors for adjusting circuit constants may be provided outside the semiconductor substrate. By integrating the circuit on a single chip, the circuit area can be reduced and the characteristics of the circuit elements can be maintained uniformly.

[0019] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be designated by the same reference numerals, and redundant descriptions will be omitted where appropriate. Furthermore, the embodiments are merely examples and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0020] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0021] Similarly, "a state in which component C is provided between component A and component B" includes not only cases in which components A and C, or components B and C, are directly connected, but also cases in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the functions or effects achieved by their combination.

[0022] 1 is a circuit diagram of a motor circuit 100 according to an embodiment. The motor circuit 100 includes a three-phase brushless motor (hereinafter simply referred to as a motor) 102 and a motor driver circuit 200 that drives the motor 102. The motor 102 is a motor with three Hall sensors, in which three Hall elements 104U, 104V, and 104W are attached. Each of the Hall elements 104U, 104V, and 104W is supplied with a Hall bias voltage V generated by the motor driver circuit 200 or a separate power supply circuit. HB Each Hall element 104 generates a pair of Hall voltages V that indicate the rotor position of the motor 102. H+ ,V H- Output.

[0023] The motor driver circuit 200 drives the motor 102 based on a command from the host controller 106. The motor driver circuit 200 has a U-phase output OUTU, a V-phase output OUTV, and a W-phase output OUTW that are connected to the U-phase, V-phase, and W-phase coils of the motor 102. The motor driver circuit 200 also outputs a Hall voltage V H+ ,V H- The output OUT# (#=U, V, W) of each phase can be high (H), low (L) or high impedance (HiZ). High H can be not only a fixed high but also a PWM modulated state.

[0024] The motor driver circuit 200 includes a controller circuit 210, a pre-driver 220, an inverter circuit 230, and Hall comparators 240U, 240V, and 240W, all of which are monolithically integrated on a single semiconductor substrate. "Monolithically integrated" includes cases where all of the circuit components are formed on the semiconductor substrate, and cases where the main circuit components are monolithically integrated, and some resistors, capacitors, etc. may be provided outside the semiconductor substrate to adjust the circuit constants.

[0025] The power supply (VDD) terminal of the motor driver circuit 200 is supplied with a power supply voltage V from an external power supply (not shown). DD is supplied.

[0026] The Hall comparator 240U detects the Hall voltage V H+ and V H- and generate a Hall signal HU that indicates the magnitude relationship. The Hall signal HU is H+ , V H- The same applies to the Hall comparators 240V and 240W.

[0027] The controller circuit 210 generates a control signal S that controls the state of the inverter circuit 230 based on the Hall signals HU, HV, and HW. CNT For example, the controller circuit 210 generates the control signal S CNT The controller circuit 210 may scale the duty cycle of the PWM control of the motor 102 according to the target rotation speed of the motor 102.

[0028] The pre-driver 220 receives the control signal S generated by the controller circuit 210. CNT The inverter circuit 230 is driven based on this. The inverter circuit 230 is a three-phase inverter and includes a U-phase leg, a V-phase leg, and a W-phase leg. The U-phase leg includes an upper arm UH and a lower arm UL, the V-phase leg includes an upper arm VH and a lower arm VL, and the W-phase leg includes an upper arm WH and a lower arm WL. When the upper arm #H is on and the lower arm #L is off, the output OUT# is high. When the upper arm #H is off and the lower arm #L is on, the output OUT# is low. When both the upper arm #H and the lower arm #L are off, the output OUT# has high impedance.

[0029] In the 120-degree conduction method, the state machine 212 switches the coil (drive phase) to which the drive current is supplied in synchronization with the Hall signals HU, HV, and HW (commutation control).In the 180-degree conduction method and the 150-degree conduction method, the state machine 212 also switches the drive phase based on the output of the angle multiplier circuit synchronized with the Hall signals HU, HV, and HW (commutation control).

[0030] 2 is a diagram showing the transitions of the three-phase Hall signals HU, HV, and HW when the motor 102 is rotating. The three-phase Hall signals HU, HV, and HW are pulse signals whose phases are shifted by 120°, and the positive and negative edges of each Hall signal appear every 60°. The combinations of the three-phase Hall signals HU, HV, and HW cyclically repeat (HLH), (HLL), (HHL), (LHL), (LHH), and (LLH). When the rotation direction is reversed, the transitions occur in the reverse order.

[0031] Returning to Fig. 1, the controller circuit 210 includes a phase signal generator 250 and a waveform generator 280. The controller circuit 210 may be implemented by hardware such as a logic circuit or an FPGA (Field Programmable Gate Array), or may be implemented by a combination of software and a processor.

[0032] The phase signal generator 250 uses at least one Hall signal, specifically the U-phase Hall signal HU, the V-phase Hall signal HV, and the W-phase Hall signal HW, to generate a current phase signal φ indicating the current rotor position. The current phase signal φ is a signal with one cycle of 360°. The waveform generator 280 uses the current phase signal φ in the 180-degree conduction method or the 150-degree conduction method to generate a waveform signal that defines the drive current. The waveform signal can be a sine wave, a pseudo-sine wave, or a trapezoidal wave.

[0033] 3 is a functional block diagram of a phase signal generator 250. The phase signal generator 250 includes a reference phase generator 252, a feedback pulse signal generator 264, an error detector 258, a loop filter 270, and an integrator 272. As described above, the phase signal generator 250 can also be implemented in software, and therefore the block diagram of FIG. 3 does not necessarily limit the hardware configuration, and may also schematically represent functions executed by software.

[0034] For ease of understanding, the phase is treated as having a minimum value of 0° and a maximum value of 360°, and values ​​exceeding the maximum value or falling below the minimum value are assumed to be wrapped so that they fall within the range of 0° to 360°.

[0035] The reference pulse signal generator 252 generates a reference pulse signal S that transitions at each edge of the U-phase Hall signal HU, the V-phase Hall signal HV, and the W-phase Hall signal HW. REF The reference pulse signal generator 252 includes an XOR (exclusive OR) gate 254 and an edge detector 256. The XOR gate 254 combines the three-phase Hall signals HU, HV, and HW to generate an FG (Frequency Generation) signal FG REF The edge detector 256 generates an FG signal (also called a three-phase composite signal). REF and detects the positive and negative edges of the reference pulse signal S, which remains high for a predetermined time after the edge. REF Generate.

[0036] The feedback pulse signal generator 260 generates a feedback pulse signal S that transitions every time the current phase signal φ crosses a plurality of discrete reference phases θ. FB The plurality of reference phases θ may be, for example, 0°, 60°, 120°, 180°, 240°, and 300°.

[0037] Note that 0°, 60°, 120°, 180°, 240°, and 300° are values ​​when the Hall elements 104U, 104V, and 104W are ideally attached, and in reality, there are variations due to manufacturing errors. In order to cancel these manufacturing errors, the multiple values ​​of the reference phase θ are set by the constants C0, C 60 ,C 120 ,C 180 ,C 240 ,C 300 It can be set independently based on the

[0038] In other words, the reference phase θ can take a value obtained by adding the correction value to a value in 60° increments. This makes it possible to correct for deviations in the mounting position of the Hall element 104.60 ,C 120 ,C 180 ,C 240 ,C 300 may indicate the value of the reference phase θ itself, or may indicate the amount of deviation from the value in 60° increments.

[0039] The feedback pulse signal generator 264 includes a feedback FG signal generator 266 and an edge detector 268. The feedback FG signal generator 266 generates an FG signal FG having a positive edge or a negative edge every time the current phase signal φ crosses the reference phase θ. FB (called the feedback FG signal).

[0040] The edge detector 268 detects the FG signal FG REF and detects the positive and negative edges of the feedback pulse signal S, which remains high for a predetermined time after the edge. FB Generate.

[0041] The error detector 258 includes a phase frequency detector (PFD) 256. The PFD 256 detects the phase of the reference pulse signal S REF and the feedback pulse signal S FB The frequency and phase of the signals are compared, and an error signal err is generated according to the comparison result.

[0042] The PFD256 generates a feedback pulse signal S FB The frequency of the reference pulse signal S REF When the frequency is lower than the feedback pulse signal S FB The phase of the reference pulse signal S REF When the phase of the feedback pulse signal S is delayed, the PFD 256 asserts a first signal (up signal up) (for example, 1). FB The frequency of the reference pulse signal S REF or when the frequency of the feedback pulse signal S FB The phase of the reference pulse signal S REFWhen the phase of the PFD 256 is ahead of that of the PFD 256, the subtractor 258 asserts a second signal (down signal dn) (for example, 1). The subtractor 258 outputs the difference between the up signal up and the down signal dn as the error signal err. Note that the circuit configuration and format of the output signal of the PFD 256 are not limited to those described above, and therefore the operation and circuit for converting the output signal of the PFD 256 into the error signal err are not limited to the subtractor 258.

[0043] The error detector 258, the loop filter 270, and the integrator 272 are a PLL (Phase Locked Loop) circuit. The loop filter 270 filters the error signal err. The loop filter 270 can be configured as a PI (Proportional-Integral) controller (also called a compensator). The output signal LFOUT of the loop filter 270 is a proportional integral (PI) controller having a proportional coefficient K P and the integral coefficient K I Using this, it can be expressed as equation (1). LFOUT=K P ×err+K I ∫err·dt …(1)

[0044] The integrator 272 integrates the output LFOUT of the loop filter 270 to generate the current phase signal φ. In one embodiment, the integrator 272 may perform a first-order integration of the output LFOUT of the loop filter 270. In this case, the output LFOUT of the loop filter 270 has the dimension of an angular velocity.

[0045] In one embodiment, the integrator 272 may perform a second-order integration of the output LFOUT of the loop filter 270. In this case, the output LFOUT of the loop filter 270 has the dimension of angular acceleration.

[0046] The above is the configuration of the phase signal generator 250. Next, the operation thereof will be explained.

[0047] Fig. 4 is a diagram illustrating the operation of the phase signal generator 250 in Fig. 3. Here, it is assumed that the Hall elements 104U, 104V, and 104W are attached in ideal positions, and the values ​​of the reference phase θ are 0°, 60°, 120°, 240°, and 300°. The rotation speed of the motor is constant.

[0048] Reference FG signal FG REF has a positive edge or a negative edge for each edge of the Hall signals HU, HV, and HW. REF transitions every time an edge of the Hall signals HU, HV, and HW occurs (at times t1, t3, t5, t7, t9, and t 11 ,t 13 ).

[0049] Feedback FG signal FG FB is the feedback pulse signal S FB has a positive or negative edge whenever the current phase signal φ crosses the reference phase θ. FB transitions every time the current phase signal φ crosses the reference phase θ (at times t0, t2, t4, t6, t8, t 10 ,t 12 ).

[0050] The up signal up is the feedback pulse signal S FB The positive edge of the reference pulse signal S REF It is asserted (1) when it lags the positive edge of

[0051] The down signal dn is the feedback pulse signal S FB The positive edge of the reference pulse signal S REF It is asserted (1) when it lags the positive edge of

[0052] The error signal err is the difference between the up signal up and the down signal dn.

[0053] The assertion of the down signal dn decreases the input LPOUT of the integrator 272, and acts to reduce the slope (i.e., angular frequency) of the current phase signal φ, which is the output of the integrator 272. For example, the slope of the current phase signal φ decreases due to the down signal dn generated between times t0 and t1, so that at the timing of the next phase comparison, the feedback pulse signal S FB The positive edge of the reference pulse signal S occurs at a delayed time t4. REF The error between the positive edge occurrence time t5 and the positive edge occurrence time t6 becomes smaller.

[0054] Similarly, for example, the gradient of the current phase signal φ is further decreased by the down signal dn generated between times t4 and t5, so that at the timing of the next phase comparison, the feedback pulse signal S FB The positive edge of the reference pulse signal S occurs at time t6 later. REF The error between the positive edge occurrence time t5 of the feedback pulse signal S FB As a result of the delay of the positive edge of the feedback pulse signal S FB The positive edge (t8) of the reference pulse signal S REF This means that the positive edge (t9) of

[0055] The assertion of the up signal up increases the input LPOUT of the integrator 272, and acts to increase the slope (i.e., angular frequency) of the current phase signal φ, which is the output of the integrator 272. 11 ~t 10 The slope of the current phase signal φ increases due to the two up signals up generated between the two signals. Therefore, at the timing of the next phase comparison, the feedback pulse signal S FB The positive edge occurs at time t 12 will advance, and the reference pulse signal S REF The positive edge occurs at time t 13 The error becomes smaller.

[0056] In this way, the feedback pulse signal S FBThe phase and frequency of the reference pulse signal S REF Feedback is applied so that the phase and frequency of the current phase signal φ approach the reference phase θ, and the current phase signal φ passing through the reference phase θ can be restored at the timing of the edges of the Hall signals HU, HV, and HW.

[0057] If the installation positions of the three-phase Hall elements 104U, 104V, and 104W are deviated from the ideal positions, the reference FG signal FG REF In this case, the edge position of the reference FG signal FG REF The value of the reference phase θ may be shifted in accordance with the position where the edge of the signal θ occurs.

[0058] For example, suppose that the U-phase Hall element 104U is mounted at a position 5° ahead of the correct position, and the V-phase Hall element 104V is mounted at a position 10° behind the correct position. In this case, the reference FG signal FG REF Since the edges occur at 0°, 70°, 115°, 180°, 250°, and 295°, the reference phase θ can be set to 0°, 70°, 115°, 180°, 250°, and 295°.

[0059] This cancels the effect of positional deviation of the Hall element, making it possible to generate an accurate current phase signal φ.

[0060] The embodiments described using specific terms merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments as long as they do not deviate from the spirit of the present invention as defined in the claims.

[0061] In the embodiment, the current phase signal φ is generated based on the three-phase Hall signals HU, HV, and HW. However, the present disclosure is not limited to this. For example, the current phase signal φ may be generated based on the Hall signal of any one of the phases. In this case, two reference phases θ are defined at 180-degree intervals, and the feedback pulse signal transitions each time the current phase signal φ crosses the reference phase θ.

[0062] Alternatively, the current phase signal φ may be generated based on two-phase Hall signals. In this case, four reference phases θ are defined at intervals of 60 degrees or 120 degrees, and the feedback pulse signal is configured to transition each time the current phase signal φ crosses a reference phase θ.

[0063] (Addendum) One aspect of the technology disclosed in this specification can be understood as follows.

[0064] (Item 1) A motor driver circuit for driving a three-phase brushless motor, a phase signal generator that generates a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal; The phase signal generator a reference pulse signal generator that generates a reference pulse signal that transitions with each edge of at least one Hall signal; a feedback pulse signal generator that generates a feedback pulse signal that transitions every time the current phase signal φ crosses a discrete reference phase θ; an error detector including a phase frequency detector that compares the frequency and phase of the reference pulse signal with the feedback pulse signal, and generates an error signal according to the comparison result; a loop filter for filtering the error signal; an integrating circuit that integrates the output of the loop filter to generate the current phase signal φ; A motor driver circuit comprising:

[0065] (Item 2) The reference pulse signal generator an exclusive OR gate that receives the U-phase hall signal, the V-phase hall signal, and the W-phase hall signal and generates a three-phase composite signal; an edge detection circuit that receives the three-phase composite signal and generates the reference pulse signal; Item 2. The motor driver circuit of item 1, comprising:

[0066] (Item 3) 3. The motor driver circuit according to item 1 or 2, wherein the integrator circuit performs a first-order integration of the output of the loop filter.

[0067] (Item 4) 3. The motor driver circuit according to item 1 or 2, wherein the integrator circuit performs a second-order integration of the output of the loop filter.

[0068] (Item 5) 5. The motor driver circuit according to any one of items 1 to 4, wherein the reference phase θ is a value obtained by adding a correction value to a value in 60° increments.

[0069] (Item 6) 6. The motor driver circuit according to any one of items 1 to 5, wherein the loop filter includes a PI (proportional-integral) controller.

[0070] (Item 7) 7. The motor driver circuit according to any one of items 1 to 6, which is monolithically integrated on a single semiconductor substrate.

[0071] (Item 8) A method for driving a sensor-equipped three-phase brushless motor, comprising: generating a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal; The step of generating the current phase signal φ includes: generating a reference pulse signal that transitions on every edge of at least one Hall signal; generating a feedback pulse signal that transitions each time the current phase signal φ crosses a discrete reference phase θ; comparing the frequency and phase of the reference pulse signal with the feedback pulse signal using a phase frequency detector, and generating an error signal according to the comparison result; filtering the error signal with a loop filter; an integration step of integrating the output of the loop filter to generate the current phase signal φ; A driving method including:

[0072] (Item 9) 9. The driving method according to item 8, wherein the integration step performs a first-order integration of the output of the loop filter.

[0073] (Item 10) 9. The driving method according to item 8, wherein the integration step performs a second-order integration of the output of the loop filter.

[0074] (Item 11) 11. The driving method according to any one of items 8 to 10, wherein the plurality of reference phases θ can be set individually.

[0075] (Item 12) 12. The driving method according to any one of items 8 to 11, wherein the loop filter includes a PI (proportional-integral) controller. [Explanation of symbols]

[0076] 100 Motor Circuit 102 Motor 104 Hall element 200 Motor driver circuit 210 Controller Circuit 220 Pre-driver 230 Inverter Circuit 240U, 240V, 240W Hall comparator 250 Phase Signal Generator 252 Reference Pulse Signal Generator 254 XOR gates 256 Edge Detector 258 Error Detector 260 PFD 262 Subtractor 264 Feedback Pulse Signal Generator 266 Feedback FG Signal Generator 268 Edge Detector 270 Loop Filter 272 Integrator 280 Waveform Generator

Claims

1. A motor driver circuit for driving a three-phase brushless motor, a phase signal generator that generates a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal; The phase signal generator a reference pulse signal generator for generating a reference pulse signal that transitions with each edge of the at least one Hall signal; a feedback pulse signal generator that generates a feedback pulse signal that transitions each time the current phase signal φ crosses a plurality of discrete reference phases θ; an error detector including a phase frequency detector that compares the frequency and phase of the reference pulse signal with the frequency and phase of the feedback pulse signal, and generates an error signal according to the comparison result; a loop filter for filtering the error signal; an integrating circuit that integrates the output of the loop filter to generate the current phase signal φ; A motor driver circuit comprising:

2. The reference pulse signal generator an exclusive OR gate that receives the U-phase hall signal, the V-phase hall signal, and the W-phase hall signal and generates a three-phase composite signal; an edge detection circuit that receives the three-phase composite signal and generates the reference pulse signal; 2. The motor driver circuit of claim 1, comprising:

3. 3. The motor driver circuit according to claim 1, wherein the integrating circuit performs a first-order integration on the output of the loop filter.

4. 3. The motor driver circuit according to claim 1, wherein the integrating circuit performs a second-order integration on the output of the loop filter.

5. 3. The motor driver circuit according to claim 1, wherein the plurality of reference phases θ can be set individually.

6. 3. The motor driver circuit according to claim 1, wherein the loop filter includes a PI (proportional-integral) controller.

7. 3. The motor driver circuit according to claim 1, wherein the motor driver circuit is monolithically integrated on a single semiconductor substrate.

8. A method for driving a sensor-equipped three-phase brushless motor, comprising: generating a current phase signal φ indicating a rotor position of the three-phase brushless motor based on at least one Hall signal; The step of generating the current phase signal φ includes: generating a reference pulse signal that transitions on each edge of the at least one Hall signal; generating a feedback pulse signal that transitions each time the current phase signal φ crosses a plurality of discrete reference phases θ; comparing the frequency and phase of the reference pulse signal with the feedback pulse signal using a phase frequency detector, and generating an error signal according to the comparison result; filtering the error signal with a loop filter; an integration step of integrating the output of the loop filter to generate the current phase signal φ; A driving method including:

9. The driving method according to claim 8 , wherein the integration step performs a first-order integration of the output of the loop filter.

10. The driving method according to claim 8 , wherein the integration step performs a second-order integration of the output of the loop filter.

11. 11. The driving method according to claim 8, wherein the plurality of reference phases θ can be set individually.

12. 11. The driving method according to claim 8, wherein the loop filter includes a PI (proportional-integral) controller.

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