Printed wiring board

The printed wiring board uses a copper oxide film on conductor layers and a structured adhesive layer to enhance adhesion, addressing peeling issues and ensuring high-quality, high-speed signal transmission.

JP2026003954APending Publication Date: 2026-01-14IBIDEN CO LTD
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Patent Information

Application Number
JP2024102086
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-25
Publication Date
2026-01-14

AI Technical Summary

Technical Problem

Existing printed wiring boards experience peeling between conductor circuits and interlayer resin insulation layers due to insufficient surface roughening, especially when the number of conductor layers exceeds five or the board dimensions exceed 50 mm, leading to potential transmission issues and peeling.

Method used

The printed wiring board incorporates a copper oxide film on the conductor layer surfaces, enhancing adhesion through a dipole action with an adhesive layer, and a smooth adhesive layer with protrusions to strengthen the bond between the conductor and resin insulation layers.

Benefits of technology

This configuration increases adhesive strength, preventing peeling even with multiple conductor layers and large board dimensions, ensuring low transmission loss and high-speed signal integrity.

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Abstract

To provide a printed wiring board having high quality.SOLUTION: A printed wiring board according to an embodiment includes an insulating layer, a first conductor layer formed on the insulating layer, an adhesive layer formed on the first conductor layer, and a resin insulating layer formed on the insulating layer and the conductor layer. The main component of the first conductor layer is copper, and the surface of the first conductor layer is formed of a film made of copper oxide (copper oxide film).SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The technology disclosed in this specification relates to printed wiring boards. [Background technology]

[0002] Patent Document 1 discloses a method for manufacturing a multilayer printed wiring board, which includes sequentially laminating conductor circuits and interlayer resin insulating layers on a substrate, and forming a layer containing a triazine compound on at least a portion of the surface of the conductor circuits. The conductor circuits and the interlayer resin insulating layer are bonded via the layer containing a triazine compound. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-203462 Summary of the Invention

[0004] [Problem of Patent Document 1] In printed wiring boards manufactured using the technology of Patent Document 1, the top and side surfaces of the conductor circuits are not considered to be roughened for high-speed signal transmission. Therefore, if a large stress acts between the conductor circuit and the interlayer resin insulation layer, peeling is predicted to occur between the conductor circuit and the interlayer resin insulation layer. If the number of conductor layers in the build-up layer is five or more, peeling is predicted to occur between the conductor circuit and the interlayer resin insulation layer. If the length of each side of the printed wiring board exceeds 50 mm, peeling is predicted to occur between the conductor circuit and the interlayer resin insulation layer. [Means for solving the problem]

[0005] The printed wiring board of the present invention comprises an insulating layer, a first conductor layer formed on the insulating layer, an adhesive layer formed on the first conductor layer, and a resin insulating layer formed on the insulating layer and the conductor layer. The first conductor layer is mainly composed of copper, and the surface of the first conductor layer is formed of a film made of copper oxide (copper oxide film).

[0006] In a printed wiring board according to an embodiment of the present invention, the surface of the first conductor layer is formed of a film made of copper oxide (copper oxide film). It is believed that a dipole action occurs between the copper oxide film and the adhesive layer, strengthening the bond between the first conductor layer and the adhesive layer. The embodiment can increase the adhesive strength between the first conductor layer and the resin insulating layer. Even if the number of conductor layers in the build-up layer is five or more, the resin insulating layer is unlikely to peel off from the first conductor layer. Even if the length of each side of the printed wiring board exceeds 50 mm, the resin insulating layer is unlikely to peel off from the first conductor layer. A high-quality printed wiring board is provided. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view schematically showing a printed wiring board according to an embodiment. [Figure 2] FIG. 2 is an enlarged cross-sectional view schematically showing a part of a printed wiring board. [Figure 3A] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 3B] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 3C] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 3D] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. [Figure 3E] 1A to 1C are cross-sectional views schematically illustrating a method for manufacturing a printed wiring board according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Embodiment] FIG. 1 is a cross-sectional view showing a printed wiring board 2 of an embodiment. As shown in FIG. 1, the printed wiring board 2 has an insulating layer 4, a first conductor layer 10, a resin insulating layer 20, a second conductor layer 30, and a via conductor 40. The via conductor 40 is formed in an opening 26 that penetrates the resin insulating layer 20 and exposes the first conductor layer 10. The printed wiring board 2 has an adhesive layer 100 on the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The first conductor layer 10 and the second conductor layer 30 are adjacent to each other. No conductor layer exists between the first conductor layer 10 and the second conductor layer 30.

[0009] The insulating layer 4 is formed using a thermosetting resin. The insulating layer 4 may also be a photocurable resin. The insulating layer 4 may contain inorganic particles such as silica. The insulating layer 4 may also contain a reinforcing material such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6.

[0010] The first conductor layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductor layer 10 includes signal wiring 12 and pads 14. Although not shown in the figure, the first conductor layer 10 also includes conductor circuits other than the signal wiring 12 and pads 14. The first conductor layer 10 is primarily made of copper. The first conductor layer 10 is formed of a seed layer 10a on the insulating layer 4 and an electroplated layer 10b on the seed layer 10a. The electroplated layer 10b is preferably formed of an electrolytic copper plating layer. The surfaces (top and side surfaces) of the first conductor layer 10 have a rough surface. For example, the surface of the first conductor layer 10 is roughened. Since the size of the rough surface is small, the surface of the first conductor layer 10 is almost smooth. The root mean square roughness (Rq) of the surface of the first conductor layer 10 is 0.23 μm or less. It is preferable that the Rq of the surface of the first conductor layer 10 is 0.1 μm or less.

[0011] The surface of the first conductor layer 10 is formed of a copper oxide film 18. The copper oxide film 18 is formed by oxidizing the surface (top and side surfaces) of the electroplated layer 10b. The copper oxide film 18 may include a copper oxide film formed by oxidizing the side surfaces of the seed layer 10a. The main component of the copper oxide film 18 is Cu2O. The copper oxide film 18 contains Cu2O and CuO, and the Cu2O content is 90 wt% or more. The thickness of the copper oxide film 18 is 10 nm or less. The thickness of the copper oxide film 18 is 3 nm or more.

[0012] The top surface of the conductor circuit that forms the first conductor layer 10 is formed by the first surface and the second surface. The first surface is exposed from the opening 26 and is not covered by the copper oxide film 18 and the adhesive layer 100. The second surface is the portion other than the first surface and is covered by the copper oxide film 18 and the adhesive layer 100. The side surfaces of the first conductor layer 10 are covered by the copper oxide film 18 and the adhesive layer 100. If the opening 26 does not reach the conductor circuit that forms the first conductor layer 10, the top surface of such a conductor circuit is formed only by the second surface. The first surface does not exist.

[0013] The adhesive layer 100 is formed of an organic material. An example of the organic material is a nitrogen-based organic compound. An example of the nitrogen-based organic compound is a tetrazole compound. Examples of nitrogen-based organic compounds are disclosed in JP 2015-54987 A. The adhesive layer 100 does not cover the third surface 6 exposed from the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The adhesive layer 100 is sandwiched between the copper oxide film 18 and the resin insulating layer 20. The adhesive layer 100 bonds the first conductor layer 10 and the resin insulating layer 20 via the copper oxide film 18. The resin insulating layer 20 is in contact with the adhesive layer 100.

[0014] FIG. 2 is an enlarged cross-sectional view showing a portion of the adhesive layer 100 formed on the second surface. As shown in FIG. 2, the adhesive layer 100 is formed of a substantially smooth film 110 and a plurality of protrusions 120 protruding from the smooth film 110. The adhesive layer 100 formed on the side surface of the pad 14 is formed of a smooth film 110 and a plurality of protrusions 120 similar to the adhesive layer shown in FIG. 2. The shape is also similar. The adhesive layer 100 formed on the top surface and side surface of the signal wiring 12 is formed of a smooth film 110 and a plurality of protrusions 120 similar to those shown in FIG. 2. The shape is also similar. The adhesive layer 100 formed on the top surface and side surface of the first conductor layer 10 has a shape similar to that shown in FIG. 2.

[0015] The smoothing film 110 has a substantially uniform thickness T. The thickness T of the smoothing film 110 is 10 nm or more and 120 nm or less. The ratio (S1 / S2) of the area (S1) of the smoothing film 110 exposed from the protrusion 120 to the area (S2) of the adhesive layer 100 is 0.1 or more and 0.5 or less. The smoothing film 110 on the upper surface of the first conductor layer 10 is formed to approximately follow the shape of the upper surface of the first conductor layer 10. The smoothing film 110 on the second surface of the first conductor layer 10 is formed to approximately follow the shape of the second surface of the first conductor layer 10. The smoothing film 110 on the side surface of the first conductor layer 10 is formed to approximately follow the shape of the side surface of the first conductor layer 10. If undulations are formed on the upper surface and side surface of the first conductor layer 10, the smoothing film 110 follows the undulations.

[0016] The protruding portion 120 is formed by a plurality of protrusions 122. The plurality of protrusions 122 form unevenness on the upper surface of the protruding portion 120. 2 The number of protrusions 122 per unit area is 5 or more and 15 or less. The protrusions 120 have heights H1 and H2 between the upper surface of the smooth film 110 and the top of the protrusions 120. The maximum values ​​of the heights H1 and H2 are 10 times or more and 30 times or less the thickness T of the smooth film 110. The heights H1 and H2 are 200 nm or more and 450 nm or less.

[0017] The resin insulating layer 20 is formed on the first conductor layer 10 via an adhesive layer 100. The resin insulating layer 20 is bonded to the first conductor layer 10 by the adhesive layer 100. The rough surfaces formed on the top and side surfaces of the first conductor layer 10 contribute to the adhesion between the resin insulating layer 20 and the first conductor layer 10. The resin insulating layer 20 has a first surface 22 and a second surface 24 opposite the first surface 22. The second surface 24 of the resin insulating layer 20 faces the first conductor layer 10. The second surface 24 is in contact with the adhesive layer 100. The resin insulating layer 20 has an opening 26 exposing the pad 14. The resin insulating layer 20 is formed of an epoxy resin and inorganic particles dispersed in the epoxy resin. Examples of resins include thermosetting resins and photocurable resins. The inorganic particles are, for example, silica or alumina. The amount of inorganic particles in the resin insulating layer 20 is 70 wt% or more.

[0018] The first surface 22 of the resin insulating layer 20 has no irregularities. The first surface 22 is not roughened. The first surface 22 is formed smoothly. The thickness of the resin insulating layer 20 is at least twice the thickness of the second conductor layer 30. The thickness of the resin insulating layer 20 is the distance between the first surface 22 and the upper surface of the first conductor layer 10.

[0019] The second conductor layer 30 is formed on the first surface 22 of the resin insulating layer 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and a land 36. Although not shown in the figure, the second conductor layer 30 also includes conductor circuits other than the first signal wiring 32, the second signal wiring 34, and the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair wiring. The second conductor layer 30 is mainly made of copper. The second conductor layer 30 is formed by a seed layer 30a on the first surface 22 and an electroplated layer 30b on the seed layer 30a.

[0020] Via conductor 40 is formed in opening 26. Opening 26 exposes electrolytic plated layer 10b of pad 14. Via conductor 40 connects electrolytic plated layer 10b of first conductor layer 10 to second conductor layer 30. In FIG. 1, via conductor 40 connects electrolytic plated layer 10b of pad 14 to land 36. Via conductor 40 is formed of seed layer 30a and electrolytic plated layer 30b on seed layer 30a.

[0021] The length of each side of the printed wiring board 2 shown in Figure 1 is 50 mm or more. The length of each side is preferably 100 mm or more. The length of each side is 250 mm or less.

[0022] [Method for manufacturing a printed wiring board according to an embodiment] 3A to 3E show a method for manufacturing printed wiring board 2 according to an embodiment. FIGS. 3A to 3E are cross-sectional views. FIG. 3A shows insulating layer 4 and first conductor layer 10 formed on third surface 6 of insulating layer 4. First conductor layer 10 is formed by a semi-additive method. First conductor layer 10 is formed of seed layer 10a on third surface 6 and electroplated layer 10b on seed layer 10a.

[0023] The surface of the first conductor layer 10 is roughened. Thereafter, the surface of the first conductor layer 10 is oxidized. As shown in FIG. 3B, a copper oxide film 18 is formed on the surface of the first conductor layer 10. The surface of the first conductor layer 10 can be oxidized, for example, by heating the substrate in an oxygen atmosphere or in the air as shown in FIG. 3A. The heating temperature is, for example, 100°C or higher and 150°C or lower. The heating time is, for example, 20 seconds or higher and 30 seconds or lower. The thickness and composition of the copper oxide film 18 can be adjusted by adjusting the heating temperature and heating time. A mixed gas containing oxygen and nitrogen may be used as the gas for forming the copper oxide film 18.

[0024] As shown in FIG. 3C, an adhesive layer 100 is formed on the upper and side surfaces of the first conductor layer 10. For example, the adhesive layer 100 can be formed by immersing the substrate shown in FIG. 3B in a chemical solution containing a nitrogen-based organic compound. The pH of the chemical solution is 7 or less. By immersing the substrate in the chemical solution, an adhesive layer 100 including a smooth film 110 and protrusions 120 is formed on the upper and side surfaces of the first conductor layer 10. The adhesive layer 100 is formed on the copper oxide film 18. In a modified example, the adhesive layer 100 is formed by applying a chemical solution to the first conductor layer 10. Once the adhesive layer 100 is formed, the substrate is removed from the chemical solution. The adhesive layer 100 is dried. The upper surface of the adhesive layer 100 before drying may be smooth. In this case, portions of the adhesive layer aggregate due to drying. This aggregation forms an adhesive layer 100 including a smooth film 110 and protrusions 120.

[0025] A resin insulating layer 20 is formed on the first conductor layer 10, which is covered with an adhesive layer 100. The second surface 24 of the resin insulating layer 20 faces the third surface 6 of the insulating layer 4. The second surface 24 contacts the adhesive layer 100. As shown in FIG. 3D, laser light L is irradiated from above the resin insulating layer 20. The laser light L penetrates the resin insulating layer 20. The laser light L removes the adhesive layer 100 covering the pad 14 and the copper oxide film 18 on the surface of the pad 14. An opening 26 penetrates the resin insulating layer 20, the adhesive layer 100, and the copper oxide film 18 to reach the electroplated layer 10b. The bottom of the opening 26 is formed by the electroplated layer 10b of the pad 14. The electroplated layer 10b of the pad 14 is exposed from the opening 26. The laser light L is, for example, a UV laser light or a CO2 laser light.

[0026] The inside of the opening 26 is cleaned. Resin residue generated during the formation of the opening 26 is removed. The inside of the opening 26 is cleaned using plasma. That is, the cleaning is performed by a dry process. In this embodiment, cleaning can be performed using a chemical solution containing an oxidizer. An example of the oxidizer is potassium permanganate. The cleaning includes a desmear process. The adhesive layer 100 formed between the second surface 24 of the resin insulation layer 20 and the pad 14 is not removed. Therefore, no gap is formed between the second surface 24 of the resin insulation layer 20 and the pad 14.

[0027] 3E, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by electroless plating. The seed layer 30a may also be formed by sputtering.

[0028] A plating resist is formed on the seed layer 30a. The plating resist has openings for forming the first signal wiring 32, the second signal wiring 34, and the lands 36 (FIG. 1).

[0029] An electrolytic plated layer 30b is formed on the seed layer 30a exposed from the plating resist. The electrolytic plated layer 30b is made of copper. The electrolytic plated layer 30b fills the opening 26. The seed layer 30a and the electrolytic plated layer 30b on the first surface 22 form a first signal wiring 32, a second signal wiring 34, and a land 36. The second conductor layer 30 is formed. The seed layer 30a and the electrolytic plated layer 30b in the opening 26 form a via conductor 40. The via conductor 40 connects the electrolytic plated layer 10b of the pad 14 to the land 36. The first signal wiring 32 and the second signal wiring 34 form a pair of wiring.

[0030] The plating resist is removed. The seed layer 30a exposed from the electrolytic plated layer 30b is removed. The second conductor layer 30 and the via conductors 40 are formed simultaneously. The printed wiring board 2 of the embodiment is obtained.

[0031] In the printed wiring board 2 of the embodiment, the surface of the first conductor layer 10 is formed of a film made of copper oxide (copper oxide film 18). It is believed that a dipole action occurs between the copper oxide film 18 and the adhesive layer 100, strengthening the bond between the first conductor layer 10 and the adhesive layer 100. Therefore, the embodiment can increase the adhesive strength between the first conductor layer 10 and the resin insulating layer 20. Even if the number of conductor layers in the build-up layer is five or more, the resin insulating layer 20 is unlikely to peel off from the first conductor layer 10. Even if the length of each side of the printed wiring board 2 exceeds 50 mm, the resin insulating layer 20 is unlikely to peel off from the first conductor layer 10. Even if the number of via conductors forming the stacked via is five or more, the embodiment can suppress changes in resistance due to peeling. Furthermore, the Rq of the surface of the first conductor layer 10 is 0.23 μm or less. Therefore, when data is transmitted through the conductor circuit included in the first conductor layer 10, transmission loss is low. Noise is unlikely to occur when high-speed signals are transmitted. The printed wiring board 2 of the embodiment can transmit high-speed signals with low loss and can suppress peeling between the conductor layer and the resin insulating layer, thereby providing a high-quality printed wiring board 2.

[0032] In the embodiment, the thickness of the copper oxide film 18 is 10 nm or less. For example, if the thickness of the copper oxide film 18 exceeds 10 nm, distortion is likely to occur within the copper oxide film 18. It is believed that distortion makes the copper oxide film 18 more likely to peel off from the electroplated layer 10b. Copper oxide has a higher electrical resistance than copper. If the thickness of the copper oxide film 18 exceeds 10 nm, it is believed that the copper oxide film 18 will affect the transmission speed. In the embodiment, the thickness of the copper oxide film 18 is 10 nm or less, so that the bond between the first conductor layer 10 and the adhesive layer 100 is strong. The printed wiring board 2 of the embodiment is suitable for high-speed signal transmission.

[0033] The copper oxide film 18 of the embodiment contains Cu2O and CuO, and the Cu2O content is 90 wt% or more. The main component of the copper oxide film 18 is Cu2O. Cu2O is less susceptible to distortion than CuO. The bonding strength between the first conductor layer 10 and the adhesive layer 100 is strong.

[0034] The adhesive layer 100 of the embodiment is formed of a substantially smooth film 110 and protruding portions 120 protruding from the smooth film 110. The adhesive layer 100 has irregularities formed by the protruding portions 120 and the smooth film 110. The adhesive layer 100 has irregularities formed by a plurality of protrusions 122. Therefore, the first conductor layer 10 and the resin insulating layer 20 are sufficiently adhered to each other via the adhesive layer 100.

[0035] [Another Example 1 of the embodiment] The printed wiring board 2 of Alternative Example 1 of the embodiment has multiple conductor layers, multiple interlayer resin insulation layers, and multiple via conductors. The conductor layers and interlayer resin insulation layers are alternately stacked. Adjacent conductor layers are connected by via conductors. In Alternative Example 1, the number of conductor layers is 5 or more and 20 or less. The surface of each conductor layer is preferably formed with a copper oxide film 18. The thickness of each interlayer resin insulation layer is approximately equal. The conductor layers and interlayer resin insulation layers can be bonded with an adhesive layer 100. The adhesive layer 100 has the same configuration and shape as the embodiment and Alternative Example 1. As in the embodiment, the adhesive layer 100 is formed on the top and side surfaces of the conductor layers. The adhesive layer 100 is sandwiched between the conductor layers and the interlayer resin insulation layers. Even if the number of conductor layers is 5 or more, the interlayer resin insulation layers are unlikely to peel off from the conductor layers. Because the number of conductor layers is 20 or less, cracks caused by the adhesive layer 100 are unlikely to occur in the interlayer resin insulation layers. The number of conductor layers is preferably 10 or more. It is more preferable that the number of conductive layers is 15 or more. The adhesive layer 100 works effectively.

[0036] The printed wiring board 2 of FIG. 1 has two conductor layers (a first conductor layer 10 and a second conductor layer 30). The number of first conductor layers 10 is one. The number of second conductor layers 30 is one. The first conductor layer 10 and the second conductor layer 30 are included in the conductor layers of Alternative Example 1. The resin insulation layer 20 of FIG. 1 is included in the interlayer resin insulation layer of Alternative Example 1. In Alternative Example 1, the conductor layers other than the first conductor layer 10 and the second conductor layer 30 are the third conductor layers. In Alternative Example 1, one of the multiple interlayer resin insulation layers is formed directly on the resin insulation layer 20 and the second conductor layer 30. The interlayer resin insulation layer formed directly on the resin insulation layer 20 and the second conductor layer 30 is the first interlayer resin insulation layer. In Alternative Example 1, an adhesive layer 100 is formed between the first interlayer resin insulation layer and the second conductor layer 30. Alternatively, no adhesive layer 100 is formed between the first interlayer resin insulation layer and the second conductor layer 30. The conductor layer of Alternative Example 1 and the first conductor layer 10 of the embodiment are similar, and both have the same Rq.

[0037] [Second Alternative Embodiment] In Alternative Example 2, a conductor layer is formed below the insulating layer 4 of the printed wiring board 2 of FIG. 1. The insulating layer 4 is formed from the resin insulating layer 20 of FIG. 1. The conductor layer and the first conductor layer 10 are connected by via conductors that penetrate the resin insulating layer sandwiched between the conductor layer and the first conductor layer 10. The embodiment and Alternative Example 2 are similar except that the conductor layer is formed below the insulating layer 4, the insulating layer 4 is formed from the resin insulating layer 20, and the via conductor is formed in the resin insulating layer sandwiching the conductor layer and the first conductor layer 10. The conductor layer in Alternative Example 2 is similar to the first conductor layer 10 of the embodiment. The surface of the conductor layer in Alternative Example 2 is preferably formed from a copper oxide film 18. The Rq of both is similar. [Explanation of symbols]

[0038] 2: Printed wiring board 4: Insulation layer 10: First conductor layer 12: Signal wiring 14: Pad 18: Copper oxide film 20: Resin insulation layer 26:Aperture 30: Second conductor layer 40: Via conductor 100: Adhesive layer 110: Smooth film 120:Protrusion 122: Protrusion T: Thickness H1, H2: height

Claims

1. an insulating layer; a first conductor layer formed on the insulating layer; an adhesive layer formed on the first conductor layer; A printed wiring board having the insulating layer and a resin insulating layer formed on the first conductor layer, The first conductor layer is mainly composed of copper, and the surface of the first conductor layer is formed of a film made of copper oxide (copper oxide film).

2. 2. The printed wiring board according to claim 1, wherein the copper oxide film has a thickness of 10 nm or less.

3. 3. The printed wiring board according to claim 2, wherein the copper oxide film has a thickness of 3 nm or more.

4. 2. The printed wiring board according to claim 1, wherein the root mean square roughness (Rq) of the surface of the first conductor layer is 0.23 [mu]m or less.

5. 5. The printed wiring board according to claim 4, wherein the root mean square roughness (Rq) of the surface of the first conductor layer is 0.10 [mu]m or less.

6. 2. The printed wiring board according to claim 1, wherein the copper oxide film is mainly composed of Cu. 2 It is O.

7. 7. The printed wiring board according to claim 6, wherein the copper oxide film is Cu 2 O and CuO, and Cu 2 The O content is 90 wt % or more.

8. 3. The printed wiring board according to claim 2, wherein the copper oxide film is mainly composed of Cu. 2 It is O.

9. 2. The printed wiring board of claim 1, further comprising: a second conductor layer formed on the resin insulating layer; an opening for a via conductor that penetrates the resin insulating layer and reaches the first conductor layer; and a via conductor formed in the opening that connects the first conductor layer and the second conductor layer, wherein the first conductor layer is formed of a seed layer and an electrolytic copper plating layer on the seed layer, the opening penetrates the copper oxide film and reaches the electrolytic copper plating layer, and the via conductor connects the electrolytic copper plating layer of the first conductor layer to the second conductor layer.

10. 2. The printed wiring board according to claim 1, wherein the adhesive layer is made of an organic material.

11. 2. The printed wiring board according to claim 1, wherein said adhesive layer is formed of a substantially flat smoothing film and a protruding portion protruding from said flat smoothing film.

Citation Information

Patent Citations

  • Manufacturing method for printed wiring board and multilayer printed wiring board

    JP2001203462A