Chip package structure

Abstract

The present invention discloses a chip package structure.SOLUTION: The chip package structure includes a ceramic substrate 1, a copper structure 2, a noble metal layer 3, a chip 3a, and a packaging adhesive 4. The copper structure is formed on the ceramic substrate, and at least one sidewall of the copper structure is recessed inward to form a groove 2c. A noble metal layer is formed on the copper structure. The chip is disposed on the noble metal layer. The encapsulation gel is formed on the ceramic substrate and encapsulates the copper structure, the noble metal layer, and the chip. A surface treatment layer 2b is formed on a copper exposed surface where the copper structure is not in contact with the ceramic substrate and the noble metal layer, and the encapsulation gel is in contact with the surface treatment layer and is bonded to the copper structure. The surface treatment layer extends to the surface of the groove, and the package resin is filled and embedded in the groove.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a package structure, and more particularly to a chip package structure. [Background technology]

[0002] Existing chip encapsulation technologies typically use large amounts of precious metal materials (e.g., gold (Au), silver (Ag), palladium (Pd), etc.) to improve the reliability and electrical performance of the package structure. However, the high cost and limited resources of these precious metal materials significantly increase manufacturing costs. Furthermore, the use of large areas of precious metal layers within the package structure causes material waste, further increasing manufacturing costs.

[0003] In addition, chip package structures in existing technologies typically face the problem of insufficient heterogeneous bonding strength between the copper surface and the encapsulation gel, which can cause the package structure to fail under high temperature or pressure environments, affecting the reliability and lifespan of the encapsulation. In existing technologies, the heterogeneous bonding strength of the copper surface is usually strengthened by physical roughening or chemical treatment, but these methods often require complex process steps and expensive materials.

[0004] Therefore, there is an urgent need in the industry for an improved chip package structure that improves the reliability and design flexibility of the package structure while reducing manufacturing costs. Summary of the Invention [Problem to be solved by the invention]

[0005] The technical problem that the present invention aims to solve is to provide a chip package structure to address the shortcomings of existing technology. [Means for solving the problem]

[0006] To solve the above technical problems, one technical solution adopted by the present invention provides a chip package structure as follows. The chip package structure includes a ceramic substrate, a copper structure formed on the ceramic substrate, at least one sidewall of which has a recessed groove formed therein, a precious metal layer formed on the copper structure, a chip mounted on the precious metal layer, and a sealing gel formed on the ceramic substrate to seal the copper structure, the precious metal layer, and the chip. A surface treatment layer is formed on the exposed copper surface of the copper structure that is not in contact with the ceramic substrate and the precious metal layer, and the sealing gel is in contact with the surface treatment layer and bonded to the copper structure. The surface treatment layer is formed on the surface of the groove, and the sealing gel is further filled and fitted into the groove.

[0007] To solve the above technical problems, another technical solution adopted by the present invention provides a chip package structure as follows. The chip package structure includes a ceramic substrate, a copper structure formed on the ceramic substrate, a precious metal layer formed on the copper structure, a chip mounted on the precious metal layer, and a sealing gel formed on the ceramic substrate to seal the copper structure, the precious metal layer, and the chip. A surface treatment layer is formed on an exposed copper surface of the copper structure that is not in contact with the ceramic substrate or the precious metal layer, and the sealing gel is in contact with the surface treatment layer and bonded to the copper structure. The copper structure is a long columnar support copper pillar, and there are multiple support copper pillars that are spaced apart from one another and stand upright on the ceramic substrate, and the sealing gel fills the gaps between the multiple support copper pillars.

[0008] The beneficial effect of the present invention is that the chip package structure provided by the present invention can improve the bonding strength between the sealing gel and the copper structure and reduce the use of precious metals through the design of "forming a surface treatment layer on the exposed copper surface of the copper structure that is not in contact with the ceramic substrate and the precious metal layer, and the sealing gel contacting the surface treatment layer and bonding with the copper structure" and "forming a groove on the sidewall of the copper structure or the copper structure being a plurality of supporting copper pillars."

[0009] In order to better understand the features and technical contents of the present invention, please refer to the following detailed description of the present invention and the accompanying drawings, which are provided for reference and explanation only and are not intended to limit the scope of the present invention. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a schematic side view of a package structure according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a partially enlarged schematic view of region II in FIG. 1. [Figure 3] 1 is a schematic top view of a package structure according to a first embodiment of the present invention. [Figure 4A] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4B] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4C] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4D] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4E] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4F] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4G] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 4H] 1A to 1C are schematic diagrams showing a flow of a manufacturing method of a package structure according to the present invention. [Figure 5] FIG. 4 is a schematic side view of a package structure according to a second embodiment of the present invention. [Figure 6A] FIG. 4 is a schematic top view of a package structure according to a second embodiment of the present invention. [Figure 6B] FIG. 4 is a schematic bottom view of a package structure according to a second embodiment of the present invention. [Figure 7] FIG. 10 is a schematic diagram of a modified embodiment of a package structure according to a second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0011] The following describes the embodiments of the present invention. Those skilled in the art can understand the merits and advantages of the present invention from the disclosure of this specification. The present invention can be implemented or applied in other different embodiments. Each detail in this specification can be modified or changed in accordance with various viewpoints or applications without departing from the spirit of the present invention.

[0012] Furthermore, the drawings of the present invention are for simple and schematic illustration only and do not represent actual dimensions. The following embodiments will further explain the technical matters related to the present invention, but the disclosed contents do not limit the present invention.

[0013] Throughout this specification, terms such as "first," "second," and "third" may be used to describe various components or signals, but it should be understood that these components or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another or one signal from another. Furthermore, as used herein, the term "or" can include any one or combination of the associated listed items, where appropriate.

[0014] [First embodiment] 1 to 3, a first embodiment of the present invention provides a chip package structure E, and in particular provides a chip package structure E based on an eDPC stacking structure.

[0015] The purpose of the first embodiment of the present invention is to reduce the area of ​​the precious metal in the eDPC laminate structure, increase the exposed copper surface area on the top and sidewalls, and form a surface treatment layer on the exposed copper surface to improve the heterogeneous bonding strength between the encapsulating gel and the copper surface. Furthermore, the chip package structure E of the first embodiment of the present invention can improve the heterogeneous bonding strength of the copper surface and also achieve the effect of a solder mask without affecting the reliability of the precious metal surface.

[0016] To achieve the above objective, the chip package structure E includes a ceramic substrate 1, a copper structure 2, a precious metal layer 3, a chip 3a, at least one lead wire 3b, and a sealing gel 4.

[0017] The copper structure 2 is formed on a surface (e.g., top surface) of the ceramic substrate 1. The precious metal layer 3 is formed on a surface (e.g., top surface 2d) of the copper structure 2 that is away from the ceramic substrate 1. The chip 3a is disposed on the surface of the precious metal layer 3 that is away from the copper structure 2. The at least one lead wire 3b is connected between (the top surface of) the chip 3a and (the top surface of) the precious metal layer 3.

[0018] The sealing gel 4 is formed on the surface of the ceramic substrate 1 and is used to seal the copper structure 2, the precious metal layer 3, the chip 3a, and the lead wires 3b. That is, the copper structure 2, the precious metal layer 3, the chip 3a, and the lead wires 3b are located inside the sealing gel 4 and are covered by the sealing gel 4.

[0019] In some embodiments of the present invention, the material of the ceramic substrate 1 may be, for example, aluminum nitride (AlN), aluminum oxide (Al2O3), silicon nitride (SiN), or silicon carbide (SiC).

[0020] Furthermore, at least one through-hole copper pillar 1a is formed inside the ceramic substrate 1, penetrating its top and bottom surfaces, and a bottom copper layer 1b is formed on the bottom surface of the ceramic substrate 1. Here, the at least one through-hole copper pillar 1a is electrically connected between the copper structure 2 and the bottom copper layer 1b. In this embodiment, the at least one through-hole copper pillar 1a is plural and is arranged at intervals from one another. The bottom copper layer 1b mostly covers the bottom surface of the ceramic substrate 1, but the present invention is not limited thereto.

[0021] 1 and 2, a surface treatment layer 2b is formed on the exposed copper surface of the copper structure 2 that is not in contact with the ceramic substrate 1 and the precious metal layer 3, and the sealing gel 4 is in contact with the surface treatment layer 2b and bonded to the copper structure 2, thereby improving the heterogeneous bonding strength between the sealing gel 4 and the copper structure 2. In this embodiment, the surface treatment layer 2b is formed on at least one side wall 2a of the copper structure 2 that is not in contact with the ceramic substrate 1 and the precious metal layer 3, and is also formed locally on the top surface 2d connected to the side wall 2a. Furthermore, the surface treatment layer 2b is not formed on the top surface of the precious metal layer 3, which increases the heterogeneous bonding strength of the copper surface without affecting the reliability of the precious metal surface.

[0022] Here, the surface treatment layer 2b may be, for example, a roughened surface treatment layer, and the surface roughness of the roughened surface treatment layer is greater than the surface roughness (e.g., arithmetic mean roughness Ra) of the precious metal layer 3, but the present invention is not limited thereto.

[0023] In another embodiment of the present invention, the surface treatment layer 2b may be, for example, a functionalized surface treatment layer, such as a functionalized surface treatment layer having a silane functional group and / or a siloxane functional group. Also, in yet another embodiment of the present invention, the surface treatment layer 2b may be, for example, a chemically bonded surface treatment layer, such as a copper oxide (CuO) surface treatment layer whose surface is oxidized, but the present invention is not limited thereto.

[0024] Furthermore, in this embodiment, the sidewall 2a of the copper structure 2 is recessed inward to form a groove 2c, and the surface treatment layer 2b is formed to extend to the surface of the groove 2c. The sealing gel 4 is further filled in the groove 2c of the copper structure 2 and is in contact with the surface treatment layer 2b in the groove 2c.

[0025] Since the sealing gel 4 is filled in the groove 2c of the copper structure 2, a structure is formed in which the sealing gel 4 and the copper structure 2 fit together, thereby increasing the contact area between the sealing gel 4 and the copper structure 2 and improving the heterogeneous bonding force between the sealing gel 4 and the copper structure 2.

[0026] In this embodiment, the noble metal layer 3 is formed on the top surface 2d of the copper structure 2, and the area occupied by the noble metal layer 3 is smaller than the area of ​​the top surface 2d of the copper structure 2.

[0027] That is, the noble metal layer 3 is formed only on a part of the top surface 2d of the copper structure 2, so that at least a part of the top surface 2d of the copper structure 2 is exposed and covered with the surface treatment layer 2b.

[0028] Based on the above configuration, the chip package structure E provided by the embodiment of the present invention reduces the area of ​​the precious metal in the eDPC stack structure, increases the exposed surface area of ​​the copper on the top and sidewalls, and forms a surface treatment layer on the exposed copper surface, thereby improving the heterogeneous bonding strength between the encapsulation gel and the copper surface, and increasing the heterogeneous bonding strength of the copper surface without affecting the reliability of the precious metal surface.

[0029] More specifically, please refer to Figure 2, which is a partially enlarged schematic side view of a copper structure 2 according to an embodiment of the present invention. The copper structure 2 includes a first copper layer 21, a second copper layer 22, and a third copper layer 23, which are sequentially stacked on the surface of the ceramic substrate 1. Here, the sidewall of the second copper layer 22 is recessed inward relative to the sidewalls of the first copper layer 21 and the third copper layer 23, thereby forming the recessed groove 2c.

[0030] In other words, the sidewall of the third copper layer 23 protrudes beyond the sidewall of the second copper layer 22, thereby forming a roof-shaped structure, and the length by which the sidewall of the third copper layer 23 protrudes beyond the sidewall of the second copper layer 22 is defined as a first protrusion length W1. Furthermore, the sidewall of the first copper layer 21 also protrudes beyond the sidewall of the second copper layer 22, and the length by which the sidewall of the first copper layer 21 protrudes beyond the sidewall of the second copper layer 22 is defined as a second protrusion length W2.

[0031] Here, the first protrusion length W1 is smaller than the second protrusion length W2, and the first protrusion length W1 does not exceed 50 micrometers, and is preferably between 15 micrometers and 50 micrometers.

[0032] This allows the groove 2c to have sufficient space for the sealing gel 4 to fit more stably into the groove 2c of the copper structure 2 and increase the bonding strength, but the present invention is not limited to this.

[0033] Please refer to Figure 3, which is a schematic top view of a package structure E according to an embodiment of the present invention. In the copper structure 2, the roof-shaped structure in which the sidewall of the third copper layer 23 protrudes relative to the sidewall of the second copper layer 22 may be, for example, rectangular, but the present invention is not limited thereto. The protruding shape of the third copper layer 23 may be, for example, semicircular, triangular, or any other physical shape.

[0034] Furthermore, the number of protruding roof-shaped structures on the third copper layer 23 may be, for example, four, and they may be arranged on the four sides of the third copper layer 23, with two of them facing each other.

[0035] Furthermore, the four corner edges of the first copper layer 21 are designed, for example, as rounded edges 2e, which reduces stress concentration compared to conventional right-angle designs and prevents the copper layer from peeling or warping from the ceramic substrate.

[0036] 1 again, the noble metal layer 3 is formed on the surface of the copper structure 2 away from the ceramic substrate 1 (e.g., the top surface 2d of the third copper layer 23). The thickness of the noble metal layer 3 is smaller than the total thickness of the copper structure 2 (i.e., the sum of the thicknesses of the first copper layer 21, the second copper layer 22, and the third copper layer 23), and the thickness of the noble metal layer 3 does not exceed one-third of the total thickness of the copper structure 2, although the present invention is not limited thereto.

[0037] The material of the precious metal layer 3 may include at least one of gold (Au), silver (Ag), palladium (Pd), and nickel (Ni), and the precious metal layer 3 may be formed by, for example, electroplating, chemical plating, physical vapor deposition (PVD), or chemical vapor deposition (CVD).

[0038] In some embodiments of the present invention, the precious metal layer 3 may be electroplated nickel palladium gold, electroplated ultra-thin nickel palladium gold (e.g., Ni<3 μm, Pd<0.076 μm, Au<0.076 μm), electroplated nickel gold, electroplated nickel silver, electroplated nickel, chemically plated nickel palladium gold, chemically plated ultra-thin nickel palladium gold (Ni<0.25 μm, Pd<0.12 μm, Au<0.07 μm), chemically plated nickel gold, chemically plated silver, chemically plated nickel, physical vapor deposition of titanium / platinum / gold (PVD Ti / Pt / Au), or physical vapor deposition of gold / tin (PVD Au / Sn).

[0039] Furthermore, the material of the sealing gel 4 is, for example, at least one of epoxy resin, polyimide resin, silicone resin, and polyurethane resin, and is preferably epoxy resin.

[0040] Based on the above configuration, the chip package structure E according to the embodiment of the present invention has better reliability. The surface treatment of the precious metal layer 3 can avoid deterioration of wire bonding or welding quality due to excessive surface roughness, and can enhance the heterogeneous bonding strength between the copper surface region and the encapsulation gel. The bonding strength of the copper surface sidewalls is also improved, which is superior to that of conventional physical roughening. Furthermore, the chip package structure E according to the embodiment of the present invention has the advantage of low manufacturing costs because it does not require surface treatment of the entire precious metal surface.

[0041] Furthermore, the chip package structure E in the embodiment of the present invention can have different copper exposed areas according to the product design, and the exposed shape of the copper surface can also be changed according to the design requirements, thereby having flexible design.

[0042] 4A to 4H, which illustrate a method for manufacturing the chip package structure E in the first embodiment of the present invention, but the chip package structure E of the present invention is not limited to those manufactured by these manufacturing methods. The manufacturing method for the chip package structure E includes steps S110, S120, S130, S140, S150, S160, S170, and S180.

[0043] As shown in FIG. 4A, step S110 is a process of copper plating a ceramic substrate, in which a ceramic substrate 1 is provided, and a first copper layer 21 and a second copper layer 22 are sequentially formed on the top surface of the ceramic substrate 1 by a lithography process using a first photoresist film df1 and a second photoresist film df2.

[0044] At least one through-hole copper pillar 1a is formed inside the ceramic substrate 1, and a bottom copper layer 1b is formed on the bottom surface, and the through-hole copper pillar 1a is electrically connected to the first copper layer 21 and the bottom copper layer 1b.

[0045] As shown in FIG. 4B, step S120 is a process of forming a third photoresist film df3 on the second photoresist film df2 and forming a film-exclusion space df3′ inside the third photoresist film df3, and this film-exclusion space df3′ is located above the second copper layer 22.

[0046] 4C, step S130 is a process of forming a third copper layer 23 (for example, by plating) on ​​the second copper layer 22, so that the first copper layer 21, the second copper layer 22, and the third copper layer 23 jointly constitute the copper structure 2. Here, the sidewalls of the second copper layer 22 are recessed inward relative to the sidewalls of the first copper layer 21 and the third copper layer 23, thereby forming grooves 2c on the sidewalls 2a of the copper structure 2. In addition, the roof-shaped structure in which the sidewalls of the third copper layer 23 protrude relative to the sidewalls of the second copper layer 22 increases the exposed surface area of ​​the copper surface.

[0047] 4D, step S140 is a process of forming a fourth photoresist film df4 on the third photoresist film df3 and forming a precious metal layer 3 inside the fourth photoresist film df4. The precious metal layer 3 is connected to the upper side of the third copper layer 23 and locally covers the top surface 2d of the third copper layer 23.

[0048] 4E, step S150 is a process of performing a photoresist film removal operation to remove the first photoresist film df1, the second photoresist film df2, the third photoresist film df3, and the fourth photoresist film df4 from the ceramic substrate 1. This exposes the copper structure 2 (including the first copper layer 21, the second copper layer 22, and the third copper layer 23) and the precious metal layer 3 to the external environment.

[0049] As shown in FIG. 4F, step S160 is a process of performing a surface treatment operation to form a surface treatment layer 2b on the exposed copper surface of the copper structure 2 that is not in contact with the ceramic substrate 1 and the noble metal layer 3.

[0050] In this embodiment, the surface treatment layer 2b is formed on the sidewall 2a of the copper structure 2 that is not in contact with the ceramic substrate 1 and the precious metal layer 3, is formed locally on the top surface 2d connected to the sidewall 2a, and extends to the surface within the groove 2c. Furthermore, the surface treatment layer 2b is not formed on the top surface and sidewall of the precious metal layer 3, which improves the heterogeneous bonding strength of the copper surface without affecting the bonding reliability of the precious metal surface.

[0051] It should be noted here that the surface treatment operation in step S160 may be, for example, a direct surface treatment on the exposed copper surface of the copper structure 2 without providing any additional protection to the precious metal layer 3, which simplifies the manufacturing flow, but the present invention is not limited thereto.

[0052] As shown in FIG. 4G, step S170 is a process of placing a chip 3a on the surface of the precious metal layer 3 away from the copper structure 2 and connecting at least one lead wire 3b between the top surface of the chip 3a and the top surface of the precious metal layer 3.

[0053] 4H, step S180 is a process of performing an encapsulation operation, which includes forming an encapsulating gel 4 on the ceramic substrate 1 and encapsulating the copper structure 2, the precious metal layer 3, the chip 3a, and the lead wires 3b to form a chip package structure E. Here, the encapsulating gel 4 contacts the surface treatment layer 2b and fills the grooves 2c to fit with the copper structure 2, thereby improving the heterogeneous bonding strength between the encapsulating gel 4 and the copper structure 2.

[0054] [Second embodiment] 5 to 7, the second embodiment of the present invention also provides a chip package structure E', which can be applied to chip encapsulation with a copper pillar or RDL stack structure. The purpose of the second embodiment of the present invention is to increase the copper exposed surface area on the surface and sidewalls and form a surface treatment layer on the exposed copper surface, thereby increasing the heterogeneous bonding strength between the encapsulation gel and the copper surface.

[0055] To achieve the above-mentioned objectives, as shown in FIG. 5, the package structure E′ of the second embodiment of the present invention includes a ceramic substrate 1′, at least one copper structure 2′, at least one precious metal layer 3′, a chip 3a′, at least one tin ball 3b′, and a sealing gel 4′.

[0056] The copper structure 2' is formed on a surface (e.g., a top surface) of the ceramic substrate 1'. The noble metal layer 3' is formed on a surface (e.g., a top surface) of the copper structure 2' that is away from the ceramic substrate 1'. The chip 3a' is mounted on the surface of the noble metal layer 3' that is away from the copper structure 2' via a tin ball 3b'. The sealing gel 4' is formed on the ceramic substrate 1' and is used to seal the copper structure 2', the noble metal layer 3', the chip 3a', and the tin ball 3b'. Furthermore, at least one bottom copper pad 1b' is formed on the bottom surface of the ceramic substrate 1', but the present invention is not limited thereto.

[0057] As shown in FIG. 5, a surface treatment layer 2b' is formed on the exposed copper surface of the copper structure 2' that is not in contact with the ceramic substrate 1' and the precious metal layer 3', and the sealing gel 4' is in contact with the surface treatment layer 2b' and bonded to the copper structure 2', thereby improving the heterogeneous bonding strength between the sealing gel 4' and the copper structure 2'.

[0058] In this embodiment, the surface treatment layer 2b' is formed on at least one sidewall 2a' of the copper structure 2' that is not in contact with the ceramic substrate 1' and the noble metal layer 3'.

[0059] The surface treatment layer 2b' may be, for example, any one of a roughened surface treatment layer, a functionalized surface treatment layer, and a chemically bonded surface treatment layer.

[0060] More specifically, in this embodiment, the copper structure 2' has a plurality of long supporting copper pillars 21'.

[0061] The plurality of supporting copper pillars 21' are spaced apart from one another and stand upright on the ceramic substrate 1'. The number of the noble metal layers 3', tin balls 3b', and bottom copper pads 1b' also corresponds to the number of the supporting copper pillars 21'.

[0062] That is, the multiple noble metal layers 3' are formed on multiple supporting copper pillars 21', respectively, and the multiple tin balls 3b' are formed on multiple noble metal layers 3', respectively, and the chip 3a' is mounted at intervals on the ceramic substrate 1' via the multiple supporting copper pillars 21', the noble metal layers 3', and the tin balls 3b'.

[0063] Furthermore, the plurality of bottom copper pads 1b' are arranged below the ceramic substrate 1' in the installation position, corresponding to the plurality of supporting copper pillars 21', respectively, and are electrically connected to each other, but the present invention is not limited to this.

[0064] In this embodiment, the surface treatment layer 2b' is formed on the surface of the sidewalls 2a' of the multiple supporting copper pillars 21', and the sealing gel 4' is filled in the gaps between the multiple supporting copper pillars 21' and comes into contact with the surface treatment layer 2b', thereby increasing the contact area between the sealing gel 4' and the supporting copper pillars 21' and improving the heterogeneous bonding force between the sealing gel and the copper surface.

[0065] 6A is a schematic top view of the package structure E' of this embodiment, showing the arrangement of the plurality of supporting copper pillars 21'. Also, FIG. 6B is a schematic bottom view of the package structure E' of this embodiment, showing the arrangement of the plurality of bottom copper pads 1b', but the present invention is not limited thereto.

[0066] Based on the above-mentioned arrangement, the chip package structure E' of the second embodiment of the present invention forms a surface treatment layer 2b' on the exposed copper surface of the copper structure 2' that is not in contact with the ceramic substrate 1' and the precious metal layer 3', and the sealing gel 4' contacts the surface treatment layer 2b' and bonds with the copper structure 2', thereby increasing the heterogeneous bonding strength between the sealing gel 4' and the copper structure 2'.

[0067] Please refer to Figure 7, which is a schematic diagram of a modified chip package structure E' according to the second embodiment of the present invention. In Figure 7, the sidewall 2a' of each support copper pillar 21' of the chip package structure E' is recessed inward to form at least one groove 2c', and the surface treatment layer 2b' is also formed extending onto the surface of the groove 2c'. The sealing gel 4' is further filled into the groove 2c' of the support copper pillar 21' and is in contact with the surface treatment layer 2b'.

[0068] Since the sealing gel 4' is filled in the groove 2c', a structure is formed in which the sealing gel 4' and the supporting copper pillar 21' are fitted together, thereby increasing the contact area between the sealing gel 4' and the copper structure 2' and improving the heterogeneous bonding force between the sealing gel 4' and the copper structure 2'.

[0069] [Beneficial Effects of the Embodiments] The beneficial effect of the present invention is that in the chip package structure provided by the present invention, the design of "forming a surface treatment layer on the exposed copper surface of the copper structure that is not in contact with the ceramic substrate and the precious metal layer, and the sealing gel contacting the surface treatment layer to bond with the copper structure" and the design of "forming a groove on the side wall of the copper structure, or the copper structure being a plurality of supporting copper pillars" can improve the heterogeneous bonding force between the sealing gel and the copper structure and reduce the amount of precious metal used.

[0070] The above disclosure is merely a preferred embodiment of the present invention, and does not limit the scope of the claims of the present invention. Therefore, all equivalent technical modifications made based on the contents of the specification and accompanying drawings of the present invention shall be included in the scope of the claims of the present invention. [Explanation of symbols]

[0071] E Package Structure 1. Ceramic substrate 1a through-hole copper pillar 1b Bottom copper layer 2 Copper structure 21 First copper layer 22 Second copper layer 23 Third copper layer 2a side wall 2b Surface treatment layer 2c groove 2D top surface 2e Rounded Edges 3 Precious metal layer 3a Chip 3b lead wire 4 packages of gel W1 First protrusion length W2 Second protrusion length df1 First photoresist film df2 Second photoresist film df3 Third photoresist film df3' membrane excluded space df4 Fourth photoresist film E' Package Structure 1' Ceramic substrate 1b' Bottom copper pad 2' copper construction 21' supporting copper pillar 2a' side wall 2b' Surface treatment layer 2c' concave groove 3' Precious metal layer 3a' Chip 3b' tin ball 4' Package Gel

Claims

1. A ceramic substrate; a copper structure formed on the ceramic substrate, the copper structure having a recessed groove formed in at least one sidewall thereof; a noble metal layer formed on the copper structure; a chip disposed on the noble metal layer; a sealing gel formed on the ceramic substrate and sealing the copper structure, the noble metal layer, and the chip; Equipped with a surface treatment layer is formed on an exposed copper surface of the copper structure that is not in contact with the ceramic substrate and the noble metal layer, and the sealing gel is in contact with the surface treatment layer and bonds to the copper structure; the surface treatment layer is formed to extend over the surface of the groove, and the sealing gel is further filled in and fitted into the groove; ,Chip package structure.

2. 2. The chip package structure as claimed in claim 1, wherein the noble metal layer is formed on the top surface of the copper structure, and the area occupied by the noble metal layer is smaller than the area of ​​the top surface of the copper structure.

3. further comprising at least one lead wire connected between the top surface of the chip and the top surface of the noble metal layer; the surface treatment layer is formed on at least one side wall of the copper structure that is not in contact with the ceramic substrate and the precious metal layer, and is formed locally on a top surface that is connected to the side wall, and the surface treatment layer is not formed on the top surface of the precious metal layer; The chip package structure according to claim 1 .

4. 2. The chip package structure of claim 1, wherein the copper structure includes a first copper layer, a second copper layer, and a third copper layer sequentially formed on the ceramic substrate, and a sidewall of the second copper layer is recessed inward relative to a sidewall of the first copper layer and a sidewall of the third copper layer to form the recessed groove.

5. 5. The chip package structure of claim 4, wherein in the copper structure, a length by which the sidewall of the third copper layer protrudes relative to the sidewall of the second copper layer is defined as a first protrusion length, and a length by which the sidewall of the first copper layer protrudes relative to the sidewall of the second copper layer is defined as a second protrusion length, and the first protrusion length is smaller than the second protrusion length.

6. The chip package structure of claim 5 , wherein the first protrusion length does not exceed 50 micrometers.

7. 5. The chip package structure as claimed in claim 4, wherein the four corner edges of said first copper layer are rounded edges.

8. The chip package structure according to claim 1 , wherein the surface treatment layer is a roughened surface treatment layer, and the surface roughness of the roughened surface treatment layer is greater than the surface roughness of the noble metal layer.

9. 2. The chip package structure according to claim 1, wherein the surface treatment layer is a functionalized surface treatment layer having a silane functional group and / or a siloxane functional group.

10. 2. The chip package structure as claimed in claim 1, wherein the surface treatment layer is a chemically bonded surface treatment layer, and the surface is an oxidized copper oxide (CuO) surface treatment layer.

11. A ceramic substrate; a copper structure formed on the ceramic substrate; a noble metal layer formed on the copper structure; a chip disposed on the noble metal layer; a sealing gel formed on the ceramic substrate and sealing the copper structure, the precious metal layer, and the chip; Equipped with a surface treatment layer is formed on an exposed copper surface of the copper structure that is not in contact with the ceramic substrate and the noble metal layer, and the sealing gel is in contact with the surface treatment layer and bonds to the copper structure; The copper structure is a support copper pillar having a long columnar shape, the number of the support copper pillars is plural, and the support copper pillars are erected on the ceramic substrate at intervals, and the sealing gel is filled in the gaps between the plurality of support copper pillars. A chip package structure comprising:

12. The chip package structure according to claim 11 , wherein the surface treatment layer is formed on the surface of the sidewall of each of the supporting copper pillars.

13. 13. The chip package structure of claim 12, wherein at least one groove is recessed inwardly in the sidewall of each supporting copper pillar, the surface treatment layer is formed extending to the surface within the groove, and the sealing gel is further filled into the groove.

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