Protection circuit and display device including the same

Abstract

To provide a protection circuit capable of suppressing an increase in a time constant of an input signal, and a display device including the protection circuit.SOLUTION: The display device includes a plurality of pixels, a driving circuit, a first power supply line, a second power supply line, a plurality of protection circuits, and a plurality of control signal lines. The driving circuit is configured to control the plurality of pixels. The first power supply line and the second power supply line are configured to supply a first potential and a second potential lower than the first potential to the plurality of pixels, respectively. The plurality of control signal lines electrically connect the plurality of protection circuits and the driving circuit. Each of the plurality of protection circuits includes a first resistor and a second resistor. The first resistance element is configured such that a control signal is supplied to a first end, and a second end is electrically connected to the control signal wiring. The second resistive element is configured such that the control signal is supplied to a first end, and a second end is electrically connected to the control signal wiring.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a protection circuit and a display device having the protection circuit. [Background technology]

[0002] In display devices such as liquid crystal display devices, a plurality of pixels for reproducing an image and a drive circuit for driving the plurality of pixels are provided on a substrate. The plurality of pixels and the drive circuit are composed of numerous semiconductor elements, such as thin-film transistors, and are formed using photolithography, which requires many processes. For this reason, a protection circuit may be provided to prevent damage to the pixels and the drive circuit not only from surge currents but also from electrostatic breakdown due to static electricity generated during manufacturing. For example, Patent Documents 1 and 2 disclose display devices provided with a protection circuit for protecting the drive circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-49149 [Patent Document 2] Japanese Patent Publication No. 2020-154250 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment of the present invention is to provide a protection circuit having a novel structure and a display device including the protection circuit, or to provide a protection circuit capable of suppressing deterioration (increase) of the time constant of an input signal and a display device including the protection circuit. [Means for solving the problem]

[0005] One embodiment of the present invention is a display device. The display device includes a plurality of pixels, a drive circuit, a first power supply line and a second power supply line, a plurality of protection circuits, and a plurality of control signal lines. The drive circuit is configured to control the plurality of pixels. The first power supply line and the second power supply line are configured to supply a first potential and a second potential lower than the first potential, respectively, to the plurality of pixels. The plurality of control signal lines electrically connect the plurality of protection circuits to the drive circuit. Each of the plurality of protection circuits has a first resistive element and a second resistive element. The first resistive element is configured to receive a control signal at a first end, and a second end is electrically connected to one of the plurality of control signal lines. The second resistive element is configured to receive the control signal at a first end, and a second end is electrically connected to the one of the plurality of control signal lines.

[0006] One embodiment of the present invention is a protection circuit. The protection circuit includes a first resistive element and a second resistive element. A first end of the first resistive element and a first end of the second resistive element are electrically connected to each other and configured to receive a control signal. A second end of the second resistive element and a second end of the first resistive element are electrically connected to each other. The control signal is selected from a clock signal, a video signal, a reset signal, and an initialization signal. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 2] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 3] 1 is an equivalent circuit diagram including a protection circuit according to an embodiment of the present invention; [Figure 4] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 5] 1 is a schematic end view of a display device according to an embodiment of the present invention; [Figure 6] 1 is a schematic end view of a display device according to an embodiment of the present invention; [Figure 7]FIG. 2 is an equivalent circuit diagram showing an example of a protection circuit. [Figure 8] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 9] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 10] 1 is a schematic top view of a display device according to an embodiment of the present invention. [Figure 11] 1 is an equivalent circuit diagram including a protection circuit according to an embodiment of the present invention; [Figure 12] 1 is an equivalent circuit diagram including a protection circuit according to an embodiment of the present invention; [Figure 13] 1 is an equivalent circuit diagram including a protection circuit according to an embodiment of the present invention; [Figure 14] 1 is an equivalent circuit diagram including a protection circuit according to an embodiment of the present invention; [Figure 15] 1 is a schematic top view of a display device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, various embodiments of the present invention will be described with reference to the drawings, etc. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and should not be construed as being limited to the description of the embodiments exemplified below.

[0009] In order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In this specification and each drawing, elements having the same function as those described in the previous drawings may be given the same reference numerals, and duplicated explanations may be omitted. This reference numeral is used to collectively represent multiple identical or similar structures, and when these are individually represented, a hyphen and a natural number are added after the reference numeral.

[0010] In this specification and claims, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.

[0011] In the present invention, when a single film is processed to form multiple films, these multiple films may have different functions and roles. However, these multiple films originate from films formed as the same layer in the same process, and have substantially the same layer structure, the same material, and the same morphology. Therefore, these multiple films are defined as existing in the same layer.

[0012] 1. Overall configuration of the display device FIG. 1 shows a schematic top view of a display device 100 according to one embodiment of the present invention. The display device 100 includes a substrate 102 and an opposing substrate (not shown) facing the substrate 102. Various conductive films, semiconductor films, insulating films, and the like are patterned using a photolithography process and disposed between the substrate 102 and the opposing substrate. Appropriate combinations of these conductive films, semiconductor films, insulating films, and the like form a plurality of pixels 104, each including a display element, as well as drive circuits (gate line drive circuit 120, signal line drive circuit 122) for driving the pixels, a protection circuit unit 124 composed of a plurality of protection circuits (described later), and a plurality of terminals 108. The region where the plurality of pixels 104 are formed (the region surrounded by a dashed line in FIG. 1 ) is a display region 106, and the region surrounding the display region 106 and where the drive circuits, protection circuit unit 124, terminals 108, and the like are provided is a frame region. Although not shown in FIG. 1, a patterned conductive film is used to form on the substrate 102 a plurality of gate lines extending from the gate line driving circuit 120 to the pixels 104, a plurality of video signal lines extending from the signal line driving circuit 122 to the pixels 104, control signal wiring connecting the protection circuit unit 124 and the signal line driving circuit 122, power supply lines for supplying a constant potential, and the like.

[0013] The plurality of terminals 108 are electrically connected to a flexible printed circuit board (hereinafter, referred to as FPC) 180, and the FPC 180 is connected to an external circuit 182 via a connector 184. A high voltage potential (V DD ) and V DD A low voltage potential (V SS ) is supplied via FPC 180 and terminal 108. V DD and V SS is supplied to the pixels 104 and the drive circuit without passing through the protection circuit unit 124. More specifically, as shown in FIG. DD and V SS are supplied to one or more terminals 108 selected from the plurality of terminals 108 via a plurality of wirings 130-1 provided on the FPC 180. DD and V SS are supplied to power supply lines 132 extending from the terminals 108, and are further supplied to the pixels 104 and the signal line driving circuit 122 by the power supply lines 132. Although the power supply lines 132 may cross the protection circuit units 124, they are not connected to the protection circuits that make up the protection circuit units 124. Although not shown, a part of the power supply lines 132 is connected to the gate line driving circuit 120, and thereby the gate line driving circuit 120 receives V DD and V SS is supplied.

[0014] The external circuit 182 further generates various signals, such as a high-frequency clock signal, a video signal, an initialization signal, and a reset signal for controlling the plurality of pixels 104, and supplies these signals to the signal line driving circuit 122 via the FPC 180, the terminals 108, and the protection circuit unit 124. More specifically, as shown in FIG. 2 , the clock signal is supplied to the plurality of terminals 108 via a plurality of wirings 130-3 provided on the FPC 180. Here, each wiring 130-3 branches on the FPC 180 and is electrically connected to two adjacent terminals 108. In other words, the two terminals 108 to which a clock signal is supplied from one wiring 130-3 are electrically connected to each other on the FPC 180. As will be described in detail later, the clock signal supplied from each wiring 130-3 is supplied to two adjacent terminals 108, then supplied to one protection circuit included in the protection circuit unit 124, and further supplied from that one protection circuit to one control signal wiring 136. The plurality of control signal wirings 136 are connected to wirings 138, whereby clock signals are supplied to a plurality of buffers, scanners, and the like (not shown) that constitute the signal line driving circuit 122.

[0015] On the other hand, signals with frequencies lower than those of the clock signal, such as a video signal, an initialization signal, and a reset signal, are supplied to two or more terminals 108 selected from the multiple terminals 108 via multiple wirings 130-2 provided on the FPC 180. Unlike the wirings 130-3, the wirings 130-2 do not branch on the FPC 180, and each wiring 130-2 is connected to one terminal 108. Each terminal 108 to which a video signal, an initialization signal, a reset signal, or the like is supplied is connected to one signal wiring 134 via one protection circuit included in the protection circuit unit 124. These signals are input to the signal line driving circuit 122 via the signal wiring 134, and signals for controlling the pixels 104 are supplied to each pixel 104 via the signal signal lines 126 by the signal line driving circuit 122.

[0016] 2.Protection circuit The protection circuit unit 124 includes multiple protection circuits according to an embodiment of the present invention. FIG. 3 shows an equivalent circuit diagram including one protection circuit 140. As shown in FIG. 3, the protection circuit 140 according to an embodiment of the present invention includes two resistive elements (a first resistive element 142-1 and a second resistive element 142-2), the first ends of which are electrically connected to two adjacent terminals 108 to which a clock signal is supplied. The second ends of the resistive elements 142 of each protection circuit 140 are electrically connected to each other. As described above, each wiring 130-3 branches on the FPC 180 and is electrically connected to two adjacent terminals 108, and these two terminals 108 are connected to one protection circuit 140. Therefore, the first ends of the first resistive element 142-1 and the second resistive element 142-2 are electrically connected to each other on the FPC 180. Furthermore, the control signal wiring 136 branches into two wirings, each of which is electrically connected to the second end of the resistive element 142. The resistance of the first resistor 142-1 and the second resistor 142-2 is the same, for example, 0.5 kΩ to 5.0 kΩ. By providing the resistor 142 having a relatively large resistance in this manner, even if a large voltage is input from the terminal 108 due to a surge current or static electricity, the potential input to the signal line driver circuit 122 can be reduced.

[0017] Each protection circuit 140 can include four diodes (a first diode 144-1, a second diode 144-2, a third diode 144-3, and a fourth diode 144-4). By providing these diodes 144, even if a large current such as static electricity or a surge current is input via the resistance element 142, a portion of the current can be released to the power supply line 132. A second end of the first resistance element 142-1 is electrically connected to the input terminal of the first diode 144-1 and the output terminal of the second diode 144-2. Meanwhile, a second end of the second resistance element 142-2 is electrically connected to the input terminal of the third diode 144-3 and the output terminal of the fourth diode 144-4. The output terminal of the first diode 144-1 and the output terminal of the third diode 144-3 are electrically connected to each other and are connected to a voltage V DDOn the other hand, the input terminal of the second diode 144-2 and the input terminal of the fourth diode 144-4 are electrically connected to each other and are connected to the high potential power supply line 132-1 to which V SS is connected to the low potential power supply line 132-2 to which a voltage is supplied.

[0018] FIG. 4 shows a schematic top view of the protection circuit 140, and FIGS. 5 and 6 show schematic end views along the dashed lines AA′ and BB′ in FIG. 4, respectively. As can be seen from FIGS. 4 and 5, each diode 144 in the protection circuit 140 is formed from multiple transistors 150 electrically connected to each other. The structure of the transistors 150 is not limited and may be a bottom-gate transistor or a top-gate transistor. Alternatively, the transistor 150 may have multiple gate electrodes sandwiching a semiconductor film from above and below. In the example shown in FIG. 5, the transistor 150 is a bottom-gate transistor and is provided directly on the substrate 102 or on an undercoat 110 of any configuration. In this example, the transistor 150 includes a gate electrode 152, a gate insulating film 154 on the gate electrode 152, a semiconductor film 156 located on the gate insulating film 154 and overlapping the gate electrode 152, an interlayer insulating film 158 on the semiconductor film 156, and a pair of source / drain terminals 160 located on the interlayer insulating film 158 and electrically connected to the semiconductor film 156. Adjacent transistors 150 share a source / drain terminal 160, thereby electrically connecting the adjacent transistors 150. As shown in Fig. 4, one of the pair of source / drain terminals 160 of each transistor 150 is electrically connected to the terminal 108 via a resistive element 142, and the other source / drain terminal 160 is electrically connected to the high-potential power supply line 132-1 or the low-potential power supply line 132-2 via a connection wiring 146 present in the same layer as the gate electrode 152, and is also electrically connected to the corresponding gate electrode 152. A planarization film 112 is provided on the transistor 150 (Fig. 5), which absorbs irregularities caused by the transistor 150 and forms a flat surface.

[0019] The transistor 150, the planarization film 112, and other components described above can be formed using known materials and methods, and therefore detailed description thereof will be omitted. Briefly, the undercoat 110, the gate insulating film 154, the interlayer insulating film 158, and other components may be formed of one or more films containing silicon-containing inorganic compounds such as silicon nitride and silicon oxide. The planarization film 112 may be configured to contain a polymer such as an acrylic resin, an epoxy resin, a silicone resin, or a polyimide resin. The gate electrode 152, the source / drain terminals 160, the power supply line 132, and the connection wiring 146 may be configured to contain a metal such as molybdenum, tantalum, titanium, copper, or aluminum, or an alloy containing one or more of these metals. Preferably, the metal is selected so that the resistance of the source / drain terminals 160 is lower than that of the gate electrode 152. The control signal wiring 136 and the power supply line 132 are formed in the same layer as the source / drain terminals 160. The gate electrode 152 and the connecting wiring 146 are formed in the same layer, but are arranged in a different layer from the source / drain terminals 160. The semiconductor film 156 may contain silicon or an oxide of a Group 13 transition metal such as gallium or indium. There are no restrictions on the crystallinity of the semiconductor film 156, and it may be single crystalline, polycrystalline, or amorphous.

[0020] Although not shown, the planarization film 112 extends to the display region 106, and a display element is provided in each pixel 104 by utilizing the flat upper surface of the planarization film 112. The display element may be a liquid crystal element or an electroluminescent element.

[0021] 3, the connection node between the protection circuit 140 and the control signal wiring 136 is preferably between the protection circuit 140 and the high-potential power supply line 132-1 and between the protection circuit 140 and the low-potential power supply line 132-2. In this case, two resistance elements 142 are connected to one control signal wiring 136, and the control signal wiring 136 intersects with the high-potential power supply line 132-1 and the low-potential power supply line 132-2. More specifically, as shown in FIGS. 4 and 6, the protection circuit 140 and the control signal wiring 136 are electrically connected via a connection wiring 136a that constitutes a part of the control signal wiring 136. The connection wiring 136a is in the same layer as the gate electrode 152 and intersects with the power supply line 132. The electrical connection between the control signal wiring 136 including the connection wiring 136a and the protection circuit 140 is made through an opening that is provided in the gate insulating film 154 and the interlayer insulating film 158 and is located between the protection circuit 140 and the power supply line 132. Therefore, for each protection circuit 140, the only wiring that is not connected to and intersects with the two power supply lines 132 is the single connection wiring 136a, which makes it possible to suppress an increase in parasitic capacitance caused by the power supply lines 132.

[0022] The protection circuit unit 124 may further include a protection circuit having a structure different from that of the above-described protection circuit 140. Specifically, a protection circuit 170 shown in FIG. 7 may be disposed between the terminal 108 to which a video signal, a reset signal, or an initialization signal, which are relatively low-frequency signals, is supplied and the signal wiring 134. Unlike the protection circuit 140, the protection circuit 170 includes a single resistive element 172, with a first end electrically connected to one terminal 108 and a second end electrically connected to the signal wiring 134. The protection circuit 170 may include two diodes 174. The input terminal and output terminal of one diode 174-1 are electrically connected to the high-potential power supply line 132-1 and the second end of the resistive element 172, respectively, and the input terminal and output terminal of the other diode 174-2 are electrically connected to the low-potential power supply line 132-2 and the second end of the resistive element 172, respectively.

[0023] Conventionally, increasing the resistance of resistive elements in the protection circuit has been employed as a method for improving the withstand voltage of the signal line driver circuit 122 against surge currents and static electricity. However, increasing the resistance of resistive elements increases the time constant of signals supplied through the protection circuit. In particular, an increase in the time constant of clock signals narrows the driving margin of the signal line driver circuit and is a major cause of abnormal operation. The increase in time constant due to an increase in resistive elements can be suppressed by increasing the number of wirings supplying the signals. However, as the number of signal wirings 134 and power supply wirings 132 increases with the trend toward higher resolution display devices, the parasitic capacitance between the control signal wirings 136 supplying clock signals and the signal wirings 134 and between the control signal wirings 136 and the power supply wirings 132 in the frame area increases. Because this increase in parasitic capacitance actually increases the time constant, increasing the number of control signal wirings 136 is not necessarily an effective method for reducing the time constant. Furthermore, increasing the number of control signal wirings 136 increases the number of terminals 108 and the size of the connector 184.

[0024] As described above, the display device 100 also has multiple control signal wirings 136 arranged to supply a clock signal, which is a high-frequency signal. However, in the display device 100, the wiring 130-3 that supplies the clock signal branches on the FPC 180 and is input to two adjacent terminals 108. The clock signal input to one protection circuit 140 via these two terminals 108 merges into one control signal wiring 136 between the protection circuit 140 and the signal line drive circuit 122, and this single control signal wiring 136 supplies the clock signal to the signal line drive circuit 122. Therefore, compared to a conventional display device that has multiple control signal wirings 136 and a single terminal connected to the protection circuit connected to each control signal wiring 136, the number of control signal wirings 136 can be substantially halved without increasing the contribution of the resistive elements in the protection circuits to the time constant increase. As a result, the contribution of the parasitic capacitance between the control signal wiring 136 and the signal wiring 134 and the parasitic capacitance between the control signal wiring 136 and the power line 132 to the time constant increase is reduced. This effect reduces the time constant of the clock signal and widens the driving margin of the signal line driving circuit. Furthermore, since a further increase in the number of terminals is avoided compared to conventional display devices, a further increase in the size of the connector 184 can also be avoided.

[0025] Furthermore, as described above, the electrical connection between the protection circuit 140 and the control signal wiring 136 is made between the protection circuit 140 and the power supply line 132, thereby suppressing an increase in parasitic capacitance caused by intersections with the power supply line 132. This structure also contributes to reducing the time constant of the clock signal. Therefore, by applying one of the embodiments of the present invention, it is possible to reliably ensure a driving margin for the signal line driving circuit even in an ultra-high-definition display device. Furthermore, by substantially halving the number of control signal wirings 136, the contribution of the overall resistance (combined resistance) of the control signal wiring 136 to the increase in the time constant increases. However, this contribution can be reduced by forming the control signal wiring 136 from a low-resistance metal such as aluminum.

[0026] 3. Variations The structures of the protection circuit 140 and the display device 100 including the protection circuit 140 are not limited to the above-described structures. Modified examples of the protection circuit 140 and the display device 100 will be described below.

[0027] 3-1. Variation 1 In the example shown in FIG. 2, three wirings 130-3 are provided on the FPC 180 to supply clock signals, each of which branches into two and is connected to adjacent terminals 108. Therefore, the clock signal is supplied to a total of six terminals 108. However, there is no restriction on the number of wirings 130-3, and the total number of wirings 130-3 provided on the FPC 180 may be two (i.e., the number of terminals 108 connected to the wirings 130-3 is four) ( FIG. 8 ) or four (i.e., the number of terminals 108 connected to the wirings 130-3 is eight) ( FIG. 9 ). Although not shown, the total number of wirings 130-3 provided on the FPC 180 may be five or more (i.e., the number of terminals 108 connected to the wirings 130-3 is ten). Preferably, the total number of wirings 130-3 is an even number.

[0028] 3-2. Variation 2 The number of terminals 108 connected to each wiring 130-3 on the FPC 180 that supplies a clock signal is not limited to two. For example, as shown in FIG. 10 , each wiring 130-3 may be branched into three on the FPC 180 and electrically connected to three consecutively arranged terminals 108. In this case, three resistive elements 142 are also provided in the protection circuit 140. Specifically, as shown in FIG. 11 , in addition to a first resistive element 142-1 and a second resistive element 142-2, a third resistive element 142-3 is provided in each protection circuit 140. A first end of the third resistive element 142-3 is electrically connected to a terminal 108 different from the terminals 108 to which the first ends of the first resistive element 142-1 and the second resistive element 142-2 are connected. A second end of the third resistive element 142-3 is electrically connected to the control signal wiring 136. The resistance of the third resistive element 142-3 is also the same as that of the first resistive element 142-1 or the second resistive element 142-2. By adopting such a configuration, the contribution of the parasitic capacitance between the control signal wiring 136 and other wiring (power supply line 132 or signal wiring 134) to the time constant can be reduced to one-third, compared to a case where multiple control signal wirings 136 are provided and one terminal is connected to each control signal wiring 136 via one protection circuit.

[0029] The protection circuit 140 may further include two diodes (a fifth diode 144-5 and a sixth diode 144-6) (FIG. 11). The second end of the third resistive element 142-3 is electrically connected to the input terminal of the fifth diode 144-5 and the output terminal of the sixth diode 144-6. The output terminal of the fifth diode 144-5 is electrically connected to the high-potential power supply line 132-1, and the input terminal of the sixth diode 144-6 is electrically connected to the low-potential power supply line 132-2. Therefore, the output terminal of the fifth diode 144-5 is electrically connected to the output terminals of the first diode 144-1 and the third diode 144-3, and the input terminal of the sixth diode 144-6 is electrically connected to the input terminals of the second diode 144-2 and the fourth diode 144-4.

[0030] Alternatively, each wiring 130-3 may be branched into four on the FPC 180 and electrically connected to four consecutively arranged terminals 108. In this case, four resistive elements 142 are also provided in the protection circuit 140. Specifically, as shown in FIG. 12 , each protection circuit 140 further includes a fourth resistive element 142-4. A first end of the fourth resistive element 142-4 is electrically connected to a terminal 108 different from the terminals 108 to which the first ends of the first to third resistive elements 142-1 to 142-3 are connected. A second end of the fourth resistive element 142-4 is electrically connected to the control signal wiring 136. By adopting such a configuration, the contribution of parasitic capacitance between the control signal wiring 136 and other wiring (such as the power supply line 132 or the signal wiring 134) to the time constant can be reduced to one-fourth of that in the case where multiple control signal wirings 136 are provided and each control signal wiring 136 is connected to one terminal via one protection circuit.

[0031] Even in this case, the protection circuit 140 can further include two diodes (a seventh diode 144-7 and an eighth diode 144-8). The second end of the fourth resistive element 142-4 is electrically connected to the input terminal of the seventh diode 144-7 and the output terminal of the eighth diode 144-8. The output terminal of the seventh diode 144-7 is electrically connected to the high-potential power supply line 132-1, and the input terminal of the eighth diode 144-8 is electrically connected to the low-potential power supply line 132-2. Therefore, the output terminal of the seventh diode 144-7 is electrically connected to the output terminals of the first diode 144-1, the third diode 144-3, and the fifth diode 144-5, and the input terminal of the eighth diode 144-8 is electrically connected to the input terminals of the second diode 144-2, the fourth diode 144-4, and the sixth diode 144-6.

[0032] 3-3. Variation 3 To further prevent large currents caused by static electricity or surge currents from entering drive circuits such as the signal line drive circuit 122, a resistive element may be further provided in the protection circuit 140. Specifically, as shown in the equivalent circuit diagram of FIG. 13, an auxiliary resistive element 148 may be provided between each resistive element 142 and the control signal wiring 136. In the example shown in FIG. 13, a first auxiliary resistive element 148-1 is provided between the first resistive element 142-1 and the control signal wiring 136, and a second auxiliary resistive element 148-2 is provided between the second resistive element 142-2 and the control signal wiring 136. That is, a first end and a second end of the first auxiliary resistive element 148-1 are electrically connected to the second end of the first resistive element 142-1 and the control signal wiring 136, respectively, and a first end and a second end of the second auxiliary resistive element 148-2 are electrically connected to the second end of the second resistive element 142-2 and the control signal wiring 136, respectively. Although not shown, when three or more resistance elements 142 are provided (see FIGS. 11 and 12), an auxiliary resistance element 148 is provided between each resistance element 142 and the control signal wiring 136.

[0033] 3 and the like, the connection node between the protection circuit 140 and the control signal wiring 136 can be established between the power supply line 132 and the auxiliary resistance element 148 (FIG. 13). This makes it possible to prevent an increase in parasitic capacitance caused by the power supply line 132. However, taking into consideration the layout and depending on the size of the auxiliary resistance element 148, the power supply line 132 may be arranged to intersect with the protection circuit 140, and the connection node between the protection circuit 140 and the control signal wiring 136 may be arranged between the signal line drive circuit 122 and the power supply line 132, as shown in FIGS.

[0034] As shown in FIG. 15, the auxiliary resistor element 148 is preferably formed using a metal film present in the same layer as the gate electrode 152 constituting the transistor 150. The auxiliary resistor element 148 is formed to have a narrower width than other wiring (e.g., the control signal wiring 136, the connection wiring 146, etc.). To obtain resistance, the auxiliary resistor element 148 is configured to have a bent or curved structure to lengthen the current path. The resistance value of the auxiliary resistor element 148 may be the same as or different from that of the resistor element 142, and may be set to, for example, 0.5 kΩ to 5.0 kΩ. By providing the auxiliary resistor element 148, it is possible to more effectively prevent electrostatic damage to the drive circuit and damage due to surge currents.

[0035] 3-4. Variation 4 In the above example, the protection circuit 140 is connected to the terminal 108 to which a clock signal, which is a high-frequency signal, is input, and to the control signal wiring 136. However, the protection circuit 140 may also be provided on the signal wiring 134 to which other signals (such as a video signal, a reset signal, and an initialization signal) having a lower frequency than the clock signal are input. Although not shown, in this case, each wiring 130-2 on the FPC 180 is branched into multiple branches and connected to multiple terminals 108. The protection circuit 140 shown in FIG. 3 and other figures is connected to the multiple terminals 108, and multiple resistance elements 142 of this protection circuit 140 are connected to one signal wiring 134. This makes it possible to prevent an increase in the time constant of the video signal, reset signal, initialization signal, etc. Furthermore, although not shown, the protection circuit 140 may also be provided on various wirings for supplying signals (e.g., enable signals) input to the gate line driving circuit 120 and signals (sensor signals) input to a touch panel provided on the display device 100.

[0036] The above-described embodiments of the present invention can be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies designs, or adds or omits processes or modifies conditions based on the embodiments, such combinations are included within the scope of the present invention as long as they include the gist of the present invention.

[0037] Even if there are other effects and advantages different from those brought about by the aspects of each of the above-mentioned embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0038] 100: display device, 102: substrate, 104: pixel, 106: display region, 108: terminal, 110: undercoat, 112: planarization film, 120: gate line driving circuit, 122: signal line driving circuit, 124: protection circuit unit, 126: video signal line, 130-1: wiring, 130-2: wiring, 130-3: wiring, 132: power supply line, 132-1: high potential power supply line, 132-2: low potential power supply line, 134: signal wiring, 136: control signal wiring, 136a: connection wiring, 138: wiring, 140: protection circuit, 142: resistance element, 142-1: first resistance element, 142-2: second resistance element, 142-3: third resistance element, 142-4: fourth resistance element, 144: diode, 144-1: first diode 144-1: second diode, 144-2: third diode, 144-3: third diode, 144-4: fourth diode, 144-5: fifth diode, 144-6: sixth diode, 144-7: seventh diode, 144-8: eighth diode, 146: connection wiring, 148: auxiliary resistor element, 148-1: first auxiliary resistor element, 148-2: second auxiliary resistor element, 150: transistor, 152: gate electrode, 154: gate insulating film, 156: semiconductor film, 158: interlayer insulating film, 160: source / drain terminal, 170: protection circuit, 172: resistor element, 174: diode, 174-1: diode, 174-2: diode, 180: FPC, 182: external circuit, 184: connector

Claims

1. A plurality of pixels, a drive circuit configured to control the plurality of pixels; a first power supply line and a second power supply line configured to supply a first potential and a second potential lower than the first potential to the plurality of pixels, respectively; Multiple protection circuits, and a plurality of control signal wirings electrically connecting the plurality of protection circuits and the drive circuit; Each of the plurality of protection circuits a first resistor element configured to receive a control signal at a first end and electrically connected at a second end to one selected from the plurality of control signal wirings; a second resistor element configured to receive the control signal at a first end thereof and electrically connected to the selected one of the plurality of control signal wirings at a second end thereof;

2. each of the plurality of protection circuits further includes a first diode, a second diode, a third diode, and a fourth diode; In each of the plurality of protection circuits, the second end of the first resistive element is electrically connected to an input terminal of the first diode and an output terminal of the second diode; the second end of the second resistive element is electrically connected to an input terminal of the third diode and an output terminal of the fourth diode; the first power supply line is electrically connected to an output terminal of the first diode and an output terminal of the third diode; The display device according to claim 1 , wherein the second power supply line is electrically connected to an input terminal of the second diode and an input terminal of the fourth diode.

3. The display device according to claim 1 , wherein the control signal is a clock signal.

4. The display device according to claim 1 , wherein the control signal is selected from a video signal, a reset signal, and an initialization signal.

5. a flexible printed circuit board electrically connected to the driving circuit, The display device according to claim 1 , wherein the first end of the first resistor element and the first end of the second resistor element of each of the plurality of protection circuits are electrically connected to each other on the flexible printed circuit board.

6. the first power supply line and the second power supply line intersect with the plurality of control signal lines; 2. The display device according to claim 1, wherein, for each of the protection circuits, the electrical connection between the protection circuit and the control signal wiring is between the first power supply line and the protection circuit, and between the second power supply line and the protection circuit.

7. Each of the plurality of protection circuits a first auxiliary resistor element having a first end electrically connected to the second end of the first resistor element and a second end electrically connected to the control signal wiring; and 2. The display device according to claim 1, further comprising a second auxiliary resistor element having a first end electrically connected to the second end of the second resistor element and a second end electrically connected to the control signal wiring.

8. the first power supply line and the second power supply line intersect with the plurality of protection circuits; 8. The display device according to claim 7, wherein, for each of the protection circuits, the electrical connection between the protection circuit and the control signal wiring is between the drive circuit and the first power supply line and between the drive circuit and the second power supply line.

9. each of the plurality of protection circuits further includes a third resistance element; a first end of the third resistive element configured to receive the control signal; The display device according to claim 1 , wherein a second terminal of the third resistor element is electrically connected to the control signal wiring.

10. each of the plurality of protection circuits further includes a fifth diode and a sixth diode; the second end of the third resistive element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode; the first power supply line is connected to an output terminal of the fifth diode; The display device according to claim 9 , wherein the second power supply line is electrically connected to an input terminal of the sixth diode.

11. each of the plurality of protection circuits further includes a third auxiliary resistance element; a first end of the third auxiliary resistor element electrically connected to the second end of the third resistor element; The display device according to claim 9 , wherein a second end of the third auxiliary resistance element is electrically connected to the control signal wiring.

12. a first resistor element and a second resistor element; a first end of the first resistor element and a first end of the second resistor element are electrically connected to each other and configured to receive a control signal; a second end of the second resistor element and the second end of the first resistor element are electrically connected to each other; The protection circuit, wherein the control signal is selected from a clock signal, a video signal, a reset signal, and an initialization signal.

13. 13. The protection circuit of claim 12, wherein the control signal is a clock signal.

14. further comprising a first diode, a second diode, a third diode, and a fourth diode; the second end of the first resistive element is electrically connected to an input terminal of the first diode and an output terminal of the second diode; the second end of the second resistive element is electrically connected to an input terminal of the third diode and an output terminal of the fourth diode; an output terminal of the first diode and an output terminal of the third diode are electrically connected to each other; 13. The protection circuit of claim 12, wherein the input terminal of the second diode and the input terminal of the fourth diode are electrically connected to each other.

15. a first auxiliary resistor element having a first end electrically connected to the second end of the first resistor element; and a second auxiliary resistor element having a first end electrically connected to the second end of the second resistor element; 13. The protection circuit according to claim 12, wherein the electrical connection between the second end of the first resistor element and the second end of the second resistor element is made via the first auxiliary resistor element and the second auxiliary resistor element.

16. 13. The protection circuit of claim 12, further comprising: a third resistive element having a first end electrically connected to the first end of the first resistive element and a second end electrically connected to the second end of the first resistive element.

17. further comprising a fifth diode and a sixth diode; 17. The protection circuit of claim 16, wherein the second end of the third resistive element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode.

18. a third resistive element having a first end electrically connected to the first end of the first resistive element and a second end electrically connected to the second end of the first resistive element; and further comprising a fifth diode and a sixth diode; the second end of the third resistive element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode; an output terminal of the fifth diode electrically connected to the output terminal of the first diode and the output terminal of the third diode; 15. The protection circuit of claim 14, wherein an input terminal of the sixth diode is electrically connected to the input terminal of the second diode and the input terminal of the fourth diode.

19. 17. The protection circuit of claim 16, further comprising a third auxiliary resistive element having a first end electrically connected to the second end of the third resistive element and a second end electrically connected to the second end of the first resistive element and the second end of the second resistive element.

Images