Multilayer substrate, filter, and communication device

Abstract

To improve the characteristics of a multilayer substrate and / or to miniaturize the substrate.SOLUTION: The multilayer substrate 1 includes a plurality of inductors 3. Each of the plurality of inductors 3 includes a plurality of conductor patterns 5 and one or more vias 7. The plurality of conductor patterns 5 are located at different positions in the lamination direction. One or more vias 7 connect the plurality of conductor patterns 5 to each other. The stacking direction of the plurality of inductors 3 is the axial direction. The plurality of inductors 3 include a first inductor 3A and a second inductor 3B. The first inductor 3A includes three or more layers of conductive patterns 5, and the second inductor 3B includes only two layers of conductive patterns 5. Alternatively, the plurality of inductors 3 include three or more inductors 3.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a multilayer substrate, a filter including the multilayer substrate, and a communication device including the filter. [Background technology]

[0002] A technology for forming an inductor using a conductor pattern (layered conductor) and vias on a multilayer substrate is known (for example, Patent Document 1 below). Patent Document 1 discloses two inductors that are wound around the multilayer substrate in the stacking direction (the axial direction of the inductor is the stacking direction) and are inductively coupled to each other. More specifically, the two inductors have a double-helix shape, and their placement areas in the stacking direction and in plan view overlap each other. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-21321 Summary of the Invention [Problem to be solved by the invention]

[0004] For example, multilayer substrates, filters, and communication devices that are advantageous in terms of improved characteristics and / or miniaturization are desired. [Means for solving the problem]

[0005] a second conductor pattern located on a third layer adjacent to the second layer in the stacking direction and having a portion that does not overlap with the second conductor pattern in a planar perspective view; and a fourth conductor pattern located on the first layer and a fifth conductor pattern located on the second layer and positioned on the side of the first conductor pattern and the third conductor pattern relative to the second conductor pattern and the fourth conductor pattern in a planar perspective view. The second inductor does not have a conductor pattern located on the third layer or a conductor pattern located on an adjacent layer on the opposite side of the first layer from the second layer.

[0006] A multilayer substrate according to one embodiment of the present disclosure has a plurality of inductors, each of which is composed of a plurality of conductor patterns positioned at different positions in the stacking direction and one or more vias connecting the plurality of conductor patterns, and which has the stacking direction as its axial direction, and the plurality of inductors have at least a portion of their placement ranges in the stacking direction overlapping with each other, and includes three or more inductors whose placement ranges in a planar perspective overlap with each other at least a portion of each other.

[0007] A filter according to one embodiment of the present disclosure includes the above-described multilayer substrate and a signal path in which at least one node is connected to a reference potential section, wherein the multiple inductors include two or more inductors whose arrangement ranges in the stacking direction of the multiple conductor patterns overlap each other across two or more layers and whose arrangement ranges in a planar perspective overlap each other at least in part, and the two or more inductors are connected in series within the signal path, or the signal path and the reference potential section are connected in parallel to each other.

[0008] A communication device according to one embodiment of the present disclosure includes the filter, an antenna connected to one side of the signal path, and an IC connected to the other side of the signal path. [Effects of the Invention]

[0009] According to the above configuration, for example, it is possible to improve the characteristics and / or reduce the size of the multilayer substrate. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is an exploded perspective view of a multilayer substrate according to a first embodiment. [Figure 2] FIG. 2 is a plan view of a plurality of conductor patterns included in the multilayer substrate of FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 10 is a plan view of a plurality of conductor patterns included in a multilayer substrate according to a second embodiment. [Figure 5] FIG. 11 is a plan view of a plurality of conductor patterns included in a multilayer substrate according to a third embodiment. [Figure 6] FIG. 10 is a plan view of a plurality of conductor patterns included in a multilayer substrate according to a fourth embodiment. [Figure 7] FIG. 2 is a circuit diagram showing a first example of an extractor including a multilayer substrate according to an embodiment. [Figure 8] FIG. 10 is a circuit diagram showing a second example of an extractor including a multilayer substrate according to an embodiment. [Figure 9] 10A and 10B are diagrams showing examples of extractor characteristics. [Figure 10] FIG. 1 is a block diagram showing a configuration of a communication device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] For convenience, the drawings referred to below may be accompanied by a Cartesian coordinate system D1D2D3. Unless otherwise specified, a plan view or plan perspective view refers to a view in the D3 direction. The D3 direction is the stacking direction of the multilayer substrate (or, from another perspective, the conductor pattern). The multilayer substrate may be used in any orientation, but for convenience, terms such as top and bottom may be used, with the +D3 side being the upper side.

[0012] In the description of the embodiments, basically, only differences from the previously described embodiments will be described. Matters not specifically mentioned may be considered to be the same as the configurations of the previously described embodiments or may be inferred from the configurations of the previously described embodiments. Furthermore, for the sake of convenience, the same reference numerals may be used to designate corresponding or similar configurations in the multiple embodiments, even if there are differences.

[0013] When referring to the shape of an inductor or the like as a square (or square-like), it does not have to be strictly a square unless otherwise specified or unless a contradiction arises. For example, the corners may be chamfered. Whether or not it can be considered a square can be determined rationally. The same applies to shapes other than squares (for example, polygons other than squares).

[0014] A band attenuation filter may be abbreviated as a BE filter (BE: band elimination). A bandpass filter may be abbreviated as a BP filter. In this disclosure, no particular distinction is made between the terms attenuation band and stop band. The term reference potential portion may be understood to refer to the entirety of one or more portions to which a reference potential is applied (it may also refer to multiple portions separated from each other), unless otherwise specified or unless a contradiction arises.

[0015] (Overview of multilayer boards) FIG. 1 is an exploded perspective view of a multilayer substrate 1A (part or all of it) according to a first embodiment. When the multilayer substrate 1A is not disassembled, the three plate-like members shown in the figure are stacked. The multilayer substrate 1A has multiple (two in FIG. 1) built-in inductors 3 (3A and 3B). Each inductor 3 is composed of two or more of multiple conductor patterns 5 (5A to 5E) located at different positions in the D3 direction, and one or more vias 7 connecting the two or more conductor patterns 5 together. Each inductor 3 has a spiral (coil) shape that rotates around the D3 direction as its axial direction.

[0016] For example, the first inductor 3A includes, in order from the +D3 side, a first conductor pattern 5A, a second conductor pattern 5B, and a third conductor pattern 5C. These three conductor patterns 5 are connected to each other by two vias 7. The second inductor 3B includes, in order from the +D3 side, a fourth conductor pattern 5D and a fifth conductor pattern 5E. These two conductor patterns 5 are connected to each other by one via 7.

[0017] The multiple inductors 3 have at least a portion of their arrangement ranges in the D3 direction overlapping each other, and also at least a portion of their arrangement ranges in a planar perspective overlapping each other. From another perspective, the multiple inductors 3 are meshed with each other. As a result, the multiple inductors 3 are inductively coupled (magnetically coupled) to each other. Such multiple inductors 3 are included in, for example, a filter (see FIGS. 7 and 8 described below). The inductive coupling contributes to, for example, adjusting or improving the characteristics of the filter.

[0018] The placement range of the inductor 3 in planar perspective refers to the conductors (lines) that make up the inductor 3 and the entire area surrounded by these conductors in planar perspective. Therefore, even if the placement ranges of two inductors 3 overlap in planar perspective, the conductor patterns 5 of the two inductors 3 do not necessarily overlap each other. For example, one inductor 3 may be located inside the conductor (ring) of the other inductor 3. Similarly, the placement range in the D3 direction also includes the area between the conductor patterns 5. Furthermore, in the description of the embodiments, the term placement range of the inductor 3 may refer to a three-dimensional range.

[0019] The first conductor pattern 5A and the fourth conductor pattern 5D are located on the same layer (the same position in the D3 direction). This layer will be referred to as the first layer 9A. Similarly, the layer on which the second conductor pattern 5B and the fifth conductor pattern 5E are located will be referred to as the second layer 9B. The layer on which the third conductor pattern 5C is located will be referred to as the third layer 9C. Note that the first layer 9A to the third layer 9C are used here as terms indicating positions in the D3 direction. However, for convenience, they may also be used as terms indicating layered conductors.

[0020] Fig. 2 is a plan view showing the conductor patterns 5 on each layer (9A to 9C) of the multilayer substrate 1A. In particular, in Fig. 2, the upper diagram shows the first layer 9A. The middle diagram shows the second layer 9B. The lower diagram shows the third layer 9C. Electrical connection by vias 7 between conductor patterns 5 located on different layers is indicated by dotted lines connecting them.

[0021] Fig. 4 is a plan view showing the conductor patterns 5 of each layer of a multilayer substrate 1B according to the second embodiment, and corresponds to Fig. 2. The shapes of the fourth conductor pattern 5D and the fifth conductor pattern 5E are different between Fig. 2 and Fig. 4. That is, the second embodiment differs from the first embodiment in the configuration of the second inductor 3B.

[0022] Fig. 5 is a plan view showing the conductor patterns 5 of each layer of a multilayer substrate 1C according to the third embodiment, and corresponds to Fig. 2. Note that the alphabetical symbols "A" and "B" added to the inductors 3 and the conductor patterns 5 in Fig. 5 (and Fig. 6, which will be described later) are added simply to distinguish between inductors 3 and between conductor patterns 5. Therefore, each inductor 3 and each conductor pattern 5 does not correspond to the inductors 3 and conductor patterns 5 having the same symbols in the first and second embodiments.

[0023] The third embodiment differs from the first embodiment in that, for example, three or more inductors 3 (3A to 3C) are provided (three in the example of FIG. 5). Specifically, in the illustrated example, for example, the first inductor 3A has, from the first layer 9A to the third layer 9C, a first conductor pattern 5A, a second conductor pattern 5B, and a third conductor pattern 5C. The second inductor 3B has, from the first layer 9A to the third layer 9C, a fourth conductor pattern 5D, a fifth conductor pattern 5E, and a sixth conductor pattern 5F. The third inductor 3C has, from the first layer 9A to the third layer 9C, a seventh conductor pattern 5G, an eighth conductor pattern 5H, and a ninth conductor pattern 5I.

[0024] Fig. 6 is a plan view showing the conductor patterns 5 of each layer of a multilayer substrate 1D according to a fourth embodiment, and corresponds to Fig. 2. Similar to the third embodiment, the fourth embodiment is provided with three or more inductors 3 (3A to 3C) (three in the example of Fig. 6). However, the specific shapes of the inductors 3A to 3C differ from those of the third embodiment.

[0025] From the multilayer substrates 1A to 1D illustrated above, technical features can be extracted from various viewpoints. Examples are shown below.

[0026] In a first aspect, as shown by the multilayer substrates 1A and 1B, the second inductor 3B may have only two layers of conductor patterns 5 (5D and 5E) as the multiple conductor patterns 5 located at different positions in the D3 direction. In this case, for example, it is possible to reduce the decrease in the self-resonant frequency of the inductor 3. Specifically, this is as follows.

[0027] In each inductor 3, the overlapping portions in the D3 direction (or the adjacent portions that do not overlap) form a capacitor. For example, in the first inductor 3A of the multilayer substrates 1A and 1B, the first conductor pattern 5A and the third conductor pattern 5C overlap each other to form a capacitor. As a result, the self-resonant frequency of the first inductor 3A decreases.

[0028] For example, when the inductor 3 is used in a filter, the self-resonance frequency is usually relatively high, and therefore located at a frequency higher than the passband. In other words, the self-resonance is unlikely to affect the filter characteristics. However, if the self-resonance frequency decreases, the self-resonance is likely to affect the passband characteristics.

[0029] However, since the fifth conductor pattern 5E of the second inductor 3B is located closer to the first and third conductor patterns 5A and 5C than the second conductor pattern 5B (and the fourth conductor pattern 5D) in planar perspective (and even closer to or between 5A and 5C), the first and third conductor patterns 5A and 5C do not function as capacitors as easily, thereby reducing the decrease in the self-resonant frequency of the first inductor 3A.

[0030] On the other hand, because the second inductor 3B has only two layers of conductor patterns 5, the conductor patterns 5 are less likely to overlap in the direction D3. For example, in the multilayer substrates 1A and 1B, the fourth conductor pattern 5D and the fifth conductor pattern 5E do not overlap except at their ends. Consequently, the self-resonance frequency is less likely to decrease. Therefore, for example, the first inductor 3A and the second inductor 3B as a whole are less likely to affect the pass characteristics of the filter due to self-resonance.

[0031] In a second aspect, as shown in the multilayer substrates 1C and 1D, three or more inductors 3 may be provided, the three-dimensional arrangement ranges of which at least partially overlap each other. In this case, depending on the filter configuration, for example, it may be possible to improve the pass characteristics more than in a mode in which two inductors 3 are inductively coupled. Furthermore, because the arrangement ranges of the three or more inductors 3 are shared with each other, the multilayer substrates 1C and 1D can be made smaller.

[0032] Multiple embodiments may be combined with each other. In other words, modifications may be made to one embodiment so that technical features extracted from another embodiment are realized from a specific viewpoint. For example, although not shown, the sixth conductor pattern 5F may be eliminated from the multilayer boards 1C and 1D, and the technical features of both the first and second viewpoints may be realized.

[0033] When technical matters are extracted from a viewpoint different from the first and second viewpoints, the technical matters of the first and second viewpoints do not have to be established. That is, the multilayer substrate 1 (reference numerals shown in FIGS. 7 and 8) may have two mutually overlapping inductors 3, and each inductor 3 may have three or more layers of conductor patterns 5. For example, although not specifically shown, in the multilayer substrates 1A and 1B, a conductor pattern having the same shape and dimensions as the fourth conductor pattern 5D may be provided on the third layer 9C.

[0034] The above is an outline of the embodiment. The following will provide an outline of the embodiment, in the following order: 1. Matters common to multiple embodiments 1.1. Multilayer boards in general Inductors 1.3.Solid metal film 2. First embodiment (FIGS. 1 to 3) 3. Second embodiment (Fig. 4) 4. Third embodiment (FIG. 5) 5. Fourth embodiment (FIG. 6) 6. Filters containing multilayer substrates 6.1. First Example Filter (Fig. 7) 6.2. Filter according to the second example (Fig. 8) 6.3. Example of filter characteristics (Figure 9) 7. Communication equipment (Figure 10) 8. Summary of embodiments

[0035] (1. Matters common to multiple embodiments) Matters common to multiple embodiments will be described below. In this section, for convenience, the symbols of the first embodiment will be used unless otherwise specified, and the configuration of the first embodiment will be assumed. However, unless a contradiction or the like arises, such explanation may be appropriately applied to other embodiments. Note that even matters common to multiple embodiments may be described in later sections (explanations of each embodiment) for convenience.

[0036] (1.1. Multilayer boards in general) FIG. 1 may be interpreted as showing a portion or the entire multilayer substrate 1A in the planar direction (direction parallel to the D1D2 plane). The same applies to the thickness direction (D3 direction), as will be described later. The overall shape and dimensions of the multilayer substrate 1A are arbitrary. The specific dimensions of the illustrated range are also arbitrary.

[0037] The multilayer substrate 1A may have electronic elements mounted thereon, and / or may constitute at least a part of chip components mounted on another circuit board. The multilayer substrate 1A may have only the inductor 3 built-in, or may have other electronic elements built-in. The built-in electronic elements may be either built-in or embedded. Examples of the mounted, built-in, or embedded electronic elements include resistors, other inductors, capacitors, resonators (e.g., acoustic wave resonators), and ICs (Integrated Circuits).

[0038] In relation to the above, the inductor 3 may be connected to an electronic element built into the multilayer substrate 1A, or may be connected to an electronic element outside the multilayer substrate 1A (for example, an electronic element mounted on the multilayer substrate 1A). Furthermore, the end of the inductor 3 may be connected to, for example, a conductor pattern 5 (not constituting the inductor 3), a via 7 (not constituting the inductor 3), or may be exposed to the outside of the multilayer substrate 1A and connected to a bonding wire or the like.

[0039] The basic structure and materials of the multilayer substrate 1A (excluding the specific configuration of the inductor 3) may be the same as those of various known printed circuit boards. For example, the multilayer substrate 1A may be an LTCC (Low Temperature Co-fired Ceramics) substrate, an HTCC (High Temperature Co-fired Ceramic) substrate, an IPD (Integrated Passive Device) substrate, or an organic substrate.

[0040] As shown in FIG. 1, the multilayer substrate 1A has, for example, a plurality of insulating layers 11 (see FIG. 3 for the reference numerals, 11A to 11C in FIG. 1) stacked on top of one another. The conductor pattern 5 described above is located on one main surface (front or back surface) of any of the insulating layers 11. The via 7 described above penetrates one of the insulating layers 11.

[0041] The number of insulating layers 11 (and conductor layers) constituting the multilayer substrate 1A is arbitrary. FIG. 1 (or other figures) may be interpreted as showing all of the insulating layers 11 that the multilayer substrate 1A has, or as showing some of the insulating layers 11. That is, there may or may not be insulating layers 11 that overlap the upper or lower surfaces of all of the illustrated insulating layers 11A-11C. In other words, the number of insulating layers 11 may be greater than in the illustrated example.

[0042] The number of insulating layers 11 (and conductor layers) may be fewer than in the illustrated example. For example, unlike the first aspect, when three layers of conductor patterns 5 are not required, the inductor 3 may be formed by two layers of conductor patterns 5 located on the front and back of one insulating layer 11 (contrary to the description of the embodiment, the substrate does not have to be a multilayer substrate). Furthermore, three layers of conductor patterns 5 can also be realized by two layers of insulating layers 11.

[0043] The insulating layer 11 is, for example, a layer that spreads with a constant thickness. The material of the insulating layer 11 is arbitrary, as will be understood from the above-mentioned explanations of LTCC, HTCC, etc. The dimensions of the insulating layer 11, such as its thickness, are also arbitrary. The multiple insulating layers 11 may be made of the same material and / or thickness, or may be different from one another. Each insulating layer 11 is, for example, integrally formed entirely from the same material. However, each insulating layer 11 may also be formed by stacking two or more insulating layers made of different materials or the same material.

[0044] In relation to the above, for example, when the first layer 9A and the second layer 9B are said to be adjacent to each other, the single insulating layer 11 between them may be composed of two or more laminated insulating layers. Also, there may be another conductor layer located between the first layer 9A and the second layer 9B at a position away from the inductor 3 in the D1D2 plane. Of course, the first layer 9A and the second layer 9B may be made of a single material, with only one insulating layer interposed between them, without including any other conductor layers. The same applies to the second layer 9B and the third layer 9C.

[0045] Each conductor pattern 5 is, for example, in the form of a layer that spreads with a constant thickness. The conductor pattern 5 may be made of any material and may have any dimensions, such as thickness. Multiple conductor patterns 5 located on the same layer may be made of the same material and have the same thickness (in other words, they are included in the same conductor layer). The material and / or thickness of conductor patterns located on different layers may be the same or different.

[0046] The via 7 includes a conductor located in a hole that penetrates the insulating layer 11. The conductor may be, for example, a film formed on the inner surface of the hole, or may be filled into the hole. The shape and dimensions of the via 7 are arbitrary. For example, the via 7 may be cylindrical or tapered (frustum-shaped).

[0047] (1.2. Inductor) The size of the inductor 3 relative to the multilayer substrate 1A is arbitrary. For example, the inductor 3 may occupy only a relatively small portion of the multilayer substrate 1A in the thickness direction and / or planar direction, or may occupy most of the multilayer substrate 1A. Furthermore, for example, the total number of insulating layers 11 (and conductor layers) included in the multilayer substrate 1A may be close to or different from the number of insulating layers 11 (and conductor layers) constituting each inductor 3. The absolute dimensions of the inductor 3 are also arbitrary.

[0048] As already mentioned, the number of conductive patterns 5 constituting each inductor 3 is arbitrary and is not limited to two or three layers. For example, the first inductor 3A may include four or more layers of conductive patterns 5 regardless of whether the first aspect is achieved. Also, for example, unlike the first aspect, the second inductor 3B may include three or more layers of conductive patterns 5. Also, for example, some of the multiple inductors 3 whose arrangement ranges overlap each other may be composed of only one layer of conductive patterns 5.

[0049] The number of turns (angle of turns) of each inductor 3 is arbitrary. For example, the inductor 3 (conductor) may extend over one or more turns in planar perspective (as in the illustrated example), or may extend over less than one turn. In the latter case, the turn angle may be, for example, 270° or more.

[0050] The conductor patterns 5 constituting the inductor 3 may extend with a constant width (as in the illustrated example), or may have portions with varying widths. The widths of the conductor patterns 5 in multiple layers constituting each inductor 3 may be the same (as in the illustrated example) or may be different from one another. The specific size of the width is arbitrary. Furthermore, the conductor patterns 5 may include one or more linearly extending portions and / or one or more curvedly extending portions.

[0051] In the description of the embodiments, when referring to the length of the conductor pattern 5 in a planar perspective, the length may be defined as the length based on the center line of the conductor pattern 5. When referring to the length and turning angle of the conductor pattern 5 in a planar perspective, the influence of the shape of the end of the conductor pattern 5 may be reasonably taken into consideration.

[0052] When focusing on two of the two or more inductors 3 that are inductively coupled to each other, the overlapping amount of their arrangement ranges is arbitrary. For example, the majority of the inductors may overlap each other. Here, the majority may be, for example, 60% or more, 80% or more, or 100% of the three-dimensional arrangement range (volume) or the arrangement range (area) in a plan view of the inductors 3. Of course, the overlapping amount may be smaller than the above.

[0053] (1.3. Solid metal film) Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1. In the example shown in Fig. 3, the multilayer substrate 1A has an insulating layer 11 (11D) that overlaps the first layer 9A (the first conductor pattern 5A and the fourth conductor pattern 5D).

[0054] 3, the layer adjacent to the first layer 9A on the opposite side (+D3 side) from the second layer 9B does not have a solid (spreading shape with substantially no gaps over a relatively wide area) metal film that overlaps some or all of the multiple inductors 3. In this regard, the multilayer substrate 1A may be configured to have an insulating layer 11D that overlaps the first layer 9A on the +D3 side but not have the metal film on the upper surface of the insulating layer 11D (example of FIG. 3), or may be configured not to have the insulating layer 11D.

[0055] 3, the layer adjacent to the third layer 9C on the opposite side (-D3 side) from the second layer 9B does not have a solid metal film that overlaps some or all of the multiple inductors 3. In this regard, the multilayer substrate 1A may be configured to have an insulating layer 11C that overlaps the third layer 9C on the -D3 side but not have the metal film on the underside of insulating layer 11C (example of FIG. 3), or may be configured not to have insulating layer 11C.

[0056] The solid metal film referred to here has a relatively large area compared to the area of ​​the inductor 3. For example, in a planar perspective view, the solid metal film may overlap 50% or more, 80% or more, or 100% of the area of ​​the arrangement range of the inductor 3. Conversely, even if there is a metal film that overlaps less than 50% of the area of ​​the arrangement range of the inductor 3, it does not need to be considered as a solid metal film overlapping the inductor 3.

[0057] However, unlike the illustrated example, a solid metal film as described above may be provided. Such a metal film may, for example, be provided with a reference potential or may be electrically floating, and may function as a shield. And / or the metal film may form a capacitor (intended) with the conductor of the inductor 3.

[0058] (2. First Embodiment) As shown in FIGS. 1 and 2, the conductor patterns 5 (the conductor patterns 5 themselves, not including the areas surrounded by the conductor patterns 5) of the first inductor 3A and the second inductor 3B according to the first embodiment largely overlap each other in the D3 direction. From another perspective, most of the two inductors share a common central axis and have the same radius. The first inductor 3A winds counterclockwise as viewed from the +D3 side, extending from the +D3 side to the -D3 side. On the other hand, the second inductor 3B winds clockwise as viewed from the +D3 side, extending from the +D3 side to the -D3 side. In other words, the two inductors wind in opposite directions when traced from the +D3 side to the -D3 side.

[0059] Here, in a structure generally referred to as a double helix, unlike the above, two lines (two spirals) wind in the same direction. This prevents them from crossing each other. Conversely, if two lines (two spirals) wind in opposite directions around the same axis at the same radius, they will cross each other (the two inductors 3 will be short-circuited). In the examples of Figures 1 and 2, the positions of the ends of the conductor patterns 5 (or vias 7 from another perspective) of the two inductors 3 are shifted radially from each other. This prevents them from shorting. As will be described later, this shift in the ends contributes to increasing the winding angle of the conductor patterns 5 from another perspective.

[0060] Unlike the illustrated example, the two inductors 3 may have a structure similar to the general double helix described above. Furthermore, as already mentioned, the two inductors 3 (their conductor patterns 5) may not overlap at all in a planar perspective. For example, the second inductor 3B may be entirely located inside the first inductor 3A. In this case, it is clear that the two inductors 3 may have any different spiral directions.

[0061] From another perspective, the ends of the conductor patterns 5 of the two inductors 3 are radially offset from each other and overlap in circumferential range around the central axis. The end (one end) here may be, for example, a portion having a length of 20% or less or 10% or less of the length of one revolution (or the entire length if the inductor 3 does not make one revolution), and / or a portion spanning an angular range of 20° or less or 10° or less around the central axis.

[0062] In planar perspective, the length (or angle) of overlap of the conductor patterns 5 of the two inductors 3 is arbitrary. For example, the two inductors 3 may overlap over 50% or more, 60% or more, or 70% or more of the length of one circumference in planar perspective (the total length of the four sides of the rectangle in the illustrated example). Furthermore, the above-mentioned length may be replaced with an angle, and the above-mentioned threshold value may be used. In other words, the two inductors 3 may overlap over 50% or more, 60% or more, or 70% or more of 360° of the inductor 3.

[0063] If neither of the two inductors 3 completes a full revolution in planar perspective, the overall length of the inductor 3 that is longer in planar perspective may be used instead of the length of one revolution described above. Similarly, if neither of the two inductors 3 completes a full revolution, the revolution angle of the inductor 3 with the larger revolution angle may be used instead of 360°. If the revolution orbit of one inductor 3 differs depending on the position in the D3 direction, for example, it may be determined whether the overlap amount of the two inductors 3 for any one revolution is equal to or greater than the lower limit value described above.

[0064] The shape of the inductor 3 in planar perspective (the shape of the orbit) is arbitrary. In the example of FIGS. 1 and 2, the shape of the first inductor 3A is square. As described above, the shape of the second inductor 3B is such that the positions of the ends of the conductor pattern 5 are shifted relative to the positions of the ends of the conductor pattern 5 of the first inductor 3A, and therefore the shape is a square of the same dimensions as the square of the first inductor 3A with two corners (more specifically, a pair of diagonal corners) chamfered. More specifically, the chamfering is performed on the flat surface, and the shape of the second inductor 3B is hexagonal.

[0065] As mentioned above, a square shape does not have to be strictly square. Therefore, the shape of the second inductor 3B may also be considered to be square. In the illustrated example, the chamfered surface of the second inductor 3B is relatively large. However, this is to avoid short circuits, and it can be seen that a square shape was intended for the second inductor 3B. Therefore, as mentioned above, the shape of the second inductor 3B may also be considered to be square.

[0066] In the illustrated example, the second inductor 3B has a hexagonal shape because the ends of its conductor pattern 5 are shifted inward from the square-shaped first inductor 3A. Contrary to the illustrated example, the second inductor 3B may have a square shape with two corners protruding outward because the ends of its conductor pattern 5 are shifted outward from the square-shaped first inductor 3A. In this case, the second inductor 3B may also be considered to have a square shape. In addition, one end of the conductor pattern 5 of the second inductor 3B may be shifted inward and the other end may be shifted outward.

[0067] In the illustrated example, only the second inductor 3B has two corners that are deviated from a square shape. However, the first inductor 3A may have one corner that is deviated from a square shape, and the second inductor 3B may have another corner that is deviated from a square shape. In this case, the shapes of the first inductor 3A and the second inductor 3B may be rotationally symmetric.

[0068] Regarding the shape of the inductor 3, shapes other than a square include, for example, regular polygons other than a square (for example, equilateral triangles, regular pentagons, and regular hexagons), irregular polygons (for example, rectangles), circles, and ellipses.

[0069] In the first embodiment, a square can be said to be a regular polygon having 2n corners, where n is the number of inductors 3 whose placement ranges overlap. In the description of the first embodiment, the term "square" may be appropriately replaced with the term "regular polygon having 2n corners." In addition, in the first embodiment, a polygon other than a square can be said to be a polygon having a number of corners other than 2n.

[0070] The overall shape of two or more inductors 3 (two in the illustrated example) in planar perspective is also arbitrary. The overall shape here refers to a shape obtained by adding together the shapes of two or more inductors 3, such as the shape of the outer edge of a union region in a Venn diagram. In the examples of FIGS. 1 and 2, the overall shape of the first inductor 3A and the second inductor 3B is square even if the second inductor 3B is perceived as not being square.

[0071] The outer shape may be determined based on, for example, the center line or outer edge of the conductor pattern 5 extending in a plan view. Also, with regard to the overall outer shape, the shape for shifting the end of the conductor pattern 5 of one inductor 3 from the end of the conductor pattern 5 of another inductor 3 may be considered not to affect the determination of whether the shape is square or not.

[0072] The angle at which each conductor pattern 5 rotates around the central axis of the inductor 3 is arbitrary. In the examples of FIGS. 1 and 2, each conductor pattern 5 rotates through 180°. From another perspective, when the number of inductors 3 whose arrangement ranges overlap is n, each conductor pattern 5 rotates through 360° / n or 360° / n×0.9 or more. From yet another perspective, the total angle at which the conductor patterns 5 of n inductors 3 rotate on one layer (9A or 9B in the illustrated example) is 360° or more. This is achieved by radially shifting the ends of the inductors 3 as described above.

[0073] Unlike the illustrated example, the total angle of rotation of the conductor patterns 5 of n inductors 3 on one layer may be less than 360°. Also, while the total angle on one layer is 360° or more, one conductor pattern 5 may be less than 180° (less than 360° / n) and another conductor pattern 5 may be more than 180° (more than 360° / n).

[0074] 1 and 2, the central axes of two or more inductors 3 (two in the illustrated example) are aligned. However, unlike the illustrated example, the two or more central axes may be offset from one another. Here, "aligned" may mean, for example, that the offset between the central axes is 10% or less of the radius of rotation (e.g., the smallest radius) of any one of the two or more inductors. The central axis may be, for example, an axis located at the centroid in a plan view.

[0075] The fifth conductor pattern 5E can be considered to be located, for example, closer to the first conductor pattern 5A and the third conductor pattern 5C than the second conductor pattern 5B and the fourth conductor pattern 5D. When expressing it this way, it is sufficient if such a positional relationship holds for the most part. For example, when comparing the positions of the fourth conductor pattern 5D and the fifth conductor pattern 5E, the portion from the connection position (via 7) to the end side may be ignored.

[0076] (3. Second Embodiment) As described above, the second embodiment shown in Fig. 4 differs from the first embodiment in the configuration of the second inductor 3B (the shapes of the fourth conductor pattern 5D and the fifth conductor pattern 5E). Specifically, in a planar perspective view, the shape of the second inductor 3B according to the second embodiment is intended to be essentially square, similar to the shape of the second inductor 3B according to the first embodiment. However, in the second embodiment, the second inductor 3B is rotated 45° around its axis relative to the first inductor 3A.

[0077] Therefore, for example, in the first embodiment, the first conductor pattern 5A and the third conductor pattern 5C of the first inductor 3A and the fifth conductor pattern 5E of the second inductor 3B extend in the same direction (two directions, D1 and D2), but in the second embodiment, the extension directions of the former and latter are different from each other. Specifically, the extension direction of the fifth conductor pattern 5E in the second embodiment is in two directions inclined at 45° to the D1 and D2 directions.

[0078] Also, for example, in the first embodiment, the first conductor pattern 5A and the third conductor pattern 5C of the first inductor 3A overlap the fifth conductor pattern 5E of the second inductor 3B in a linear manner, whereas in the second embodiment, the overlap between the former and the latter is dotted (the former and the latter intersect with each other). However, in both the first and second embodiments, the fifth conductor pattern 5E can be said to be located between the first conductor pattern 5A and the third conductor pattern 5C.

[0079] Also, for example, the overall external shape of the two inductors 3 in planar perspective is not a square but a star-shaped polygon (octagonal star) having eight corners. Note that the star-shaped polygon having m corners (four in this case) may or may not be m-fold symmetric (as in the illustrated example).

[0080] Even in the configuration in which the conductor patterns 5 of the two inductors 3 extend in different directions, the conductor patterns 5 overlap at points, and / or the overall outer shape is a star-shaped polygon, as in the second embodiment, the shape of each inductor 3 is not limited to a square. Other shapes exemplified in the first embodiment may also be applied.

[0081] In the first embodiment, the position of the end of the second inductor 3B is shifted from a square position, thereby causing the first inductor 3A and the second inductor 3B to spiral in opposite directions, while avoiding short-circuiting between them. In the second embodiment, the first inductor 3A and the second inductor 3B do not linearly overlap in a planar perspective view, so this is not necessary. It is sufficient to position the end of the conductor pattern 5 (via 7) in an appropriate position where the two do not overlap. Also, in the second embodiment, unlike the example shown in the figure, the spiral directions may be the same (a general double spiral may also be used).

[0082] In the second embodiment, the angle at which each conductor pattern 5 turns around the central axis of the inductor 3 is arbitrary, and the description of the first embodiment may be applied. In the example of Fig. 4, each conductor pattern 5 turns through approximately 180°.

[0083] (4. Third Embodiment) In the third embodiment shown in Fig. 5, as described above, three inductors 3 are provided. In the example of Fig. 5, the three inductors have a triple spiral shape. That is, when tracing from the +D3 side to the -D3 side, the three inductors spiral in the same direction (counterclockwise in the example of Fig. 5). In a planar perspective view, most of the conductor patterns 5 of the three inductors 3 overlap each other. Note that, unlike the illustrated example, one of the three inductors may have a spiral direction different from that of the other two inductors.

[0084] In the example of Fig. 5, the three inductors 3 have a multiple spiral shape (they have the same winding direction), so that their conductor patterns 5 can be entirely overlapped in planar perspective, while avoiding short circuits. However, in the example of Fig. 5, as in the first embodiment, the ends of circumferentially adjacent conductor patterns 5 on the same layer are shifted radially. From another perspective, the ends of each conductor pattern 5 are shifted from the shape intended as the circular orbit (a regular hexagon indicated by line LC in the illustrated example).

[0085] As can be understood from the description of the first embodiment, this makes it easy to increase the turning angle of the conductor patterns 5. For example, the total turning angle of the conductor patterns 5 of n (here, three) inductors 3 can be set to 360° or more, or the turning angle of each conductor pattern 5 can be set to 360° / n or more. In the example of Fig. 5, the turning angle of each conductor pattern 5 is set to approximately 120°.

[0086] The shape of the inductors 3 in planar perspective (the shape of the orbit) is arbitrary. In the example of FIG. 5, the shape of each inductor 3 is a regular hexagon. In other words, as in the first embodiment, the shape of each inductor 3 is a regular polygon having 2n corners, where n is the number of inductors 3. Furthermore, the overall outer shape of the three inductors 3 in planar perspective is also a regular hexagon (a regular polygon having 2n corners), as shown by line LC. Examples of shapes other than such regular polygons have already been described in the explanation of the first embodiment.

[0087] Each inductor 3 does not have a strict regular hexagonal shape because the ends of the conductor pattern 5 are shifted from the intended shape (regular hexagon). In the first embodiment, only the second inductor 3B is shifted from the intended shape (square), but in the third embodiment, the ends of all the inductors 3 are shifted equally. Consequently, all the inductors 3 have shapes that are rotationally symmetrical with respect to one another. More specifically, in each inductor 3, opposing corners are chamfered with flat surfaces. From another perspective, one end of each of the multiple conductor patterns 5 is shifted inward. In each inductor 3, the multiple conductor patterns 5 have the same shape (arrangement positions are rotationally symmetrical).

[0088] As already mentioned, such a rotationally symmetric shape may be applied to two inductors as in the first embodiment, or may be applied to an embodiment (not shown) in which the number of inductors 3 is four or more. Conversely, a rotationally asymmetric shape as in the first embodiment may be applied to this embodiment, etc. Also, as described in the first embodiment, the direction deviated from the intended shape (regular hexagon) may be outward rather than inward.

[0089] (5. Fourth Embodiment) As described above, the fourth embodiment shown in FIG. 6 differs from the third embodiment in the specific shape of the inductors 3 in a planar perspective. Specifically, each inductor 3 has a pentagonal shape that combines a rectangle and a triangle. The three inductors 3 are oriented in directions that differ by 120° from one another. The overall outline of the three inductors 3 is a star-shaped polygon with nine corners, as shown by the line LD. The shape of each inductor 3 and the overall outline are rotationally symmetric.

[0090] (6. Filters including multilayer substrates) The multilayer substrate 1 may be used, for example, in various filters. Examples of such filters include BP filters, BE filters, low-pass filters, high-pass filters, and combinations of two or more of these. From another perspective, examples include acoustic wave filters that use acoustic waves, LC filters that use LC circuits, and combinations of these. In addition, in a filter including the multilayer substrate 1, any of the inductors 3 may be inductively coupled, and the purpose of the inductive coupling may be arbitrary. Examples are shown below.

[0091] (6.1. Filter related to the first example) 7 is a circuit diagram showing the configuration of an extractor 21A including a multilayer substrate 1. The extractor 21A may be regarded as an example of a filter, and a BE filter 27A (described later) included in the extractor 21A may be regarded as an example of a filter.

[0092] The extractor 21A is configured, for example, to pass signals in a predetermined pass band in the signal path between the common terminal 23A and the BP terminal 23P, and to attenuate signals in a predetermined attenuation band in the signal path between the common terminal 23A and the BE terminal 23E (from another perspective, to pass signals outside the attenuation band). The pass band and the attenuation band generally coincide with each other.

[0093] The extractor 21A has, for example, a BP filter 25 located between the common terminal 23A and the BP terminal 23P and passing signals in the pass band, and a BE filter 27A located between the common terminal 23A and the BE terminal 23E and attenuating signals in the attenuation band. A matching circuit 29 for impedance matching may be interposed between the common terminal 23A and these filters.

[0094] The specific configurations of the BP filter 25 and the matching circuit 29 are arbitrary. In the illustrated example, the BP filter 25 is a ladder-type filter having a plurality of resonators 31 connected in a ladder configuration. The resonators 31 may be, for example, elastic wave resonators that utilize elastic waves. This also applies to the resonators 31 included in the BE filter 27A (described later) and the resonators 31 included in the BE filter 27B (FIG. 8) described later. The elastic waves may be surface acoustic waves (SAW), bulk acoustic waves (BAW), plate waves, or boundary acoustic waves.

[0095] The BE filter 27A has a signal path 33 in which at least one node is connected to the reference potential unit 35. A portion of the signal path 33 that is separated by nodes connected to the reference potential unit 35 is referred to as a series arm 37. A path connecting the signal path 33 and the reference potential unit 35 is referred to as a parallel arm 39. In the example of FIG. 7 , the two parallel arms 39 join on the side of the reference potential unit 35, but may be considered to connect the signal paths 33 to the reference potential unit 35 in parallel with each other.

[0096] At least two (three in the illustrated example) of the multiple (three in the illustrated example) series arms 37 each have an inductor 3. At least one (two in the illustrated example) of the multiple (two in the illustrated example) parallel arms 39 each have a resonator 31. The resonant frequency (the frequency at which the impedance becomes a minimum value) of the resonator 31 in the parallel arm 39 is set lower than the cutoff frequency of the inductor 3 in the series arm 37. This provides filter characteristics in which a relatively narrow attenuation band (including the resonant frequency) is located in a pass band lower than the cutoff frequency.

[0097] At least two of the inductors 3 included in the series arms 37 (the first inductor 3A and the second inductor 3B in the example of FIG. 7) are formed by the multilayer substrate 1 and are inductively coupled to each other, which makes it possible to adjust, for example, the width of the pass band and / or the attenuation band.

[0098] The extent of the area occupied by the multilayer substrate 1 in the extractor 21A is arbitrary. For example, although not particularly shown, the extractor 21A may include the multilayer substrate 1 and one or more acoustic wave chips mounted on the multilayer substrate 1. The one or more acoustic wave chips include, for example, the BP filter 25 and the resonators 31 of the BE filter 27A. The multilayer substrate 1 includes, for example, at least the inductors 3 (3A and 3B) that are inductively coupled to each other in the BE filter 27A. In addition to the above, the multilayer substrate 1 may include, for example, some or all of the inductors 3 that are not inductively coupled in the BE filter 27A, the inductors 3 of the BP filter 25, and the inductors 3 of the matching circuit 29. Note that the inductors 3 that are not provided in the multilayer substrate 1 may be mounted on the multilayer substrate 1 or formed on the acoustic wave chip.

[0099] The inductive coupling of the inductors 3 may be either a additive coupling (as shown in the example) or a differential coupling. In two or more inductors 3 connected in series, additive coupling is coupling in which the magnetic fields formed in the two inductors 3 have the same direction when a signal flows from one side of the signal path 33 to the other. In other words, when a signal flows as described above, the magnetic fields of the two inductors 3 reinforce each other (the degree of constructive interaction is greater than the degree of destructive interaction). Differential coupling is the opposite, where the magnetic fields of the two inductors weaken each other.

[0100] 1, additive coupling is realized when the first inductor 3A and the second inductor 3B are connected in the signal path 33 so that when a signal flows in the direction of arrow AR1 at the top end of the first inductor 3A, the signal flows in the direction of arrow AR2 at the top end of the second inductor 3B. Differential coupling is realized by the opposite connection, where the signals flow as indicated by arrows AR1 and AR3.

[0101] The direction of the magnetic field formed by the inductor 3 is different, for example, between the inside and outside of the inductor 3. The above explanation referring to the arrows AR1 to AR3 is based on the premise that the arrangement ranges (in other words, the inner ranges) of the two inductors 3 overlap with each other for the most part. However, the two inductors 3 may overlap with an amount of overlap that does not satisfy the above explanation. The same applies to the inductive coupling of the two inductors 3 in the filter according to the second example described below.

[0102] (6.2. Filter related to the second example) 8 is a circuit diagram showing the configuration of another example (extractor 21B) of an extractor including the multilayer substrate 1. Extractor 21B differs from extractor 21A roughly only in the configuration of the BE filter.

[0103] Specifically, in the extractor 21B, one or more of the multiple series arms 37 (multiple (three) in the illustrated example) each have a resonator 31. Two or more of the multiple parallel arms 39 (two in the illustrated example) each have an inductor 3. The anti-resonance frequency (the frequency at which the impedance takes a maximum value) of the resonator 31 in the series arm 37 is set lower than the cutoff frequency of the inductor 3 in the parallel arm 39. This results in filter characteristics in which a relatively narrow attenuation band (including the anti-resonance frequency) is located in a pass band higher than the cutoff frequency.

[0104] At least two of the inductors 3 included in the parallel arms 39 (the first inductor 3A and the second inductor 3B in the example of FIG. 8) are formed by the multilayer substrate 1 and are inductively coupled to each other. This makes it possible to adjust, for example, the width of the pass band and / or the attenuation band.

[0105] The inductive coupling of the inductors 3 may be either a additive coupling or a differential coupling (as shown in the example). Differential coupling in the two parallel arms 39 is coupling in which the magnetic fields formed in the two parallel arms 39 have opposite directions when unwanted signals flow from the signal paths 33 to the reference potential sections 35 in both of them. In other words, when a signal flows as described above, the magnetic fields of the two inductors 3 weaken each other (the degree of weakening is greater than the degree of constructive coupling). Conversely, additive coupling is coupling in which the magnetic fields of the two inductors strengthen each other.

[0106] 1, differential coupling is achieved when an unwanted signal flows from signal path 33 to the upper end of first inductor 3A in the direction of arrow AR1 toward reference potential section 35, and when an unwanted signal flows from signal path 33 to the upper end of second inductor 3B in the direction of arrow AR3 toward reference potential section 35. Conversely, additive coupling is achieved by a connection in which the unwanted signal flows as indicated by arrows AR1 and AR2.

[0107] (6.3. Example of filter characteristics) 9 is a diagram showing an example of the characteristics of the extractor 21A. The upper diagram shows the pass characteristic |S 31 |(dB), and more precisely, it shows the pass characteristic from the common terminal 23A to the BP terminal 23P. The lower graph shows the characteristic |S 21 |(dB), and more precisely, the transmission characteristics from the common terminal 23A to the BE terminal 23E. The horizontal axis represents frequency f (GHz). The vertical axis represents the transmission characteristics.

[0108] The BP filter 25 has a pass band B1. The BE filter 27A has an attenuation band B2 that at least partially overlaps with the pass band B1. The frequencies and widths of these bands are arbitrary. In the illustrated example, the pass band B1 and the attenuation band B2 are relatively high in frequency. For example, the pass band B1 and the attenuation band B2 are located between 1 GHz and 3 GHz. In addition, in the illustrated example, the BE filter 27A has a pass band B3 on the higher frequency side of the attenuation band B2. The upper limit of this pass band B3 is also relatively high. For example, the upper limit is located between 2 GHz and 6 GHz, provided that the upper limit is higher than the upper limit of the attenuation band B2.

[0109] (7. Communication Equipment) FIG. 10 is a block diagram showing an example of the configuration of a communication device 51 including an extractor 21 (for example, 21A or 21B).

[0110] The communication device 51 is configured to perform at least one of reception and transmission of a radio signal (both in the illustrated example) via the antenna 53. Specifically, the following is performed.

[0111] The antenna 53 is connected to the common terminal 23A (FIGS. 7 and 8) of the extractor 21. The BP terminal 23P (FIGS. 7 and 8) of the extractor 21 is connected to the first filter device 55. The BE terminal 23E (FIGS. 7 and 8) of the extractor 21 is connected to the second filter device 57.

[0112] The first filter device 55 has, for example, a first branching filter 63 connected to the BP terminal 23P, and a first transmit filter 65 and a first receive filter 67 connected to the first branching filter 63. The first transmit filter 65 filters the transmit signal and inputs it to the first branching filter 63. The first receive filter 67 filters the receive signal from the first branching filter 63. The first branching filter 63 reduces the amount of transmit signal flowing into the first receive filter 67 and the amount of receive signal flowing into the first transmit filter 65. The pass bands of the first transmit filter 65 and the first receive filter 67 are included in the pass band of the BP filter 25.

[0113] The second filter device 57 has, for example, a second branching filter 69 connected to the BE terminal 23E, and a second transmit filter 71 and a second receive filter 73 connected to the second branching filter 69. The above-mentioned descriptions of the first branching filter 63, the first transmit filter 65, and the first receive filter 67 may also be applied to the second branching filter 69, the second transmit filter 71, and the second receive filter 73. However, the pass bands of the second transmit filter 71 and the second receive filter 73 are included in the pass band of the BE filter 27.

[0114] The RF-IC 59 (Radio Frequency Integrated Circuit) performs modulation and frequency-upgrade processing on the baseband transmission signal, and inputs the high-frequency transmission signal to the transmission filters (65 and 71). The RF-IC 59 also performs demodulation and frequency-downgrade processing on the high-frequency reception signal from the reception filters (67 and 73).

[0115] The baseband processing unit 61 generates a baseband transmission signal based on predetermined processing and inputs it to the RF-IC 59. The baseband processing unit 61 also performs predetermined processing based on a baseband reception signal from the RF-IC 59. The content of the processing and the signal are arbitrary.

[0116] The communication device 51 may have any configuration in terms of hardware. For example, the extractor 21 may or may not share the multilayer substrate 1 with part or all of the first filter device 55 and the second filter device 57. The RF-IC 59 may be configured by multiple ICs instead of a single IC. The same applies to the baseband processing unit 61. Also, unlike the description here, the components that use signals in the passband of the BP filter 25 and the components that use signals in the passband of the BE filter 27 may be included in separate devices.

[0117] (8. Summary of embodiments) As described above, the multilayer substrate 1 has a plurality of inductors 3. Each of the plurality of inductors 3 is composed of a plurality of conductor patterns 5 and one or more vias 7. The plurality of conductor patterns 5 are located at different positions in the stacking direction (direction D3). The one or more vias 7 connect the plurality of conductor patterns 5 together. The axial direction of the plurality of inductors 3 is the stacking direction.

[0118] As exemplified by the multilayer substrates 1A and 1B, the multiple inductors 3 may include a first inductor 3A and a second inductor 3B. The first inductor 3A may include a first conductor pattern 5A to a third conductor pattern 5C. The first conductor pattern 5A may be located on a first layer 9A. The second conductor pattern 5B may be located on a second layer 9B adjacent to the first layer 9A in the stacking direction, and may have a portion that does not overlap with the first conductor pattern 5A in a planar perspective. The third conductor pattern 5C may be located on a third layer 9C adjacent to the second layer 9B in the stacking direction, and may have a portion that does not overlap with the second conductor pattern 5B in a planar perspective. The second inductor 3B may include a fourth conductor pattern 5D and a fifth conductor pattern 5E. The fourth conductor pattern 5D may be located on the first layer 9A. The fifth conductor pattern 5E may be located on the second layer 9B and may be located on the side of the first conductor pattern 5A and the third conductor pattern 5C relative to the second conductor pattern 5B and the fourth conductor pattern 5D in a planar perspective view. The second inductor 3B may be configured so as not to have a conductor pattern 5 located on the third layer 9C or a conductor pattern 5 located on an adjacent layer on the opposite side of the first layer 9A from the second layer 9B (first aspect).

[0119] In this case, for example, as described in the overview of the embodiment, it is possible to reduce the decrease in the self-resonant frequency, and as a result, for example, when the multilayer substrate 1 is used in a filter that filters high-frequency signals, the likelihood that the self-resonance will affect the pass characteristics of the filter is reduced.

[0120] As exemplified by the multilayer substrates 1A and 1B, the first inductor 3A and the second inductor 3B may have opposite winding directions when tracing from the first side (+D3 side) to the second side (-D3 side) in the stacking direction.

[0121] In this case, the two inductors 3 are realized in a manner different from a double helix, with their arrangement ranges overlapping each other. As a result, the number of connection modes for the two inductors 3 to realize, for example, additive coupling or differential coupling is increased.

[0122] As exemplified by the multilayer substrates 1A and 1B, at least one of the first inductor 3A and the second inductor 3B may have a square shape in plan view.

[0123] In this case, the area relative to the length of the conductor is larger than in a case where the inductor 3 has a rectangular shape (this case is also included in the technology of the present disclosure). As a result, the mutual inductance of the two inductors 3 can be easily increased. Therefore, for example, the self-inductance of each inductor 3 can be substantially reduced, thereby increasing the self-resonant frequency. This in turn reduces the effect of self-resonance on the filter characteristics. Furthermore, for example, when improving the filter characteristics by adjusting the mutual inductance, the upper limit of the adjustable range can be increased, thereby improving the degree of design freedom. Since electronic elements are often arranged in the D1 and D2 directions within the multilayer substrate 1, dead space is less likely to occur within the multilayer substrate 1 than in a case where the inductor 3 has a circular shape (this case is also included in the technology of the present disclosure).

[0124] As exemplified by the multilayer substrates 1A and 1B, the fifth conductor pattern 5E may be located between the first conductor pattern 5A and the third conductor pattern 5C. That is, in a planar perspective view, the fifth conductor pattern 5E may overlap the first conductor pattern 5A and the third conductor pattern 5C.

[0125] In this case, the effect of reducing the capacitance and increasing the self-resonant frequency is improved compared to, for example, an embodiment in which the fifth conductor pattern 5E is located near the first conductor pattern 5A and the third conductor pattern 5C in a planar perspective view (this embodiment is also included in the technology according to the present disclosure). Also, it becomes easier to strengthen the inductive coupling between the two inductors 3 and to reduce the range in which the two inductors 3 are arranged.

[0126] As exemplified by the multilayer substrate 1B, the extending direction of the first conductor pattern 5A and the third conductor pattern 5C may be different from the extending direction of the fifth conductor pattern 5E.

[0127] In this case, for example, the overlap between the first conductor pattern 5A (and the third conductor pattern 5C) and the fifth conductor pattern 5E is not linear but point-like. Therefore, even if the positions of the two are shifted due to manufacturing variations, for example, the overlap area between the two is unlikely to change. As a result, for example, the effect of manufacturing variations on capacitance is reduced.

[0128] As exemplified by the multilayer substrates 1C and 1D, the multiple inductors 3 may have three or more inductors 3 whose placement ranges in the stacking direction at least partially overlap each other and whose placement ranges in a planar perspective at least partially overlap each other (second aspect).

[0129] In this case, for example, as described in the outline of the embodiment, it is possible to reduce the size of the multilayer substrate 1 and to enhance the effect of improving the filter characteristics by inductive coupling.

[0130] As exemplified by the multilayer substrate 1C, when the number of three or more inductors 3 whose placement ranges overlap is n, the shape of at least one inductor 3 in planar perspective may be a regular polygon with 2n corners.

[0131] In this case, the area of ​​the inductor 3 is larger relative to the length of the conductor, for example, compared to an embodiment in which the shape of the inductor 3 is a polygon that is not a regular polygon (this embodiment is also included in the technology according to the present disclosure). As a result, it is easy to increase the mutual inductance, for example, as in the case in which the shape of the two inductors 3 described above is a square.

[0132] As exemplified by the multilayer substrates 1A to 1D, the multiple inductors 3 may include two or more inductors 3 whose arrangement ranges in the stacking direction overlap each other across two or more layers. At any one point in a planar perspective view, the two or more inductors 3 may be positioned in order in the stacking direction.

[0133] In this case, for example, two inductors 3 are arranged so as to mesh with each other, so that in plan view, each inductor 3 can be made larger while reducing the overall range of arrangement of two or more inductors 3. Also, for example, if two portions of one inductor 3 are located at one point in plan view and another inductor 3 is located between them, the capacitance generated by the two portions can be reduced.

[0134] As exemplified by the multilayer substrates 1A to 1D, the deviation between the central axes of two or more inductors 3 whose arrangement areas overlap each other may be 10% or less of the turning radius of any one of the two or more inductors 3.

[0135] In this case, for example, it is easy to increase the overlapping amount of the arrangement ranges of two or more inductors 3 in planar perspective view. As a result, for example, efficient inductive coupling can be achieved, and the overall arrangement range of two or more inductors 3 can be reduced.

[0136] As exemplified by multilayer substrates 1A to 1D, at least one inductor 3 of two or more inductors 3 whose arrangement ranges overlap each other may have a conductor pattern 5 located on three layers adjacent to each other in the direction D3 (the stacking direction of multilayer substrate 1). As exemplified by Fig. 3, multilayer substrate 1 may be configured so that no solid metal film is located on each of two layers adjacent to both sides of the three layers in the direction D3, in an area that overlaps with the arrangement ranges of the two or more inductors 3 in a planar perspective view.

[0137] In this case, for example, the probability that an unintended capacitor is formed is reduced, and the probability that two inductors 3 are connected via a capacitor is reduced, which in turn reduces the probability that the characteristics of a filter including the inductor 3 are degraded.

[0138] As exemplified by multilayer substrates 1A to 1D, when n inductors with overlapping placement areas are provided, each of the n inductors 3 on the same layer in the stacking direction may have a conductor pattern 5 that rotates around the central axis of each inductor 3 by more than (360° / n)×0.9.

[0139] In this case, for example, it becomes easier to increase the number of turns of the inductor 3 relative to the range of placement of the inductor 3 in the D3 direction. From another perspective, the coil pitch can be reduced. As a result, the multilayer substrate 1 can be made thinner and the self-inductance of the inductor 3 can be increased.

[0140] As exemplified by the multilayer substrates 1A to 1D, each of the n inductors 3 described above may have a conductor pattern 5 that rotates around the central axis of each inductor over an angle of (360° / n)×0.9 or more across two or more layers, including the same layer described above.

[0141] In this case, for example, the effect of reducing the coil pitch is improved.

[0142] As exemplified by multilayer substrates 1A to 1D, with respect to two or more inductors 3 whose placement ranges at least partially overlap each other, in the same layer in the stacking direction, the ends of the conductor patterns 5 of each of the two or more inductors 3 extending around the central axis of each inductor 3 may overlap in the circumferential direction around the central axis with the ends of the conductor patterns 5 of the other inductors 3 and may be spaced apart in the radial direction from the central axis.

[0143] In this case, for example, in each layer, the winding angle of each conductor pattern 5 can be increased while avoiding short-circuiting between adjacent conductor patterns 5. As a result, for example, the coil pitch can be reduced. Also, for example, as exemplified by the multilayer substrates 1A and 1B, the winding direction can be reversed.

[0144] The BE filter 27 (27A or 27B) may have a multilayer substrate 1 and a signal path 33 having at least one node connected to a reference potential section 35. Two or more inductors 3 whose placement areas overlap each other may be connected in series to each other within the signal path 33, or the signal path 33 and the reference potential section 35 may be connected in parallel to each other.

[0145] In this case, for example, the width of the pass band and / or the attenuation band can be adjusted by inductive coupling of two or more inductors 3. For example, the pass band can be widened by additive coupling of the inductors 3 in the series arm 37, or by differential coupling of the inductors 3 in the parallel arm 39. Furthermore, a filter with reduced effects of self-resonance on the characteristics can be realized.

[0146] The BE filter 27 may have an attenuation pole at 1 GH or higher.

[0147] In this case, for example, the BE filter 27 can be said to have an attenuation band at a relatively high frequency. In other words, it can be said that self-resonance is likely to affect the characteristics. Therefore, for example, the effect of increasing the self-resonance frequency described above is effective.

[0148] The communication device 51 may have a BE filter 27, an antenna 53 connected directly or indirectly to one side of the signal path 33 (common terminal 23A), and an RF-IC 59 connected directly or indirectly to the other side of the signal path 33 (BE terminal 23E).

[0149] In this case, for example, wireless communication is realized that takes advantage of the advantages of the above-described multilayer substrate 1 and BE filter 27. For example, communication with a wide passband becomes possible, and also, for example, stable communication with reduced effects of self-resonance becomes possible.

[0150] The following concepts can be extracted from this disclosure.

[0151] (Concept 1) a plurality of inductors, each of which is composed of a plurality of conductor patterns located at different positions in a stacking direction and one or more vias connecting the plurality of conductor patterns, and whose axial direction is the stacking direction; the plurality of inductors include a first inductor and a second inductor; The first inductor is a first conductor pattern located on a first layer; a second conductor pattern located on a second layer adjacent to the first layer in the stacking direction, the second conductor pattern having a portion that does not overlap the first conductor pattern in a planar perspective view; a third conductor pattern located on a third layer adjacent to the second layer in the stacking direction and having a portion that does not overlap the second conductor pattern in a planar perspective view; The second inductor is a fourth conductor pattern located on the first layer; a fifth conductor pattern located on the second layer and positioned closer to the first conductor pattern and the third conductor pattern than the second conductor pattern and the fourth conductor pattern in a planar perspective view; The conductive pattern does not have a conductive pattern located on the third layer and a conductive pattern located on a layer adjacent to the first layer on the opposite side of the second layer. Multilayer board. (Concept 2) The first inductor and the second inductor have opposite winding directions when traced from the first side to the second side in the stacking direction. 10. The multilayer substrate of claim 1. (Concept 3) At least one of the first inductor and the second inductor has a square shape in plan view. 3. The multilayer substrate of claim 1 or 2. (Concept 4) the fifth conductor pattern is located between the first conductor pattern and the third conductor pattern; The multilayer substrate according to any one of Concepts 1 to 3. (Concept 5) the extending direction of the first conductor pattern and the third conductor pattern is different from the extending direction of the fifth conductor pattern; The multilayer substrate according to any one of Concepts 1 to 4. (Concept 6) a plurality of inductors, each of which is composed of a plurality of conductor patterns located at different positions in a stacking direction and one or more vias connecting the plurality of conductor patterns, and whose axial direction is the stacking direction; The plurality of inductors include three or more inductors whose arrangement ranges in the stacking direction at least partially overlap each other and whose arrangement ranges in a planar perspective view at least partially overlap each other. Multilayer board. (Concept 7) When the number of the three or more inductors is n, the shape of at least one inductor in planar perspective is a regular polygon with 2n corners. 10. The multilayer substrate of claim 6. (Concept 8) the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers, At any one point in plan view, the two or more inductors are positioned in order in the lamination direction. The multilayer substrate according to any one of Concepts 1 to 7. (Concept 9) the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers, The deviation of the central axes of the two or more inductors from each other is 10% or less of the turning radius of any one of the two or more inductors. The multilayer substrate according to any one of Concepts 1 to 8. (Concept 10) the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective at least partially overlap each other, At least one of the two or more inductors has the conductor patterns located in three layers adjacent to each other in the stacking direction, No solid metal film is located in the area of ​​each of the two adjacent layers on both sides of the three layers in the stacking direction that overlaps with the arrangement range of the two or more inductors in a planar perspective view. The multilayer substrate according to any one of Concepts 1 to 9. (Concept 11) the plurality of inductors include n inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective overlap each other at least partially, In the same layer in the lamination direction, each of the n inductors has the conductor pattern that rotates around the central axis of each inductor by (360° / n)×0.9 or more. The multilayer substrate according to any one of Concepts 1 to 10. (Concept 12) Each of the n inductors has the conductor pattern that rotates around the central axis of each inductor by (360° / n)×0.9 or more across two or more layers including the same layer. 12. The multilayer substrate of claim 11. (Concept 13) the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective view at least partially overlap each other; In the same layer in the lamination direction, the end of the conductor pattern of each of the two or more inductors extending around the central axis of the inductor overlaps with the end of the conductor pattern of another inductor in the circumferential direction around the central axis and is spaced apart in the radial direction from the central axis. 13. The multilayer substrate of any one of Concepts 1 to 12. (Concept 14) A multilayer substrate according to any one of concepts 1 to 13; a signal path having at least one node connected to a reference potential section; and the plurality of inductors include two or more inductors whose arrangement ranges in the lamination direction of the plurality of conductor patterns overlap each other across two or more layers and whose arrangement ranges in a planar perspective at least partially overlap each other; The two or more inductors are connected in series within the signal path, or the signal path and the reference potential unit are connected in parallel with each other. filter. (Concept 15) Has an attenuation pole above 1GHz 15. The filter of claim 14. (Concept 16) A filter according to concept 14 or 15; an antenna connected to one side of the signal path; an IC connected to the other side of the signal path; A communication device having: [Explanation of symbols]

[0152] 1 (1A to 1D)...multilayer substrate, 3 (3A to 3C)...inductor, 3A...first inductor, 3B...second inductor, 5 (5A to 5I)...conductor pattern, 5A...first conductor pattern, 5B...second conductor pattern, 5C...third conductor pattern, 5D...fourth conductor pattern, 5E...fifth conductor pattern, 7...via, 9A...first layer, 9B...second layer, 9C...third layer.

Claims

1. a plurality of inductors, each of which is composed of a plurality of conductor patterns located at different positions in a stacking direction and one or more vias connecting the plurality of conductor patterns, and whose axial direction is the stacking direction; the plurality of inductors includes a first inductor and a second inductor; The first inductor is a first conductor pattern located on a first layer; a second conductor pattern located on a second layer adjacent to the first layer in the stacking direction, the second conductor pattern having a portion that does not overlap the first conductor pattern in a planar perspective view; a third conductor pattern located on a third layer adjacent to the second layer in the stacking direction, the third conductor pattern having a portion that does not overlap the second conductor pattern in a planar perspective view; The second inductor is a fourth conductor pattern located on the first layer; a fifth conductor pattern located on the second layer and positioned closer to the first conductor pattern and the third conductor pattern than the second conductor pattern and the fourth conductor pattern in a planar perspective view; The conductive pattern does not have a conductive pattern located on the third layer and a conductive pattern located on an adjacent layer on the opposite side of the first layer from the second layer. Multilayer board.

2. The first inductor and the second inductor have opposite winding directions when traced from the first side to the second side in the stacking direction. The multilayer substrate according to claim 1 .

3. At least one of the first inductor and the second inductor has a square shape in plan view. The multilayer substrate according to claim 1 .

4. the fifth conductor pattern is located between the first conductor pattern and the third conductor pattern; The multilayer substrate according to claim 1 .

5. the extending direction of the first conductor pattern and the third conductor pattern is different from the extending direction of the fifth conductor pattern; The multilayer substrate according to claim 1 .

6. a plurality of inductors, each of which is composed of a plurality of conductor patterns located at different positions in a stacking direction and one or more vias connecting the plurality of conductor patterns, and whose axial direction is the stacking direction; The plurality of inductors include three or more inductors whose arrangement ranges in the stacking direction at least partially overlap each other and whose arrangement ranges in a planar perspective view at least partially overlap each other. Multilayer board.

7. When the number of the three or more inductors is n, the shape of at least one inductor in planar perspective is a regular polygon with 2n corners. The multilayer substrate according to claim 6 .

8. the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers, At any one point in plan view, the two or more inductors are positioned in order in the lamination direction. The multilayer substrate according to claim 1 or 6.

9. the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers, The deviation of the central axes of the two or more inductors from each other is 10% or less of the turning radius of any one of the two or more inductors. The multilayer substrate according to claim 1 or 6.

10. the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective at least partially overlap each other, At least one of the two or more inductors has the conductor patterns located in three layers adjacent to each other in the stacking direction, No solid metal film is located in the area of ​​each of the two adjacent layers on both sides of the three layers in the stacking direction, which overlaps with the arrangement range of the two or more inductors in a planar perspective view. The multilayer substrate according to claim 1 or 6.

11. the plurality of inductors include n inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective overlap each other at least partially, In the same layer in the lamination direction, each of the n inductors has the conductor pattern that rotates around the central axis of each inductor by (360° / n)×0.9 or more. The multilayer substrate according to claim 1 or 6.

12. Each of the n inductors has the conductor pattern that rotates around the central axis of each inductor by (360° / n)×0.9 or more across two or more layers including the same layer. The multilayer substrate according to claim 11.

13. the plurality of inductors include two or more inductors whose arrangement ranges in the stacking direction overlap each other across two or more layers and whose arrangement ranges in a planar perspective view at least partially overlap each other, In the same layer in the lamination direction, the conductor patterns of the two or more inductors have ends of portions extending around a central axis thereof that overlap with ends of the conductor patterns of other inductors in the circumferential direction around the central axis and are spaced apart in the radial direction from the central axis. The multilayer substrate according to claim 1 or 6.

14. A multilayer substrate according to claim 1 or 6; a signal path having at least one node connected to a reference potential portion; and the plurality of inductors include two or more inductors whose arrangement ranges in the lamination direction of the plurality of conductor patterns overlap each other across two or more layers and whose arrangement ranges in a planar perspective at least partially overlap each other, The two or more inductors are connected in series within the signal path, or the signal path and the reference potential unit are connected in parallel with each other. filter.

15. Has an attenuation pole above 1 GHz 15. The filter of claim 14.

16. A filter according to claim 14; an antenna connected to one side of the signal path; an IC connected to the other side of the signal path; A communication device having:

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