Vertical nitride semiconductor device manufacturing method and vertical nitride semiconductor device

Abstract

To provide a vertical nitride semiconductor device capable of achieving both low resistance and high heat dissipation.SOLUTION: The manufacturing method of the vertical nitride semiconductor device 1 includes a semiconductor substrate preparation step of preparing a semiconductor substrate 20 made of a group III nitride semiconductor and having a donor element concentration of 1 * 1019cm-3 or more, and a support layer formation step of forming a support layer 10 containing a metal having a thickness of 10 μm or more on a first main surface of the semiconductor substrate 20.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a vertical nitride semiconductor device and a vertical nitride semiconductor device. [Background technology]

[0002] Conventionally, in order to improve the performance of semiconductor devices, it has been desired to lower the resistance by increasing the dopant concentration of the semiconductor substrate that constitutes the semiconductor device. For example, in the vertical nitride semiconductor device disclosed in Patent Document 1, the dopant concentration is 1×10 19 cm -3 By using the above GaN substrate, the substrate resistance is reduced, achieving low resistance. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-12900 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the configuration disclosed in Patent Document 1, the GaN substrate has a dopant concentration of 1×10 19 cm -3 For the above reasons, the inventors have found that there is a problem in that the thermal resistance increases due to the decrease in thermal conductivity caused by phonon scattering, which reduces heat dissipation. Therefore, there is room for improvement in vertical nitride semiconductor devices in order to achieve both low resistance and improved heat dissipation.

[0005] The present invention has been made in view of the above problems, and aims to provide a vertical nitride semiconductor device that achieves both low resistance and high heat dissipation. [Means for solving the problem]

[0006] One aspect of the present invention is It is made of a group III nitride semiconductor and has a donor element concentration of 1×10 19 cm -3 a semiconductor substrate preparation step of preparing the semiconductor substrate; and forming a support layer containing metal and having a thickness of 10 μm or more on the first main surface of the semiconductor substrate.

[0007] Another aspect of the present invention is It is made of a group III nitride semiconductor and has a donor element concentration of 1×10 19 cm -3 The semiconductor substrate described above; a support layer containing metal and having a thickness of 10 μm or more, formed on the first main surface of the semiconductor substrate. [Effects of the Invention]

[0008] In the method for manufacturing a vertical nitride semiconductor device according to the above aspect, the semiconductor substrate has a donor element concentration of 1×10 19 cm -3 This high concentration of 0.1 μm or more reduces the substrate resistance. Furthermore, the low resistance of the semiconductor substrate narrows the depletion layer width of the Schottky barrier layer formed at the junction between the semiconductor substrate and the metal-containing support layer, allowing current to flow more easily due to the tunneling effect, thereby reducing the contact resistance between the semiconductor substrate and the support layer. These features enable the manufacture of a vertical nitride semiconductor device with reduced resistance. Furthermore, the formation of a metal-containing support layer on the semiconductor substrate promotes heat dissipation via the support layer, improving heat dissipation. Furthermore, the support layer contains metal and has a thickness of 10 μm or more, which provides relatively high rigidity, preventing damage to the semiconductor substrate and improving handleability.

[0009] In the vertical nitride semiconductor device according to the other aspect, the semiconductor substrate has a donor element concentration of 1×10 19 cm -3As a result, the substrate resistance can be reduced, and the contact resistance between the semiconductor substrate and the support layer can be reduced, thereby lowering the resistance of the vertical nitride semiconductor device. Furthermore, the formation of a metal-containing support layer on the semiconductor substrate promotes heat dissipation through the support layer, improving heat dissipation. Furthermore, since the support layer contains metal and has a thickness of 10 μm or more, its relatively high rigidity prevents damage to the semiconductor substrate and improves handleability.

[0010] As described above, the above aspect provides a vertical nitride semiconductor device that achieves both low resistance and high heat dissipation. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a conceptual diagram showing the configuration of a vertical nitride semiconductor device according to Embodiment 1. FIG. [Figure 2] FIG. 2 is a flow diagram showing a method for manufacturing the vertical nitride semiconductor device of the first embodiment. [Figure 3] 1A to 1C are conceptual diagrams for explaining a method for manufacturing the vertical nitride semiconductor device of the first embodiment. [Figure 4] 10A and 10B are conceptual diagrams for explaining a method for manufacturing a vertical nitride semiconductor device according to the first modified embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] In the method for manufacturing a vertical nitride semiconductor device, it is preferable that the semiconductor substrate preparation step be followed by a thinning step of thinning the semiconductor substrate, and that the support layer formation step be performed after the thinning step. In this case, the formation of a thinned semiconductor substrate can further improve heat dissipation.

[0013] In the method for manufacturing a vertical nitride semiconductor device, it is preferable that the semiconductor substrate preparation step be followed by a semiconductor layer formation step of forming a semiconductor layer on the second main surface of the semiconductor substrate, and the support layer formation step be performed after the semiconductor layer formation step. In this case, the semiconductor layer is formed before the support layer is formed, and the semiconductor layer can be formed stably.

[0014] In the method for manufacturing a vertical nitride semiconductor device, the support layer forming step is preferably performed at an ambient temperature of 150° C. or less. 19 cm -3 This high concentration reduces the contact resistance between the semiconductor substrate and the support layer. Therefore, in the support layer formation step, the semiconductor substrate and the support layer can be joined at an ambient temperature of 150°C or less without alloying the joint between them and reducing the contact resistance. As a result, damage to the semiconductor layer due to stress caused by the difference in thermal expansion coefficients between the semiconductor and the support layer can be prevented during the support layer formation step, and the performance of the vertical nitride semiconductor device can be maintained.

[0015] In the above-described method for manufacturing a vertical nitride semiconductor device, no heat treatment is performed in the support layer formation step, which more reliably prevents damage to the semiconductor layer due to heat during the support layer formation step, thereby maintaining the performance of the vertical nitride semiconductor device.

[0016] In the method for manufacturing a vertical nitride semiconductor device, the semiconductor substrate preferably has a thickness in the range of 20 to 200 μm, which can improve heat dissipation while maintaining the functionality of the semiconductor substrate.

[0017] In the above method for manufacturing a vertical nitride semiconductor device, the support layer preferably has a thickness of 100 μm or more, which provides a sufficient effect of improving heat dissipation and also improves the handleability of the vertical nitride semiconductor device because the support layer has sufficient rigidity.

[0018] In the vertical nitride semiconductor device, the thickness of the semiconductor substrate is preferably within a range of 20 to 200 μm, which makes it possible to improve heat dissipation while maintaining the functionality of the semiconductor substrate.

[0019] In the vertical nitride semiconductor device, the support layer preferably has a thickness of 100 μm or more, which provides a sufficient effect of improving heat dissipation and also improves the handleability of the vertical nitride semiconductor device because the support layer has sufficient rigidity.

[0020] In the vertical nitride semiconductor device, it is preferable that the junction between the semiconductor substrate and the support layer is not alloyed. In this case, heating for alloying is not required when forming the support layer, which prevents damage to the semiconductor layer due to stress generated during heating and cooling due to the difference in thermal expansion coefficient between the support layer and the semiconductor substrate, thereby maintaining the performance of the vertical nitride semiconductor device.

[0021] (Embodiment 1) 1. Overview of the configuration of vertical nitride semiconductor device 1 The configuration of the vertical nitride semiconductor device 1 of Embodiment 1 will be described below. As shown in Fig. 1, the vertical nitride semiconductor device 1 of Embodiment 1 has a structure in which a support layer 10, a semiconductor substrate 20, a semiconductor layer 30, and a surface element 40 are stacked in this order, and sealed with a sealing resin 50. Each component and a method of forming the same will be described in detail below.

[0022] 1-1. Semiconductor substrate 20 The semiconductor substrate 20 is a substrate made of a group III nitride semiconductor. In this embodiment, a GaN (gallium nitride) substrate is used as the semiconductor substrate 20, and contains a donor element as an impurity. The donor element can be, for example, O (oxygen), Si (silicon), or Ge (germanium). The semiconductor substrate 20 has a donor element concentration of 1×10 19 cm -3 In this embodiment, the semiconductor substrate 20 contains O as a donor element.

[0023] In the semiconductor substrate 20, the concentration of the donor element is 1×10 22 cm -3 If the concentration of the donor element exceeds 1×10, the crystallinity of the semiconductor substrate 20 may be reduced. 22 cm -3 It is preferable that the following be satisfied: This can prevent the deterioration of the crystallinity of the semiconductor substrate 20, and contribute to improving the performance of the vertical nitride semiconductor device 1.

[0024] The thickness of the semiconductor substrate 20 is not limited, but can be within a range of 20 to 200 μm. The thickness of a semiconductor substrate is generally 300 to 400 μm, and the thickness of the semiconductor substrate 20 in this embodiment is sufficiently thin. By making the thickness of the semiconductor substrate 20 sufficiently thin, even if a Schottky barrier is formed between the semiconductor substrate 20 and the support layer 10, the barrier thickness can be made sufficiently thin, and the contact resistance with the support layer 10 can be reduced.

[0025] As described above, the method for forming the semiconductor substrate 20 may be any method that can incorporate a high concentration of donor elements into the semiconductor substrate 20, and examples thereof include ammonothermal method, OVPE ( O xide V apor P hase E In this embodiment, the oxygen concentration is 1×10 19 cm -3 or more, preferably 5 x 10 19 cm -3 Thus, a doped semiconductor substrate 20 is prepared. This semiconductor substrate 20 is autodoped with oxygen during growth by the ammonothermal method, thereby forming a low-resistivity GaN substrate.

[0026] In this embodiment, 5×10 19 cm -3 The thermal resistance of the semiconductor substrate 20 having a carrier concentration of 1×10 was found to be 1×1018 cm -3 It was confirmed that the thermal resistance was nearly twice as high as that of a semiconductor substrate having a dopant of 1000 ppm.

[0027] 1-2.Support layer 10 The support layer 10 is made of a material containing a metal. As the material of the support layer 10, a metal element such as Cu, Al, Ti, Ni, Mg, Mo, V, Au, Ag, an alloy such as CuW, TiN, AlCu, or a combination of two or more of these can be used. Alternatively, DCB ( D Direct C opper B A composite material combining a metal such as a DCB substrate with another support material can be used. The support layer 10 may be formed as a single layer or as a laminate of two or more layers, for example, a layer made of Cu sandwiched between layers made of DCB substrate.

[0028] The thickness of the support layer 10 is 10 μm or more, and preferably 50 to 100 μm. If the support layer 10 is less than 10 μm, sufficient rigidity cannot be obtained, and the effect of improving heat dissipation cannot be sufficiently achieved. On the other hand, although there is no upper limit to the thickness of the support layer 10, making the support layer 10 too thick is not preferable because the effect of improving heat dissipation will plateau and costs will increase.

[0029] The support layer 10 is made by subjecting a metal plate or a composite material containing metal that constitutes the support layer 10 prepared in advance to a vacuum device. -6 The support layer 10 can be formed by pressing it onto the back surface of the semiconductor substrate 20 in a room-temperature environment of 10 Pa or less. At this time, the oxide film on the back surface of the semiconductor substrate 20 may be removed in advance, or an oxide film may be actively formed by oxygen radical treatment. Note that no heat treatment for alloying is required when forming the support layer 10. Furthermore, the support layer 10 can be formed at an environmental temperature of less than 450°C, and preferably at 150°C or less. This can prevent performance degradation of the semiconductor layer 30, which will be described later.

[0030] The support layer 10 is attached to the rear surface of the semiconductor substrate 20, and thus functions as a drain electrode in addition to supporting the semiconductor substrate 20. Note that the support layer 10 may be provided on the rear surface of the semiconductor substrate 20 after a drain electrode (not shown) is formed separately from the support layer 10 on the rear surface of the semiconductor substrate 20.

[0031] The contact resistance between the support layer 10 and the semiconductor substrate 20 is 1×10 -5 Ωcm 2 It can be less than or equal to 5×10 -6 Ωcm 2 This allows the support layer 10 and the semiconductor substrate 20 to be bonded in a non-alloy ohmic manner, which does not involve alloying, and a sufficient ohmic contact can be achieved by room temperature bonding.

[0032] 1-3. Semiconductor layer 30 and surface element 40 A semiconductor layer 30 is formed on the upper surface 22 of the semiconductor substrate 20. The configuration of the semiconductor layer 30 is not limited, and it can be a desired semiconductor layer. In this embodiment, a group III nitride semiconductor layer is formed as the semiconductor layer 30. The method for forming the semiconductor layer 30 is not limited, and any known method can be used, but in this embodiment, it is formed by epitaxial growth. The semiconductor layer 30 is formed after the semiconductor substrate 20 is formed and before the support layer 10 is formed.

[0033] Furthermore, a surface element 40 is formed on the semiconductor layer 30. The configuration of the surface element 40 is not limited, but it includes electrodes 41 and 42. The method for forming the surface element 40 is not limited, and it can be formed by any desired method. The surface element 40 is formed after the formation of the semiconductor layer 30 and before the formation of the support layer 10. After the formation of the semiconductor layer 30 and the surface element 40, the back surface of the semiconductor substrate 20 can be cleaned. The electrodes 41 and 42 are connected to leads 54 and 55 by bonding wires 51, 52, and 53, respectively.

[0034] 1-4. Sealing resin 50 The sealing resin 50 seals the laminate consisting of the support layer 10, semiconductor substrate 20, semiconductor layer 30, and surface element 40 together with the bonding wires 51, 52, 53 and leads 54, 55. The material of the sealing resin 50 is not limited, and any known material can be used.

[0035] 2. Manufacturing method of vertical nitride semiconductor device 1 Next, a method for manufacturing the vertical nitride semiconductor device 1 according to this embodiment will be described with reference to the flow diagram shown in Fig. 2 and the conceptual diagram shown in Fig. 3. The method for manufacturing the vertical nitride semiconductor device 1 according to this embodiment includes a semiconductor substrate preparation step S1, a semiconductor layer formation step S2, a front surface element formation step S3, a protective layer formation step S4, a support plate attachment step S5, a thinning step S6, a support layer formation step S7, a protective layer removal step S8, a wire bonding step S9, and an encapsulation step S10.

[0036] First, in the semiconductor substrate preparation step S1, the above-described semiconductor substrate 20 is prepared as shown in Fig. 3(a). In this embodiment, the semiconductor substrate 20 is formed by the ammonothermal method as described above. As a result, the semiconductor substrate 20 is formed to contain a high concentration of O as a donor element.

[0037] Next, in a semiconductor layer formation step S2, as shown in Fig. 3(b), an epitaxial thin-film semiconductor layer 30 is formed on the upper surface 22 of the semiconductor substrate 20 by MOCVD or the like, and then, in a surface element formation step S3, a surface element 40 is formed on the semiconductor layer 30. In this embodiment, the surface element 40 is a trench MOSFET or the like.

[0038] Then, in the protective layer forming step S4, a protective resist 60 is formed to cover the semiconductor layer 30 and the surface element 40, and a double-sided adhesive UV film 61 is further formed on the upper surface of the protective resist 60, as shown in FIG. 3(c).

[0039] Next, in a support plate attaching step S5, as shown in Fig. 3(d), a support plate 62 is attached to the double-sided adhesive UV film 61. Then, in a thinning step S6, as shown in Fig. 3(e), the back surface (first main surface) of the semiconductor substrate 20 is ground to thin the semiconductor substrate 20 to a thickness of 150 to 35 µm.

[0040] 3(f), a support layer 10 is formed on the back surface of the semiconductor substrate 20. In this embodiment, the oxide film on the back surface of the semiconductor substrate 20 is removed with HCl, and then the semiconductor substrate 20 is immersed in a vacuum chamber at 1×10 -6 The support layer 10 is pressure-bonded to the rear surface of the semiconductor substrate 20 in a room temperature environment at a pressure of 10 Pa or less.

[0041] Then, in the protective layer removal process S8, as shown in FIG. 3(g), UV is irradiated to remove the support plate 62, and then, as shown in FIG. 3(h), the protective resist 60 and the double-sided adhesive UV film 61 are removed with a resist remover.

[0042] Then, in a wire bonding step S9, as shown in Fig. 3(i), bonding wires 51 to 53 are used to connect the surface element 40 to leads 54, 55. Thereafter, in a sealing step S10, as shown in Fig. 3(j), the entire assembly is sealed with sealing resin 50, thereby completing the flow.

[0043] 3. Effects

[0044] In the manufacturing method of the vertical nitride semiconductor device of this embodiment, the semiconductor substrate 20 has a donor element concentration of 1×10 19 cm -3This high concentration of 0.1% or more can reduce the substrate resistance. Furthermore, the low resistance of the semiconductor substrate 20 can narrow the depletion layer width of the Schottky barrier layer formed at the junction between the semiconductor substrate 20 and the metal-containing support layer 10, facilitating current flow due to the tunneling effect, thereby reducing the contact resistance between the semiconductor substrate 20 and the support layer 10. These features make it possible to manufacture a vertical nitride semiconductor device 1 with reduced resistance. Furthermore, the metal-containing support layer 10 attached to the semiconductor substrate 20 promotes heat dissipation via the support layer 10, improving heat dissipation. Furthermore, the support layer 10 contains a metal and has a thickness of 10 μm or more, which gives it relatively high rigidity, preventing damage to the semiconductor substrate 20 and improving handleability.

[0045] Furthermore, the manufacturing method of the vertical nitride semiconductor device 1 of this embodiment includes a thinning step S6 of thinning the semiconductor substrate 20 after the semiconductor substrate preparation step S1, and a support layer formation step S7 after the thinning step S6. This results in a thinned semiconductor substrate 20, which can further improve heat dissipation.

[0046] Furthermore, the manufacturing method of the vertical nitride semiconductor device 1 of this embodiment includes, after the semiconductor substrate preparation step S1, a semiconductor layer formation step S2 in which a semiconductor layer 30 is formed on the upper surface (second main surface) of the semiconductor substrate 20, and after the semiconductor layer formation step S2, a support layer formation step S7 is performed. This results in the semiconductor layer 30 being formed before the support layer 10 is formed, and the semiconductor layer 30 can be formed stably.

[0047] Furthermore, in the manufacturing method of the vertical nitride semiconductor device 1 of this embodiment, the support layer forming step S7 is performed at an ambient temperature of 150° C. or less. This prevents damage to the semiconductor layer 30 from stress caused by the difference in thermal expansion coefficient between the semiconductor substrate 20 and the support layer 10 during the support layer forming step S7, and allows the performance of the vertical nitride semiconductor device 1 to be maintained.

[0048] Furthermore, in the method for manufacturing the vertical nitride semiconductor device 1 of this embodiment, no heat treatment is performed in the support layer formation step S7, which more reliably prevents damage to the semiconductor layer 30 due to heat during the support layer formation step S7, thereby maintaining the performance of the vertical nitride semiconductor device 1.

[0049] In the method for manufacturing the vertical nitride semiconductor device 1 of this embodiment, the thickness of the semiconductor substrate 20 is set within a range of 20 to 200 μm, which makes it possible to improve heat dissipation while maintaining the functionality of the semiconductor substrate 20.

[0050] Furthermore, in the manufacturing method of the vertical nitride semiconductor device 1 of this embodiment, the thickness of the support layer 10 is set to 100 μm or more, which allows the support layer 10 to sufficiently improve heat dissipation, and also improves the handleability of the vertical nitride semiconductor device 1 because the support layer 10 has sufficient rigidity.

[0051] In the vertical nitride semiconductor device 1 of this embodiment, the semiconductor substrate 20 has a donor element concentration of 1×10 19 cm -3 or more, preferably 5 x 10 19 cm -3 As a result, the substrate resistance can be reduced, and the contact resistance between the semiconductor substrate 20 and the support layer 10 can be reduced, thereby lowering the resistance of the vertical nitride semiconductor device 1. Furthermore, since the support layer 10 containing a metal is formed on the semiconductor substrate 20, heat dissipation via the support layer 10 is promoted, improving heat dissipation. Furthermore, since the support layer 10 contains a metal and has a thickness of 10 μm or more, its relatively high rigidity prevents damage to the semiconductor substrate 20 and improves handleability.

[0052] In the vertical nitride semiconductor device, the thickness of the semiconductor substrate is preferably within a range of 20 to 200 μm, which makes it possible to improve heat dissipation while maintaining the functionality of the semiconductor substrate.

[0053] Furthermore, in the vertical nitride semiconductor device 1 of this embodiment, the thickness of the support layer 10 is set to 100 μm or more, which allows the support layer 10 to sufficiently improve heat dissipation, and also allows the support layer 10 to have sufficient rigidity, thereby improving the handleability of the vertical nitride semiconductor device 1.

[0054] Furthermore, in the vertical nitride semiconductor device 1 of this embodiment, the junction between the semiconductor substrate 20 and the support layer 10 is not alloyed. As a result, heating for alloying is not required when forming the support layer 10, which prevents damage to the semiconductor layer 30 due to stress generated during heating and cooling due to the difference in thermal expansion coefficient between the support layer 10 and the semiconductor substrate 20, and allows the performance of the vertical nitride semiconductor device 1 to be maintained.

[0055] 3, in the present embodiment, the double-sided adhesive UV film 61 is used in the protective layer forming step S4, but adhesive wax may be used instead. In this case, in the protective layer removing step S8, the adhesive wax can be removed by heating instead of UV irradiation, and the support plate 62 can be peeled off from the protective resist 60. The heating temperature when removing the adhesive wax can be 150°C or lower.

[0056] 3, in the present embodiment, the double-sided adhesive UV film 61 is formed in the protective layer forming step S4, but the support plate 62 may be directly attached to the protective resist 60 in the support plate attaching step S5 without forming the double-sided adhesive UV film 61. In this case, the support plate 62 is removed together with the protective resist 60 by a resist remover in the protective layer removing step S8.

[0057] 3(e) in the thinning step S6 of the method for manufacturing the vertical nitride semiconductor device 1 shown in Fig. 3, the semiconductor substrate 20 is thinned by grinding the back surface (first main surface) of the semiconductor substrate 20, but instead, the back surface side of the semiconductor substrate 20 may be cut with a laser so that the semiconductor substrate 20 has a predetermined thickness. In this case, the member cut from the semiconductor substrate 20 can be reused as the semiconductor substrate 20 of the vertical nitride semiconductor device 1 to be fabricated later.

[0058] Furthermore, in this embodiment, in the manufacturing method of the vertical nitride semiconductor device 1 shown in FIG. 3, in the support layer formation step S7, the support layer 10 is attached to the back surface of the semiconductor substrate 20 by pressure bonding under vacuum. However, instead of this, Ni, Ti, Cu, or the like may be vapor deposited on the back surface of the semiconductor substrate 20 to activate the back surface of the semiconductor substrate 20, and then the support layer 10 may be attached by pressure bonding.

[0059] 4(i), the surface element 40 may be connected to leads 54 and 55 by bonding wires 51 to 53, and the support layer 10 may be bonded to the die pad via a die attach 56. The die attach 56 may be formed by solder, for example. In the modified embodiment 1 shown in FIG. 4, components having the same configuration as those in the first embodiment shown in FIG. 3 are designated by the same reference numerals, and their description will be omitted.

[0060] As described above, according to this embodiment and its modifications, it is possible to provide a vertical nitride semiconductor device 1 that achieves both low resistance and high heat dissipation.

[0061] The present invention is not limited to the above-described embodiments and modifications, and can be applied to various embodiments without departing from the spirit of the present invention. [Explanation of symbols]

[0062] 1 Vertical nitride semiconductor device 10 Support layer 20 Semiconductor substrate 30 Semiconductor layer 40 Surface Elements 41, 42 electrode 50 Sealing resin 51, 52, 53 Bonding wire 54, 55 leads 56 Die Attach 60 Protective Resist 61 Double-sided adhesive UV film 62 Support plate

Claims

1. The semiconductor is made of a group III nitride semiconductor and has a donor element concentration of 1×10 １９ cm -３ a semiconductor substrate preparation step of preparing the semiconductor substrate; and forming a support layer containing metal and having a thickness of 10 μm or more on the first main surface of the semiconductor substrate.

2. a thinning step of thinning the semiconductor substrate after the semiconductor substrate preparation step, The method for manufacturing a vertical nitride semiconductor device according to claim 1 , wherein the supporting layer forming step is performed after the thinning step.

3. a semiconductor layer forming step of forming a semiconductor layer on a second main surface of the semiconductor substrate after the semiconductor substrate preparing step; The method for manufacturing a vertical nitride semiconductor device according to claim 1 , wherein the supporting layer forming step is performed after the semiconductor layer forming step.

4. 3. The method for manufacturing a vertical nitride semiconductor device according to claim 1, wherein the support layer forming step is performed at an ambient temperature of 150[deg.] C. or less.

5. 3. The method for manufacturing a vertical nitride semiconductor device according to claim 1, wherein no heat treatment is performed in said supporting layer forming step.

6. 3. The method for manufacturing a vertical nitride semiconductor device according to claim 1, wherein the thickness of said semiconductor substrate is in the range of 20 to 200 μm.

7. 3. The method for manufacturing a vertical nitride semiconductor device according to claim 1, wherein the support layer has a thickness of 100 [mu]m or more.

8. The semiconductor is made of a group III nitride semiconductor and has a donor element concentration of 1×10 １９ cm -３ The semiconductor substrate described above; a support layer containing metal and having a thickness of 10 μm or more, formed on the first main surface of the semiconductor substrate.

9. 9. The vertical nitride semiconductor device according to claim 8, wherein the thickness of said semiconductor substrate is in the range of 20 to 200 μm.

10. 10. The vertical nitride semiconductor device according to claim 8, wherein the support layer has a thickness of 100 [mu]m or more.

11. 10. The vertical nitride semiconductor device according to claim 8, wherein a junction between said semiconductor substrate and said support layer is not alloyed.

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