Method for cleaning susceptor

Abstract

To provide a cleaning method of a susceptor capable of preventing deterioration of quality of a semiconductor substrate caused by an oxide film formed on a surface of the susceptor.SOLUTION: In the cleaning method of a susceptor 3 which supports a semiconductor wafer 2 during heat treatment and has an oxide film 3a formed on the 3b of a base material, the thickness of the oxide film 3b after heat treatment is smaller in a contact region 6 in contact with the semiconductor wafer 2 than in a non-contact region 7 other than the contact region 6. An oxide film thinning step 3a of removing the oxide film 3b while preventing the base material S1 from being exposed in the contact region 6 by etching, or removing the oxide film 3b within a range of a thickness of the oxide film 3b newly formed in the non-contact region 7 every time the oxide film 3b having a predetermined thickness within a range of 1 μm or more and 30 μm or less is newly formed in the non-contact region 7 by heat treatment; The semiconductor device has an oxide film polishing process 3b in which the difference in the thickness of the oxide film S2 between a contact region 6 and a non-contact region 7 is 5 μm or less.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for cleaning a susceptor that supports a semiconductor substrate during heat treatment. [Background technology]

[0002] The surface and surface layer of semiconductor substrates (hereinafter referred to as wafers) made of silicon or other materials grown by the Czochralski method (CZ method) contain many crystal defects, such as grown-in defects. These crystal defects can cause defects during semiconductor device manufacturing. Therefore, the surface and surface layer of wafers must be nearly defect-free.

[0003] Rapid thermal annealing (RTA) is a known method for eliminating defects on the surface and surface layer of a wafer. The rapid thermal annealing uses a rapid temperature increase / decrease heat treatment device 1 shown in Fig. 9. In the RTA process, a wafer 2 is rapidly heated to a high temperature range, held at high temperature for a predetermined time, and then rapidly cooled. This eliminates crystal defects on the surface and surface layer of the wafer 2, and also forms a high density of bulk microdefects (BMDs) in the bulk portion below the surface layer.

[0004] The BMD in the bulk portion acts as a gettering site that captures metal impurities that diffuse within the wafer 2 during semiconductor device manufacturing and cause device defects. Thus, by forming BMDs through RTA processing, it is possible to manufacture high-quality wafers 2 that are resistant to metal contamination. Because the wafer 2 is heat-treated at high temperatures during RTA processing, the wafer 2 is significantly affected by surrounding materials and the environment. In particular, the susceptor 3 that supports the wafer 2 during RTA processing is in direct contact with the wafer 2 during high-temperature heat treatment, and therefore must be a highly heat-resistant, highly pure material with minimal contamination. For this reason, silicon carbide (SiC) is commonly used as the material for the susceptor 3.

[0005] In the manufacture of a SiC susceptor 3 for an RTA device 1, for example, Patent Document 1 below proposes a method for manufacturing a SiC member having a high-purity oxide film by forming an oxide film by wet baking and then controlling the thickness of the oxide film by hydrofluoric acid treatment.

[0006] When a wafer 2 is heat-treated in an RTA apparatus 1, trace amounts of contamination, such as Fe, remaining on the backside of the wafer 2 are transferred to the susceptor 3. The contamination accumulated on the susceptor 3 due to this transfer may be re-transferred to the vicinity of the edge support region of another wafer 2, contaminating that wafer 2. For this reason, it is necessary to remove the contamination on the surface of the susceptor 3 by cleaning it. For example, Patent Document 2 listed below proposes a method for cleaning the susceptor 3, in which a fluorine-containing gas and an oxygen-containing gas that have been converted into plasma are supplied to a SiC susceptor to remove the contamination source. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2020-83734 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-53393 Summary of the Invention [Problem to be solved by the invention]

[0008] To eliminate defects on the surface and surface layer of the wafer 2 and to form BMD in the bulk portion, it is desirable to perform RTA treatment in an oxygen atmosphere at a temperature range of 1250°C or higher and lower than the melting point of the wafer 2. When RTA treatment is repeatedly performed under these heat treatment conditions, an oxide film 3b (initial thickness: approximately 0.1 μm) gradually grows on the surface of the SiC susceptor 3, as shown in Figures 10(a) to 10(c). Note that in each figure in this application, the thickness of the oxide film 3b is exaggerated to make the cross-sectional shape of the oxide film 3b easier to see.

[0009] The growth rate of the oxide film 3b formed during the RTA process is slower in the contact region 6 between the susceptor 3 and the wafer 2 than in the non-contact region 7 outside the contact region 6. Therefore, as shown in FIG. 11, a difference in the thickness of the oxide film 3b occurs between the contact region 6 between the susceptor 3 and the wafer 2 and the non-contact region 7. As a result, the support state of the wafer 2 becomes unstable during the RTA process (see FIG. 10(c)), and the concentration of the weight stress of the wafer 2 and thermal stress make the wafer 2 prone to slippage. Furthermore, if the thickness of the oxide film 3b on the surface of the susceptor 3 exceeds 20 μm, the oxide film 3b may peel off, increasing the risk of LPD (Light Point Defect), a type of surface defect, occurring in the wafer 2.

[0010] For example, it is possible to adopt the cleaning method of Patent Document 2 to clean the surface of the susceptor 3, but the cleaning method of Patent Document 2 aims to remove deposits made of SiC on the surface of the susceptor 3, and it is not appropriate to directly apply this method to removing the oxide film 3b on the surface of the susceptor 3.

[0011] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a susceptor cleaning method that can prevent deterioration of the quality of semiconductor substrates caused by an oxide film formed on the surface of the susceptor. [Means for solving the problem]

[0012] In order to solve the above problems, the present invention provides a susceptor cleaning method (first configuration) for a susceptor that supports a semiconductor substrate during heat treatment and has an oxide film formed on the surface of its base material, characterized in that the thickness of the oxide film after the heat treatment is thinner in a contact area that contacts the semiconductor substrate than in a non-contact area other than the contact area, and the method includes an oxide film thinning step of removing the oxide film by etching while preventing the base material from being exposed in the contact area.

[0013] By reducing the thickness of the oxide film through the oxide film thinning process, the boundary between the oxide film formed in the contact area between the susceptor and the wafer and the oxide film formed in the non-contact area becomes smoother, stabilizing the support state of the wafer by the susceptor and mitigating the concentration of the wafer's own weight stress and thermal stress, thereby suppressing the occurrence of slip during RTA processing and improving wafer quality.

[0014] In the first configuration, it is preferable to adopt a configuration (second configuration) in which, each time an oxide film having a predetermined thickness within a range of 0.1 μm to 5 μm is newly formed on the contact region by the heat treatment, the oxide film is removed in the oxide film thinning step to a thickness within the range of the newly formed oxide film on the contact region. By removing an oxide film having a predetermined thickness on the contact region in the oxide film thinning step, the life of the susceptor can be extended and high quality of wafers subjected to RTA processing using the susceptor can be ensured. A thickness of less than 0.1 μm on the contact region is unlikely to adversely affect wafer quality, while a thickness of more than 5 μm on the contact region is likely to adversely affect wafer quality. Therefore, it is preferable to keep the thickness within the above range.

[0015] In the first and second configurations, it is preferable to adopt a configuration (third configuration) in which the oxide film thinning step is performed in a state in which the oxide film after the heat treatment has no cracks extending from the surface to the inside. By performing the oxide film thinning step in a state in which there are no cracks in the oxide film, etching proceeds only from the surface side of the oxide film, i.e., the etching solution does not penetrate into the cracks and etching proceeds from the inside of the oxide film. This makes it easy to control the thickness of the oxide film in the oxide film thinning step and prevents unevenness in the oxide film thickness.

[0016] In the first to third configurations, it is preferable to further include an oxide film polishing step (fourth configuration) in which the oxide film on the surface of the susceptor is removed by polishing following the oxide film thinning step. In this oxide film polishing step, the oxide film in the non-contact area, which has a larger thickness, is polished first, thereby reducing the difference in oxide film thickness between the contact area and the non-contact area. This alleviates the concentration of wafer weight stress and thermal stress caused by the difference in oxide film thickness, thereby further suppressing the occurrence of slip during RTA processing.

[0017] In the fourth configuration, it is preferable to adopt a fifth configuration (configuration 5) in which, each time a new oxide film having a predetermined thickness within a range of 1 μm to 30 μm is formed on the non-contact region by the heat treatment, the oxide film is removed in the oxide film polishing step to a thickness within the range of the newly formed oxide film on the non-contact region, so that the difference in oxide film thickness between the contact region and the non-contact region is 5 μm or less. In this way, by removing the oxide film in the oxide film polishing step each time a new oxide film having a predetermined thickness is formed on the non-contact region, the oxide film on the non-contact region with a larger thickness is polished first, thereby reducing the difference in oxide film thickness between the contact region and the non-contact region. This alleviates the concentration of wafer weight stress and thermal stress caused by the difference in oxide film thickness, further suppressing the occurrence of slip during RTA processing. A thickness of less than 1 μm on the non-contact region is unlikely to adversely affect wafer quality, while a thickness of more than 30 μm on the non-contact region is likely to adversely affect wafer quality. Therefore, it is preferable to keep the thickness within the above range. In particular, by keeping the difference in oxide film thickness between the contact area and the non-contact area to 5 μm or less, the wafer can be stably supported, which makes it possible to more effectively suppress the occurrence of slippage during RTA processing.

[0018] In order to solve the above-mentioned problems, the present invention provides a susceptor cleaning method (sixth configuration) for a susceptor having an oxide film formed on the surface of a base material that supports a semiconductor substrate during heat treatment, wherein the thickness of the oxide film after the heat treatment is thinner in the contact area that contacts the semiconductor substrate than in the non-contact area other than the contact area, and the method includes an oxide film polishing step in which, each time a new oxide film of a predetermined thickness within a range of 1 μm to 30 μm is formed in the non-contact area by the heat treatment, the new oxide film is removed within the thickness range of the oxide film newly formed in the non-contact area, so that the difference in thickness of the oxide film between the contact area and the non-contact area is 5 μm or less.

[0019] In this way, as in the fifth configuration, the difference in oxide film thickness between the contact area and the non-contact area is reduced, and the concentration of the wafer's own weight stress and thermal stress caused by the difference in oxide film thickness are alleviated, thereby further suppressing the occurrence of slippage during RTA processing. In particular, by keeping the difference in oxide film thickness between the contact area and the non-contact area at 5 μm or less, the wafer can be stably supported, thereby more effectively suppressing the occurrence of slippage during RTA processing.

[0020] In the first to sixth configurations, it is preferable to set the surface roughness Ra of the oxide film formed on the susceptor to 0.01 μm or more and 1 μm or less (seventh configuration). By setting the surface roughness Ra within this range, the contact area between the wafer and the susceptor can be maintained appropriately, and slippage due to wafer self-weight stress and thermal stress can be suppressed. If the surface roughness Ra is less than 0.01 μm, the contact area between the wafer and the susceptor becomes large, making slippage due to wafer-susceptor welding more likely to occur during RTA processing. If the surface roughness Ra is more than 1 μm, the contact area between the wafer and the susceptor becomes small, making slippage due to concentration of self-weight stress more likely to occur. Therefore, it is preferable to set the surface roughness within the above range.

[0021] In the first to seventh configurations, a preferred configuration (eighth configuration) is that the susceptor is used in a rapid temperature increase / decrease heat treatment in which the heat treatment temperature is in the range of 1250°C or higher and the melting point of the semiconductor substrate or lower, the holding time at the maximum temperature is in the range of 1 second or higher and 60 seconds or lower, and the heat treatment is performed in an oxygen-containing atmosphere gas. By applying the above cleaning method to a susceptor used in an RTA treatment configured under the above heat treatment conditions, it is possible to suppress the occurrence of slip due to unstable wafer support during the RTA treatment and the occurrence of LPD due to peeling of the oxide film, and to maintain the surface condition of the susceptor so as not to affect wafer quality. [Effects of the Invention]

[0022] According to the above invention, the oxide film formed on the surface of the susceptor can be properly removed, and therefore, deterioration of wafer quality caused by this oxide film can be prevented. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a flow chart showing a first embodiment of a susceptor cleaning method according to the present invention. [Figure 2] 2A and 2B are cross-sectional views showing the change in shape of a wafer in the cleaning method shown in FIG. 1, where (a) is before cleaning and (b) is after the oxide film thinning step. [Figure 3] FIG. 1 is a flow chart showing a second embodiment of the susceptor cleaning method according to the present invention. [Figure 4] 4A and 4B are cross-sectional views showing the change in wafer shape in the cleaning method shown in FIG. 3, where (a) is before cleaning, (b) is after the oxide film polishing step, and (c) is after the etching treatment following the oxide film polishing step. [Figure 5] FIG. 10 is a flow chart showing a third embodiment of the susceptor cleaning method according to the present invention. [Figure 6] 6A and 6B are cross-sectional views showing the change in shape of a wafer in the cleaning method shown in FIG. 5, where (a) is before cleaning, (b) is after the oxide film thinning step, (c) is after the oxide film polishing step, and (d) is after the etching treatment following the oxide film polishing step. [Figure 7] (a) shows the measurement results of the distortion area ratio, (b) shows the measurement results of the bulk Fe concentration on the wafer periphery, and (c) shows the measurement results of the LPD for wafers that were RTA-processed using a susceptor that was cleaned using the cleaning method shown in Figure 1. [Figure 8] Measurement results of the distortion area ratio of wafers subjected to RTA processing using a susceptor cleaned by the cleaning method shown in Figure 3 [Figure 9] Cross-sectional view showing an example of an RTA device [Figure 10] 1A and 1B are enlarged cross-sectional views of a main part showing the change in the surface shape of a susceptor due to RTA treatment, where (a) is an early stage of susceptor use, (b) is a middle stage of susceptor use, and (c) is a final stage of susceptor use. [Figure 11] Enlarged cross-sectional view of the main part of the susceptor at the end of its life DETAILED DESCRIPTION OF THE INVENTION

[0024] A susceptor cleaning method (hereinafter simply referred to as the cleaning method) according to the present invention will be described in detail below. This cleaning method is applied to cleaning a susceptor 3 that supports a silicon wafer (hereinafter referred to as a wafer and designated by the same reference numeral as the semiconductor substrate 2) as a semiconductor substrate 2 during RTA processing using, for example, the RTA apparatus 1 shown in FIG. 9. The susceptor 3 used in this embodiment is a member having a base material 3a made of silicon carbide (SiC) formed into a ring shape. The susceptor 3 is placed on a support cylinder 4 provided within the RTA apparatus 1. The RTA apparatus 1 is provided with a plurality of heating lamps 5, and is configured to rapidly heat the wafer 2 supported by the susceptor 3 in an oxygen atmosphere to a high heat treatment temperature, hold the wafer 2 at the heat treatment temperature for a predetermined period of time, and then rapidly cool the wafer 2 from the high temperature.

[0025] An oxide film 3b (initial thickness: approximately 0.1 μm) is formed on the surface of the base material 3a of the susceptor 3. As shown in FIGS. 10(a) to 10(c), the oxide film 3b gradually increases in thickness as it is repeatedly used in RTA treatments in an oxygen atmosphere. For example, when RTA treatment is performed at a heat treatment temperature of 1250°C to 1350°C, for a holding time at the heat treatment temperature of 1 second to 60 seconds in an oxygen atmosphere (preferably with an oxygen partial pressure of 20% to 100%), a new oxide film 3b of approximately 0.1 nm grows each time the RTA treatment is performed. In other words, an oxide film 3b of approximately 20 μm is formed on the surface of the susceptor 3 after 200,000 RTA treatments.

[0026] When RTA treatment is performed multiple times, the thickness of the oxide film 3b formed on the surface of the susceptor 3 is not uniform, and as shown in Fig. 11, it tends to be thinner in the contact region 6 where the susceptor 3 and the wafer 2 come into contact (the recessed portion in Fig. 11) than in the non-contact region 7 other than this contact region 6. For example, it has been empirically found that when an oxide film 3b with a thickness t2 of about 20 µm is formed in the non-contact region 7, an oxide film 3b with a thickness t1 of about 6 to 15 µm is formed in the contact region 6.

[0027] FIG. 1 shows a flow chart of a first embodiment of a susceptor cleaning method according to the present invention. This cleaning method is for removing an oxide film 3b formed on the surface of a susceptor 3 after multiple RTA processes and includes an oxide film thinning step S1. As shown in FIG. 2(a), the oxide film thinning step S1 is applied to a susceptor 3 in which the thickness of the oxide film 3b after the RTA process is thinner in the contact region 6 that contacts the wafer 2 than in the non-contact region 7 outside the contact region 6. As shown in FIG. 2(b), etching (etching amount δ1) is performed while taking care not to expose the base material 3a (SiC) of the susceptor 3 in the thin contact region 6 of the oxide film 3b. By performing the oxide film thinning step S1 in a state in which the oxide film 3b after the RTA process does not have any cracks extending from the surface to the interior, etching can proceed only from the surface side of the oxide film 3b. Note that, if cracks exist in the oxide film 3b, the cracks can be removed by, for example, etching or polishing. In particular, etching allows the chemical solution to penetrate the interior through the cracks, thereby efficiently removing the cracked portions.

[0028] The oxide film thinning step S1 can be performed at an appropriate frequency, but in this embodiment, it is performed every time an oxide film 3b having a predetermined thickness in the range of 0.1 μm to 5 μm is newly formed on the contact region 6 by multiple RTA treatments, more preferably every time an oxide film 3b having a predetermined thickness in the range of 1 μm to 1.5 μm is newly formed. More specifically, it can be determined that the oxide film thinning step S1 is performed once every time an oxide film 3b having a thickness of 1.2 μm is newly formed, for example.

[0029] The etching method used in the oxide film thinning step S1 can be determined as appropriate. For example, wet etching or dry etching using hydrogen fluoride or ammonium fluoride can be employed. The amount of oxide film 3b removed in the oxide film thinning step S1 is preferably within the thickness range of the oxide film 3b newly formed in the contact region 6 by multiple RTA processes, so as not to expose the base material 3a of the susceptor 3, particularly in the contact region 6. More specifically, for example, each time a new oxide film 3b of a predetermined thickness within the range of 1 μm to 1.5 μm is formed, a predetermined thickness within the range of 0.5 μm to 0.75 μm is removed. Reforming the oxide film 3b after completely removing the oxide film 3b from the susceptor 3 and completely exposing the base material 3a may result in fracture of the susceptor 3. Therefore, it is preferable to minimize exposure of the base material 3a of the susceptor 3 in the oxide film thinning step S1.

[0030] The surface roughness Ra of the oxide film 3b (oxide film 3b remaining on the susceptor 3) after the oxide film thinning step S1 (after etching) is in the range of 0.01 μm to 1 μm.

[0031] A flow chart of a second embodiment of a cleaning method according to the present invention is shown in Fig. 3. This cleaning method is for removing an oxide film 3b formed on the surface of a susceptor 3 by multiple RTA treatments, and includes an oxide film polishing step S2. As shown in Fig. 4(a), the oxide film polishing step S2 is applied to a susceptor 3 in which the thickness of the oxide film 3b after the RTA treatment is thinner in the contact region 6 that contacts the wafer 2 than in the non-contact region 7 other than the contact region 6. As shown in Fig. 4(b), polishing (polishing amount δ2) is performed each time a new oxide film 3b of a predetermined thickness is formed in the non-contact region 7 by multiple RTA treatments.

[0032] The oxide film polishing step S2 can be performed at an appropriate frequency, but in this embodiment, it is performed every time an oxide film 3b having a predetermined thickness in the range of 1 μm to 40 μm is newly formed in the non-contact region 7 by multiple RTA treatments, more preferably every time an oxide film 3b having a predetermined thickness in the range of 1 μm to 30 μm is newly formed. More specifically, it can be determined that the oxide film polishing step S2 is performed once every time an oxide film 3b having a thickness of 15 μm is newly formed, for example.

[0033] The polishing technique in the oxide film polishing step S2 can be determined as appropriate, and for example, CMP (Chemical Mechanical Polishing) can be adopted. The amount of oxide film 3b removed in the oxide film polishing step S2 is preferably within the range of the thickness of the oxide film 3b newly formed in the non-contact region 7 by multiple RTA treatments so as not to expose the base material 3a on the surface of the susceptor 3. More specifically, it can be determined that, for example, each time an oxide film 3b having a predetermined thickness within the range of 1 μm to 30 μm is newly formed, an oxide film 3b having a predetermined thickness within the range of 0.5 μm to 20 μm (however, within the range of the thickness of the newly formed oxide film 3b) is removed.

[0034] In the oxide film polishing step S2, the difference in thickness of the oxide film 3b between the contact area 6 and the non-contact area 7 is set to 5 μm or less, more preferably 2 μm or less (2 μm in this embodiment).

[0035] After polishing in the oxide film polishing step S2, polishing contamination (such as oxide film fragments or metal) may remain on the surface of the susceptor 3. For this reason, as shown in FIG. 4(c), an etching process (etching amount δ3) is performed following polishing to remove contamination from the surface of the susceptor 3. This etching process is generally wet etching using hydrofluoric acid, and removes 0.3 μm or more, and more preferably 0.5 μm or more, of the polished surface. If the removal amount is less than 0.3 μm, the polishing contamination cannot be sufficiently removed, and there is a risk that the contamination on the susceptor 3 will be transferred to the wafer during RTA processing.

[0036] FIG. 5 shows a flow chart of a third embodiment of a cleaning method according to the present invention. This cleaning method is for removing an oxide film 3b formed on the surface of a susceptor 3 by multiple RTA processes and includes an oxide film thinning step S1 and an oxide film polishing step S2. As shown in FIG. 6(a), the oxide film thinning step S1 is applied to a susceptor 3 in which the thickness of the oxide film 3b in the contact region 6 that contacts the wafer 2 after the RTA process is thinner than in the non-contact region 7 other than the contact region 6. As shown in FIG. 6(b), etching is performed while taking care not to expose the base material 3a (SiC) of the susceptor 3 in the contact region 6 where the oxide film 3b is thin. In the oxide film polishing step S2, as shown in FIG. 6(c), polishing is performed within the thickness of the oxide film 3b remaining in the non-contact region 7 after the oxide film thinning step S1. Furthermore, as shown in FIG. 6(d), etching is performed following polishing to remove contamination from the surface of the susceptor 3.

[0037] The processing conditions for the oxide film thinning step S1, the oxide film polishing step S2, and the etching after the oxide film polishing step S2 are the same as those described for the oxide film thinning step S1 of the first embodiment and the oxide film polishing step S2 of the second embodiment, and therefore, redundant explanations will be omitted.

[0038] The effect of the cleaning method described in the first embodiment was verified (Experiment 1). In this verification experiment, (1) RTA processing conditions, (2) wafers used, and (3) SiC susceptors used (Comparative Example 1 and Example 1) were as follows: (1) RTA treatment conditions Oxygen atmosphere (oxygen partial pressure between 20% and 100%) Maximum temperature: 1300°C (above 1250°C, below the melting point of silicon wafers) Hold time at maximum temperature: 30 seconds (1 second to 60 seconds) ·Cooling rate: Cooling rate is 120℃ / sec (2) Wafers used In both Comparative Example 1 and Example 1, silicon wafers were sliced ​​from the same silicon single crystal ingot. (3) SiC susceptor used Comparative Example 1: A susceptor that was used 200,000 times in the above RTA process (oxide film thickness: approximately 20 μm, surface roughness Ra: 3 μm) Example 1: A susceptor (surface roughness Ra: 0.1 μm) that was cleaned every 40,000 uses in the RTA process (removing 0.5 to 1 μm of oxide film by etching with 5% hydrogen fluoride for 15 to 30 minutes according to the oxide film growth) was used 200,000 times in total.

[0039] The results of the above verification experiment (Experiment 1) are shown in Figures 7(a) to 7(c). Figure 7(a) shows the measurement results of SIRD (Scanning InfraRed Depolarization), Figure 7(b) shows the measurement results of SPV (Surface Photo Voltage), and Figure 7(c) shows the measurement results of a surface inspection device (device name: SPx).

[0040] As shown in Figure 7(a), when the susceptor 3 was not cleaned, distortion occurred at the outermost periphery of the wafer 2 due to numerous slips generated from the periphery, as shown in Comparative Example 1. In contrast, by cleaning the susceptor 3 every predetermined number of treatments (40,000 times), the generation of slips was suppressed as shown in Example 1, and the distortion area ratio of the wafer 2 was reduced to 1 x 10, which is the lower limit of measurement for SIRD. -5 7(b), it was confirmed that the bulk Fe concentration at the outermost periphery of the wafer after the RTA treatment was reduced by approximately 70% in Example 1 compared to Comparative Example 1. Furthermore, as shown in FIG. 7(c), it was confirmed that the number of LPDs having a size exceeding 0.2 μm was reduced by approximately 90% in Example 1 compared to Comparative Example 1. It was confirmed that by cleaning the susceptor 3 according to Example 1 every 40,000 RTA treatments, it was possible to use the susceptor 3 for the RTA treatments up to a total of approximately 400,000 times without deterioration in the quality of the wafers 2.

[0041] Next, the effect of the cleaning method described in the second embodiment was verified (Experiment 2). In this verification experiment, (1) RTA processing conditions, (2) wafers used, and (3) SiC susceptors used (Comparative Example 2 and Example 2) were as follows: (1) RTA treatment condition (same treatment condition as Experiment 1) Oxygen atmosphere (oxygen partial pressure between 20% and 100%) Maximum temperature: 1300°C (above 1250°C, below the melting point of silicon wafers) Hold time at maximum temperature: 30 seconds (1 second to 60 seconds) ·Cooling rate: Cooling rate is 120℃ / sec (2) Wafers used In both Comparative Example 2 and Example 2, silicon wafers (10 wafers each) were sliced ​​from the same silicon single crystal ingot. (3) SiC susceptor used Comparative Example 2: A susceptor that was used 250,000 times in the RTA process (oxide film thickness: approximately 28 μm) Example 2: A susceptor in Comparative Example 2 in which the surface was polished to 10 μm by CMP, and then 1 μm of the oxide film was removed by etching with 5% hydrogen fluoride for 30 minutes (surface roughness Ra: 0.1 μm).

[0042] The results of the above verification experiment (Experiment 2) are shown in Figure 8. Figure 8 shows the measurement results of SIRD. When the susceptor 3 was not cleaned, distortion occurred at the outermost periphery of the wafer 2 due to numerous slips generated from the periphery, as shown in Comparative Example 2. In contrast, by polishing the surface of the susceptor 3 by a predetermined amount to reduce the difference in thickness of the oxide film 3b between the contact region 6 and the non-contact region 7, and then removing a predetermined amount of the oxide film 3b by etching, the distortion area ratio of the wafer 2 could be reduced by 91%, as shown in Example 2.

[0043] The cleaning method according to the present invention is configured such that the thickness of the oxide film 3b after the RTA treatment is thinner in the contact region 6 that contacts the wafer 2 than in the non-contact region 7 other than the contact region 6, and includes an oxide film thinning step S1 in which the oxide film 3b is removed by etching while preventing the base material 3a of the susceptor 3 from being exposed in the contact region 6. This results in a gentle boundary between the oxide film 3b formed in the contact region 6 and the oxide film 3b formed in the non-contact region 7, stabilizing the support state of the wafer 2 by the susceptor 3 and mitigating the concentration of the weight stress and thermal stress of the wafer 2. This suppresses the occurrence of slippage during the RTA treatment, thereby improving the quality of the wafer 2.

[0044] Furthermore, in the cleaning method according to the present invention, each time an oxide film 3b having a predetermined thickness within a range of 0.1 μm or more and 5 μm or less is newly formed on the contact region 6, the oxide film 3b is removed within the thickness range of the newly formed oxide film 3b on the contact region 6 in the oxide film thinning step S1. This makes it possible to extend the life of the susceptor 3 and ensure high quality of the wafers 2 that have been subjected to RTA processing using the susceptor 3.

[0045] Furthermore, in the cleaning method according to the present invention, the oxide film thinning step S1 is performed in a state in which there are no cracks extending from the surface to the inside of the oxide film 3b after the RTA treatment. Therefore, etching proceeds only from the surface side of the oxide film 3b. In other words, the etching solution does not penetrate into the cracks and cause etching to proceed from the inside of the oxide film 3b. This makes it easy to control the thickness of the oxide film 3b in the oxide film thinning step S1, and also prevents unevenness in the oxide film thickness.

[0046] Furthermore, the cleaning method according to the present invention further includes an oxide film polishing step S2, which polishes and removes the oxide film 3b on the surface of the susceptor 3 after the oxide film thinning step S1. This means that the thick oxide film 3b in the non-contact region 7 is polished first, thereby reducing the difference in oxide film thickness between the contact region 6 and the non-contact region 7. This alleviates the concentration of the weight stress and thermal stress of the wafer 2 caused by the difference in oxide film thickness, further suppressing the occurrence of slip during RTA processing.

[0047] In particular, each time an oxide film 3b having a predetermined thickness within a range of 1 μm to 30 μm is newly formed in the non-contact region 7 by the RTA treatment, the oxide film 3b is removed within the thickness range of the newly formed oxide film 3b in the non-contact region 7 in the oxide film polishing step S2, so that the difference in thickness of the oxide film 3b between the contact region 6 and the non-contact region 7 is set to 5 μm or less.This means that the thicker oxide film 3b in the non-contact region 7 is polished first, reducing the difference in oxide film thickness between the contact region 6 and the non-contact region 7.This alleviates the concentration of the weight stress and thermal stress of the wafer 2 caused by the difference in oxide film thickness, making it possible to further suppress the occurrence of slip during the RTA treatment.

[0048] Furthermore, the cleaning method according to the present invention includes an oxide film polishing step S2 in which, after the RTA process, the oxide film 3b is thinner in the contact region 6 that contacts the wafer 2 than in the non-contact region 7 other than the contact region 6, and each time an oxide film 3b of a predetermined thickness within a range of 1 μm to 30 μm is newly formed in the non-contact region 7 by the RTA process, the oxide film 3b is removed to within the thickness range of the newly formed oxide film 3b in the non-contact region 7, so that the difference in thickness of the oxide film 3b between the contact region 6 and the non-contact region 7 is 5 μm or less. This reduces the difference in oxide film thickness between the contact region 6 and the non-contact region 7, thereby alleviating the concentration of the weight stress and thermal stress of the wafer 2 caused by the difference in oxide film thickness, thereby further suppressing the occurrence of slippage during the RTA process. In particular, by keeping the difference in thickness of the oxide film 3b between the contact region 6 and the non-contact region 7 to 5 μm or less, the wafer 2 can be stably supported, thereby more effectively suppressing the occurrence of slippage during the RTA process.

[0049] Furthermore, in the cleaning method according to the present invention, the surface roughness Ra of the oxide film 3b formed on the susceptor 3 is set within the range of 0.01 μm to 1 μm, thereby making it possible to suppress adhesion between the wafer 2 and the susceptor 3 and slippage due to concentration of the stress caused by its own weight during the RTA process.

[0050] The above cleaning method is particularly suitable for cleaning a susceptor 3 used in an RTA process in which the heat treatment temperature is in the range of 1250°C or higher and lower than the melting point of the wafer 2, the holding time at the maximum temperature is in the range of 1 second or higher and 60 seconds or lower, and the process is carried out in an atmospheric gas containing oxygen.

[0051] Although the cleaning method has been described above using the susceptor 3 used in the RTA apparatus 1 as an example, this cleaning method may also be applied to susceptors 3 used in batch-type heat treatment furnaces. Furthermore, the material of the susceptor 3 is not limited to SiC, and the method may also be applied to susceptors 3 made of other materials.

[0052] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0053] 1 RTA device 2. Semiconductor substrate (wafer) 3 Susceptor 3a Base material 3b Oxide film 4 Support Cylinders 5 Lamp 6 Contact area 7 Non-contact area S1 Oxide film thinning process S2 Oxide film polishing process

Claims

1. A method for cleaning a susceptor (3) having an oxide film (3b) formed on the surface of a base material (3a) that supports a semiconductor substrate (2) during heat treatment, comprising: a thickness of the oxide film (3b) after the heat treatment is thinner in a contact region (6) that contacts the semiconductor substrate (2) than in a non-contact region (7) other than the contact region (6), and the method for cleaning a susceptor includes an oxide film thinning step (S1) of removing the oxide film (3b) by etching while preventing the base material (3a) from being exposed in the contact region (6).

2. 2. The susceptor cleaning method according to claim 1, wherein, each time the oxide film (3b) having a predetermined thickness within a range of 0.1 μm to 5 μm is newly formed on the contact region (6) by the heat treatment, the oxide film (3b) is removed within the thickness range of the newly formed oxide film (3b) on the contact region (6) in the oxide film thinning step (S1).

3. 2. The susceptor cleaning method according to claim 1, wherein the oxide film thinning step (S1) is carried out in a state where there are no cracks extending from the surface to the inside of the oxide film (3b) after the heat treatment.

4. 2. The susceptor cleaning method according to claim 1, further comprising an oxide film polishing step (S2) of removing the oxide film (3b) on the surface of the susceptor (3) by polishing, following the oxide film thinning step (S1).

5. 5. The susceptor cleaning method according to claim 4, wherein, each time the oxide film (3b) having a predetermined thickness within a range of 1 μm to 30 μm is newly formed on the non-contact region (7) by the heat treatment, the oxide film (3b) is removed within the thickness range of the newly formed oxide film (3b) on the non-contact region (7) in the oxide film polishing step (S2), so that the difference in thickness of the oxide film (3b) on the contact region (6) and the non-contact region (7) is 5 μm or less.

6. A method for cleaning a susceptor (3) having an oxide film (3b) formed on the surface of a base material (3a) that supports a semiconductor substrate (2) during heat treatment, comprising: The method for cleaning a susceptor includes an oxide film polishing step (S2) in which the thickness of the oxide film (3b) after the heat treatment is thinner in a contact region (6) that contacts the semiconductor substrate (2) than in a non-contact region (7) other than the contact region (6), and each time the oxide film (3b) having a predetermined thickness within a range of 1 μm to 30 μm is newly formed in the non-contact region (7) by the heat treatment, the oxide film (3b) is removed within the thickness range of the oxide film (3b) newly formed in the non-contact region (7) so that the difference in thickness between the oxide film (3b) in the contact region (6) and the non-contact region (7) is 5 μm or less.

7. 7. The susceptor cleaning method according to claim 1, wherein the surface roughness Ra of the oxide film (3b) formed on the susceptor (3) is set to a range of 0.01 μm to 1 μm.

8. 7. The susceptor cleaning method according to claim 1, wherein the susceptor is used in a rapid temperature increase / decrease heat treatment in which the heat treatment temperature is in the range of 1250° C. or higher and the melting point of the semiconductor substrate is in the range of 1 second or higher and 60 seconds or lower at the maximum temperature, and the heat treatment is performed in an oxygen-containing atmosphere gas.

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