Semiconductor device and method of manufacturing the same
By setting lead frame ends to the same height and using a flat bonding sheet, the semiconductor device manufacturing process is streamlined for efficient and automated mass production, addressing the uneven height issues in conventional methods.
Patent Information
- Application Number
- JP2024111367
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-11
- Publication Date
- 2026-01-23
AI Technical Summary
Conventional semiconductor devices face challenges in mass production due to the uneven heights of lead frame ends, requiring cumbersome processes to fill step differences and preventing automated manufacturing.
The lead frame ends are set to the same height, allowing simultaneous transfer of bonding material onto a flat bonding sheet through pressure and heat application, facilitating efficient manufacturing and automation.
This approach enhances manufacturing efficiency and enables mass production of semiconductor devices by simplifying the bonding process, reducing contamination risks, and eliminating the need for separate layer application.
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Figure 2026011081000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]
[0002] An example of a conventional semiconductor device is disclosed in Patent Document 1 below.
[0003] This semiconductor device includes a semiconductor chip including a power device, an insulating circuit board, and a metal base plate. The insulating circuit board includes an insulating plate, such as a ceramic plate, multiple wiring boards formed on the surface of the insulating plate, and a metal layer formed on the back surface of the insulating plate. The semiconductor chip has a lead frame joined to the wiring board via a joining member, such as solder or a joining sheet. The joining sheet is composed of a joining material made of copper, which is a metal sintered material, and a film laid on the underside of the joining material.
[0004] Then, one end of the lead frame to be bonded to the semiconductor chip and the other end to be bonded to the wiring board are placed and fixed on the bonding sheet, for example, and then pressure and heat are applied to transfer only the bonding material to both ends.Then, one end and the other end of the lead frame are bonded to the semiconductor chip and the wiring board via the respective bonding materials. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2023-128645 Summary of the Invention [Problem to be solved by the invention]
[0006] However, in the conventional semiconductor device described in the publication, the heights of one end and the other end of the lead frame are different in the vertical direction, and the height of the tip surface of one end bonded to the semiconductor chip is higher than the height of the other end bonded to the wiring board. In other words, there is a step of about 0.2 mm between the tip surfaces of both ends.
[0007] This makes it difficult to simultaneously transfer the bonding material of the bonding sheet to both ends of the lead frame, which have different heights. Furthermore, to fill the step differences on each end face, a cumbersome process is required, such as manually transferring multiple layers of bonding material in a stacked state. This reduces the efficiency of semiconductor device manufacturing and may prevent automated mass production.
[0008] The present invention has been devised in view of the above-mentioned conventional technical problems, and has as its object to provide a semiconductor device which can be mass-produced by improving the efficiency of manufacturing work and automating it. [Means for solving the problem]
[0009] In one aspect of the present invention, one end of the lead frame extends perpendicularly from one end of a flat base and is connected to a semiconductor chip via a bonding material transferred to a tip surface, while the other end of the lead frame extends perpendicularly from the other end of the base in parallel to the one end and is connected to a conductive member via a bonding material transferred to a tip surface; The lead frame is characterized in that the height from the base to the tip surface at one end and the height from the base to the tip surface at the other end are set to be approximately the same height. [Effects of the Invention]
[0010] According to the present invention, by making both ends of the lead frame the same height, both ends can be transferred together onto the upper surface of a flat bonding sheet, thereby improving the manufacturing efficiency of semiconductor devices and enabling mass production through automation. [Brief explanation of the drawings]
[0011] [Figure 1] 1 is a schematic cross-sectional view of a semiconductor unit showing a state in which a lead frame and a conductive member are connected to a semiconductor chip used in a semiconductor device according to the present invention. [Figure 2] (a) is a schematic cross-sectional view showing the first conductive material and the second conductive material of the conductive member used in the first embodiment, and (b) is a schematic cross-sectional view showing the state in which the first and second lead portions are bonded to the top surface of a semiconductor chip accommodated in an accommodating groove formed in the first conductive material and the top surface of the second conductive material via respective bonding materials. [Figure 3] 1A and 1B show the state in which the bonding material of the bonding sheet is transferred to the lead frame used in the first embodiment of the present invention, where (a) is a schematic cross-sectional view showing the state in which the tip surfaces of the first and second lead portions of the lead frame are placed on the bonding sheet and transferred, and (b) is a schematic cross-sectional view showing the state in which the lead frame has been pulled up after transfer. [Figure 4] (a) is a schematic cross-sectional view showing the first conductive material and the second conductive material of the conductive member used in the second embodiment of the present invention, and (b) is a schematic cross-sectional view showing the state in which the first and second lead portions are bonded to the upper surface of the semiconductor chip bonded to the upper surface of the first conductive material and the upper surface of the second conductive material via each bonding material. DETAILED DESCRIPTION OF THE INVENTION
[0012] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a semiconductor device according to the present invention will be described with reference to the accompanying drawings. [First embodiment] Fig. 1 is a schematic diagram of a semiconductor unit showing a state in which a lead frame and a conductive member are connected to a semiconductor chip used in a semiconductor device according to the present invention, Fig. 2(a) is a schematic cross-sectional view showing a first conductive member and a second conductive member used in a first embodiment, and Fig. 2(b) is a schematic cross-sectional view showing a state in which first and second lead portions are bonded via respective bonding materials to the upper surface of a semiconductor chip accommodated in an accommodation groove formed in the first conductive member and to the upper surface of the second conductive member, Fig. 3 shows a state in which a bonding material of a bonding sheet is transferred to a lead frame used in the first embodiment of the present invention, with Fig. 3(a) being a schematic cross-sectional view showing a state in which the tip surfaces of the first and second lead portions of the lead frame are placed on the bonding sheet and transferred, and Fig. 3(b) being a schematic cross-sectional view showing a state in which the lead frame is pulled up after transfer.
[0013] In this embodiment, the terms "upper" and "lower" do not refer to the vertical direction relative to the ground, but rather indicate directions on the drawings. Also, the sizes of semiconductor chips, lead frames, etc. are exaggerated in each drawing, but in reality, the sizes are measured in millimeters or micrometers.
[0014] First, the basic configuration of the semiconductor device will be briefly explained. As shown in Fig. 1, this semiconductor device has a semiconductor unit 1, two upper and lower metal base plates 2 and 3, and a case (not shown) that houses the semiconductor unit 1. The semiconductor unit 1 is provided with a conductive member 4, a lead frame 5, and wires (not shown).
[0015] The semiconductor unit 1 includes two insulating circuit boards 6 and 7 arranged one above the other, and multiple semiconductor chips 8. Each insulating circuit board 6 and 7 is rectangular in plan view and includes an insulating plate 6a and 7a, multiple wiring boards (not shown) formed on the upper surfaces of the insulating plates 6a and 7a, and metal plates (not shown) formed on the lower surfaces of the insulating plates 6a and 7a. The multiple wiring boards and metal plates are formed inside the insulating plates 6a and 7a.
[0016] Each insulating circuit board 6, 7 is, for example, a so-called DCB (Direct Copper Bonding) board or an AMB (Active Metal Brazed) board, and is bonded to each metal base plate 2, 3 via a bonding material, and is designed to transmit heat generated by the semiconductor chip 8 to the metal base plate 2, 3 via the wiring board, insulating plates 6a, 7a, and metal plate.
[0017] The insulating plates 6a and 7a are made of a ceramic material with high thermal conductivity, such as a material primarily composed of silicon nitride, aluminum oxide, or aluminum nitride. The wiring board is made of a copper material or copper alloy material with excellent conductivity, and is plated with a metal such as nickel on its surface. The metal plate is made of a material with excellent thermal conductivity, such as aluminum, iron, silver, or copper, and is plated with nickel on its surface.
[0018] The conductive members 4 are each formed integrally into a substantially flat plate shape using a copper material or copper alloy with excellent conductivity. As shown in Figures 2(a) and 2(b), the conductive members 4 are arranged on the side of a first lead portion 12 (described later) of the lead frame 5 and include a first conductive material 9 connected to the bottom of the semiconductor chip 8, and a second conductive material 10 connected to a second lead portion 13 (described later) of the lead frame 5. The first conductive material 9 and the second conductive material 10 are bonded together and electrically conductive to each other.
[0019] The first conductive member 9 is formed of a relatively thick plate material, and has an upper surface 9a formed with an accommodating groove 9b for accommodating the semiconductor chip 8. The second conductive member 10 is formed of a thin plate material. The first conductive member 9 and the second conductive member 10 are electrically connected to the wiring boards of the respective insulating circuit boards 6 and 7.
[0020] 1 and 2(b), each semiconductor chip 8 is accommodated and disposed in an accommodation groove 9b of a second conductive material 10, with its upper surface 8a exposed to the outside and flush with the upper surface 9a of the first conductive material 9. The height position of the upper surface 10a of the second conductive material 10 is set to be flush with the height position of the upper surface 8a of the semiconductor chip 8. The lower surface 8b of the semiconductor chip 8 is electrically connected to the bottom surface of the accommodation groove 9b by a bonding material 17, which is a metal sintered material of copper nanoparticles provided on the upper surface of a PET film 15 of a bonding sheet 14 described below.
[0021] The wires (not shown) are made of a highly conductive metal material such as gold or copper, and directly connect the wiring board and the control electrodes of the semiconductor chip 8 .
[0022] The lead frame 5 is formed of a metal material such as copper or a copper alloy having excellent conductivity. As shown in FIGS. 1 and 3(a) and 3(b), the lead frame 5 has a flat base 11, a first lead portion 12, which is one end portion extending downward from one end of the base 11 in a perpendicular direction in the figure, and a second lead portion 13, which is the other end portion extending parallel to the first lead portion 12 in a perpendicular direction from the other end of the base 11. The first lead portion 12 has a tip surface 12a joined vertically to an output electrode on the upper surface 8a of the semiconductor chip 8 via a bonding material 16 (described later). The second lead portion 13 has a tip surface 13a joined vertically to an end surface of the second conductive material 10 via a bonding material 16. As a result, the lead frame 5 electrically connects the output electrode of the semiconductor chip 8 to a wiring board (not shown).
[0023] The first lead portion 12 and the second lead portion 13 are set to have the same height H, H in the vertical direction. That is, as shown in Figures 1 and 3(a), the first lead portion 12 is set to a height H from the upper surface where it is joined to the base portion 11 to the tip surface 12a, and the second lead portion 13 is set to a height H from the upper surface where it is joined to the base portion 11 to the tip surface 13a, and these two lead portions 12, 13 are set to the same height H. Note that although the heights H, H of the first lead portion 12 and the second lead portion 13 are said to be the same, they do not have to be completely the same, and slight differences of, for example, about 0.04 mm or less due to manufacturing errors or dimensional errors are included.
[0024] Furthermore, bonding materials 16, 16 of a transfer-type bonding sheet 14 are transferred to the tip surface 12a of the first lead portion 12 and the tip surface 13a of the second lead portion 13, respectively. As shown in FIGS. 3(a) and 3(b), the bonding sheet 14 is composed of a PET (polyethylene terephthalate polyester resin) film 15 as a base support and a bonding material 16, a sintered metal material, provided on the PET film 15 and transferred to the tip surfaces 12a, 13a of the leads 12, 13. The PET film 15 is formed to a thickness of approximately 0.05 mm to 0.15 mm, and the bonding material 16 is a bonding material made of metal nanoparticles. For example, copper nanoparticles are used as the metal nanoparticles and formed to a thickness of approximately 70 μm to 100 μm. These copper nanoparticles are ideal for SiC power devices, which are semiconductor chips 8 expected to be used in high-temperature environments, as in this embodiment, and are a bonding material that can adequately withstand high-temperature operation. The metal nanoparticles of the bonding material 16 may be made of any metal having excellent conductivity, such as silver.
[0025] 1 and 2(b), the first lead portion 12 has a tip surface 12a electrically connected to an output electrode provided at the center of the upper surface 8a of the semiconductor chip 8 via a bonding material 16 formed from copper nanoparticles. Meanwhile, the second lead portion 13 has a tip surface 13a electrically connected to the upper surface 10a of the second conductive material 10 via a bonding material 16 formed from the same copper nanoparticles.
[0026] The two upper and lower metal base plates 2, 3 are each formed rectangular in plan view and function as heat sinks, and are made of a material with excellent thermal conductivity, such as aluminum alloy or iron. Insulated circuit boards 6, 7 are bonded to the upper and lower opposing surfaces of each metal base plate 2, 3, respectively. This allows heat transferred from the insulated circuit boards 6, 7 to be efficiently dissipated to the outside. [Method for manufacturing semiconductor device] The manufacturing method of the semiconductor device according to this embodiment will be described below. First, a plurality of lead frames 5 are formed to a predetermined size by punching or the like. During this punching process, as described above, the first lead portion 12 and the second lead portion 13 are set to the same height H from the upper surface where they are joined to the base portion 11 to their respective tip surfaces 12a, 13a (first step).
[0027] Next, as shown in FIG. 3(a), both the tip surface 12a of the first lead portion 12 and the tip surface 13a of the second lead portion 13 of the lead frame 5 are placed and held on the bonding material 16 on the upper surface of the bonding sheet 14. The lead frame 5 is then pressed toward the bonding sheet 14 with a pressure device at a predetermined pressure, and is heated with a heater at a temperature of, for example, 150°C for a predetermined time. This transfers the bonding material 16, which is a copper nanoparticle material, to each of the tip surfaces 12a and 13a (second step). Then, as shown in FIG. 3(b), the entire lead frame 5 is detached from the bonding sheet 14.
[0028] The semiconductor chip 8 is placed and held on the upper surface of the bonding material 16 of the bonding sheet 14 in the same process as the second process, and is pressed and heated at a predetermined pressure, thereby transferring the bonding material 17 to the lower surface 8b. The semiconductor chip 8 with the transferred bonding material 16 is accommodated in the accommodation groove 9b of the first conductive material 9 and is subjected to a pressure and heat treatment for a predetermined time. As a result, the semiconductor chip 8 is electrically connected to the bottom surface of the accommodation groove 9b via the bonding material 17.
[0029] 2(b), the tip surface 12a of the first lead portion 12 is placed on the center of the upper surface (output electrode) of the semiconductor chip 8 via the bonding material 16, and the tip surface 13a of the second lead portion 13 is placed on the upper surface 10a of the second conductive material 10 via the bonding material 16. Thereafter, the tip surfaces 12a, 13a of the first lead portion 12 and the second lead portion 13 are subjected to pressure and heat treatment for a predetermined time, thereby electrically connecting them to the corresponding upper surface 8a of the semiconductor chip 8 and the upper surface 10a of the second conductive material 10 via the bonding materials 16 (third step).
[0030] As described above, according to the semiconductor device and the method for manufacturing the semiconductor device of this embodiment, the height H to the tip surfaces 12a, 13a of the first and second lead portions 12, 13 of the lead frame 5 is set to be the same. Therefore, the tip surfaces 12a, 13a of both lead portions 12, 13 of the lead frame 5 are placed on the upper surface of the flat bonding sheet 14 composed of the bonding material 16 and the PET film 15, and the bonding material 16 can be transferred simultaneously and together to the tip surfaces 12a, 13a by applying pressure and heat. In particular, the bonding material 16 can be transferred to both tip surfaces 12a, 13a in one go.
[0031] Therefore, compared to the conventional technique in which bonding material is transferred separately to the tip surface 12a of the first lead portion 12 and the tip surface 13a of the second lead portion 13, the work of transferring bonding material 16 to each of the tip surfaces 12a, 13a of both lead portions 12, 13 of the lead frame 5 is made easier. As a result, the efficiency of the manufacturing work of semiconductor devices is improved and mass production of semiconductor devices becomes possible.
[0032] Furthermore, since the tip surfaces 12a, 13a of both lead portions 12, 13 of the lead frame 5 are formed to the same height H, the heights of the upper surface 8a of the semiconductor chip 8 and the upper surface 10a of the second conductive material 10 are also formed to the same height, which makes it easier to electrically connect both lead portions 12, 13 of the lead frame 5 to the upper surfaces 8a, 10a of the semiconductor chip 8 and the second conductive material 10.
[0033] In other words, by arranging the height of the second conductive material 10 to match the height of the upper surface 8a of the semiconductor chip 8 in accordance with the layout of the semiconductor chip 8 accommodated in the accommodation groove 9b of the first conductive material 9, it becomes possible to easily join the lead portions 12 and 13 of the lead frame 5, which have the same height H, to the upper surface 8a of the semiconductor chip 8 and the upper surface 10a of the second conductive material 10.
[0034] In addition, in this embodiment, a bonding material made of copper nanoparticles provided on the upper surface of the PET film 15 is used as the bonding material for bonding the lead frame 5 and the semiconductor chip 8, etc., so a drying process is not required compared to when using paste-like solder as in the past. Therefore, the bonding work can be shortened. Furthermore, by using a bonding sheet, the area of the bonded materials, which are the tip surfaces 12a and 13a of the leads 12 and 13, and the bonding area of the bonding material 16 become the same, and the bonding material 16 does not protrude from the bonded materials, thereby reducing the risk of contamination of the bonding material 16. Second Embodiment Figures 4(a) and (b) show a second embodiment of the present invention, which is the same as the first embodiment in that the height H of both lead portions 12, 13 of the lead frame 5 is set to the same value, but the difference is that the height of the semiconductor chip 8 is changed and the height of the second conductive material 10 is changed to match this height.
[0035] That is, the semiconductor chip 8 is bonded to the flat upper surface 9a of the first conductive material 9 without providing an accommodation groove 9b in the upper surface 9a. That is, the semiconductor chip 8 is disposed at a high height above the upper surface 9a of the first conductive material 9, and its bottom surface is bonded to the flat upper surface 9a of the first conductive material 9 via bonding material 17 transferred by the same method as described above. On the other hand, the upper surface 10a of the second conductive material 10 is set at the same height as the upper surface 8a of the semiconductor chip 8.
[0036] A bonding material 16 made of copper nanoparticles is bonded to each of the tip surfaces 12a, 13a of the first and second lead portions 12, 13 of the lead frame 5 by the same method as in the first embodiment.
[0037] Therefore, in this second embodiment, in order to electrically connect the lead frame 5 to the semiconductor chip 8 and the second conductive material 10, it is bonded to the upper surface 8a of the semiconductor chip 8 and the upper surface 10a of the second conductive material 10 via each bonding material 16 bonded to the tip surface 12a of the first lead portion 12 and the tip surface 13a of the second lead portion 13.
[0038] In addition, a copper nanoparticle bonding material 17 is bonded to the lower surface 8b of the semiconductor chip 8 using the same method as in the first embodiment, and is electrically connected to the upper surface of the first conductive material 9 via this bonding material 17.
[0039] Therefore, in the semiconductor device of the second embodiment, the heights H of both lead portions 12, 13 of the lead frame 5 are set to be the same, so that the tip surfaces 12a, 13a of both lead portions 12, 13 of the lead frame 5 can be placed on the upper surface of a flat bonding sheet 14 made of a PET film 15 and a bonding material 16, and the bonding material 16 can be transferred simultaneously and together to each tip surface 12a, 13a by applying pressure and heat. Therefore, the same effects as in the first embodiment can be obtained, such as facilitating the transfer of the bonding material 16 to each tip surface 12a, 13a of both lead portions 12, 13 of the lead frame 5 and enabling mass production of semiconductor devices.
[0040] The present invention is not limited to the configuration of the above embodiment, and for example, the conductive member 4 may be anything that is electrically connected to the semiconductor chip 8, such as a separate lead frame or a wiring board as in the prior art. [Explanation of symbols]
[0041] 1...semiconductor unit, 2 and 3...metal base plate, 4...conductive member, 5...lead frame, 6 and 7...insulated circuit board, 8...semiconductor chip, 9...first conductive material, 10...second conductive material, 11...base, 12...first lead portion, 12a...tip surface, 13...second lead portion, 13a...tip surface, 14...bonding sheet, 15...PET film, 16...bonding material.
Claims
1. A semiconductor device having a semiconductor chip, a conductive member connectable to the semiconductor chip, and a lead frame having one end electrically connected to the semiconductor chip and the other end electrically connected to the conductive member, one end of the lead frame extends perpendicularly from one end of a flat base and is connected to the semiconductor chip via a bonding material transferred to a tip surface, while the other end of the lead frame extends perpendicularly from the other end of the base in parallel to the one end and is connected to the conductive member via a bonding material transferred to a tip surface; The height from the base to the tip surface of one end of the lead frame is set to be the same as the height from the base to the tip surface of the other end. A semiconductor device characterized by:
2. 2. The semiconductor device according to claim 1, A semiconductor device characterized in that the bonding material transferred to the tip surface of one end of the lead frame and the tip surface of the other end of the lead frame is conductive sintered metal nanoparticles on the surface of a bonding sheet.
3. 2. The semiconductor device according to claim 1, the conductive member includes a first conductive material disposed on one end side of the lead frame and connected to a lower portion of the semiconductor chip, and a second conductive material connected to the other end of the lead frame; the first conductive material sets the height of the upper surface of the semiconductor chip to the same height as the second conductive material; A tip surface of one end of the lead frame is connected to the upper surface of the semiconductor chip via the bonding material, while a tip surface of the other end of the lead frame is connected to the upper surface of the second conductive material via the bonding material. A semiconductor device characterized by:
4. 4. The semiconductor device according to claim 3, An accommodation groove for accommodating the semiconductor chip is provided on the upper surface of the first conductive material, while the height of the upper surface of the second conductive material is set to the same height as the height of the upper surface of the semiconductor chip accommodated in the accommodation groove. A semiconductor device characterized by:
5. 4. The semiconductor device according to claim 3, The semiconductor chip is mounted and fixed on the upper surface of the first conductive material, and the upper surface of the second conductive material is set to the same height as the upper surface of the semiconductor chip. A semiconductor device characterized by:
6. 1. A method for manufacturing a semiconductor device having a semiconductor chip, a conductive member connectable to the semiconductor chip, and a lead frame having one end electrically connected to the semiconductor chip and the other end electrically connected to the conductive member, comprising: the lead frame has one end extending perpendicularly from one end of a flat base, and another end extending perpendicularly from the other end of the base in parallel to the one end, a step of setting the heights of the tip surfaces of the one end and the other end of the lead frame in the vertical direction to be the same or approximately the same; a step of placing the respective tip surfaces of the one end and the other end of the lead frame on an upper surface of a flat bonding sheet constituted by a bonding material and a film, and transferring the bonding material to the respective tip surfaces by pressure and heat treatment; a step of bonding a tip surface of the one end portion to an upper surface of the semiconductor chip via the bonding material; a step of joining a tip surface of the other end portion to an upper surface of the conductive member via the joining material; 1. A method for manufacturing a semiconductor device, comprising:
7. 7. A method for manufacturing a semiconductor device according to claim 6, comprising: A method for manufacturing a semiconductor device, characterized in that a step of joining a tip surface of one end of the lead frame to an upper surface of the semiconductor chip and a step of joining a tip surface of the other end to an upper surface of the conductive member are carried out simultaneously.
Citation Information
Patent Citations
Method of manufacturing semiconductor device
JP2023128645A