Sensor device

Abstract

To provide a sensor device capable of improving characteristics.SOLUTION: A sensor device according to the present disclosure includes a Peltier element, a sensor element thermally connected to a cooling surface of the Peltier element, a window member provided to face a light receiving surface of the sensor element, a support member disposed between the sensor element and the window member, a relay substrate disposed between the cooling surface of the Peltier element and the sensor element and relaying electrical connection to the sensor element, and a package substrate thermally connected to a heat dissipation surface of the Peltier element and accommodating the Peltier element and the sensor element. The relay substrate is accommodated in the package substrate and is disposed away from the package substrate.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to a sensor device. [Background technology]

[0002] BACKGROUND ART A hermetically sealed package incorporating a Peltier element is known as a means for cooling a sensor element such as a solid-state imaging element (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-258221 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure proposes a sensor device that can improve characteristics. [Means for solving the problem]

[0005] According to the present disclosure, there is provided a sensor device comprising: a Peltier element; a sensor element thermally connected to a cooling surface of the Peltier element; a window member provided opposite a light-receiving surface of the sensor element; a support member disposed between the sensor element and the window member; an interposer substrate disposed between the cooling surface of the Peltier element and the sensor element and relaying an electrical connection to the sensor element; and a package substrate thermally connected to the heat-dissipating surface of the Peltier element and housing the Peltier element and the sensor element. The interposer substrate is housed in the package substrate and is disposed apart from the package substrate. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a diagram illustrating a schematic configuration of a sensor element according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram illustrating a pixel circuit of each pixel of a sensor element according to an embodiment of the present disclosure. [Figure 3] FIG. 2 is a cross-sectional view showing a pixel structure according to an embodiment of the present disclosure. [Figure 4] FIG. 2 is a plan view of a pixel array region showing the pixel arrangement of charge-emitting pixels. [Figure 5] FIG. 1 is a diagram showing a schematic cross-sectional configuration of a sensor element according to an embodiment of the present disclosure. [Figure 6] 1 is a cross-sectional view illustrating a configuration example of a sensor device according to an embodiment of the present disclosure. [Figure 7] FIG. 2 is a bottom view illustrating a configuration example of a sensor device according to an embodiment of the present disclosure. [Figure 8] FIG. 2 is a top view illustrating a configuration example of a cooling substrate of a Peltier element according to an embodiment of the present disclosure. [Figure 9] FIG. 2 is a top view illustrating a configuration example of a heat dissipation substrate of a Peltier element according to an embodiment of the present disclosure. [Figure 10] FIG. 1 is a top view illustrating a configuration example of a Peltier element according to an embodiment of the present disclosure. [Figure 11] FIG. 10 is a diagram showing the wavelength dependence of the transmittance of the window members of the example and the reference example. [Figure 12] FIG. 10 is a cross-sectional view showing a configuration example of a sensor device according to a first modified example of the embodiment of the present disclosure. [Figure 13] FIG. 10 is a cross-sectional view showing a configuration example of a sensor device according to a second modification of the embodiment of the present disclosure. [Figure 14] FIG. 11 is a bottom view showing a configuration example of a sensor device according to a third modification of the embodiment of the present disclosure. [Figure 15A] FIG. 10 illustrates a substrate configuration of another example sensor element according to an embodiment of the present disclosure. [Figure 15B] FIG. 10 illustrates a substrate configuration of another example sensor element according to an embodiment of the present disclosure. [Figure 16] FIG. 10 is a diagram illustrating an example of a circuit configuration of a laminated substrate of another example of a sensor element according to an embodiment of the present disclosure. [Figure 17] FIG. 10 is a diagram illustrating an equivalent circuit of a pixel of another example sensor element according to an embodiment of the present disclosure. [Figure 18] 10 is a plan view of a pixel array region showing the pixel arrangement of charge emission pixels according to Modification 4. FIG. [Figure 19] FIG. 10 is a cross-sectional view showing a structure of a pixel according to a fourth modified example of the embodiment of the present disclosure. [Figure 20] FIG. 10 is a cross-sectional view showing a configuration example of a sensor device according to a fifth modified example of the embodiment of the present disclosure. [Figure 21] FIG. 13 is a cross-sectional view showing a configuration example of a sensor device according to a sixth modified example of the embodiment of the present disclosure. [Figure 22] FIG. 13 is a cross-sectional view showing a configuration example of a sensor device according to a seventh modified example of the embodiment of the present disclosure. [Figure 23] FIG. 13 is a cross-sectional view showing a configuration example of a sensor device according to Modification 8 of the embodiment of the present disclosure. [Figure 24] FIG. 13 is a cross-sectional view showing a configuration example of a sensor device according to a ninth modified example of the embodiment of the present disclosure. [Figure 25] FIG. 23 is a cross-sectional view showing a configuration example of a sensor device according to a tenth modification of the embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. In the following embodiments, the same components are designated by the same reference numerals, and redundant description will be omitted.

[0008] Hermetically sealed packages incorporating Peltier elements are known as a means for cooling sensor elements such as solid-state imaging devices. In such hermetically sealed packages, sapphire glass is used as a window member that allows light to pass through to the interior.

[0009] However, the above technique has a problem in that there is a wavelength range in which the absorption rate of sapphire glass increases, and incident light is absorbed by the sapphire glass, resulting in a decrease in detection sensitivity.

[0010] Therefore, there is a need for a technology that can overcome the above-mentioned problems and improve the detection sensitivity of sensor devices.

[0011] [Sensor element configuration] First, the configuration of a sensor element 10 according to an embodiment will be described with reference to Figures 1 to 5. Figure 1 is a diagram showing a schematic configuration of a sensor element 10 according to an embodiment of the present disclosure.

[0012] 1 is configured to include a pixel array region 103 in which pixels 102 are arranged two-dimensionally in a matrix on a semiconductor substrate 112 made of, for example, single-crystal silicon (Si) as a semiconductor, and a peripheral circuit region 161 (see FIG. 4) surrounding the pixel array region 103. The peripheral circuit region 161 includes a vertical drive circuit 104, a column signal processing circuit 105, a horizontal drive circuit 106, an output circuit 107, a control circuit 108, etc.

[0013] The pixel 102 includes a photoelectric conversion unit made of a semiconductor thin film and a plurality of pixel transistors, which may be, for example, three MOS transistors: a reset transistor, an amplification transistor, and a selection transistor.

[0014] The control circuit 108 receives an input clock and data instructing the operation mode and the like, and outputs data such as internal information of the sensor element 10. That is, the control circuit 108 generates clock signals and control signals that serve as the basis for the operations of the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock.

[0015] The control circuit 108 then outputs the generated clock signal and control signal to the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, and so on.

[0016] The vertical drive circuit 104 is configured by, for example, a shift register, selects a predetermined pixel drive wiring 110, supplies a pulse to the selected pixel drive wiring 110 to drive the pixels 102, and drives the pixels 102 row by row.

[0017] That is, the vertical drive circuit 104 sequentially selects and scans each pixel 102 in the pixel array region 103 in the vertical direction on a row-by-row basis. Then, the vertical drive circuit 104 supplies a pixel signal based on a signal charge generated in a photoelectric conversion unit of each pixel 102 according to the amount of received light to a column signal processing circuit 105 via a vertical signal line 109.

[0018] The column signal processing circuits 105 are arranged for each column of pixels 102, and perform signal processing such as noise removal for each column of signals output from one row of pixels 102. For example, the column signal processing circuits 105 perform signal processing such as CDS (Correlated Double Sampling) for removing fixed pattern noise specific to each pixel and AD conversion.

[0019] The horizontal drive circuit 106 is configured, for example, by a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 105 in turn, causing each of the column signal processing circuits 105 to output a pixel signal to a horizontal signal line 111.

[0020] The output circuit 107 processes and outputs signals sequentially supplied from each of the column signal processing circuits 105 via a horizontal signal line 111. The output circuit 107 may perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, etc. The input / output terminal 113 exchanges signals with the outside.

[0021] The sensor element 10 configured as above is a CMOS image sensor of a so-called column AD type, in which the column signal processing circuits 105 for performing CDS processing and AD conversion processing are arranged for each column.

[0022] 2 is a diagram showing a pixel circuit of each pixel of the sensor element 10 according to the embodiment of the present disclosure. Each pixel 102 includes a photoelectric conversion unit 121, a capacitance element 122, a reset transistor 123, an amplification transistor 124, and a selection transistor 125.

[0023] The photoelectric conversion unit 121 is made of a semiconductor thin film using a compound semiconductor such as InGaAs, and generates electric charges (signal charges) according to the amount of light received. A predetermined bias voltage Va is applied to the photoelectric conversion unit 121.

[0024] The capacitance element 122 accumulates the charge generated by the photoelectric conversion unit 121. The capacitance element 122 can be configured to include at least one of a pn junction capacitance, a MOS capacitance, and a wiring capacitance, for example.

[0025] When the reset transistor 123 is turned on by a reset signal RST, the electric charge stored in the capacitance element 122 is discharged to the source (ground), thereby resetting the potential of the capacitance element 122.

[0026] The amplification transistor 124 outputs a pixel signal according to the accumulated potential of the capacitance element 122. That is, the amplification transistor 124 forms a source follower circuit together with a load MOS (not shown) serving as a constant current source connected via the vertical signal line 109.

[0027] As a result, a pixel signal indicating a level according to the charge stored in the capacitance element 122 is output from the amplification transistor 124 via the selection transistor 125 to the column signal processing circuit 105 (see FIG. 1).

[0028] The selection transistor 125 is turned on when the pixel 102 is selected by the selection signal SEL, and outputs a pixel signal of the pixel 102 to the column signal processing circuit 105 via the vertical signal line 109. The signal lines through which the transfer signal TRX, the selection signal SEL, and the reset signal RST are transmitted correspond to the pixel drive wiring 110 in FIG.

[0029] 3 is a cross-sectional view showing the structure of a pixel 102 according to an embodiment of the present disclosure. As will be described in detail later, in FIG. 3, the pixels 102 in the pixel array region 103 are divided into normal pixels 102A and charge emission pixels 102B depending on how the reset transistors 123 are controlled.

[0030] On the other hand, since the pixel structure of normal pixel 102A and charge-emitting pixel 102B is basically the same, they may be hereinafter simply referred to as pixel 102. Note that charge-emitting pixel 102B is arranged at the outermost position of pixel array region 103 (see FIG. 1).

[0031] The readout circuit of the capacitance element 122, reset transistor 123, amplification transistor 124, and selection transistor 125 of each pixel 102 described in FIG. 2 is formed for each pixel 102 on a semiconductor substrate 112 made of a single crystal material such as single crystal silicon.

[0032] In FIG. 3, the reference numerals of the capacitive element 122, the reset transistor 123, the amplifying transistor 124, and the selection transistor 125 formed on the semiconductor substrate 112 are omitted.

[0033] On the upper side, which is the light incident side, of the semiconductor substrate 112, an N-type semiconductor thin film 141 that becomes the photoelectric conversion section 121 is formed over the entire surface of the pixel array region 103. The N-type semiconductor thin film 141 is made of InGaP, InAlP, InGaAs, InAlAs, or a compound semiconductor having a chalcopyrite structure.

[0034] A compound semiconductor with a chalcopyrite structure is a material that provides a high optical absorption coefficient and high sensitivity over a wide wavelength range, and is preferably used as the N-type semiconductor thin film 141 for photoelectric conversion.

[0035] Such compound semiconductors with a chalcopyrite structure are composed of elements surrounding Group IV elements, such as Cu, Al, Ga, In, S, and Se, and examples thereof include CuGaInS-based mixed crystals, CuAlGaInS-based mixed crystals, and CuAlGaInSSe-based mixed crystals.

[0036] In addition to the above-mentioned compound semiconductors, amorphous silicon, germanium (Ge), a quantum dot photoelectric conversion film, an organic photoelectric conversion film, etc. may also be used as the material for the N-type semiconductor thin film 141. In the present disclosure, it is assumed that an InGaAs compound semiconductor is used as the N-type semiconductor thin film 141.

[0037] A high-concentration P-type layer 142 constituting a pixel electrode is formed for each pixel 102 on the lower side of the N-type semiconductor thin film 141, which is on the semiconductor substrate 112 side. Between the high-concentration P-type layers 142 formed for each pixel 102, an N-type layer 143 is formed of a compound semiconductor such as InP as a pixel isolation region that isolates each pixel 102. In addition to functioning as a pixel isolation region, this N-type layer 143 also has the role of preventing dark current.

[0038] On the other hand, an N-type layer 144 having a higher concentration than the N-type semiconductor thin film 141 is formed on the upper side, which is the light incident side, of the N-type semiconductor thin film 141 using a compound semiconductor such as InP used as a pixel isolation region.

[0039] This high-concentration N-type layer 144 functions as a barrier layer that prevents backflow of charges generated in the N-type semiconductor thin film 141. The high-concentration N-type layer 144 can be made of a compound semiconductor such as InP, InGaAs, or InAlAs.

[0040] An anti-reflection film 145 is formed on the high-concentration N-type layer 144 serving as a barrier layer. Examples of materials that can be used for the anti-reflection film 145 include silicon nitride (SiN), hafnium oxide (HfO), aluminum oxide (AlO), zirconium oxide (ZrO), tantalum oxide (TaO), and titanium oxide (TiO).

[0041] Either the high-concentration N-type layer 144 or the anti-reflection film 145 also functions as the upper electrode of the electrodes sandwiching the N-type semiconductor thin film 141 from above and below, and a predetermined voltage Va is applied to the high-concentration N-type layer 144 or the anti-reflection film 145 as the upper electrode.

[0042] A color filter 146 and an on-chip lens 147 are further formed on the anti-reflection film 145. The color filter 146 is a filter that transmits light (wavelength light) of any one of R (red), G (green), and B (blue), and is arranged in a so-called Bayer array in the pixel array region 103, for example.

[0043] A passivation layer 151 and an insulating layer 152 are formed below the high-concentration P-type layer 142 that constitutes the pixel electrode and the N-type layer 143 that serves as a pixel isolation region. Connection electrodes 153A and 153B and a bump electrode 154 are formed to penetrate the passivation layer 151 and the insulating layer 152.

[0044] The connection electrodes 153A and 153B and the bump electrode 154 electrically connect the high-concentration P-type layer 142 that constitutes the pixel electrode to the capacitance element 122 that stores electric charges.

[0045] The normal pixel 102A and the charge emission pixel 102B are configured as described above and have the same pixel structure. However, the normal pixel 102A and the charge emission pixel 102B differ in the method of controlling the reset transistor 123.

[0046] In the normal pixel 102A, the reset transistor 123 is turned on and off based on the reset signal RST according to the charge generation period (light receiving period) by the photoelectric conversion unit 121, the reset period of the potential of the capacitive element 122 before the start of light receiving, etc. On the other hand, in the charge emitting pixel 102B, the reset transistor 123 is controlled to be always on.

[0047] As a result, the charge generated in the photoelectric conversion unit 121 is discharged to the ground, and a constant voltage Va is always applied to the charge emission pixel 102B.

[0048] 4 is a plan view of the pixel array region 103 showing the pixel arrangement of the charge-emitting pixels 102B. The pixel array region 103 is arranged inside the peripheral circuit region 161 in which the vertical drive circuit 104, the column signal processing circuit 105, etc. are formed. The outermost row and column of the pixel array region 103 are designated as the charge-emitting region 162, in which the charge-emitting pixels 102B are arranged.

[0049] The charge emission region 162 may be configured with a plurality of rows and columns including at least one outermost row and one outermost column of the rectangular pixel array region 103 .

[0050] As shown in Figure 3, pixels 102 located in the outermost columns and rows on each side of the rectangular pixel array region 103 are prone to generating dark current due to the influence of the processed interface (processed end surface) of the photoelectric conversion unit 121, which is a compound semiconductor.

[0051] In particular, if the readout circuit formed on the semiconductor substrate 112 is a source follower type circuit, the potential difference of the pixel becomes smaller when charge accumulates, and the dark current component affects adjacent pixels one after another due to blooming.

[0052] Therefore, in this embodiment, the pixels 102 located in the outermost columns and rows on each side of the rectangular pixel array region 103 are set as charge emission pixels 102B whose reset transistors 123 are controlled to be always on.

[0053] This causes the charge gushing out from the processed end face (processed interface) of the N-type semiconductor thin film 141, which is the photoelectric conversion unit 121, to be concentrated in the charge emission pixels 102B and then discharged. This makes it possible to prevent the charge from flowing into the normal pixels 102A located inside the charge emission region 162.

[0054] As described above, according to the embodiment, it is possible to suppress image quality degradation caused by charge leaking from the processed interface of the N-type semiconductor thin film 141.

[0055] 5 is a diagram showing a schematic cross-sectional configuration of a sensor element 10 according to an embodiment of the present disclosure. The sensor element 10 is applied to, for example, an infrared sensor using a compound semiconductor material such as a III-V group semiconductor.

[0056] The sensor element 10 has a photoelectric conversion function for light with wavelengths ranging from the visible region (e.g., 380 nm or more and less than 780 nm) to the short infrared region (e.g., 780 nm or more and less than 2500 nm). The sensor element 10 has a plurality of light-receiving unit regions (pixels 102) arranged, for example, two-dimensionally. Figure 5 shows the cross-sectional structure of a portion corresponding to three pixels 102.

[0057] The sensor element 10 has a layered structure of an element substrate 180 and a circuit substrate 190. One surface of the element substrate 180 is a light incident surface (light incident surface S1), and the surface opposite to the light incident surface S1 (the other surface) is a bonding surface (bonding surface S2) with the circuit substrate 190.

[0058] The element substrate 180 has, from the position closest to the circuit board 190, a wiring layer 180W including a first electrode 181, a semiconductor layer 180S, a second electrode 185, and a passivation film 186 in this order.

[0059] The surface of the semiconductor layer 180S facing the wiring layer 180W and the end faces (side faces) are covered with an insulating film 187. The circuit board 190 has a wiring layer 192W in contact with the bonding surface S2 of the element substrate 180, and a support substrate 191 facing the element substrate 180 with the wiring layer 192W in between.

[0060] An element region R1, which is an effective pixel region, is provided in the center of the element substrate 180, and a semiconductor layer 180S is disposed in this element region R1. In other words, the region in which the semiconductor layer 180S is provided is the element region R1.

[0061] A peripheral region R2 surrounding the element region R1 is provided outside the element region R1. An insulating film 187 and a buried layer 188 are provided in the peripheral region R2 of the element substrate 180. In the sensor element 10, light is incident from the light incident surface S1 of the element substrate 180 through the passivation film 186, the second electrode 185, and the second contact layer 184 onto the semiconductor layer 180S.

[0062] The signal charges photoelectrically converted in the semiconductor layer 180S move through the wiring layer 180W and are read out by the circuit board 190. The configuration of each part will be described below.

[0063] The wiring layer 180W is provided across the element region R1 and the peripheral region R2, and has a bonding surface S2 with the circuit board 190. In the sensor element 10, the bonding surface S2 of the element substrate 180 is provided in the element region R1 and the peripheral region R2, and for example, the bonding surface S2 of the element region R1 and the bonding surface S2 of the peripheral region R2 form the same plane.

[0064] As will be described later, in the sensor element 10, the embedded layer 188 is provided to form the bonding surface S2 of the peripheral region R2.

[0065] The wiring layer 180W has the first electrode 181 and contact electrodes 189EA and 189EB in, for example, interlayer insulating films 189A and 189B. For example, the interlayer insulating film 189B is disposed on the circuit board 190 side, and the interlayer insulating film 189A is disposed on the first contact layer 182 side, and these interlayer insulating films 189A and 189B are stacked.

[0066] The interlayer insulating films 189A and 189B are made of, for example, an inorganic insulating material. Examples of such inorganic insulating materials include silicon nitride, aluminum oxide, silicon oxide (SiO2), and hafnium oxide. The interlayer insulating films 189A and 189B may be made of the same inorganic insulating material.

[0067] The first electrode 181 is an electrode (anode) to which a voltage is supplied for reading out signal charges (holes or electrons; for convenience, the signal charges will be described as holes hereinafter) generated in the photoelectric conversion layer 183, and is provided for each pixel 102 in the element region R1.

[0068] The first electrode 181 provided on the wiring layer 180W is in contact with the semiconductor layer 180S (more specifically, the first contact layer 182 described below) via the interlayer insulating film 189A and a connection hole in the insulating film 187. Adjacent first electrodes 181 are electrically isolated by the interlayer insulating film 189B.

[0069] The first electrode 181 is made of, for example, any one of titanium, tungsten, titanium nitride (TiN), platinum, gold, germanium, palladium, zinc, nickel, and aluminum, or an alloy containing at least one of them.

[0070] The first electrode 181 may be a single film of such a constituent material, or may be a laminated film combining two or more types. For example, the first electrode 181 is made of a laminated film of titanium and tungsten.

[0071] The contact electrode 189EA is for electrically connecting the first electrode 181 and the circuit board 190, and is provided in the element region R1 for each pixel 102. Adjacent contact electrodes 189EA are electrically isolated by an interlayer insulating film 189B.

[0072] The contact electrode 189EB is for electrically connecting the second electrode 185 and a wiring (a wiring 192CB described later) of the circuit board 190, and is arranged in the peripheral region R2. The contact electrode 189EB is formed, for example, in the same process as the contact electrode 189EA. The contact electrodes 189EA and 189EB are formed, for example, of copper (Cu) pads, and are exposed on the bonding surface S2.

[0073] The semiconductor layer 180S includes, for example, from a position closest to the wiring layer 180W, a first contact layer 182, a photoelectric conversion layer 183, and a second contact layer 184. The first contact layer 182, the photoelectric conversion layer 183, and the second contact layer 184 have the same planar shape, and their respective end faces are disposed at the same position in a planar view.

[0074] The first contact layer 182 is provided, for example, in common to all pixels 102, and is disposed between the insulating film 187 and the photoelectric conversion layer 183. The first contact layer 182 serves to electrically separate adjacent pixels 102, and the first contact layer 182 is provided with, for example, a plurality of diffusion regions 182A.

[0075] Dark current can also be suppressed by using, for the first contact layer 182, a compound semiconductor material with a band gap larger than the band gap of the compound semiconductor material that constitutes the photoelectric conversion layer 183. For the first contact layer 182, for example, N-type InP can be used.

[0076] The diffusion regions 182A provided in the first contact layer 182 are spaced apart from one another. The diffusion region 182A is provided for each pixel 102, and the first electrode 181 is connected to each diffusion region 182A.

[0077] The diffusion region 182A is for reading out the signal charge generated in the photoelectric conversion layer 183 for each pixel 102, and contains, for example, p-type impurities. Examples of p-type impurities include Zn.

[0078] In this way, a pn junction interface is formed between the diffusion region 182A and the first contact layer 182 other than the diffusion region 182A, electrically isolating adjacent pixels 102. The diffusion region 182A is provided, for example, in the thickness direction of the first contact layer 182, and is also provided in a part of the thickness direction of the photoelectric conversion layer 183.

[0079] The photoelectric conversion layer 183 between the first electrode 181 and the second electrode 185, more specifically, between the first contact layer 182 and the second contact layer 184, is provided, for example, in common to all pixels 102.

[0080] The photoelectric conversion layer 183 absorbs light of a predetermined wavelength to generate signal charges, and is made of a compound semiconductor material such as an i-type III-V group semiconductor. Examples of the compound semiconductor material that makes up the photoelectric conversion layer 183 include InGaAs, InAsSb, InAs, InSb, and HgCdTe.

[0081] Alternatively, the photoelectric conversion layer 183 may be made of Ge. The photoelectric conversion layer 183 is configured to perform photoelectric conversion of light with wavelengths ranging from the visible region to the short infrared region, for example.

[0082] The second contact layer 184 is provided, for example, in common to all the pixels 102. The second contact layer 184 is provided between the photoelectric conversion layer 183 and the second electrode 185 and is in contact with them.

[0083] The second contact layer 184 is a region where charges discharged from the second electrode 185 move, and is made of, for example, a compound semiconductor containing N-type impurities. The second contact layer 184 can be made of, for example, N-type InP.

[0084] The second electrode 185 is provided, for example, as an electrode common to each pixel 102, on the second contact layer 184 (on the light incident side) so as to be in contact with the second contact layer 184. The second electrode 185 is used to discharge, of the charges generated in the photoelectric conversion layer 183, those not used as signal charges (cathode).

[0085] For example, when holes are read out as signal charges from first electrode 181, electrons can be discharged through second electrode 185. Second electrode 185 is made of a conductive film that is transmissive to incident light such as infrared light. For second electrode 185, for example, ITO (Indium Tin Oxide) or ITiO (In2O3-TiO2) can be used.

[0086] The passivation film 186 covers the second electrode 185 from the light incident surface S1 side. The passivation film 186 may have an anti-reflection function. The passivation film 186 may be made of, for example, silicon nitride, aluminum oxide, silicon oxide, or tantalum oxide.

[0087] The insulating film 187 is provided between the first contact layer 182 and the wiring layer 180W, and covers an end face of the first contact layer 182, an end face of the photoelectric conversion layer 183, an end face of the second contact layer 184, and an end face of the second electrode 185. The insulating film 187 is in contact with the passivation film 186 in the peripheral region R2.

[0088] The insulating film 187 is made of, for example, silicon oxide (SiO x The insulating film 187 may be formed of a laminated structure made up of a plurality of films.

[0089] The insulating film 187 may be made of a silicon (Si)-based insulating material such as silicon oxynitride (SiON), carbon-containing silicon oxide (SiOC), silicon nitride, and silicon carbide (SiC).

[0090] The embedded layer 188 is intended to fill in the step between a temporary substrate (not shown) and the semiconductor layer 180S in the manufacturing process of the sensor element 10. As will be described in detail later, in this embodiment, the embedded layer 188 is formed, thereby suppressing the occurrence of defects in the manufacturing process due to the step between the semiconductor layer 180S and the temporary substrate.

[0091] The buried layer 188 in the peripheral region R2 is provided between the wiring layer 180W and the passivation film 186, and has a thickness equal to or greater than the thickness of the semiconductor layer 180S. Here, the buried layer 188 is provided to surround the semiconductor layer 180S, so that a region (peripheral region R2) around the semiconductor layer 180S is formed.

[0092] This makes it possible to provide a bonding surface S2 in this peripheral region R2 with the circuit board 190. If the bonding surface S2 is formed in the peripheral region R2, the thickness of the buried layer 188 may be reduced; however, it is preferable that the buried layer 188 covers the semiconductor layer 180S throughout its thickness, and that the entire end face of the semiconductor layer 180S is covered by the buried layer 188.

[0093] The buried layer 188 covers the entire end face of the semiconductor layer 180S via the insulating film 187, thereby effectively preventing moisture from penetrating into the semiconductor layer 180S.

[0094] The surface of the buried layer 188 on the bonding surface S2 side is planarized, and in the peripheral region R2, the wiring layer 180W is provided on this planarized surface of the buried layer 188. The buried layer 188 may be made of an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, carbon-containing silicon oxide, or silicon carbide.

[0095] A through electrode 188V is provided in the buried layer 188. This through electrode 188V is for connecting the second electrode 185 to a wiring (a wiring 192CB described later) of the circuit board 190, and a part of this through electrode 188V is provided on the passivation film 186.

[0096] One of the through electrodes 188V penetrates the passivation film 186 from above the passivation film 186 and is connected to the second electrode 185. The other of the through electrodes 188V penetrates the passivation film 186, the insulating film 187, the buried layer 188, and the interlayer insulating film 189A from above the passivation film 186 and is connected to the contact electrode 189EB.

[0097] The support substrate 191 of the circuit board 190 is for supporting the wiring layer 192W and is made of, for example, silicon (Si). The wiring layer 192W has, for example, contact electrodes 192EA and 192EB, a pixel circuit 192CA, wiring 192CB, and a pad electrode 192P in an interlayer insulating film 192A.

[0098] The interlayer insulating film 192A is made of, for example, an inorganic insulating material, such as silicon nitride, aluminum oxide, silicon oxide, and hafnium oxide.

[0099] The contact electrode 192EA is for electrically connecting the first electrode 181 and the pixel circuit 192CA, and is in contact with the contact electrode 189EA on the bonding surface S2 of the element substrate 180. Adjacent contact electrodes 192EA are electrically isolated by an interlayer insulating film 192A.

[0100] The contact electrode 192EB is for electrically connecting the second electrode 185 and the wiring 192CB of the circuit board 190, and is in contact with the contact electrode 189EB on the bonding surface S2 of the element substrate 180. This contact electrode 192EB is formed, for example, in the same process as the contact electrode 192EA.

[0101] The through electrode 188V may be connected to the wiring 192CB without providing the contact electrodes 189EB and 192EB. The contact electrodes 192EA and 192EB are formed of, for example, copper pads, and are exposed on the surface of the circuit board 190 facing the element substrate 180.

[0102] That is, for example, CuCu junctions are formed between the contact electrodes 189EA and 192EA, and between the contact electrodes 189EB and 192EB.

[0103] The pixel circuit 192CA is provided for each pixel 102 and is connected to a contact electrode 192EA. The pixel circuit 192CA constitutes an ROIC. The wiring 192CB connected to the contact electrode 192EB is connected to a predetermined potential, for example.

[0104] In this way, one of the charges (for example, holes) generated in the photoelectric conversion layer 183 is read out from the first electrode 181 to the pixel circuit 192CA via the contact electrodes 189EA and 192EA.

[0105] The other of the charges (for example, electrons) generated in the photoelectric conversion layer 183 is discharged to a predetermined potential from the second electrode 185 via the through electrode 188V and the contact electrodes 189EB and 192EB.

[0106] The pad electrode 192P is for electrical connection to the outside. The sensor element 10 is provided with a hole H that penetrates the element substrate 180 and reaches the pad electrode 192P, and electrical connection to the outside is made through this hole H. The connection is made by a method such as wire bonding or a bump.

[0107] [Configuration of the sensor device] Next, a configuration of the sensor device 1 according to an embodiment will be described. Fig. 6 is a cross-sectional view showing an example configuration of the sensor device 1 according to an embodiment of the present disclosure, and Fig. 7 is a bottom view showing an example configuration of the sensor device 1 according to an embodiment of the present disclosure.

[0108] The sensor device 1 according to the embodiment has a package structure with the interior hermetically sealed, and is a sensor device in which light passing through a window member 60 is received by an internal sensor element 10. In the following description, for convenience, the side of the sensor device 1 on which the window member 60 is provided is defined as the upper side, and the up and down directions are indicated.

[0109] 6, the sensor device 1 according to the embodiment includes a sensor element 10, a Peltier element 20, an intermediate substrate 30, a package substrate 40, a plurality of pin terminals 50, a window member 60, and a support member 70. The plurality of pin terminals 50 are an example of external terminals.

[0110] The sensor element 10 has an effective pixel area 11 on a light receiving surface 10a, which is a main surface (top surface in the figure). In the effective pixel area 11, a plurality of the above-mentioned pixels 102 (see FIG. 1) that convert received light into an electrical signal are formed.

[0111] The sensor element 10 according to the embodiment is, for example, a SWIR (Short Wave Infrared) image sensor such as an InGaAs image sensor, etc. That is, the sensor element 10 according to the embodiment has pixels that convert light including the short wave infrared region (for example, light with a wavelength of 400 nm to 2500 nm) into an electric signal.

[0112] The Peltier element 20 has a cooling substrate 21, a columnar portion 22, and a heat dissipation substrate 23, and the cooling substrate 21, the columnar portion 22, and the heat dissipation substrate 23 are layered in this order from the top.

[0113] Fig. 8 is a top view showing an example configuration of the cooling substrate 21 of the Peltier element 20 according to the embodiment of the present disclosure. As shown in Fig. 8, the cooling substrate 21 has a metal layer ML1 formed of a copper thin film or the like and having a predetermined pattern formed on the surface facing the columnar portion 22 (the lower surface in Fig. 6). Note that for ease of understanding, Fig. 8 shows the arrangement of the metal layer ML1 when viewed from above.

[0114] 9 is a top view showing an example of the configuration of the heat dissipation substrate 23 of the Peltier element 20 according to an embodiment of the present disclosure. As shown in Fig. 9, the heat dissipation substrate 23 has a metal layer ML2 formed of a copper thin film or the like and having a predetermined pattern formed on the surface facing the columnar portion 22 (the upper surface in Fig. 6). In addition, a pair of electrodes 24 is provided at predetermined positions on the metal layer ML2 of the heat dissipation substrate 23.

[0115] Then, by sandwiching the columnar portion 22 between the cooling substrate 21 shown in Fig. 8 and the heat dissipation substrate 23 shown in Fig. 9, the Peltier element 20 is configured as shown in Fig. 10. Fig. 10 is a top view showing an example configuration of the Peltier element 20 according to an embodiment of the present disclosure.

[0116] As shown in FIG. 10, the metal layer ML1 of the cooling substrate 21 and the metal layer ML2 of the heat dissipation substrate 23 are aligned, and the columnar section 22 is placed in a location where both the metal layer ML1 and the metal layer ML2 are placed.

[0117] As a result, inside the Peltier element 20, a unicursal electric circuit is formed between one electrode 24 and the other electrode 24, which is formed by the metal layer ML1, the metal layer ML2 and the columnar portion 22.

[0118] The columnar portion 22 has a columnar P-type thermoelectric semiconductor and a columnar N-type thermoelectric semiconductor. One end of each of the P-type thermoelectric semiconductor and the N-type thermoelectric semiconductor is connected to the metal layer ML1, and the other end is connected to the metal layer ML2. The P-type thermoelectric semiconductor and the N-type thermoelectric semiconductor of the columnar portion 22 are alternately connected in series via the metal layer ML1 and the metal layer ML2.

[0119] As a result, in the Peltier element 20, when a direct current is applied from the N-type thermoelectric semiconductor, the cooling substrate 21 absorbs heat from the cooling surface 21a (see Figure 6) and is cooled, and the heat dissipation substrate 23 dissipates the heat absorbed by the cooling substrate 21 from the heat dissipation surface 23a (see Figure 6).

[0120] The cooling surface 21a is the surface of the cooling substrate 21 opposite to the surface to which the columnar section 22 is bonded (i.e., the surface on which the metal layer ML1 is disposed). The heat dissipation surface 23a is the surface of the heat dissipation substrate 23 opposite to the surface to which the columnar section 22 is bonded (i.e., the surface on which the metal layer ML2 is disposed).

[0121] Returning to the explanation of Fig. 6, the relay substrate 30 is disposed between the cooling surface 21a of the Peltier element 20 and the sensor element 10. For example, the sensor element 10 is bonded to the front surface 31 of the relay substrate 30 via an adhesive or the like (not shown), and the cooling surface 21a of the Peltier element 20 is bonded to the back surface 32 of the relay substrate 30 via an adhesive or the like (not shown).

[0122] As a result, the sensor element 10 is thermally connected to the cooling surface 21 a of the Peltier element 20 via the relay substrate 30 .

[0123] The relay substrate 30 also has a wiring layer (not shown) on the surface or inside thereof, and this wiring layer relays the electrical connection between the sensor element 10 and the package substrate 40 .

[0124] For example, the wiring layer of the relay substrate 30 and the sensor element 10 are electrically connected by a bonding wire 33. Furthermore, the wiring layer of the relay substrate 30 and a bonding pad (not shown) provided on the step portion 41b of the package substrate 40 are electrically connected by a bonding wire 34. This allows the relay substrate 30 to relay the electrical connection between the sensor element 10 and the package substrate 40.

[0125] The relay substrate 30 is, for example, an interposer substrate made of ceramic. Note that the relay substrate 30 is not limited to a ceramic substrate, and may be a resin printed circuit board or the like.

[0126] The package substrate 40 is made of ceramic having high thermal conductivity, such as alumina (Al2O3), aluminum nitride (AlN), or silicon nitride (Si3N4), and houses the sensor element 10, Peltier element 20, and relay substrate 30.

[0127] The package substrate 40 is a multilayer substrate made of ceramic such as alumina, for example, a PGA (Pin Grid Array) substrate. As shown in Fig. 6, the package substrate 40 has a first surface (for example, a top surface 42) and a second surface (for example, a bottom surface 43) located opposite the first surface.

[0128] In package substrate 40, multiple wirings are provided in a multi-layer structure inside the package substrate 40, located between top surface 42 and bottom surface 43. These wirings are connected to multiple terminals (for example, pin terminals 50) provided on bottom surface 43 of package substrate 40.

[0129] For example, the package substrate 40 has a substantially rectangular parallelepiped shape, and a recess 41 is formed on an upper surface 42. Then, on a bottom surface 41a of the recess 41, the Peltier element 20, the relay substrate 30, and the sensor element 10 are stacked in this order from the bottom.

[0130] Furthermore, a step portion 41b is provided at a location higher than the bottom surface 41a of the recess 41. A bonding pad provided at the step portion 41b and a corresponding wiring layer of the relay substrate 30 are electrically connected by a bonding wire 34.

[0131] Furthermore, the bonding pads provided on the stepped portions 41b are electrically connected to the pin terminals 50 provided on the bottom surface 43 of the package substrate 40 via wiring layers (not shown) formed on the surface or inside of the package substrate 40. In other words, the package substrate 40 functions as a relay substrate that relays the electrical connection between the relay substrate 30 and the pin terminals 50.

[0132] In this way, by forming the bonding pad on the step portion 41b, it is possible to reduce the distance between the bonding pad and the relay substrate 30. This allows the length of the bonding wire 34 to be shortened, thereby reducing the wiring resistance between the package substrate 40 and the relay substrate 30.

[0133] Therefore, according to the embodiment, the electrical characteristics of the sensor device 1 can be improved.

[0134] The bottom surface 43 and the multiple side surfaces 44 of the package substrate 40 are each substantially flat. As shown in Fig. 7, multiple pin terminals 50 are arranged in a matrix on the bottom surface 43 of the package substrate 40, and a flat bottom heat dissipation area 43a is provided in an area where the multiple pin terminals 50 are not arranged.

[0135] As shown in FIG. 6, each of the side surfaces 44 of the package substrate 40 is provided with a flat side heat dissipation area 44a.

[0136] The pin terminal 50 is made of a conductive material (for example, a metal) and has a substantially cylindrical shape. One end of the pin terminal 50 is electrically and mechanically connected to a wiring layer exposed from the bottom surface 43 of the package substrate 40, and the pin terminal 50 extends downward from the bottom surface 43.

[0137] In the embodiment, the multiple pin terminals 50 are electrically connected to an external device (not shown), so that power, control signals, etc. are input from the external device to the sensor device 1, and an electrical signal from the sensor element 10 is output to the external device.

[0138] Power is supplied from an external device to the electrodes 24 of the Peltier element 20 via terminals 45 provided on the bottom surface 41 a of the recess 41 in the package substrate 40 and bonding wires 25 connected to the terminals 45 .

[0139] The window member 60 is provided opposite the light receiving surface 10a (i.e., the effective pixel area 11) of the sensor element 10, and is made of borosilicate glass, which is a light-transmitting material. In the sensor device 1 according to the embodiment, light that has passed through the window member 60 is received by the effective pixel area 11 of the sensor element 10.

[0140] The support member 70 is disposed between the sensor element 10 and the window member 60 and supports the window member 60. The support member 70 has an opening 71 and a frame portion 72. The opening 71 is formed facing the light receiving surface 10a (i.e., the effective pixel area 11) of the sensor element 10 and allows incident light to pass through. The frame portion 72 has a frame shape and is disposed so as to surround the opening 71 and supports the window member 60.

[0141] The window member 60 is attached to the support member 70 so as to cover the opening 71, and is thereby supported by the support member 70. The window member 60 and the support member 70 are joined together without any gaps using low-melting point glass or the like.

[0142] Furthermore, the support member 70 is bonded to the upper surface 42 of the package substrate 40 so as to cover the recess 41 of the package substrate 40. The support member 70 and the package substrate 40 are bonded together without any gaps using an existing method.

[0143] In this way, by joining the window member 60 and the support member 70 without any gaps and joining the support member 70 and the package substrate 40 without any gaps, the sensor device 1 can hermetically seal the recess 41 of the package substrate 40.

[0144] When the recess 41 of the package substrate 40 is hermetically sealed, it is preferable to hermetically seal the recess 41 so as to maintain a low humidity state inside the recess 41. The support member 70 can be made of various materials such as metal materials and ceramic materials.

[0145] In the sensor device 1 according to the embodiment described above, the detection sensitivity of the sensor device 1 can be improved by configuring the window member 60 from borosilicate glass.

[0146] Fig. 11 is a diagram showing the wavelength dependence of the transmittance of the window member 60 of the example and the reference example. Fig. 11 shows the transmittance of the window member 60 made of borosilicate glass as the example, and the transmittance of the window member 60 made of sapphire glass as the reference example.

[0147] 11, the window member 60 of the reference example has regions where the transmittance decreases in the visible region and short-wave infrared region (for example, wavelengths of 400 nm to 2500 nm). On the other hand, the window member 60 of the example exhibits a stable, high transmittance throughout the same visible region and short-wave infrared region.

[0148] In this way, by constructing the window member 60 from borosilicate glass, which exhibits a stable and high transmittance throughout the entire visible and short-wave infrared ranges, the amount of light received by the sensor element 10 can be increased throughout the entire visible and short-wave infrared ranges.

[0149] Therefore, according to the embodiment, the detection sensitivity of the sensor device 1 can be improved.

[0150] In addition, in the embodiment, by configuring the window member 60 using borosilicate glass having crystalline isotropy, it is possible to suppress the influence of optical properties (for example, transmittance) on the axial direction of the crystal. Therefore, according to the embodiment, it is possible to realize a sensor device 1 with small variations in optical properties.

[0151] Furthermore, in the embodiment, the window member 60 is made of borosilicate glass, which has a small thermal expansion coefficient and high toughness, and thus the thermal shock resistance of the sensor device 1 can be improved.

[0152] Furthermore, in the embodiment, the window member 60 is made of borosilicate glass, which is relatively easy to process, and thus the processing costs of the sensor device 1 can be reduced.

[0153] Furthermore, in the embodiment, the sensor device 1 may be provided with a support member 70 that has an opening 71 and a frame portion 72 and supports the window member 60. This reduces the area of ​​the window member 60, which is relatively fragile, compared to when the window member 60 is directly bonded to the upper surface 42 of the package substrate 40, thereby preventing malfunctions of the sensor device 1 caused by the window member 60 being broken.

[0154] Therefore, according to the embodiment, the reliability of the sensor device 1 can be improved.

[0155] In the embodiment, the frame portion 72 may be disposed outside the effective pixel region 11 in a plan view, and the area of ​​the opening 71 may be larger than the area of ​​the effective pixel region 11. For example, in the embodiment, the opening angle of the opening 71 with respect to the effective pixel region 11 may be 30° or more.

[0156] This allows light from the detection target of the sensor device 1 to be guided to the effective pixel area 11 without being blocked by the support member 70. Therefore, according to the embodiment, the detection target can be stably detected.

[0157] In addition, in the embodiment, it is preferable that the window member 60 is disposed so as to cover the opening 71. That is, in the embodiment, it is preferable that the area of ​​the window member 60 is larger than the area of ​​the opening 71. This makes it possible to increase the overlap portion between the window member 60 and the support member 70, thereby preventing a gap from being generated between the window member 60 and the support member 70.

[0158] Therefore, according to the embodiment, it is possible to stably hermetically seal the inside of the recess 41 of the package substrate 40. Note that the window member 60 according to the embodiment is not limited to being arranged so as to cover the opening 71, and the window member 60 having approximately the same size as the opening 71 may be arranged so as to fit into the opening 71.

[0159] Furthermore, in the embodiment, the sensor element 10 is thermally connected to the cooling surface 21a of the Peltier element 20, so that even when a sensor element 10 that generates high heat during operation, such as a SWIR image sensor, is used, the sensor element 10 can operate stably.

[0160] 6, the cooling surface 21a of the Peltier element 20 is preferably larger than the surface of the sensor element 10 opposite the light receiving surface 10a. In other words, the cooling surface 21a of the Peltier element 20 is preferably larger than the sensor element 10 in plan view.

[0161] This allows the entire sensor element 10 to be cooled evenly by the Peltier element 20, thereby enabling the sensor element 10 to operate more stably.

[0162] 6 shows a case where the cooling surface 21a of the Peltier element 20 is larger than the sensor element 10 in a plan view. On the other hand, the cooling surface 21a of the Peltier element 20 may be substantially the same size as the sensor element 10, or as shown in Fig. 12, the cooling surface 21a of the Peltier element 20 may be smaller than the sensor element 10. Fig. 12 is a cross-sectional view showing a configuration example of the sensor device 1 according to a first modification of the embodiment of the present disclosure.

[0163] As shown in FIG. 12, by making the cooling surface 21a of the Peltier element 20 smaller than the sensor element 10 in plan view, the recess 41 can be made smaller, and therefore the sensor device 1 can be made smaller.

[0164] In the embodiment, in the package substrate 40 that accommodates the sensor element 10 and the Peltier element 20, the bottom surface 41a of the recess 41 in the package substrate 40 may be thermally connected to the heat dissipation surface 23a of the Peltier element 20.

[0165] As a result, in the sensor device 1 in which the Peltier element 20 and the sensor element 10 are hermetically sealed, heat generated in the sensor element 10 can be efficiently dissipated to the outside via the Peltier element 20 and the package substrate 40.

[0166] In addition, in the embodiment, since the Peltier element 20 and the sensor element 10 are hermetically sealed in a low humidity state, it is possible to prevent condensation from forming on the cooling surface 21a of the Peltier element 20 when the cooling surface 21a is cooled.

[0167] Furthermore, in the embodiment, by forming the package substrate 40 from ceramic, it is possible to increase the number of pixels of the sensor element 10 of the sensor device 1. The reason for this will be explained below.

[0168] 13 is a cross-sectional view showing a configuration example of a sensor device 1 according to a second modification of an embodiment of the present disclosure, and shows a sensor device 1 configured with a metal package substrate 90. As shown in FIG. 13, in the sensor device 1 of the second modification, the sensor element 10, the Peltier element 20, and the relay substrate 30 are housed in a recess 91 of the metal package substrate 90.

[0169] A plurality of pillar-shaped pin terminals 95 are provided on a bottom surface 91a of the recess 91. An insulating seal member 96 is provided between the pin terminals 95 and the package substrate 90 to ensure insulation between the pin terminals 95.

[0170] One end of the pin terminal 95 protrudes downward from the bottom surface 93 of the package substrate 90 , and the other end of the pin terminal 95 is electrically connected to the relay substrate 30 by a bonding wire 34 within the recess 91 .

[0171] 13, since the package substrate 90 is made of a conductive metal material, it is necessary to ensure the insulation of each pin terminal 95 with a sealing member 96. That is, in the example of Fig. 13, since space is required to provide the sealing member 96, it is difficult to reduce the distance between adjacent pin terminals 95, and therefore it is difficult to arrange multiple pin terminals 95 on the package substrate 90 at high density.

[0172] On the other hand, in the example of Fig. 6, since the package substrate 40 is made of insulating ceramic, there is no need to provide a separate member for ensuring insulation. Therefore, in the example of Fig. 6, by making the package substrate 40 out of ceramic, the distance between adjacent pin terminals 50 can be reduced.

[0173] Furthermore, in the ceramic package substrate 40, wiring layers can be provided three-dimensionally inside the package substrate 40, so that even when a large number of pin terminals 50 are arranged on the bottom surface 43, all of the pin terminals 50 can be individually wired.

[0174] That is, in the embodiment, even when the sensor element 10 has a large number of pixels, signals output from all the pixels can be sent to the corresponding pin terminals 50. Therefore, according to the embodiment, the sensor element 10 of the sensor device 1 can have a large number of pixels.

[0175] As shown in FIG. 13, even if the package substrate 90 of the sensor device 1 is made of metal, the detection sensitivity of the sensor device 1 can be improved by making the window member 60 of borosilicate glass.

[0176] 7, the pin terminals 50 and the Peltier element 20 may be provided at different positions in a plan view. This allows a heat dissipation device (not shown) to be directly attached to the bottom surface 43 at a position corresponding to the Peltier element 20 (i.e., directly below the Peltier element 20).

[0177] That is, in the embodiment, the heat transferred from the heat dissipation surface 23a of the Peltier element 20 to the bottom surface 43 of the package substrate 40 can be dissipated by the heat dissipation device without being obstructed by the pin terminals 50. Therefore, according to the embodiment, the heat dissipation performance of the sensor device 1 can be improved.

[0178] In the embodiment, as shown in FIG. 7, a bottom heat dissipation area 43a that is wider and flatter than the Peltier element 20 may be provided at a position on the bottom surface 43 of the package substrate 40 corresponding to the Peltier element 20.

[0179] This allows a heat dissipation device having an area larger than that of the Peltier element 20 to be provided in the bottom heat dissipation area 43a, thereby further improving the heat dissipation performance of the sensor device 1.

[0180] 7, a plurality of pin terminals 50 may be provided along two opposing sides of the bottom surface 43. This allows the heat dissipation device to be disposed protruding from the package substrate 40, thereby further improving the heat dissipation performance of the sensor device 1.

[0181] The bottom heat dissipation area 43a is not limited to being wider than the Peltier element 20, and may be substantially equal in size to the Peltier element 20, as shown in Fig. 14. Fig. 14 is a bottom view showing a configuration example of a sensor device 1 according to a third modification of the embodiment of the present disclosure.

[0182] As shown in FIG. 14, even if the bottom heat dissipation area 43a is approximately the same size as the Peltier element 20, by arranging the bottom heat dissipation area 43a so that it overlaps with the Peltier element 20, the heat from the Peltier element 20 can be dissipated without any problems by the heat dissipation device.

[0183] 14, a plurality of pin terminals 50 may be provided to surround the Peltier element 20 in a plan view. This allows a large number of pin terminals 50 to be provided on the package substrate 40, and therefore the heat dissipation device can be arranged to protrude from the package substrate 40. Therefore, according to the example of FIG. 14, the sensor element 10 of the sensor device 1 can have an even greater number of pixels.

[0184] 6, a flat side heat dissipation area 44a may be provided on the side surface 44 of the package substrate 40. This allows a heat dissipation device (not shown) to be provided in the side heat dissipation area 44a, thereby further improving the heat dissipation performance of the sensor device 1.

[0185] In the embodiment, an example is shown in which a flat bottom heat dissipation area 43a and a flat side heat dissipation area 44a are provided on the bottom surface 43 and the side surface 44 of the package substrate 40, but the bottom heat dissipation area 43a and the side heat dissipation area 44a are not limited to being flat.

[0186] For example, by providing unevenness in the bottom heat dissipation area 43a and the side heat dissipation area 44a, the surface area of ​​the bottom heat dissipation area 43a and the side heat dissipation area 44a can be increased, thereby improving the heat dissipation performance of the sensor device 1 without providing a separate heat dissipation device.

[0187] In the embodiment, a relay substrate 30 may be provided to relay the electrical connection between the package substrate 40 and the sensor element 10. This allows the thickness of the wiring between the package substrate 40 and the sensor element 10 to be thicker than the bonding wires 33 and 34, thereby reducing the wiring resistance between the package substrate 40 and the sensor element 10.

[0188] Therefore, according to the embodiment, it is possible to improve the electrical characteristics of the sensor device 1. Furthermore, in the embodiment, by mounting various mounted components (for example, capacitors, resistors, etc.) on the relay substrate 30, it is possible to make the sensor device 1 multifunctional.

[0189] In the embodiment, the sensor element 10 may be a SWIR image sensor, which allows the sensor device 1 to perform sensing using light with a wavelength longer than that of visible light.

[0190] The sensor element 10 according to the embodiment is not limited to a SWIR image sensor. For example, the sensor element 10 according to the embodiment may be a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor having pixels that convert light in the visible region into electrical signals.

[0191] Next, a case where the sensor element according to the embodiment is a CMOS image sensor having pixels that convert light in the visible region into an electric signal will be described with reference to FIGS. 15A to 17. FIG.

[0192] 15A and 15B are diagrams illustrating a substrate configuration of another example of a sensor element 10A according to an embodiment of the present disclosure. The sensor element 10A (see FIG. 16) is a semiconductor package in which a laminated substrate 213 configured by laminating a lower substrate 211 and an upper substrate 212 is packaged.

[0193] An R (red), G (green), or B (blue) color filter (not shown) and an on-chip lens (not shown) are formed on the upper surface of the upper substrate 212. In addition, the upper substrate 212 is connected to a glass protection substrate (not shown) for protecting the on-chip lens in a cavity-less structure via a glass seal resin (not shown).

[0194] 15A, a pixel region 221 in which pixel units that perform photoelectric conversion are arranged two-dimensionally, and a control circuit 222 that controls the pixel units are formed on the upper substrate 212. Also, a logic circuit 223 such as a signal processing circuit that processes pixel signals output from the pixel units is formed on the lower substrate 211.

[0195] Alternatively, as shown in FIG. 15B, a configuration may be adopted in which only the pixel region 221 is formed on the upper substrate 212, and the control circuit 222 and logic circuit 223 are formed on the lower substrate 211.

[0196] As described above, in the present disclosure, the logic circuit 223 or both the control circuit 222 and the logic circuit 223 are formed and stacked on the lower substrate 211, which is separate from the upper substrate 212 of the pixel region 221. This allows the size of the sensor element 10A to be reduced compared to when the pixel region 221, the control circuit 222, and the logic circuit 223 are arranged in the planar direction on a single semiconductor substrate.

[0197] In the following description, the upper substrate 212 on which at least the pixel region 221 is formed is referred to as a pixel sensor substrate, and the lower substrate 211 on which at least the logic circuit 223 is formed is referred to as a logic substrate.

[0198] 16 is a diagram showing an example of a circuit configuration of a laminated substrate 213 of another example sensor element 10A according to an embodiment of the present disclosure. The laminated substrate 213 includes a pixel array section 233 in which pixels 232 are arranged in a two-dimensional array, a vertical drive circuit 234, a column signal processing circuit 235, a horizontal drive circuit 236, an output circuit 237, a control circuit 238, input / output terminals 239, etc.

[0199] The pixel 232 includes a photodiode as a photoelectric conversion element and a plurality of pixel transistors. An example of the circuit configuration of the pixel 232 will be described later with reference to FIG.

[0200] The pixel 232 can also have a shared pixel structure. This pixel sharing structure is composed of multiple photodiodes, multiple transfer transistors, one shared floating diffusion, and one shared pixel transistor for each of the unit pixels. That is, in a shared pixel, the photodiodes and transfer transistors that make up multiple unit pixels share one pixel transistor for each of the unit pixels.

[0201] The control circuit 238 receives an input clock and data instructing the operation mode and the like, and outputs data such as internal information of the laminated substrate 213. That is, the control circuit 238 generates clock signals and control signals that serve as the basis for the operation of the vertical drive circuit 234, column signal processing circuit 235, horizontal drive circuit 236, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock.

[0202] The control circuit 238 then outputs the generated clock signal and control signal to the vertical drive circuit 234, the column signal processing circuit 235, the horizontal drive circuit 236, and the like.

[0203] The vertical drive circuit 234 is configured by, for example, a shift register, selects a predetermined pixel drive wiring 240, supplies a pulse to the selected pixel drive wiring 240 to drive the pixels 232, and drives the pixels 232 row by row.

[0204] That is, the vertical drive circuit 234 sequentially selects and scans each pixel 232 in the pixel array section 233 in the vertical direction on a row-by-row basis. Then, the vertical drive circuit 234 supplies a pixel signal based on a signal charge generated in the photoelectric conversion section of each pixel 232 according to the amount of received light to the column signal processing circuit 235 through a vertical signal line 241.

[0205] The column signal processing circuit 235 is arranged for each column of the pixels 232, and performs signal processing such as noise removal for each pixel column on signals output from one row of the pixels 232. For example, the column signal processing circuit 235 performs signal processing such as CDS and AD conversion to remove fixed pattern noise specific to the pixel.

[0206] The horizontal drive circuit 236 is configured, for example, by a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 235 in turn, causing each of the column signal processing circuits 235 to output a pixel signal to the horizontal signal line 242.

[0207] The output circuit 237 processes and outputs signals sequentially supplied from each of the column signal processing circuits 235 via a horizontal signal line 242. The output circuit 237 may perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, etc. The input / output terminal 239 exchanges signals with the outside.

[0208] The laminated substrate 213 configured as above is a CMOS image sensor called a column AD type, in which column signal processing circuits 235 that perform CDS processing and AD conversion processing are arranged for each pixel column.

[0209] 17 is a diagram showing an equivalent circuit of a pixel 232 of another example sensor element 10A according to an embodiment of the present disclosure. The pixel 232 shown in FIG. 17 shows a configuration that realizes an electronic global shutter function.

[0210] The pixel 232 includes a photodiode 251, a first transfer transistor 252, a memory unit 253, a second transfer transistor 254, an FD 255, a reset transistor 256, an amplification transistor 257, a selection transistor 258, and a discharge transistor 259. The photodiode 251 is an example of a photoelectric conversion element, and the FD 255 is a floating diffusion region.

[0211] The photodiode 251 is a photoelectric conversion unit that generates and accumulates electric charges (signal charges) according to the amount of received light. The anode terminal of the photodiode 251 is grounded, and the cathode terminal is connected to the memory unit 253 via the first transfer transistor 252. The cathode terminal of the photodiode 251 is also connected to a discharge transistor 259 for discharging unnecessary electric charges.

[0212] When the first transfer transistor 252 is turned on by a transfer signal TRX, it reads out the charge generated in the photodiode 251 and transfers it to the memory unit 253. The memory unit 253 is a charge holding unit that temporarily holds the charge until the charge is transferred to the FD 255.

[0213] When the second transfer transistor 254 is turned on by the transfer signal TRG, the second transfer transistor 254 reads out the charge held in the memory unit 253 and transfers it to the FD 255 .

[0214] The FD255 is a charge holding unit that holds the charge read out from the memory unit 253 in order to read it out as a signal. When the reset transistor 256 is turned on by a reset signal RST, the charge accumulated in the FD255 is discharged to a constant voltage source VDD, thereby resetting the potential of the FD255.

[0215] The amplification transistor 257 outputs a pixel signal according to the potential of the FD 255. That is, the amplification transistor 257 forms a source follower circuit together with the load MOS 260 as a constant current source.

[0216] Then, a pixel signal indicating a level according to the charge accumulated in the FD 255 is output from the amplification transistor 257 to the column signal processing circuit 235 (see FIG. 16) via the selection transistor 258. The load MOS 260 is arranged in the column signal processing circuit 235, for example.

[0217] When the pixel 232 is selected by the selection signal SEL, the selection transistor 258 is turned on and outputs the pixel signal of the pixel 232 to the column signal processing circuit 235 via the vertical signal line 241 .

[0218] When the discharge transistor 259 is turned on by a discharge signal OFG, it discharges unnecessary charges accumulated in the photodiode 251 to a constant voltage source VDD. The transfer signals TRX and TRG, the reset signal RST, the discharge signal OFG, and the selection signal SEL are supplied from the vertical drive circuit 234 via the pixel drive wiring 240.

[0219] Next, we will briefly explain the operation of the pixel 232. First, before the start of exposure, a high-level discharge signal OFG is supplied to the discharge transistor 259, turning on the discharge transistor 259, discharging the charge accumulated in the photodiode 251 to the constant voltage source VDD, and resetting the photodiodes 251 of all pixels.

[0220] After the photodiode 251 is reset, when the discharge transistor 259 is turned off by a low-level discharge signal OFG, exposure of all pixels in the pixel array section 233 begins.

[0221] When a predetermined exposure time has elapsed, the first transfer transistors 252 are turned on by a transfer signal TRX in all pixels of the pixel array unit 233, and the charges accumulated in the photodiodes 251 are transferred to the memory unit 253.

[0222] After the first transfer transistor 252 is turned off, the charges held in the memory unit 253 of each pixel 232 are read out row by row, sequentially, to the column signal processing circuit 235. In the readout operation, the second transfer transistor 254 of the pixel 232 in the readout row is turned on by a transfer signal TRG, and the charges held in the memory unit 253 are transferred to the FD 255.

[0223] When the selection transistor 258 is turned on by the selection signal SEL, a signal indicating a level according to the charge accumulated in the FD 255 is output from the amplification transistor 257 to the column signal processing circuit 235 via the selection transistor 258.

[0224] As described above, in the example of Figure 17, the exposure time is set to be the same for all pixels in the pixel array section 233, and after exposure is completed, charges are temporarily stored in the memory section 253, and global shutter type operation (imaging) is possible in which charges are read out sequentially row by row from the memory section 253.

[0225] The circuit configuration of the pixel 232 is not limited to the configuration shown in FIG. 17, and for example, a circuit configuration that does not have the memory unit 253 and operates by a so-called rolling shutter method can also be adopted.

[0226] [Other variations] Next, other modifications of the embodiment will be described with reference to Figures 18 to 25. Figure 18 is a plan view of a pixel array region 103 showing the pixel arrangement of charge emission pixels according to a fourth modification.

[0227] In this modification 4, an OPB (Optical Black) region for detecting a reference black level is formed as part of the pixel array region 103. The pixel structure of this modification 4 is a pixel structure in which an OPB region is formed as part of the pixel array region 103.

[0228] 18 , when the OPB region 163 is formed as part of the pixel array region 103, the OPB region 163 is composed of a plurality of columns and a plurality of rows that are the outermost on each side of the rectangular pixel array region 103. The innermost row and column of the OPB region 163 are set as the charge emission region 162.

[0229] The area inside the OPB area 163 of the pixel array area 103 is an effective pixel area where normal pixels 102A (see FIG. 19) that output pixel signals according to the amount of received light are arranged.

[0230] 19 is a cross-sectional view showing the structure of a pixel 102 according to Modification 4 of the embodiment of the present disclosure. As shown in FIG. 19, in the OPB region 163, OPB pixels 102C (102Ca, 102Cb) are arranged.

[0231] In the OPB pixel 102C, a light-shielding film 165 is formed above the N-type semiconductor thin film 141, which is the photoelectric conversion unit 121, instead of the color filter 146 and the on-chip lens 147. The light-shielding film 165 is formed of a metal material such as tungsten, aluminum, or gold.

[0232] For example, three OPB pixels 102C arranged in three rows or three columns are arranged in the OPB region 163. The innermost OPB pixel 102C (closer to the center of the pixel array region 103) is an OPB pixel 102Cb for discharging electric charge, in which the reset transistor 123 is controlled to be always on, as in the above-described embodiment.

[0233] On the other hand, in the OPB region 163 in which three OPB pixels 102C are arranged side by side in three rows or three columns, the outer two OPB pixels 102C are black level readout OPB pixels 102Ca that are controlled to read out the black level. The other configurations in Modification 4 are the same as those in the above-described embodiment.

[0234] For example, when high-intensity light is irradiated onto the pixel array region 103 of the sensor element 10, blooming may occur in the normal pixel 102A that is closest to the OPB region 163. In this case, blooming may affect the adjacent OPB pixel 102C, i.e., the innermost OPB pixel 102C of the OPB region 163.

[0235] Furthermore, light incident on the normal pixel 102A that is closest to the OPB region 163 may leak into the adjacent OPB pixel 102C, causing blooming in the adjacent OPB pixel 102C.

[0236] Therefore, in the fourth modification, the innermost OPB pixel 102C in the OPB region 163 is an OPB pixel 102Cb for discharging electric charges, in which the reset transistor 123 is controlled to be always on.

[0237] This allows the occurrence of blooming to be blocked by the charge-emitting OPB pixel 102Cb, preventing charge from flowing into the adjacent black level readout OPB pixel 102Ca. Therefore, according to Modification 4, it is possible to suppress image quality degradation due to the occurrence of blooming.

[0238] In addition, in the above-described embodiment, an example has been shown in which the external terminals of the sensor device 1 are pin terminals 50, but the external terminals of the sensor device 1 are not limited to pin terminals 50. Fig. 20 is a cross-sectional view showing an example configuration of a sensor device 1 according to a fifth modification of the embodiment of the present disclosure.

[0239] 20 , the sensor device 1 of the fifth modification example differs from the embodiment in that a connector 98 is provided as an external terminal instead of a pin terminal 50. The connector 98 is provided at a position on the bottom surface 43 that is different from the position corresponding to the Peltier element 20 (i.e., directly below the Peltier element 20), and is electrically connected to a wiring layer exposed from the bottom surface 43 of the package substrate 40.

[0240] In variant example 5, the connector 98 is electrically connected to an external device (not shown), so that power, control signals, etc. are input from the external device to the sensor device 1, and an electrical signal from the sensor element 10 is output to the external device.

[0241] In this modification 5, the external terminals are configured as connectors 98, so that the sensor device 1 can be easily attached to an external device (not shown). Note that in the present disclosure, the external terminals of the sensor device 1 are not limited to pin terminals 50 and connectors 98, and various types of external terminals can be used.

[0242] Fig. 21 is a cross-sectional view showing a configuration example of a sensor device 1 according to Modification 6 of the embodiment of the present disclosure. As shown in Fig. 21, the sensor device 1 of Modification 6 has a metal heat dissipation member 46 on at least a part of the surface of the package substrate 40 that faces the heat dissipation surface 23a of the Peltier element 20 (bottom surface 41a in the present disclosure).

[0243] That is, in the sensor device 1 of the sixth modification, the heat dissipation member 46 is exposed on the bottom surface 41a. Note that in the sensor device 1 of the sixth modification, an adhesive or the like may be interposed between the heat dissipation surface 23a of the Peltier element 20 and the bottom surface 41a.

[0244] The heat dissipation member 46 is made of a metal having high thermal conductivity, such as copper, aluminum, or tungsten. That is, in the package substrate 40 of the sixth modification, at least a part of the heat transfer path from the heat dissipation surface 23a of the Peltier element 20 to the bottom heat dissipation area 43a is made of a metal having a higher thermal conductivity than ceramic.

[0245] This improves the efficiency of heat transfer from the heat dissipation surface 23a of the Peltier element 20 to the bottom heat dissipation area 43a. Therefore, according to the sixth modification, the heat dissipation performance of the sensor device 1 can be improved.

[0246] In addition, in the sixth modification, the heat dissipation member 46 may penetrate between the bottom surface 43 and the surface (bottom surface 41a) of the package substrate 40 that faces the heat dissipation surface 23a of the Peltier element 20. This reduces the thermal resistance from the bottom surface 41a to the bottom heat dissipation area 43a, thereby further improving the heat dissipation performance of the sensor device 1.

[0247] 21, in the sixth modification, the heat dissipation member 46 may be provided on the entire surface of the package substrate 40 that faces the heat dissipation surface 23a of the Peltier element 20. This further reduces the thermal resistance from the bottom surface 41a to the bottom heat dissipation area 43a, thereby further improving the heat dissipation performance of the sensor device 1.

[0248] The heat dissipation member 46 is not limited to being provided on the entire surface of the package substrate 40 facing the heat dissipation surface 23a of the Peltier element 20. Fig. 22 is a cross-sectional view showing a configuration example of the sensor device 1 according to the seventh modification of the embodiment of the present disclosure.

[0249] 22, a plurality of via-shaped heat dissipation members 46 may be provided on the package substrate 40, penetrating between the surface (bottom surface 41a) facing the heat dissipation surface 23a of the Peltier element 20 and the bottom surface 43. In the example of Fig. 22, the thermal resistance from the bottom surface 41a to the bottom heat dissipation area 43a can also be reduced, thereby further improving the heat dissipation performance of the sensor device 1.

[0250] Although the sixth and seventh modifications have been described above as examples in which a metal material is used for the heat dissipation member 46, the heat dissipation member 46 is not necessarily limited to a metal material, and may be made of any material as long as it has a higher thermal conductivity than the ceramic that constitutes the package substrate 40. For example, the heat dissipation member 46 may be made of a ceramic material having a high thermal conductivity.

[0251] Furthermore, in the above-mentioned variants 6 and 7, examples have been shown in which the heat dissipation member 46 is exposed on the surface of the package substrate 40 facing the heat dissipation surface 23a of the Peltier element 20, but the heat dissipation member 46 does not necessarily have to be exposed on such a surface.

[0252] For example, the heat dissipation member 46 may be disposed in the package substrate 40 so as to be embedded directly below the Peltier element 20. That is, the heat dissipation member 46 may be disposed so as to overlap the Peltier element 20 in a plan view. This reduces the thermal resistance from the bottom surface 41a to the bottom heat dissipation area 43a, thereby further improving the heat dissipation performance of the sensor device 1.

[0253] Furthermore, the heat dissipation member 46 may be disposed at a location other than directly below the Peltier element 20 .

[0254] 23 is a cross-sectional view showing a configuration example of a sensor device 1 according to Modification 8 of the embodiment of the present disclosure. As shown in Fig. 23, the sensor device 1 of Modification 8 differs from the embodiment in the configuration of the Peltier element 20.

[0255] Specifically, in Modification 8, the package substrate 40 is configured integrally with the heat dissipation substrate 23 of the Peltier element 20. That is, in Modification 8, the metal layer ML2 shown in Fig. 9 is provided on the bottom surface 41a of the recess 41 in the package substrate 40, not on the heat dissipation substrate 23, and the columnar portion 22 and the cooling substrate 21 are stacked on the metal layer ML2 on the bottom surface 41a to configure the Peltier element 20.

[0256] In this way, by configuring the package substrate 40 integrally with the heat dissipation substrate 23 of the Peltier element 20, it is possible to reduce the thermal resistance at the interface between the heat dissipation substrate 23 and the package substrate 40. Furthermore, in Modification 8, the heat dissipation substrate 23 can be omitted, and therefore the heat transfer path from the sensor element 10 to the bottom heat dissipation area 43a can be shortened.

[0257] Therefore, according to the eighth modification, the heat dissipation performance of the sensor device 1 can be improved.

[0258] 24 is a cross-sectional view showing a configuration example of a sensor device 1 according to a ninth modification of the embodiment of the present disclosure. As shown in Fig. 24, the sensor device 1 of the ninth modification differs from the embodiment and the eighth modification in the configuration of the Peltier element 20.

[0259] Specifically, in Modification 9, the relay substrate 30 is integrally formed with the cooling substrate 21 of the Peltier element 20. That is, in Modification 9, the metal layer ML1 shown in FIG. 8 is provided on the rear surface 32 of the relay substrate 30, not on the cooling substrate 21, and the relay substrate 30 is further stacked on the stacked heat dissipation substrate 23 and columnar portion 22, thereby forming the Peltier element 20.

[0260] In this way, by configuring the relay substrate 30 integrally with the cooling substrate 21 of the Peltier element 20, it is possible to reduce the thermal resistance at the interface between the relay substrate 30 and the cooling substrate 21. Furthermore, in the 9th modification, the cooling substrate 21 can be omitted, and therefore the heat transfer path from the sensor element 10 to the bottom heat dissipation area 43a can be shortened.

[0261] Therefore, according to the ninth modification, the heat dissipation performance of the sensor device 1 can be improved.

[0262] Fig. 25 is a cross-sectional view showing a configuration example of a sensor device 1 according to a tenth modification of the embodiment of the present disclosure. As shown in Fig. 25, the sensor device 1 of the tenth modification differs from the embodiment in that a relay substrate 30 is not provided.

[0263] That is, in the tenth modification, the sensor element 10 is directly bonded to the cooling surface 21a of the Peltier element 20. Furthermore, the sensor element 10 and the package substrate 40 are directly electrically connected by bonding wires 33.

[0264] In the modification 10, the relay substrate 30 can be omitted, thereby shortening the heat transfer path from the sensor element 10 to the bottom heat dissipation area 43a. Therefore, the modification 10 can improve the heat dissipation performance of the sensor device 1.

[0265] Furthermore, in the tenth modification, the recess 41 can be made smaller by omitting the relay substrate 30, and therefore the sensor device 1 can be made smaller.

[0266] [effect] The sensor device 1 of the embodiment comprises a Peltier element 20, a sensor element 10 (10A) thermally connected to the cooling surface 21a of the Peltier element 20, and a window member 60 made of borosilicate glass and arranged opposite the light receiving surface 10a of the sensor element 10 (10A).

[0267] This allows the detection sensitivity of the sensor device 1 to be improved.

[0268] In the sensor device 1 according to the embodiment, an effective pixel area 11 that receives incident light from the window member 60 is arranged on the light receiving surface 10a of the sensor element 10 (10A).

[0269] This allows the detection sensitivity of the sensor device 1 to be improved.

[0270] The sensor device 1 according to the embodiment further includes a support member 70 disposed between the sensor element 10 (10A) and the window member 60. The support member 70 has an opening 71 that allows incident light to pass through, and a frame portion 72 that supports the window member 60.

[0271] This makes it possible to improve the reliability of the sensor device 1.

[0272] In addition, in the sensor device 1 according to the embodiment, the frame portion 72 is disposed outside the effective pixel area 11 in a plan view.

[0273] This allows the detection target to be detected stably.

[0274] In the sensor device 1 according to the embodiment, the area of ​​the opening 71 is larger than the area of ​​the effective pixel region 11.

[0275] This allows the detection target to be detected stably.

[0276] In the sensor device 1 according to the embodiment, the window member 60 is disposed so as to cover the opening 71 .

[0277] This allows the recess 41 of the package substrate 40 to be stably and hermetically sealed.

[0278] In the sensor device 1 according to the embodiment, the cooling surface 21a of the Peltier element 20 is larger than the surface of the sensor element 10 (10A) opposite to the light receiving surface 10a.

[0279] This allows the entire sensor element 10 (10A) to be cooled evenly by the Peltier element 20, thereby enabling the sensor element 10 (10A) to operate more stably.

[0280] The sensor device 1 according to the embodiment further includes a package substrate 40 that is thermally connected to the heat dissipation surface 23a of the Peltier element 20 and that houses the Peltier element 20 and the sensor element 10 (10A).

[0281] As a result, in the sensor device 1 in which the Peltier element 20 and the sensor element 10 (10A) are hermetically sealed, heat generated in the sensor element 10 (10A) can be efficiently dissipated to the outside via the Peltier element 20 and the package substrate 40.

[0282] In addition, the sensor device 1 according to the embodiment further includes a relay substrate 30 that is disposed between the cooling surface 21a of the Peltier element 20 and the sensor element 10 (10A) and relays the electrical connection between the package substrate 40 and the sensor element 10 (10A).

[0283] This makes it possible to improve the electrical characteristics of the sensor device 1.

[0284] In the sensor device 1 according to the embodiment, the sensor element 10 is a SWIR image sensor.

[0285] This allows the sensor device 1 to perform sensing using light with a wavelength longer than visible light.

[0286] Although the embodiments of the present disclosure have been described above, the technical scope of the present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present disclosure. Furthermore, components of different embodiments and modifications may be combined as appropriate.

[0287] For example, in the above embodiment, an example has been shown in which the terminal 45 of the package substrate 40 and the electrode 24 of the Peltier element 20 are electrically connected by the bonding wire 25, but the connection between the terminal 45 and the electrode 24 is not limited to the case in which it is connected by the bonding wire 25. For example, the terminal 45 and the electrode 24 may be electrically connected by a lead wire or the like.

[0288] Furthermore, the effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0289] The present technology can also be configured as follows. (1) A Peltier element, a sensor element thermally connected to a cooling surface of the Peltier element; a window member made of borosilicate glass and disposed opposite the light receiving surface of the sensor element; A sensor device comprising: (2) An effective pixel area for receiving incident light from the window member is disposed on the light receiving surface of the sensor element. The sensor device according to (1) above. (3) a support member disposed between the sensor element and the window member; The support member has an opening for passing the incident light and a frame for supporting the window member. The sensor device according to (2) above. (4) The frame portion is disposed outside the effective pixel area in a plan view. The sensor device according to (3) above. (5) The area of ​​the opening is larger than the area of ​​the effective pixel region. The sensor device according to (3) or (4). (6) The window member is disposed to cover the opening. The sensor device according to any one of (3) to (5). (7) The cooling surface of the Peltier element is larger than the surface of the sensor element opposite to the light receiving surface. The sensor device according to any one of (1) to (6). (8) The sensor device further includes a package substrate that is thermally connected to the heat dissipation surface of the Peltier element and that houses the Peltier element and the sensor element. The sensor device according to any one of (1) to (7). (9) The sensor element further includes a relay substrate disposed between the cooling surface of the Peltier element and the sensor element, the relay substrate relaying an electrical connection between the package substrate and the sensor element. The sensor device according to (8) above. (10) The sensor element is a SWIR (Short Wave InfraRed) image sensor. The sensor device according to any one of (1) to (9). [Explanation of symbols]

[0290] 1. Sensor device 10, 10A sensor element 10a Photosensitive surface 11 Effective pixel area 20 Peltier element 21 Cooling substrate 21a Cooling surface 22 Columnar part 23 Heat dissipation board 23a Heat dissipation surface 30 Relay board 40 Package substrate 41 Recess 41a Bottom 43 bottom 43a Bottom heat dissipation area 44 Side 44a Side heat dissipation area 46 Heat dissipation material 50-pin terminal (example of external terminal) 60 Window material 70 Support member 71 Opening 72 Frame

Claims

1. A Peltier element, a sensor element thermally connected to a cooling surface of the Peltier element; a window member provided opposite to a light receiving surface of the sensor element; a support member disposed between the sensor element and the window member; a relay substrate disposed between the cooling surface of the Peltier element and the sensor element, and relaying an electrical connection to the sensor element; a package substrate that is thermally connected to a heat dissipation surface of the Peltier element and that houses the Peltier element and the sensor element; Equipped with The relay substrate is accommodated in the package substrate and is disposed apart from the package substrate. Sensor device.

2. the support member has an opening portion through which incident light from the window member passes, and a frame portion that supports the window member, the area of ​​the opening is smaller than the area of ​​the relay substrate; the relay substrate is larger than the sensor element; The sensor element is smaller than the opening. The sensor device according to claim 1 .

3. An effective pixel area for receiving incident light from the window member is disposed on the light receiving surface of the sensor element. The sensor device according to claim 2 .

4. The frame portion is disposed outside the effective pixel area in a plan view. The sensor device according to claim 3 .

5. The area of ​​the opening is larger than the area of ​​the effective pixel region. The sensor device according to claim 3 or 4.

6. The window member is disposed to cover the opening. The sensor device according to any one of claims 2 to 5.

7. The cooling surface of the Peltier element is larger than the surface of the sensor element opposite to the light receiving surface. The sensor device according to any one of claims 1 to 6.

8. The sensor element is a SWIR (Short Wave InfraRed) image sensor. The sensor device according to any one of claims 1 to 7.

9. The window member is made of borosilicate glass. The sensor device according to any one of claims 1 to 8.

Images