Support structure and optoelectronic device
The support structure with structured metal electrodes and relief patterns addresses the challenge of high frequency bandwidth and brightness in OLEDs by optimizing light extraction and fluorescence lifetime.
Patent Information
- Application Number
- JP2025115835
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-18
- Filing Date
- 2025-07-09
- Publication Date
- 2026-01-29
Smart Images
Figure 2026015257000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to the field of optoelectronic devices, in particular for applications requiring high emission frequencies and / or high brightness.
[0002] More particularly, the present invention relates to light emitting diodes, for example organic light emitting diodes. [Background technology]
[0003] In the field of optical communications, the modulation speed of light sources is becoming increasingly important. Light sources are required to have increasingly higher frequency bandwidths. However, the increase in frequency must not come at the expense of brightness, as brightness must remain high to maintain a good level of signal transmission.
[0004] These demands pose real challenges for optoelectronic devices, and in particular for organic light-emitting diodes (OLEDs). Indeed, one of the parameters that limits the bandwidth is the fluorescence lifetime, which corresponds to the time it takes for an OLED to emit light. This time, which is in the range of a few nanoseconds, depends on the intrinsic properties of the molecules responsible for the fluorescence. This limits the bandwidth of OLEDs to a few hundred MHz.
[0005] However, it is known from the prior art that an effect called the "Purcell effect" makes it possible to modify the fluorescence lifetime of a molecule depending on its position in the OLED stack, in particular the distance separating the emissive layer from one of the OLED electrodes: in particular, it has been shown that the shorter the distance between the emissive layer and the electrode, the shorter the fluorescence lifetime.
[0006] Furthermore, by shortening the luminescent lifetime of phosphorescent materials due to the Purcell effect, it becomes possible to extend the lifetime (in terms of degradation) of optoelectronic devices.
[0007] However, bringing the light-emitting layer closer to one of the electrodes introduces another effect that is usually desirable to avoid: it reduces light extraction via plasmonic coupling, which corresponds to the excitation of plasmons at the electrode surface. These plasmons are planar waveguide modes that, after a certain propagation distance, are completely absorbed within the metallic plane of the electrodes.
[0008] In order to extract the light guided in the plasmon modes into air, it is known from the prior art to configure the electrodes accordingly.
[0009] In the case of OLEDs, it is known from the prior art to deposit thick layers of charge transport materials to limit potential short circuits. Although such a solution is sufficient in that it both limits short circuits and allows the guided light to be extracted into the air, it places a thick layer between the electrode and the stack containing the light-emitting layer, which separates the latter from the electrode, thus preventing the desired Purcell effect from being achieved.
[0010] Therefore, there is a need to find a support structure for optoelectronic devices that allows fast modulation of light emission while maintaining high brightness. Summary of the Invention
[0011] The present invention aims to propose a solution that addresses all or some of the above-mentioned problems.
[0012] This object may be achieved by providing a support structure for supporting a stack of semiconductor layers, the support structure comprising: an electronic control device comprising a substantially planar control electrode intended to send an electrical control signal to the stack, the electronic control device being configured to generate the electrical control signal; and relief patterns arranged on said control electrode, each said relief pattern being spaced from at least one other of said relief patterns by a distance corresponding to an integer multiple of a predetermined fixed pitch; - structured metal electrodes made of a material different from the relief patterns, the structured metal electrodes being arranged such that they have contact areas where they are in direct contact with the control electrodes and spacing areas where they are separated from the control electrodes by at least one of the relief patterns; It is equipped with:
[0013] The above mentioned configuration makes it possible to propose a support structure in which the operation of the optoelectronic device can be controlled by an electronic control device, which allows for fast and efficient implementation of light emission.
[0014] Indeed, the presence of the structured metal electrodes makes it possible to extract light according to an emission mode corresponding to a fixed pitch separating the relief patterns, while ensuring the continuity of the structured metal electrodes in contact with the light-emitting layer of the optoelectronic device.
[0015] It is therefore well understood that the control electrode and the structured metal electrode are electrically connected at the contact surface.
[0016] It is also well understood that the structured metal electrodes are electrically conductive.
[0017] Furthermore, the support structure may have one or more of the following features, either alone or in combination:
[0018] According to an embodiment, the structured metal electrode comprises silver, and it has been found that the use of such a metal makes it possible to limit the absorption of plasmons in the structured metal electrode, thereby facilitating the extraction of plasmons.
[0019] According to an embodiment, the control electrode is electrically conductive.
[0020] According to an embodiment, the relief pattern is electrically insulating.
[0021] According to an embodiment, the relief pattern comprises an insulating material.
[0022] According to an embodiment, the structured metal electrode has a substantially constant thickness.
[0023] According to an embodiment, the control electrode comprises a contact surface on which a relief pattern is arranged.
[0024] According to an embodiment, the structured metal electrode has a bottom surface facing the contact surface of the control electrode and a top surface opposite the bottom surface.
[0025] According to one embodiment, the height of one of the spacing areas is exactly greater than the height of one of the contact areas adjacent to said spacing area, said height being measured between the contact surface and the top surface and being substantially perpendicular to the contact surface.
[0026] It is thus possible to ensure a structured configuration of the upper surface of the metal electrode, which is similar to the configuration of a relief pattern.
[0027] According to an embodiment, the relief patterns are periodically arranged on the control electrodes according to a period corresponding to the same integer multiple of a predetermined fixed pitch.
[0028] For example, the relief patterns are arranged periodically according to a predetermined fixed pitch, with an integer multiple equal to one.
[0029] Thus, the deposition of a relief pattern is easier to perform.
[0030] According to an embodiment, the relief patterns are identical.
[0031] According to one embodiment, the relief pattern is rounded.
[0032] In other words, the relief pattern has a rounded surface facing away from the contact surface of the control electrode, and this rounded surface does not have any protruding edges.
[0033] This makes it possible to reduce the risk of breakage of the structured metal electrodes, especially at low thicknesses.
[0034] According to one embodiment, the electronic control device comprises a transistor, for example a complementary metal oxide semiconductor (CMOS) transistor.
[0035] This therefore allows for fast control of the structured metal electrodes by varying the electrical control signal, which is particularly suitable for high frequency applications.
[0036] According to one embodiment, the transistor is disposed in an inner layer of the support structure and has a terminal electrically connected to the control electrode through a hole (or via) passing through at least a portion of the thickness of said inner layer.
[0037] According to one embodiment, each relief pattern has a maximum thickness measured laterally to the contact surface of the control electrode in the range of 50 nm to 250 nm.
[0038] According to one embodiment, each relief pattern has a maximum thickness measured transversely to the contact surface of the control electrode in the range of 10 nm to 250 nm, in particular in the range of 30 nm to 100 nm.
[0039] It is thus possible to ensure that the thickness of the relief pattern is small enough so that there is no excessively large path difference between the contact area and the spacing area.
[0040] According to some embodiments, the relief pattern comprises ridges and / or dome-shaped protrusions, so that the structured metal electrode has a bumpy and / or wavy upper surface. Thus, the manufacture of the support structure is simplified.
[0041] The object of the present invention can also be achieved by realizing an optoelectronic device, said optoelectronic device comprising: a support structure as described above, a stack of semiconductor layers arranged on a structured metal electrode forming a first electrode, said stack comprising at least one light-emitting layer; a second electrode arranged on the laminate; Equipped with The first and second electrodes are arranged to allow propagation of an electrical control signal through the stack.
[0042] Thus, an optoelectronic device can be proposed in which the structured metal electrode configuration allows the initially plasmon-coupled light to be extracted outside the optoelectronic device while minimizing the distance separating the light-emitting layer from the structured metal electrode.
[0043] Furthermore, the optoelectronic device may have one or more of the following properties, either alone or in combination:
[0044] According to an embodiment, the predetermined fixed pitch is substantially equal to the emission wavelength of the light emitting layer.
[0045] According to an embodiment, the predetermined fixed pitch is in the range of 200 nm to 800 nm.
[0046] Thus, it becomes possible to excite localized plasmon modes at said emission wavelength, and thus light emission becomes more efficient.
[0047] According to one embodiment, the stack of semiconductor layers comprises an organic semiconductor layer and at least one organic light-emitting layer.
[0048] According to one embodiment, the distance separating the light-emitting layer and the structured metal electrode is less than 80 nm, in particular substantially equal to 30 nm.
[0049] In this way, it is possible to maximize the Purcell effect, which makes it possible to reduce the lifetime of the molecules present in the emissive layer, in particular in the case of fluorescent molecules.
[0050] The object of the present invention can also be achieved by realizing a manufacturing method for manufacturing the support structure described above, said manufacturing method comprising: a providing step in which an electronic control device is made available; an initial deposition step in which at least one primary layer is deposited on a control electrode of an electronic control device; - forming a relief pattern, in which portions of at least one primary layer are removed from a control electrode, said portions having a width measured in a plane parallel to the control electrode, said width being an integer multiple of a predetermined fixed pitch, and said removal of portions complementary to form a relief pattern; an electrode deposition step, in which a structured metal electrode is deposited on the relief pattern and the control electrode; Includes.
[0051] The above described configuration makes it possible to propose a method for manufacturing a support structure suitable for controlling the operation of an optoelectronic device by an electronic control device, allowing fast and efficient light emission.
[0052] Furthermore, the manufacturing method may have one or more of the following characteristics, either alone or in combination:
[0053] According to one embodiment, the primary layer deposited during the initial deposition step comprises a resin, and the step of forming a relief pattern comprises: an exposure step, in which the resin is exposed to light through an exposure mask; a developing step, in which the portions of the primary layer are removed by development with a developing solvent to form a complementary relief pattern; Includes.
[0054] It is thus possible to define relief patterns on the micrometer or nanometer scale.
[0055] According to an embodiment, the initial deposition step includes depositing an interlayer insulating layer on the control electrode, and then depositing a resin on the interlayer insulating layer, and the step of forming a relief pattern includes: an exposure step, in which the resin is exposed to light through an exposure mask; a developing step, in which said portions of the resin are removed by development with a developing solvent to form a complementary intermediate relief pattern; an etching step in which the resin and the interlayer insulating layer are etched to form a relief pattern; Includes.
[0056] The above arrangements make it possible to define alternative methods for forming relief patterns on the micrometer or nanometer scale.
[0057] According to one embodiment, the step of forming the relief pattern comprises a creeping step realized after the development step, in which the resin is heat treated at a creeping temperature so that the relief pattern or intermediate relief pattern is rounded.
[0058] In this way it is possible to produce rounded relief patterns which reduce the risk of breakage of the structured metal electrode, especially at low thicknesses. [Brief explanation of the drawings]
[0059] Other aspects, objects, advantages and features of the present invention will become more apparent upon reading the following detailed description of preferred embodiments, given by way of non-limiting examples of the present disclosure, with reference to the accompanying drawings. [Figure 1] FIG. 1 is a schematic cross-sectional view of a support structure according to a particular embodiment of the present invention. [Figure 2] FIG. 2 is a schematic cross-sectional view of an optoelectronic device according to a particular embodiment of the present invention. [Figure 3] FIG. 3 is a schematic top view of a support structure according to a particular embodiment of the present invention. [Figure 4] FIG. 4 is a schematic top view of a support structure according to a particular embodiment of the present invention. [Figure 5] FIG. 5 is a schematic diagram of a manufacturing method according to a particular embodiment of the present invention. [Figure 6] FIG. 6 is a schematic diagram of a manufacturing method according to a particular embodiment of the present invention. [Figure 7] FIG. 7 is a schematic illustration of a method for fabricating an optoelectronic device according to a particular embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0060] In the figures and the rest of the specification, the same reference numbers represent the same or similar elements. Additionally, to enhance clarity of the figures, the respective elements are not drawn to scale. Furthermore, the respective embodiments and variants are not mutually exclusive and may be combined with each other.
[0061] As illustrated in Figures 1 to 4, the present invention relates to a support structure 10 supporting a stack 40 of semiconductor layers. The present invention also relates to an optoelectronic device 1 comprising such a support structure 10 and such a stack 40.
[0062] As can be seen in FIG. 1 , the support structure 10 includes a substrate, designated "S," illustratively made of glass or silicon, and an electronic control device 3. The electronic control device 3 includes a substantially planar control electrode 5 intended for transmitting an electrical control signal. The electronic control device 3 is configured to generate the electrical control signal. For example, the electronic control device 3 is configured to vary an electrical control voltage applied to the control electrode 5. The control electrode 5 is typically a conductive metal electrode. For example, the control electrode 5 may include a material selected from silver, a copper-aluminum alloy, titanium nitride, or aluminum. By "substantially planar," we mean that the control electrode 5 has a contact surface fc5 that does not have any curved portions and that typically faces away from the substrate S. Typically, the roughness of the contact surface fc5 of the control electrode is less than 5 nm.
[0063] To control the control electrode 5, the electronic control device 3 may comprise at least one transistor, for example having a CMOS (complementary metal oxide semiconductor) structure. By using such a type of electronic control device 3, it is possible to form an optoelectronic device 1 with a high modulation speed of light emission, which is particularly suitable for optical communication applications.
[0064] As seen in Figures 1 and 2, the electronic control device 3 may be disposed on an inner layer 2 of the support structure 10 and may have terminals electrically connected to the control electrodes 5 through holes 4 (i.e., vias) that pass through at least a portion of the thickness of the inner layer 2.
[0065] At the contact surface fc5 of the control electrode 5, a relief pattern 21 is arranged on the control electrode 5. As a result, certain parts of the control electrode 5 are not covered by the relief pattern 21. Without being limited thereto, the relief pattern 21 may comprise an insulating material. In this case, the relief pattern 21 is electrically insulating.
[0066] Each relief pattern 21 is separated from at least one other of the relief patterns 21 by a distance indicated by "D", which corresponds to an integer multiple of a predetermined fixed pitch indicated by "P". In the figures, the distance D shown is equal to the fixed pitch P, i.e. the integer multiple is equal to 1. However, this is not limited to such a configuration, and it is entirely possible for the integer multiple to be greater than 1. For example, the predetermined fixed pitch P is in the range of 200 nm to 800 nm.
[0067] 1 to 4, the relief patterns 21 can be periodically arranged on the control electrode 5 according to a period corresponding to the same integer multiple of a predetermined fixed pitch P. For example, the relief patterns 21 can be periodically arranged according to the predetermined fixed pitch P. Thus, deposition of the relief patterns 21 can be more easily achieved. Furthermore, the relief patterns 21 can all be identical.
[0068] The relief pattern 21 may have a rounded outer surface facing away from the control electrode 5. In other words, the outer surface does not have any protruding corners, thereby reducing the risk of breakage of the structured metal electrode 30 deposited on the relief pattern 21, as will be explained below.
[0069] 3 and 4 illustrate two non-limiting variations of the support structure 10 in which the relief pattern 21 comprises ridges (FIG. 3) or dome-shaped protrusions (FIG. 4). However, it is possible to combine these two types of patterns with each other or with other equivalent patterns.
[0070] The support structure 10 finally comprises a structured metal electrode 30, typically arranged on the relief pattern 21 and on the control electrode 5. The structured metal electrode 30 is metallic and made of a different material than the relief pattern 21. For example, the structured metal electrode 30 may comprise indium-tin oxide (ITO), aluminum (AI), or the like.
[0071] The structured metal electrode 30 is arranged such that it has contact regions Zp where it is in direct contact with the control electrode 5 and spacing regions Ze where it is separated from the control electrode 5 by at least one of the relief patterns 21. The structured metal electrode 30 is therefore electrically conductive. For example, the structured metal electrode 30 comprises or is made of silver. Thus, plasmons are less likely to be absorbed in the structured metal electrode 30, which facilitates plasmon extraction. In general, the structured metal electrode 30 is continuous, in particular electrically continuous. This means that the structured metal electrode 30 has substantially the same electrical potential throughout its entirety.
[0072] By "structured" it is meant that the structured metal electrode 30 has at least one non-planar surface (in the absence of filler material) that delimits a set of reliefs corresponding to the relief pattern 21. The variants of Figures 3 and 4 each illustrate an embodiment in which the structured metal electrode 30 has a rough or corrugated upper surface fs30. Thus, the manufacture of the support structure 10 is simplified.
[0073] As mentioned above, and as can be seen in particular in Figures 1 and 2, the structured metal electrode 30 is spaced apart from the control electrode 5 by a spacing region Ze. In fact, the relief pattern 21 is located between the control electrode 5 and the structured metal electrode 30 in the spacing region Ze.
[0074] Conversely, in the contact region Zp, the control electrode 5 is electrically connected to the structured metal electrode 30. Typically, the control electrode 5 and the structured metal electrode 30 are in direct contact with each other in the contact region Zp.
[0075] The structured metal electrode 30 has a lower surface fi30 facing the contact surface fc5 of the control electrode 5, which is opposite to the upper surface fs30. In this case, it is preferable that the height h2 of one of the spacing regions Ze is exactly higher than the height h1 of one of the contact regions Zp adjacent to this spacing region Ze, and that these heights h1, h2 are measured between the contact surface fc5 and the upper surface fs30 and are substantially perpendicular to the contact surface fc5. It is thus possible to ensure a configuration of the upper surface fs30 of the structured metal electrode 30 similar to the configuration of the relief pattern 21.
[0076] According to a non-limiting embodiment, the structured metal electrode 30 may have a substantially constant thickness, indicated by "e." For example, the thickness of the structured metal electrode 30 may be in the range of 15 nm to 50 nm. Thus, it is possible to ensure a configuration of the structured metal electrode 30 similar to the configuration of the relief pattern 21.
[0077] Each relief pattern 21 may have a maximum thickness e20x measured transversely to the contact surface fc5 of the control electrode 5 in the range of 10 nm to 250 nm, in particular in the range of 30 nm to 100 nm. In this way, it is possible to ensure that the thickness of the relief pattern is small enough so that excessively large path differences do not occur between the contact areas Zp and the spacing areas Ze.
[0078] All the above mentioned configurations make it possible to propose a support structure 10 for controlling the operation of the optoelectronic device 1 by means of an electronic control device 3, which makes it possible to perform fast and efficient light emission.
[0079] Indeed, the presence of the structured metal electrode 30 makes it possible to extract light associated with a particular radiation mode, and the value of the fixed pitch P separating the relief patterns 21 makes it possible to direct the light thus extracted in a preferred direction. Furthermore, it is possible to ensure the continuity of the structured metal electrode 30, which is in contact with the light-emitting layer 41 of the optoelectronic device.
[0080] As mentioned above, the present invention also relates to an optoelectronic device 1, one embodiment of which is shown in Figure 2. The optoelectronic device 1 comprises a support structure 10 of any of the types described above and a stack of semiconductor layers 40 arranged on a structured metal electrode 30 forming a first electrode. The stack 40 comprises at least one light-emitting layer 41 configured to emit light in the vicinity of a predetermined wavelength, for example in the range of 400 nm to 1000 nm.
[0081] Although not limited thereto, the semiconductor layer stack 40 includes an organic semiconductor layer and at least one organic light-emitting layer 41.
[0082] Advantageously, the predetermined fixed pitch P can be selected to direct the light extracted by the structured metal electrodes in a preferred direction. Thus, the effective refractive index n of the plasmon mode eff , the sine of the radiation angle θ, the radiation wavelength λ of the light-emitting layer 41, and the following equation sin(θ)=n eff The pitch P can be selected according to / λ+K / P, where K is an integer. For example, the predetermined fixed pitch P may be substantially equal to the emission wavelength of the light-emitting layer 41. In general, the effective refractive index of the plasmon mode, n eff is in the range of 1.5 to 2. All the above configurations make it possible to excite localized plasmon modes at the emission wavelength, thus making the light emission more efficient.
[0083] Furthermore, the distance separating the luminescent layer 41 from the structured metal electrode 30 can be chosen to be less than 80 nm, in particular substantially equal to 30 nm, thus making it possible to maximize the Purcell effect and thereby improve the lifetime of the molecules present in the luminescent layer 41, in particular fluorescent molecules.
[0084] Synergistically, by using a predetermined fixed pitch P substantially equal to the emission wavelength of the light-emitting layer 41 and by arranging this light-emitting layer 41 at a distance less than 80 nm, in particular substantially equal to 30 nm, two a priori antagonisms can be realized that allow both the excitation of plasmon modes and the maximization of the Purcell effect.
[0085] Finally, the optoelectronic device 1 comprises a second electrode 6, which is typically at least partially transparent and is arranged on a surface of the stack 40 that is typically opposite to the structured metal electrode 30. In this way, the structured metal electrode 30 and the second electrode 6 are configured to apply a voltage to the stack of semiconductor layers 40, in particular to enable light emission by the light-emitting layer 41. In other words, the first electrode and the second electrode 6 are arranged to allow the propagation of an electrical control signal through the stack 40.
[0086] All of the above configurations make it possible to provide an optoelectronic device 1 in which the configuration of the structured metal electrode 30 allows for minimizing the distance D separating the light-emitting layer 41 from the structured metal electrode 30 while limiting absorption due to plasmon coupling.
[0087] The present invention also relates to a method for manufacturing a support structure 10 as described above, two embodiments of which are shown in FIGS.
[0088] Regardless of the embodiment, the manufacturing method first comprises a providing step E1 in which an electronic control device 3 is made available. Typically, the electronic control device 3 is encapsulated in an inner layer 2, which is itself deposited on a substrate S.
[0089] The manufacturing method then comprises an initial deposition step E2 in which at least one primary layer 22 is deposited on the control electrode 5 of the electronic control device 3 .
[0090] According to the embodiment illustrated in FIG. 5, the initial deposition step E2 comprises forming a primary layer 22 by depositing a resin 24.
[0091] 6, the initial deposition step E2 includes depositing an interlayer insulating layer 26 on the control electrode 5, and then depositing a resin 24 on the interlayer insulating layer 26. Thus, the primary layer 22 is formed by superposing the interlayer insulating layer 26 and the resin layer 24. In this case, the primary layer 22 is electrically insulating.
[0092] The manufacturing method then comprises a step E3 of forming a relief pattern, in which portions 23 of the at least one primary layer 22 are removed from the control electrode 5. The portions 23 so formed have a width L, measured in a plane parallel to the control electrode 5, which corresponds to an integer multiple of the predetermined fixed pitch P. The removal of the portions 23 thus forms a complementary relief pattern 21.
[0093] According to the embodiment of FIG. 5, the step E3 of forming a relief pattern comprises: an exposure step E31, in which the resin 24 is exposed to light by means of an exposure mask; a development step E32, in which the portions 23 of the primary layer 22 are removed by development in a developing solvent, thereby forming a complementary relief pattern 21; Includes.
[0094] Alternatively, as shown in FIG. 6, the step E3 of forming the relief pattern can be an exposure step E31, in which the resin 24 is exposed to light by means of an exposure mask; a development step E32, in which the portions 23 of the resin 24 are removed by development in a developing solvent, thereby forming a complementary intermediate relief pattern 25; an etching step E34, in which the resin 24 and the interlayer insulating layer 26 are etched by dry etching or wet etching to form a relief pattern 21; may include:
[0095] Such a step E3 of forming a relief pattern corresponds to the photolithography used in microelectronics, and therefore it is well understood by those skilled in the art that the resin, exposure mask and solvent to remove portions of the primary layer 22 upon development will be selected according to the intended application.
[0096] The above configuration makes it possible to define two alternative ways of producing a relief pattern 21 on the micrometer or nanometer scale.
[0097] Advantageously, the step E3 of forming the relief pattern may comprise a creeping step E33, which is carried out after the development step E32. During this creeping step E33, the resin 24 is subjected to a heat treatment at a creeping temperature in order to round the relief pattern 21 or the intermediate relief pattern 25. In this way, it is possible to form a rounded relief pattern 21, which reduces the risk of breakage of the structured metal electrode 30, especially in the case of small thicknesses e. It is therefore well understood that the use of resin creep makes it particularly easy to form rounded relief patterns.
[0098] According to the embodiment of FIG. 6, a creeping step E33 is performed between the development step E32 and the etching step E34.
[0099] Finally, the manufacturing method comprises an electrode deposition step E4, in which a structured metal electrode 30 is deposited on the relief pattern and on the control electrode 5. Typically, such deposition is carried out by depositing a metal by a method selected from chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, physical vapor deposition (PVD), pulsed laser deposition (PLD), said metal conforming to the structure formed by the relief pattern 21 on the control electrode 5, thereby forming the structured metal electrode 30.
[0100] The above described configuration makes it possible to propose a method for manufacturing a support structure 10 suitable for controlling the operation of the optoelectronic device 1 by means of an electronic control device 3, allowing fast and efficient light emission.
[0101] The present invention also relates to a method for manufacturing an optoelectronic device 1 as described above, which method comprises all the steps of the method for manufacturing the support structure 10 described above with reference to Figures 5 and 6.
[0102] The method for fabricating an optoelectronic device also includes the following steps, which are illustrated in FIG. 7: a stack-of-layers step E5, in which a stack 40 of semiconductor layers is deposited on the structured metal electrode 30, said stack 40 comprising at least one light-emitting layer 41, the deposition of the light-emitting layer 41 during this stack-of-layers step E5 being carried out in such a way that the distance separating the light-emitting layer 41 and the structured metal electrode 30 is less than 80 nm, in particular substantially equal to 30 nm, a step E5 of depositing a stack; a second electrode deposition step E6, in which a second electrode 6 is deposited on the stack 40; a second electrode deposition step E6; is.
[0103] The method for manufacturing an optoelectronic device 1 includes that during the step E3 of forming the relief pattern, the predetermined fixed pitch P is substantially equal to the emission wavelength of the light-emitting layer 41 .
[0104] For example, step E5 of depositing the stack can be carried out by thermal evaporation, in which case each layer of stack 40 is deposited by evaporation of the material corresponding to that layer, which is placed in a crucible and heated by the Joule effect so as to reach the evaporation temperature of the material, for example an organic material.
[0105] Each layer has a very specific function within the stack 40 due to its optoelectronic properties.
[0106] For example, stack 40 may include the following layers: HIL / HTL / EBL / EL / HBL / ETL / EIL, where: -HIL is a hole injection layer, e.g., molybdenum trioxide (M O O3), -HTL is a hole transport layer, e.g., STTB; -EBL is an electron blocking layer, e.g., NPB, -EL is a light-emitting layer 41, for example doped or undoped Alq3 (tris(8-quinolinolato)aluminum), -HBL is a hole blocking layer, e.g., BCP (bathocuproine), -ETL is an electron transport layer, e.g., Bphen (bathophenanthroline), -EIL is an electron injection layer, e.g., a metal element, is.
[0107] During the second electrode deposition step E6, the second electrode 6 may comprise aluminum (Al) or silver (Ag), or their equivalents.
[0108] In general, the manufacturing method may include depositing a sealing layer (not shown), such as an Al2O3 layer deposited by atomic layer deposition (ALD) techniques.
Claims
1. An optoelectronic device (1), comprising: a support structure (10), an electronic control device (3) comprising a substantially planar control electrode (5) intended to send an electrical control signal to the stack of semiconductor layers (40), the electronic control device (3) being configured to generate the electrical control signal; relief patterns (21) arranged on said control electrode (5), each of said relief patterns (21) being spaced from at least one other of said relief patterns (21) by a distance (D) corresponding to an integer multiple of a predetermined fixed pitch (P); a structured metal electrode (30) made of a material different from the relief patterns (21), the structured metal electrode (30) being arranged in such a way that it has contact areas (Zp) where it is in direct contact with the control electrode (5) and spacing areas (Ze) where it is separated from the control electrode (5) by at least one of the relief patterns (21); a support structure (10) comprising: a stack (40) of semiconductor layers arranged on said structured metal electrode (30) forming a first electrode, said stack (40) comprising at least one light-emitting layer (41); - a second electrode (6) arranged on said stack (40); Equipped with the first electrode and the second electrode (6) are arranged to allow propagation of the electrical control signal through the stack (40); the predetermined fixed pitch (P) is substantially equal to the emission wavelength of the light-emitting layer (41), and the distance between the light-emitting layer (41) and the structured metal electrode (30) is less than 80 nm, in particular substantially equal to 30 nm; Optoelectronic devices (1).
2. The relief pattern (21) comprises an insulating material. An optoelectronic device (1) according to claim 1.
3. the relief pattern (21) is periodically arranged on the control electrode (5) according to a period corresponding to an integer multiple of the predetermined fixed pitch (P); An optoelectronic device (1) according to claim 1 or 2.
4. The relief pattern (21) is rounded. An optoelectronic device (1) according to any one of claims 1-3.
5. The electronic control device (3) comprises a transistor. An optoelectronic device (1) according to any one of claims 1-4.
6. each said relief pattern (21) has a maximum thickness (e20x) measured in a direction transverse to the contact surface (fc5) of said control electrode (5) in the range of 50 nm to 250 nm; An optoelectronic device (1) according to any one of claims 1-5.
7. the relief pattern (21) comprises ridges and / or dome-shaped protrusions, so that the structured metal electrode (30) has a rough and / or corrugated upper surface (fs30); An optoelectronic device (1) according to any one of claims 1-6.
8. The semiconductor layer stack (40) comprises an organic semiconductor layer and at least one organic light-emitting layer (41). An optoelectronic device (1) according to claim 7.
9. the distance separating the light-emitting layer (41) and the structured metal electrode (30) is less than 80 nm, in particular substantially equal to 30 nm; An optoelectronic device (1) according to claim 8.
10. A method for manufacturing an optoelectronic device (1) according to any one of claims 1 to 9, said method comprising the steps of: a providing step (E1) in which said electronic control device (3) is made available; an initial deposition step (E2) in which at least one primary layer (22) is deposited on said control electrode (5) of said electronic control device (3); a step (E3) of forming a relief pattern, in which portions (23) of the at least one primary layer (22) are removed from the control electrodes (5), the portions (23) having a width (L) measured in a plane parallel to the control electrodes (5), the width (L) being an integer multiple of a predetermined fixed pitch (P), the removal of the portions (23) forming a complementary relief pattern (21); a first electrode deposition step (E4) in which the structured metal electrode (30) is deposited on the relief pattern (21) and on the control electrode (5); a stack deposition step (E5), in which a stack (40) of semiconductor layers is deposited on the structured metal electrode (30), the stack (40) comprising at least one light-emitting layer (41), the deposition of the light-emitting layer (41) during the stack deposition step (E5) being carried out in such a way that the distance between the light-emitting layer (41) and the structured metal electrode (30) is less than 80 nm, in particular substantially equal to 30 nm; a second electrode deposition step (E6) in which a second electrode (6) is deposited on the laminate (40); Equipped with During the step (E3) of forming the relief pattern, the predetermined fixed pitch (P) is substantially equal to the radiation wavelength of the light-emitting layer (41), Manufacturing method.
11. 11. The method of claim 10, wherein the primary layer (22) deposited during the initial deposition step (E2) comprises a resin (24), and the step (E3) of forming a relief pattern comprises: an exposure step (E31) in which said resin (24) is exposed to light by means of an exposure mask; a development step (E32) in which said portions (23) of said primary layer (22) are removed by development in a developing solvent, thereby forming said relief pattern (21) in a complementary manner; A manufacturing method comprising:
12. 11. The method of claim 10, wherein the initial deposition step (E2) comprises depositing an interlayer insulating layer (26) on the control electrode (5) and then depositing a resin (24) on the interlayer insulating layer (26), and the step (E3) of forming a relief pattern comprises: an exposure step (E31) in which the resin (24) is exposed to light by means of an exposure mask; a development step (E32) in which said portions (23) of said resin (24) are removed by development in a developing solvent, thereby forming a complementary intermediate relief pattern (25); an etching step (E34) in which the resin (24) and the interlayer insulating layer (26) are etched to form the relief pattern (21); A manufacturing method comprising:
13. 13. A method according to claim 11 or 12, wherein the step (E3) of forming a relief pattern comprises a creeping step (E33) realized after the developing step (E32), In the creep step, the resin (24) is heat-treated at a creep temperature so that the relief pattern (21) or the intermediate relief pattern (25) is rounded. Manufacturing method.