Plasma processing apparatus and plasma processing method

Abstract

To provide a plasma processing apparatus and a plasma processing method which improve the yield of processing by stably supplying high frequency power to an electrode during processing of a wafer.SOLUTION: The plasma processing apparatus includes a processing chamber which is disposed inside a vacuum container and in which plasma is formed in an inner space, a sample stage which is disposed in the processing chamber and on an upper surface of which a wafer to be processed is placed, first and second radio-frequency power supplies which supply first and second radio-frequency powers to an electrode disposed inside the sample stage via first and second matchers during processing of the wafer, and a controller which adjusts the supply of the first and second radio-frequency powers. The control part starts the operation of the matching device having the larger reflected wave of the first and second high-frequency powers in the first or second matching device, and after a predetermined time elapses or after the VSWR value of the matching device becomes equal to or less than a predetermined threshold value, switches to the other matching device to operate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a plasma processing apparatus and a plasma processing method, and more particularly to a plasma processing apparatus that includes a processing chamber in a vacuum vessel and a sample stage for placing a sample such as a semiconductor wafer therein, generates plasma in the processing chamber, and processes the sample, and supplies high-frequency power output from a high-frequency power supply to an electrode installed on the sample stage, and performs plasma control to process the sample. [Background technology]

[0002] International Publication No. 2021 / 157051 (Patent Document 1) proposes a technology for the above-described plasma processing apparatus. Patent Document 1 describes a plasma processing apparatus including a first electrode, a second electrode disposed outside the first electrode, a first high-frequency power supply that supplies high-frequency power to the first electrode via a first automatic impedance matching device and a first high-frequency transmission line, and a second high-frequency power supply that supplies high-frequency power to the second electrode via a second automatic impedance matching device and a second high-frequency transmission line. When high-frequency power is supplied from the first high-frequency power supply to the first electrode, setting the preset value of the second automatic impedance matching device to a predetermined value can prevent the high-frequency power output from the first high-frequency power supply from diverting to the second high-frequency transmission line via the plasma, thereby reducing variations in wafer processing results. In this case, the preset predetermined value of the second automatic impedance matching device is a value at which the impedance of the second high-frequency transmission line is greater than the impedance of the first high-frequency transmission line. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2021 / 157051 Summary of the Invention [Problem to be solved by the invention]

[0004] The above-mentioned prior art has had problems due to insufficient consideration of the following points.

[0005] In other words, Patent Document 1 describes the case where the magnitude of the second high-frequency power from the second high-frequency power source is below the matching start threshold of the second matching device, or where the second high-frequency power is not output, but does not fully consider the case where matching operations are required in both the first matching device and the second matching device.

[0006] In such a plasma processing apparatus, when RF powers of different frequencies are supplied in a superimposed manner, when the first and second RF power supplies output RF powers of different frequency components, the RF powers of each frequency component have different ion energy distributions, and therefore, due to changes in the load impedance caused by the RF power on the opposite side of each RF power supply, the impedance matching in the two automatic impedance matching devices for each RF power supply becomes unstable, making it difficult to stably apply RF power to the electrodes.This problem has not been taken into consideration in the prior art.

[0007] SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and to provide a plasma processing apparatus and a plasma processing method that can stably supply high frequency power to an electrode during wafer processing, thereby improving processing yield. [Means for solving the problem]

[0008] A brief summary of the representative aspects of the present invention is as follows.

[0009] A plasma processing apparatus according to one aspect of the present invention includes: A plasma processing apparatus comprising: a processing chamber arranged inside a vacuum vessel in which plasma is generated in an internal space; a sample stage arranged inside the processing chamber and having a wafer to be processed placed on an upper surface thereof; first and second high frequency power supplies that supply first and second high frequency powers to electrodes arranged inside the sample stage via first and second matching boxes during processing of the wafer; and a control unit that adjusts the supply of the first and second high frequency powers, After starting operation of the first or second matching box, whichever has the larger reflected wave of the first or second high-frequency power, the control unit switches to and operates the other matching box after a predetermined time has elapsed or after the VSWR value of that matching box has become equal to or less than a predetermined threshold.

[0010] Furthermore, a plasma processing method according to one aspect of the present invention includes: A plasma processing method comprising: placing a wafer to be processed on an upper surface of a sample stage disposed in a processing chamber disposed within a vacuum vessel; generating plasma in the processing chamber; and processing the wafer while supplying first and second high frequency powers to electrodes disposed within the sample stage via first and second matching boxes, After starting operation of the first or second matching box, whichever has the larger reflected wave of the first or second high frequency power, after a predetermined time has elapsed or after the VSWR value of that matching box has become equal to or less than a predetermined threshold, the other matching box is switched to operate. [Effects of the Invention]

[0011] According to the present invention, it is possible to provide a plasma processing apparatus or a plasma processing method that improves processing yield. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a vertical cross-sectional view showing a schematic configuration of a plasma processing apparatus (plasma etching apparatus) according to an embodiment. [Figure 2] FIG. 2 is a diagram showing a schematic outline of a configuration for supplying high-frequency power to the sample-holding electrode shown in FIG. [Figure 3] FIG. 3 is a flowchart outlining the impedance matching operation during superimposed output. [Figure 4] FIG. 4 is a flowchart showing the impedance matching operation during superimposed output when the first reflected wave detected by the first automatic impedance matching box immediately after the start of plasma processing (etching processing) is greater than the second reflected wave detected by the second automatic impedance matching box. [Figure 5] FIG. 5 is a flowchart showing the impedance matching operation during superimposed output when the second reflected wave detected by the second impedance matching box immediately after the start of plasma processing (etching processing) is larger than the first reflected wave detected by the first automatic impedance matching box. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, examples will be described with reference to the drawings. However, in the following description, the same components will be assigned the same reference numerals, and repeated explanations may be omitted. Note that the drawings may be more schematic than the actual embodiment in order to clarify the description, but they are merely examples and do not limit the interpretation of the present invention. [Example]

[0014] 1 to 5, a plasma processing apparatus or a plasma processing method according to an embodiment of the present invention will be described.

[0015] Fig. 1 is a longitudinal cross-sectional view showing the outline of the configuration of a plasma processing apparatus (plasma etching apparatus) according to an embodiment of the present invention. The plasma etching apparatus 100 of this embodiment shown in Fig. 1 supplies an electric field and a magnetic field for generating plasma to a processing chamber 101 disposed inside a vacuum vessel 108, and generates plasma efficiently by causing the respective movements of electrons due to the electric field and the magnetic field to resonate (Electron Cyclotron Resonance: ECR).

[0016] In the figure, a plasma etching apparatus 100 serving as a plasma processing apparatus includes a processing chamber 101, an electric field supply unit 102 serving as an electric field supply unit, a gas supply unit 103, a first high frequency power supply 104 and a second high frequency power supply 130 serving as high frequency power supply units, a first automatic impedance matcher (first matcher) 105 and a second automatic impedance matcher (second matcher) 131 serving as automatic matching circuits, a mixer 132 that combines high frequency transmission lines, and a control device 120. The control device 120 includes a control unit 106 and an apparatus CPU 107.

[0017] A processing chamber 101 in which plasma is generated in the internal space is disposed inside a vacuum vessel 108 that maintains a predetermined degree of vacuum. Also provided inside the vacuum vessel 108 are a shower plate 109 for introducing an etching gas, a dielectric window 110 for sealing the vacuum vessel 108, and a sample mounting electrode 116 as a sample stage for mounting a semiconductor wafer (also referred to as a sample or a wafer) 115 at a position opposite the shower plate 109.

[0018] Further, at the bottom of the processing chamber 101, there are disposed an exhaust opening / closing valve 111 for exhausting the vacuum vessel 108, an exhaust speed variable valve 112, and a vacuum exhaust device 113 for exhausting via the exhaust speed variable valve 112. Outside the processing chamber 101, there are disposed a plurality of magnetic field generating coils 114 for forming a magnetic field in the processing chamber 101.

[0019] The gas supply device 103 is provided to supply a gas, for example, an etching gas or an inert gas, and supplies the gas from a gas supply port provided between the shower plate 109 and a dielectric window 110 arranged at the top of the vacuum vessel 108 to the inside of the processing chamber 101 via the shower plate 109.

[0020] In order to propagate an electric field for generating plasma into the processing chamber 101, a waveguide 117 for propagating the electric field is disposed above the processing chamber 101. An electric field generated by oscillation from the microwave power supply 102 propagates through the inside of the waveguide 117 as an electric field for generating plasma, and the electric field is supplied from above to below into the processing chamber 101. In Example 1, for example, an electric field of a microwave having a frequency of 2.45 GHz is used.

[0021] The electric field irradiated into the processing chamber 101 via the waveguide 117 interacts with the magnetic field excited from the magnetic field generating coil 114 to generate electron cyclotron resonance, thereby ionizing the etching gas in the processing chamber 101. This ionization action generates high-density plasma.

[0022] Furthermore, a mixer 132 is connected to the sample mounting electrode 116. A first high frequency power supply 104 is connected to the mixer 132 via a first automatic impedance matching box 105. A second high frequency power supply 130 is connected to the mixer 132 via a second automatic impedance matching box 131.

[0023] The fundamental frequency (first radio frequency frequency) of the first radio frequency power output by the first radio frequency power supply 104 is, for example, 400 kHz, and the fundamental frequency (second radio frequency frequency) of the second radio frequency power output by the second radio frequency power supply 130 is, for example, 1.2 MHz. The first automatic impedance matching box 105 changes the impedance between the first radio frequency power supply 104 and the sample mounting electrode 116. The second automatic impedance matching box 131 changes the impedance between the second radio frequency power supply 130 and the sample mounting electrode 116.

[0024] The sample mounting electrode 116 is disposed inside the sample stage, and can be described as an electrode to which high frequency power is supplied from the first high frequency power supply 104 and the second high frequency power supply 130 during processing of the semiconductor wafer 115. In particular, in this embodiment, the sample mounting electrode 116 is configured so that high frequency powers of different wavelengths are supplied from the first high frequency power supply 104 and the second high frequency power supply 130 during processing of the semiconductor wafer 115.

[0025] Etching parameters such as the output, TM duty, and TM frequency of the first and second high frequency power supplies 104 and 130, which are preset in the device CPU 107, are sent to the control unit 106, which controls the output levels of the power supplied by the first and second high frequency power supplies 104 and 130. By controlling the output levels, the first and second high frequency power supplies 104 and 130 switch the output levels of their power supply in a predetermined periodic pattern. The power supplied from the first and second high frequency power supplies 104 and 130 is applied to the first automatic impedance matching box 105, the second automatic impedance matching box 131, the mixer 132, and the sample mounting electrode 116. By forming a bias potential on the wafer 115, the potential difference between the plasma potential of the generated plasma and the bias potential can attract charged particles in the plasma to the wafer 115.

[0026] The shower plate 109, sample mounting electrode 116, magnetic field generating coil 114, exhaust on-off valve 111, exhaust speed variable valve 112, and wafer 115 are arranged symmetrically with respect to the central axis of the processing chamber 101. Therefore, the flow of etching gas, radicals and ions generated by plasma, and reaction products generated by etching are introduced coaxially to the wafer 115 and exhausted coaxially. This symmetrical flow has the effect of improving the etching rate and the in-plane uniformity of the etched shape of the wafer 115.

[0027] An example of the configuration of a bias system for supplying high frequency power of two different frequencies to an electrode used in this embodiment will be described with reference to Fig. 2. Fig. 2 is a schematic diagram showing an outline of the configuration for supplying high frequency power to the sample mounting electrode of the embodiment shown in Fig. 1.

[0028] In this embodiment, a first high-frequency power supply 104 and a second high-frequency power supply 130, which have different output frequencies, are connected to a sample mounting electrode 116 on which a wafer 115 is mounted, via a mixer 132, a first automatic impedance matcher 105, and a second automatic impedance matcher 131. A susceptor ring 212 is disposed on the outer periphery of the circular upper surface of the sample mounting electrode 116 on which the wafer 115 is mounted, surrounding the outer periphery of the mounting surface. The sample mounting electrode 116 also includes a plurality of electrodes to which high-frequency power is supplied from the first and second high-frequency power supplies 104 and 130. In this embodiment, the sample mounting electrode 116 includes a central electrode portion 213 disposed in the center of a cylindrical sample stage, and an outer electrode portion 214 disposed in a ring shape around the outer periphery of the central electrode portion 213.

[0029] When superimposed high-frequency powers from the first and second high-frequency power supplies 104, 130 are supplied to the sample mounting electrode 116, forward power setting values ​​201 and 202 are first sent from the device CPU 107 to each of the high-frequency power supplies 104, 130 via the control unit 106. Upon receiving the forward power setting values ​​201, 202, each of the high-frequency power supplies 104, 130 starts outputting high-frequency power. The high-frequency powers output from each of the high-frequency power supplies 104, 130 are supplied to the mixer 132 via the first automatic impedance matching box 105 and the second automatic impedance matching box 131, respectively.

[0030] In mixer 132, the first high frequency power of the first frequency output from first high frequency power supply 104 is supplied to mixer 132, and then supplied to a first BEF (Band Eliminate Filter) 207 that passes the high frequency power of the first frequency and restricts the passage of high frequency power of the second frequency. Furthermore, the second high frequency power of the second frequency output from second high frequency power supply 130 is supplied to a second BEF 208 that allows the passage of high frequency power of the second frequency but restricts the passage of high frequency power of the first frequency. The respective high frequency powers that have passed through BEFs 207, 208 are superimposed at branch point 209.

[0031] The high-frequency power supplied to the branch point 209 is superimposed, passes through a DC component blocking capacitor, and is then supplied to the electrode center portion (electrode central portion) 213 and the electrode outer periphery 214. Meanwhile, the high-frequency power supplied to the branch points 210 and 211 passes through the first BEF 207 and the second BEF 208, respectively, and passes through a series resonant circuit composed of a coil and a variable capacitor, is superimposed, and is then supplied to the susceptor ring 212. Here, the susceptor ring 212 is a dielectric ring member provided on the electrode outer periphery 214, and has a conductive electrode arranged in a ring shape inside. By appropriately adjusting the magnitude of the high-frequency power supplied to the ring-shaped electrode in the susceptor ring 212 relative to the magnitude of the high-frequency power supplied to the electrode center portion 213 and the electrode outer periphery 214, the amount of charged particles such as ions in the plasma attracted to the outer periphery of the wafer 115 and the energy of their collision with the surface of the wafer 115 can be adjusted within desired ranges.

[0032] When the outputs from the first high frequency power supply 104 and the second high frequency power supply 130 are superimposed and supplied to the sample mounting electrode 116, the magnitudes of the first reflected wave 203 and the second reflected wave 204 detected by the first automatic impedance matching box 105 and the second automatic impedance matching box 131, respectively, are stored in the equipment CPU 107. The equipment CPU 107 compares the stored first reflected wave 203 and second reflected wave 204, and issues a command signal to the automatic impedance matching box (105 or 131) that detected the reflected wave determined to have the larger amplitude, causing the automatic impedance matching box to start impedance matching operation. When the VSWR (Voltage Standing Wave Ratio) value of the automatic impedance matching device (105 or 131) performing impedance matching becomes equal to or less than a preset threshold, or when the elapsed time since the start of impedance matching becomes equal to or more than a preset threshold, the device CPU 107 issues a command to switch between impedance matching operation start / stop commands 205 and 206 to each matching device (105, 131) via the control unit 106.

[0033] The impedance matching operation start / stop process will be described in detail later. As described above, the device CPU 107 switches the impedance matching operation start / stop commands (205, 206) for the first automatic impedance matching box 105 and the second automatic impedance matching box 131 depending on the VSWR value of each automatic impedance matching box (105, 131) and the elapsed time since the start of the impedance matching operation, thereby making it possible to suppress the influence of load impedance fluctuations due to the impedance matching operation of the automatic impedance matching box (131, 105) on the opposite side during the impedance matching operation of each automatic impedance matching box (105, 131).

[0034] As described above, when superimposed output is performed, either automatic impedance matching device (105, 131) can perform stable impedance matching operation, enabling stable supply of high frequency power to the electrodes (213, 214).

[0035] Next, the operation of equipment CPU 107 will be described with reference to Figures 3, 4, and 5. This operation is performed in a plasma processing method for processing semiconductor wafer 115 using plasma etching equipment 100. Figures 3, 4, and 5 are flowcharts that explain the selection of impedance matching operation targets for first automatic impedance matching box 105 and second automatic impedance matching box 131 by equipment CPU 107 and the timing of switching commands to start and stop the impedance matching operation, regarding the impedance matching operation during superimposed output. Each step will be described in the order of the step numbers shown in the figures.

[0036] FIG. 3 is a flowchart showing an outline of the impedance matching operation during superimposed output.

[0037] In step S300, the superimposed output is started.

[0038] In step S301, after the superimposed output is started, the first automatic impedance matching box 105 and the second automatic impedance matching box 131 send the magnitudes of the reflected waves (first reflected wave 203, second reflected wave 204) detected by the respective automatic impedance matching boxes 105, 131 to the device CPU 107. Thereafter, the device CPU 107 proceeds to step S302.

[0039] In step S302, the device CPU 107 compares the magnitudes of the reflected waves (first reflected wave 203, second reflected wave 204) detected by the automatic impedance matching boxes 105 and 131 stored in step S301. At this time, the first automatic impedance matching box 105 and the second automatic impedance matching box 131 have not yet started matching operations. Thereafter, the device CPU 107 proceeds to steps S303 and S304.

[0040] In steps S303 and S304, the device CPU 107 sends an impedance matching operation start command via the control unit 106 to the automatic impedance matching device (105 or 131) whose reflected wave value is larger as a result of comparing the first reflected wave 203 and the second reflected wave 204 in step S302, causing the target automatic impedance matching device (105 or 131) to start impedance matching operation. If the first reflected wave 203 is larger than the second reflected wave 204 (step S302: Yes), the process proceeds to step S303. If the second reflected wave 204 is larger than the first reflected wave 203 (step S302: No), the process proceeds to step S304. Thereafter, the device CPU 107 proceeds to step S305 or step S306.

[0041] In steps S305 and S306, after sending an impedance matching operation start command to each automatic impedance matching device (105, 131) in steps S303 and S304, the device CPU 107 and each automatic impedance matching device (105, 131) proceed to steps S305 and S306.

[0042] Details of the operations from step S305 onwards will be explained with reference to Fig. 4. Details of the operations from step S306 onwards are shown in Fig. 5.

[0043] Fig. 4 is a flowchart showing the impedance matching operation during superimposed output when the first reflected wave 203 detected by the first automatic impedance matching box 105 immediately after the start of plasma processing (etching processing) is larger than the second reflected wave 204 detected by the second automatic impedance matching box 131. Fig. 5 is a flowchart showing the impedance matching operation during superimposed output when the second reflected wave 204 detected by the second automatic impedance matching box 131 immediately after the start of plasma processing (etching processing) is larger than the first reflected wave 203 detected by the first automatic impedance matching box 105. The flow of operation in Fig. 5 differs from the flow of operation in Fig. 4 in that the operations of the first automatic impedance matching box 105 and the second automatic impedance matching box 131 in Fig. 4 are reversed.

[0044] First, the flowchart in FIG. 4 will be described.

[0045] In step S303, an impedance matching operation start command is sent to the first automatic impedance matching box 105, and the impedance matching operation is started in step S401. While high frequency power is being output from the first high frequency power supply 104, the magnitude of the amplitude of the first reflected wave 203 is stored in a storage device within the device CPU 107, and the VSWR (Voltage Standing Wave Ratio) of the first automatic impedance matching box 105 is calculated. In addition, the time elapsed since the first automatic impedance matching box 105 started the impedance matching operation is stored in the storage device within the device CPU 107.

[0046] The device CPU 107 compares a preset VSWR threshold with the VSWR calculated from the magnitude of the first reflected wave 203, and also compares a threshold for the elapsed time since the start of the impedance matching operation with the actual elapsed time since the start of the impedance matching operation. Thereafter, if it is determined that the VSWR calculated from the magnitude of the first reflected wave 203 is equal to or less than the preset threshold (xx) or that the elapsed time since the start of the impedance matching operation is equal to or greater than the preset threshold (yy) (step S401: Yes), the device CPU 107 proceeds to step S402. If it is determined that this is not the case (step S401: No), step S401 is repeated.

[0047] In step S402, an impedance matching operation stop command is sent from device CPU 107 to first automatic impedance matching device 105. Thereafter, device CPU 107 proceeds to step S403.

[0048] In step S403, the magnitude of second reflected wave 204 is stored in device CPU 107 before second automatic impedance matching box 131 starts impedance matching operation, and the VSWR in second automatic impedance matching box 131 is calculated. Device CPU 107 compares a preset VSWR threshold (xx) with the VSWR calculated from the magnitude of second reflected wave 204. Thereafter, if the VSWR calculated from the magnitude of second reflected wave 204 is equal to or greater than the preset threshold (xx) (step S403: Yes), device CPU 107 proceeds to step S404, and if not (step S403: No), proceeds to end.

[0049] In step S404, device CPU 107 transmits an impedance matching operation start command to second automatic impedance matching device 131. Thereafter, device CPU 107 proceeds to step S405.

[0050] In step S405, while high frequency power is being output from second high frequency power supply 130, the magnitude of second reflected wave 204 is stored in the storage device of device CPU 107, and the VSWR of second automatic impedance matching box 131 is calculated. In addition, the time elapsed since second automatic impedance matching box 131 started the impedance matching operation is stored in the storage device in device CPU 107.

[0051] Furthermore, the device CPU 107 compares a preset VSWR threshold (xx) with the VSWR calculated from the magnitude of the second reflected wave 204, and also compares a threshold (yy) of the elapsed time since the start of the impedance matching operation with the actual elapsed time since the start of the impedance matching operation. Thereafter, if the VSWR calculated from the magnitude of the second reflected wave 204 becomes equal to or less than the preset threshold (xx) or if the elapsed time since the start of the impedance matching operation becomes equal to or more than the preset threshold (yy) (step S405: Yes), the device CPU 107 proceeds to step S406, and if not (step S405: No), it repeats step S405.

[0052] In step S406, device CPU 107 sends an impedance matching operation stop command to second automatic impedance matching device 131. Thereafter, device CPU 107 proceeds to step S407.

[0053] In step S407, with the impedance matching operations of both the first automatic impedance matching box 105 and the second automatic impedance matching box 131 stopped, the device CPU 107 compares the VSWR calculated from the magnitude of the first reflected wave 203 with a preset threshold value (xx). If the VSWR calculated from the magnitude of the first reflected wave 203 is equal to or greater than the preset threshold value (xx) (step S407: Yes), the device CPU 107 proceeds to step S409. If the VSWR calculated from the magnitude of the first reflected wave 203 is equal to or less than the threshold value (xx) (step S407: No), the device CPU 107 proceeds to step S408.

[0054] In step S408, the device CPU 107 compares the VSWR calculated from the magnitude of the second reflected wave 204 with a preset threshold value (xx). If the VSWR calculated from the magnitude of the second reflected wave 204 is equal to or greater than the preset threshold value (xx) (step S408: Yes), the device CPU 107 proceeds to step S404. If the VSWR calculated from the second reflected wave 204 is equal to or less than the preset threshold value (xx) (step S408: No), the device CPU 107 considers that the impedance matching operation has been completed in both the first automatic impedance matching box 105 and the second automatic impedance matching box 131.

[0055] In step S409, the device CPU 107 sends an impedance matching operation start command to the first automatic impedance matching box 105, restarting the impedance matching operation in the first automatic impedance matching box 105. Thereafter, the device CPU 107 proceeds to step S401.

[0056] Next, the flowchart of FIG. 5 will be described.

[0057] In step S303, an impedance matching operation start command is sent to second automatic impedance matching box 131, and impedance matching operation is started in step S501. While high frequency power is being output from second high frequency power supply 130, the magnitude of the amplitude of second reflected wave 204 is stored in a storage device within device CPU 107, and a VSWR (Voltage Standing Wave Ratio) in second automatic impedance matching box 131 is calculated. In addition, the time elapsed since second automatic impedance matching box 131 started the impedance matching operation is stored in the storage device within device CPU 107.

[0058] The device CPU 107 compares a preset VSWR threshold with the VSWR calculated from the magnitude of the second reflected wave 204, and also compares a threshold for the elapsed time since the start of the impedance matching operation with the actual elapsed time since the start of the impedance matching operation. Thereafter, if it is determined that the VSWR calculated from the magnitude of the second reflected wave 204 is equal to or less than the preset threshold (xx) or that the elapsed time since the start of the impedance matching operation is equal to or greater than the preset threshold (yy) (step S501: Yes), the device CPU 107 proceeds to step S502. If it is determined that this is not the case (step S501: No), step S501 is repeated.

[0059] In step S502, an impedance matching operation stop command is sent from device CPU 107 to second automatic impedance matching device 131. Thereafter, device CPU 107 proceeds to step S503.

[0060] In step S503, before first automatic impedance matching box 105 has started impedance matching operation, the magnitude of first reflected wave 203 is stored in device CPU 107, and the VSWR of first automatic impedance matching box 105 is calculated. Device CPU 107 compares a preset VSWR threshold (xx) with the VSWR calculated from the magnitude of first reflected wave 203. Thereafter, if the VSWR calculated from the magnitude of first reflected wave 203 is equal to or greater than the preset threshold (xx) (step S503: Yes), device CPU 107 proceeds to step S504, and if not (step S503: No), proceeds to end.

[0061] In step S504, device CPU 107 transmits an impedance matching operation start command to first automatic impedance matching device 105. Thereafter, device CPU 107 proceeds to step S505.

[0062] In step S505, while high frequency power is being output from first high frequency power supply 104, the magnitude of first reflected wave 203 is stored in the storage device of device CPU 107, and the VSWR in first automatic impedance matching box 105 is calculated. In addition, the time elapsed since first automatic impedance matching box 105 started the impedance matching operation is stored in the storage device in device CPU 107.

[0063] Furthermore, the device CPU 107 compares a preset VSWR threshold (xx) with the VSWR calculated from the magnitude of the first reflected wave 203, and also compares a threshold (yy) of the elapsed time since the start of the impedance matching operation with the actual elapsed time since the start of the impedance matching operation. Thereafter, if the VSWR calculated from the magnitude of the first reflected wave 203 is equal to or less than the preset threshold (xx) or if the elapsed time since the start of the impedance matching operation is equal to or greater than the preset threshold (yy) (step S505: Yes), the device CPU 107 proceeds to step S506, and if not (step S505: No), it repeats step S505.

[0064] In step S506, device CPU 107 sends an impedance matching operation stop command to first automatic impedance matching device 105. Thereafter, device CPU 107 proceeds to step S507.

[0065] In step S507, with the impedance matching operations of both the first automatic impedance matching box 105 and the second automatic impedance matching box 131 stopped, the device CPU 107 compares the VSWR calculated from the magnitude of the second reflected wave 204 with a preset threshold value (xx). If the VSWR calculated from the magnitude of the second reflected wave 204 is equal to or greater than the preset threshold value (xx) (step S507: Yes), the device CPU 107 proceeds to step S509. If the VSWR calculated from the magnitude of the second reflected wave 204 is equal to or less than the threshold value (xx) (step S507: No), the device CPU 107 proceeds to step S508.

[0066] In step S508, the device CPU 107 compares the VSWR calculated from the magnitude of the first reflected wave 203 with a preset threshold value (xx). If the VSWR calculated from the magnitude of the first reflected wave 203 is equal to or greater than the preset threshold value (xx) (step S508: Yes), the device CPU 107 proceeds to step S504. If the VSWR calculated from the first reflected wave 203 is equal to or less than the preset threshold value (xx) (step S508: No), the device CPU 107 considers that the impedance matching operation has been completed in both the first automatic impedance matching box 105 and the second automatic impedance matching box 131.

[0067] In step S509, the device CPU 107 sends an impedance matching operation start command to the second automatic impedance matching box 131, restarting the impedance matching operation in the second automatic impedance matching box 131. Thereafter, the device CPU 107 proceeds to step S501.

[0068] As described above, by performing the impedance matching operations of the first automatic impedance matching device 105 and the second automatic impedance matching device 131 with a time difference during superimposed output, the influence of fluctuations in load impedance due to the impedance matching operation of the opposite automatic impedance matching device (105 or 131) can be suppressed during the impedance matching operation of each automatic impedance matching device (105, 131).

[0069] This makes it possible to apply stable high-frequency power to the electrodes even during superimposed output, thereby achieving stable plasma processing (etching processing) and improving the yield of plasma processing (etching processing).

[0070] As described above, the problem that the dimensions of the shape obtained as a result of wafer processing deviate from the intended dimensions and the yield of processing by the plasma processing apparatus is reduced is solved. [Explanation of symbols]

[0071] 100: Plasma etching equipment (plasma processing equipment) 101: Processing room 102: Electromagnetic wave supply section 103: Gas supply device 104: 1st high frequency power supply 105: First automatic impedance matching device 106: Control unit 107: Device CPU 108: Vacuum container 109: Shower plate 110: Dielectric window 111: Exhaust opening and closing valve 112: Variable exhaust speed valve 113: Vacuum exhaust device 114: Magnetic field generating coil 115: Semiconductor wafer (sample) 116: Electrode for placing sample (sample stage) 120: Control device 130:Second high frequency power supply 131: Second automatic impedance matching device 132: Mixer 201: Traveling wave power setting value for the first high frequency power source 202: Traveling wave power setting value for the second high frequency power source 203: 1st reflected wave 204:Second reflected wave 205: Impedance matching operation start / stop command to the first automatic impedance matching device 206: Impedance matching operation start / stop command to the second automatic impedance matching device 207: 1st BEF 208: 2nd BEF 209: Branching point 210: Branching point 211: Branching point 212: Susceptor ring 213: Electrode center 214: Electrode outer periphery.

Claims

1. A plasma processing apparatus comprising: a processing chamber arranged inside a vacuum vessel and in which plasma is generated in an internal space; a sample stage arranged inside the processing chamber and having a wafer to be processed placed on an upper surface thereof; first and second high frequency power supplies that supply first and second high frequency powers to electrodes arranged inside the sample stage via first and second matching boxes while the wafer is being processed; and a control unit that adjusts the supply of the first and second high frequency powers, The control unit starts operation of the first or second matching box, whichever has the larger reflected waves of the first and second high-frequency powers, and then switches to the other matching box and operates it after a predetermined time has elapsed or after the VSWR value of the matching box has become equal to or less than a predetermined threshold.

2. 2. The plasma processing apparatus according to claim 1, The control unit of the plasma processing apparatus stops the matching operation of one of the first and second matching boxes and starts operation of the matching box that has the larger reflected wave of the first or second high-frequency power.

3. 1. A plasma processing method comprising: placing a wafer to be processed on an upper surface of a sample stage disposed in a processing chamber disposed within a vacuum vessel; generating plasma in the processing chamber; and processing the wafer while supplying first and second high frequency powers to electrodes disposed within the sample stage via first and second matching boxes, A plasma processing method in which, after starting operation of either the first or second matching box, whichever has the larger reflected waves of the first and second high-frequency powers, the other matching box is switched to operate after a predetermined time has elapsed or after the VSWR value of the matching box has become equal to or less than a predetermined threshold.

4. 4. The plasma processing method according to claim 3, The plasma processing method includes stopping the matching operation of one of the first and second matching boxes, and starting the operation of the matching box that produces the larger reflected wave of the first or second high frequency power.

Images