Array type inductor

The array-type inductor design with multiple-part external electrodes and insulating layers addresses the dielectric breakdown issue in metal magnetic substrates, enabling miniaturization and high-density wiring for improved energy efficiency.

JP2026018339APending Publication Date: 2026-02-05TAIYO YUDEN KK
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Patent Information

Application Number
JP2024119656
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-25
Publication Date
2026-02-05

AI Technical Summary

Technical Problem

Conventional array-type inductors face challenges in miniaturization and energy efficiency due to increased risk of dielectric breakdown when inductor elements are densely arranged on substrates made of metal magnetic materials, which have lower insulation properties compared to ferrite substrates.

Method used

The array-type inductor design includes a plurality of inductor elements with external electrodes composed of multiple parts, where the distance between the second portions of the electrodes is greater than the distance between the first portions, and an insulating layer is placed between these second portions, ensuring d1 < d2 < dc, thereby reducing the risk of dielectric breakdown.

Benefits of technology

This configuration allows for densely packed inductor elements with reduced dielectric breakdown risk, enabling high-density wiring and improved energy efficiency by maintaining a sufficient area for wiring and securing stable connections.

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Abstract

To provide an array type inductor in which a plurality of inductor elements are densely provided and the risk of dielectric breakdown is reduced.SOLUTION: An array-type inductor including a plurality of inductor elements in a base body made of a magnetic material, each of the inductor elements including a conductor and an external electrode connected to the conductor, the external electrodes of the plurality of inductor elements being disposed on one surface of the base body so as to be separated from each other, the outer electrodes each have a first portion disposed on an outermost side and a second portion connecting the first portion and the conductors, an insulating layer is disposed between the second portions, and, for the inductor elements adjacent to each other, d1 <d2 <dc is satisfied, where d1 is a length between the first portions, d2 is a length between the second portions, and dc is a length between the conductors on the one surfaces.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to an array-type inductor having a plurality of inductor elements and used for being embedded in a substrate. [Background technology]

[0002] As a coil component, an array-type inductor having two or more inductor elements within a base made of a magnetic material is known. In an array-type inductor, multiple inductors are packaged into a single component. The array-type inductor includes a base, multiple conductors that are provided within the base and are spaced apart and insulated from one another within the base, and multiple external electrodes provided on the surface of the base. Each external electrode is connected to an end of one of the conductors. Conventional array-type inductors are described, for example, in Patent Documents 1 and 2.

[0003] Also known is a component-embedded substrate, in which electronic components such as coil components are embedded in the substrate. By embedding multiple coil components in the substrate, electronic components such as coil components can be mounted at a high density.

[0004] In a component-embedded board, the external electrodes of electronic components such as coil components are electrically connected to wiring through via conductors. The via conductors are formed by sealing the coil component placed in a cavity formed in an insulating layer of a printed circuit board with resin, irradiating the external electrodes of the resin-encapsulated coil component with a laser to form via holes, exposing the external electrodes, and then plating the via holes. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-153649 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-032424 Summary of the Invention [Problem to be solved by the invention]

[0006] In recent years, as electronic devices have become more multifunctional, there has been a demand for miniaturization of array inductors as well. To miniaturize array inductors, the pitch between inductor elements must be reduced, i.e., multiple inductor elements must be densely arranged. In addition, there is a demand for electronic devices to be more energy efficient, so reducing the wiring length and suppressing power distribution loss is being considered, particularly when array inductors are embedded in a substrate. In order to shorten the wiring length, it is effective to increase the area of ​​the external electrodes and increase the degree of freedom in the connected wiring.

[0007] However, if the area of ​​the external electrodes is increased when multiple inductor elements are densely arranged, the external electrodes arranged side by side on one surface of the substrate become too close to each other, increasing the risk of dielectric breakdown. In particular, when a substrate made of metal magnetic material particles made of soft magnetic material is used, magnetic saturation is less likely to occur than in a substrate made of ferrite. In a substrate made of metal magnetic material, the surfaces of the metal magnetic particles are covered with an insulating film to ensure insulation between conductors and between external electrodes. Because a substrate made of metal magnetic material has lower insulation properties than a substrate made of ferrite, array-type inductors with a substrate made of metal magnetic material are prone to short-circuit defects. Therefore, it has been difficult to obtain an array-type inductor that has multiple inductor elements densely arranged and has large external electrodes.

[0008] An object of the present disclosure is to provide an array-type inductor that includes a plurality of inductor elements closely spaced and has a reduced risk of dielectric breakdown. [Means for solving the problem]

[0009] One aspect of the present disclosure is an array-type inductor including a plurality of inductor elements within a base made of a metal magnetic material, wherein each of the inductor elements includes a conductor and an external electrode connected to the conductor, the external electrodes of the plurality of inductor elements are spaced apart from one another and arranged on one surface of the base, and each of the external electrodes has a first portion arranged on the outermost side and a second portion connecting the first portion and the conductor, and an insulating layer is arranged between the second portions, and between adjacent inductor elements, the distance between the first portions is d1, the distance between the second portions is d2, and the distance between the conductors on the one surface is dc, <d2<dcである。 [Effects of the Invention]

[0010] According to the present disclosure, it is possible to provide an array-type inductor that includes a plurality of inductor elements closely spaced and has a reduced risk of dielectric breakdown. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a perspective view of an array-type inductor according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a partially enlarged cross-sectional view taken along line II in FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line II-II in FIG. 2. [Figure 4] FIG. 3 is an enlarged view of a portion III in FIG. 2. [Figure 5] 1 is a cross-sectional view of a component-embedded substrate including an array-type inductor, taken along the thickness direction. [Figure 6] 1A to 1C are diagrams illustrating a method for manufacturing an array type inductor according to an embodiment. [Figure 7] 1A to 1C are diagrams illustrating a method for manufacturing an array type inductor according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Specific embodiments of the present disclosure will be described in detail below, but the present disclosure is not limited to such embodiments. In this specification and drawings, components having substantially the same functional configurations may be designated by the same reference numerals to avoid redundant description. The drawings are schematic diagrams shown to facilitate understanding of the present disclosure and are not necessarily drawn to scale. In the drawings, mutually orthogonal X-, Y-, and Z-axes are shown as axes defining a fixed coordinate system for the array inductor. In this specification, the extension direction of the X-axis is also referred to as the X-direction, the extension direction of the Y-axis as the Y-direction, and the extension direction of the Z-axis as the Z-direction.

[0013] <Basic structure of an array inductor> First, the basic structure of an array type inductor 1 according to the present disclosure will be described. Fig. 1 is a perspective view of an array type inductor 1 according to an embodiment of the present disclosure. Fig. 2 is a partially enlarged cross-sectional view taken along line II in Fig. 1. Fig. 3 is a cross-sectional view taken along line II-II in Fig. 2.

[0014] As shown in Fig. 2, the array inductor 1 includes multiple inductor elements 5A, 5B, ... within the base 10. Note that in Fig. 2, only the two inductor elements 5A and 5B on the right side are individually labeled, and individual labeling of the other inductor elements is omitted. Furthermore, when the multiple inductor elements 5A, 5B, ... included in the array inductor 1 are referred to collectively without distinction, they are simply referred to as inductor elements 5.

[0015] Each inductor element 5 may be, for example, an inductor element, a transformer, a filter such as a common mode choke coil, a capacitor, a resistor, etc. The multiple inductor elements 5 may all be the same or different. Therefore, for example, the multiple inductor elements 5 may all be inductor elements to form an array type or coupled type inductor component.

[0016] The array inductor 1 is suitable for use in a component-embedded wiring board, but may also be used in a component-mounted wiring board. Furthermore, a wiring board equipped with the array inductor 1 is used in electronic devices such as smartphones, tablets, game consoles, servers, and automotive electrical equipment.

[0017] 2, the multiple inductor elements 5 included in one array inductor 1 all have the same configuration, but the multiple inductor elements 5 may have different configurations. For example, the thickness, shape, and arrangement of the conductors, as well as the shape, size, and arrangement of the external electrodes, may be different among the inductor elements 5.

[0018] In the example shown in FIG. 2, the array inductor 1 has four inductor elements 5, but the number of inductor elements 5 is not limited to four. In other words, the array inductor 1 may include a number of inductor elements 5 other than four. Including multiple inductor elements 5 in one array inductor 1 allows the multiple inductor elements 5 to be densely mounted, contributing to the miniaturization of electronic devices incorporating the array inductor 1. This is also advantageous in that multiple inductor elements 5 can be mounted simultaneously in a single operation for mounting one array inductor 1, thereby reducing the complexity of the mounting operation. Furthermore, since there is no need to adjust the relative positions of the multiple inductor elements 5, the reliability of the wiring board on which the array inductor 1 is mounted and embedded, and ultimately of the electronic device on which the wiring board is mounted, can be improved.

[0019] 2, four inductor elements 5 are arranged in a row in the Y direction, but multiple inductor elements 5 may be arranged two-dimensionally. That is, multiple rows of inductor elements 5 arranged in one direction may be arranged in a direction perpendicular to the one direction. For example, multiple inductor elements 5 arranged in the Y direction may be arranged in the X direction.

[0020] The base 10 of the array inductor 1 may have a generally rectangular parallelepiped shape, as shown in FIG. 1 . The base 10 may have six surfaces that define its outer surface, specifically, a first main surface 10a, a second main surface 10b, a first side surface 10c, a second side surface 10d, a first end surface 10e, and a second end surface 10f. The first main surface 10a and the second main surface 10b face each other, the first side surface 10c and the second side surface 10d face each other, and the first end surface 10e and the second end surface 10f face each other. The areas of the first main surface 10a and the second main surface 10b are larger than the areas of the first side surface 10c, the second side surface 10d, the first end surface 10e, and the second end surface 10f. When constructing a wiring board in which the array inductor 1 is provided on a substrate, the array inductor 1 is arranged so that the planar direction (direction along the XY plane) along the first main surface 10a or the second main surface 10b is aligned with the planar direction of the substrate.

[0021] As shown in FIGS. 1 and 2, the direction in which the first main surface 10a and the second main surface 10b face each other (the direction in which the main surfaces 10a and 10b face each other) is the Z direction. The direction in which the first side surface 10c and the second side surface 10d face each other (the direction in which the side surfaces 10c and 10d face each other) is the X direction, and the direction in which the first end surface 10e and the second end surface 10f face each other (the direction in which the end surfaces 10e and 10f face each other) is the Y direction. In FIGS. 1 and 2, since the first main surface 10a is located on the upper side of the base 10, the first main surface 10a is sometimes referred to as the "upper surface" and the second main surface 10b is sometimes referred to as the "lower surface." The vertical direction of the base 10 is also referred to as the height direction and is the Z direction in the drawings. The longitudinal direction of the base 10 is also referred to as the length direction and is the Y direction in the drawings. Furthermore, the direction perpendicular to both the height direction (Z direction) and the length direction (Y direction) is also called the width direction, and is defined as the X direction in the drawings.

[0022] In Fig. 1, each of the faces 10a to 10f of the base 10 is shown as a flat surface, but each of the faces 10a to 10f may be a curved surface. Furthermore, each of the faces 10a to 10f is shown as being perpendicular to the adjacent faces, but each of the faces 10a to 10f does not necessarily have to be perpendicular to the adjacent faces. Furthermore, each vertex of the base 10 may be rounded, and the ridge lines of the base 10 (lines indicating the boundaries between adjacent faces among the faces 10a to 10f) may not be straight, but may be curved depending on the shape and arrangement of each of the faces 10a to 10f.

[0023] The height of the base 10, i.e., the distance between the opposing first and second main surfaces 10a and 10b (dimension in the Z direction), may be 0.5 mm or more and 2 mm or less. The width of the base 10, i.e., the distance between the opposing first and second side surfaces 10c and 10d (dimension in the X direction), may be 0.5 mm or more and 10 mm or less. The length of the base 10, i.e., the distance between the opposing first and second end surfaces 10e and 10f (dimension in the Y direction), may be 2 mm or more and 20 mm or less. The dimension of the base 10 in the Z direction may be smaller than the dimensions in the X and Y directions. The dimensions of the array-type inductor 1 are the dimensions of the base 10 plus the external electrodes 20, 20′ and, if necessary, the insulating layers 40, 40′, and are approximately equal to the dimensions of the base 10 described above.

[0024] The substrate 10 may be made of a metal magnetic material, and preferably contains metal magnetic particles. Alternatively, the substrate 10 may be a composite magnetic material containing metal magnetic particles and a binder, i.e., a metal composite. The substrate 10 made of a metal composite can be obtained, for example, by pressure molding a slurry obtained by kneading a composite magnetic material containing metal magnetic particles and a resin binder (also called a resin binder).

[0025] It is known that when the base 10 is made of a metal magnetic material, dielectric breakdown is relatively likely to occur. However, even in such a case, the arrangement of the external electrodes 20 and conductors 30 according to this embodiment reduces the risk of dielectric breakdown while providing a configuration in which the inductor elements 5 are densely arranged.

[0026] The metal magnetic particles contained in the substrate 10 may be a mixture of one type or multiple types of metal magnetic particles. The metal magnetic particles contained in the substrate 10 may contain one or more of iron (Fe), nickel (Ni), and cobalt (Co). Specific examples of materials constituting the metal particles include Fe, Fe-Ni alloy, Fe-Co alloy, Fe-Si alloy, Fe-Si-Al alloy, Fe-Si-Cr alloy, Fe-Si-Al-Cr alloy, Fe-Si-Cr-B alloy, and Fe-Si-Cr-BC. These metal magnetic particles can be used alone or in a mixture of two or more types to form mixed particles.

[0027] The binder contained in the substrate 10 may be an organic binder, an inorganic binder, or both. Resins, particularly thermosetting resins with excellent insulating properties, are preferred as organic binders. Specific examples of resin materials for binders include epoxy resins, polyimide resins, polystyrene (PS) resins, high-density polyethylene (HDPE) resins, polyoxymethylene (POM) resins, polycarbonate (PC) resins, polyvinylidene fluoride (PVDF) resins, phenolic resins, polytetrafluoroethylene (PTFE) resins, and polybenzoxazole (PBO) resins. Inorganic binders include inorganic oxides such as BO, NaO, SiO, ZnO, and PbO, as well as glass. The binders described above may be used singly or in combination.

[0028] The proportion of the metal magnetic particles to the entire substrate 10 may be 80% by volume or more. The proportion of the binder to the entire substrate 10 may be 3% by volume or more. The substrate 10 may contain voids, but the proportion of the voids to the entire substrate 10 may be less than 2% by volume.

[0029] The inductor element 5A includes a conductor 30A and one external electrode 20A and the other external electrode 20A' connected to the conductor 30A. Similarly, the inductor element 5B includes a conductor 30B and one external electrode 20B and the other external electrode 20B' connected to the conductor 30B. The remaining two inductor elements have a similar configuration. Here, the conductors 30A, 30B, ... may be referred to collectively without distinction as simply the conductor 30. Furthermore, the one external electrode 20A, 20B, ... may be referred to collectively without distinction as simply the external electrode 20, and the other external electrodes 20A', 20B', ... may be referred to collectively without distinction as simply the external electrode 20'.

[0030] 2, an insulating layer 40 is disposed on the first main surface 10a of the base 10, on which the external electrodes 20A, 20B, ... are arranged side by side. This insulating layer 40 is not shown in FIG.

[0031] 2, one external electrode 20 is provided on the first main surface 10a of the base 10, and the other external electrode 20' is provided on the second main surface 10b of the base 10. Therefore, one external electrode 20 and the other external electrode 20' face each other in the opposing direction of the main surfaces 10a and 10b, i.e., in the Z direction. Also, as shown in FIG. 2, one external electrode 20 is connected to one end of the conductor 30, and the other external electrode 20' is connected to the other end of the conductor 30.

[0032] The outer electrodes 20, 20' may include one or more of silver (Ag), copper (Cu), and nickel (Ni), and alloys thereof.

[0033] 2, one external electrode 20 has a first portion 21 disposed on the outermost side and a second portion 22 connecting the first portion 21 to the conductor 30. Similarly, the other external electrode 20' has a first portion 21' disposed on the outermost side and a second portion 22' connecting the first portion 21' to the conductor 30. The multi-layer structure of such external electrodes will be described in more detail later.

[0034] 2, the conductor 30 is embedded in the base 10 and is disposed so that both ends thereof are exposed from the first main surface 10a and the second main surface 10b of the base 10. The exposed both ends of the conductor 30 are connected to one external electrode 20 and the other external electrode 20', respectively.

[0035] The arrangement of the conductor 30 within the base 10 is not particularly limited. The conductor 30 may include curved portions or partially wound portions within the base 10. However, preferably, the conductor 30 may be arranged so as to extend from one external electrode 20 arranged on the first principal surface 10a toward the other external electrode 20' arranged on the second principal surface 10b, or from the other external electrode 20' arranged on the second principal surface 10b toward one external electrode 20 arranged on the first principal surface 10a. In other words, the conductor 30 may extend along the opposing direction between the first principal surface 10a and the second principal surface 10b, i.e., the Z direction. More preferably, the conductor 30 may be arranged partially or entirely linearly within the base 10. Arranging the conductor 30 partially, or preferably entirely linearly as shown in FIG. 2, allows the conductors 30 to be arranged closer to each other, thereby allowing the multiple inductor elements 5 to be arranged more densely, which is preferable and contributes to the miniaturization of the array inductor 1.

[0036] In this specification, "along a predetermined direction" does not only mean that the extending direction coincides with the predetermined direction, but also means that the extending direction deviates from the predetermined direction and forms an angle with the predetermined direction of preferably 10° or less, more preferably 5° or less. Furthermore, "linearly" arranging the conductor 30 means that the central axis CA (FIG. 4) of the conductor 30 is arranged along the opposing direction (Z direction) in which the first main surface 10a and the second main surface 10b oppose each other, preferably such that the direction of the central axis CA (FIG. 4) of the conductor coincides with the opposing direction (Z direction).

[0037] Furthermore, the cross-sectional shape of the conductor 30, i.e., the shape of a cross section cut in a direction perpendicular to the Z direction (a cross section cut along the XY plane), is not particularly limited and may be a polygon such as a rectangle, triangle, or pentagon, a circle, an ellipse, or the like. Furthermore, if the cross-sectional shape has vertices, the vertices may be rounded. The cross-sectional shape of the conductor 30 may be a substantially square with rounded vertices, as shown in FIG. 3.

[0038] The conductor 30 may include one or more of silver (Ag), copper (Cu), nickel (Ni), and alloys thereof. The conductor 30 may be formed by applying a conductor-forming material (such as a conductive paste) using plating, screen printing, or the like.

[0039] <Arrangement of inductor elements> Fig. 4 is an enlarged view of portion III in Fig. 2. Fig. 4 shows the portions of adjacent inductor elements 5A and 5B, among the multiple inductor elements 5, on the first main surface 10a side of the base 10.

[0040] In response to recent demands for miniaturization of components, it is preferable to arrange multiple inductor elements 5 as closely as possible within the base 10. Furthermore, the array inductor 1 is required to be capable of high-density wiring mounting with high precision in order to reduce power consumption, etc. To achieve this, it is conceivable to increase the area of ​​the external electrodes 20 to increase the degree of freedom in wiring. However, if the area of ​​the external electrodes is increased in an array inductor in which inductor elements are densely arranged, the external electrodes arranged side by side on one surface of the base will be too close to each other. This increases the risk of insulation breakdown and may impair the reliability of the array inductor.

[0041] In contrast, in the present embodiment, each of the external electrodes 20 is composed of a plurality of parts. In the example shown in FIG. 4, the external electrode 20 has a first part 21 disposed on the outermost side and a second part 22 that connects the first part 21 and the conductor 30. More specifically, the external electrode 20A has an outermost first part 21A and a second part 22A inside the first part 21A. Similarly, the external electrode 20B also has an outermost first part 21B and a second part 22B inside the first part 21B.

[0042] Since the external electrode 20 is composed of a plurality of layers, it is possible to endow different functions to each layer, and the function of the external electrode 20 can be improved.

[0043] As described above, the external electrode 20 may contain one or more components of silver (Ag), copper (Cu), nickel (Ni), and their alloys, and each of the first part 21 and the second part 22 may contain the above components. Note that the first part 21 and the second part 22 may be composed of the same material or different materials.

[0044] Furthermore, for adjacent inductor elements 5, the distance d2 between the second parts 22 is greater than the distance d1 between the first parts 21. That is, d1 < d2. In the example shown in FIG. 4, for adjacent inductor elements 5A and 5B, the distance d2 between the second part 22A of the external electrode 20A and the second part 22B of the external electrode 20B is greater than the distance d1 between the first part 21A of the external electrode 20A and the first part 21B of the external electrode 20B.

[0045] By setting d1 < d2, it is possible to increase the distance between the external electrodes 20 on the substrate 10 side while maintaining the size of the area of the outermost, externally exposed portion of the external electrode 20. When the above-mentioned dielectric breakdown occurs between the external electrodes 20, it is likely to occur on the side closer to the conductor 30 of the external electrode 20. More specifically, dielectric breakdown between the external electrodes 20 is likely to occur on the surface of the substrate 10 (the first main surface 10a in the example shown in FIG. 4). Therefore, by widening the interval between the second portions 22 of the external electrode 20, that is, by widening the interval between the portions of the external electrode 20 closer to the substrate 10, dielectric breakdown can be effectively prevented. Further, by narrowing the interval between the first portions 21 of the external electrode 20 that are externally exposed, it is possible to secure a larger area for the portion where wiring is installed during the mounting of the array-type inductor 1. As a result, the degree of freedom in wiring during the mounting of the array-type inductor 1 is increased, high-precision and high-density wiring can be obtained, and the above-mentioned power saving and the like become possible.

[0046] Furthermore, in each of the inductor elements 5, it is preferable that the area of the first portion 21 is larger than the area of the second portion 22 in a plan view. Thereby, the relationship of d1 < d2 can be obtained more reliably.

[0047] In this specification, "plan view" means looking in the direction toward one surface of the substrate 10 on which the external electrode 20 is provided with respect to the external electrode 20. In the example shown in FIG. 4, it means the direction toward the first main surface 10a of the substrate 10.

[0048] In each of the inductor elements 5, it is preferable that the second portion 22 is provided within the range of the first portion 21 in a plan view. With this configuration as well, the relationship of d1 < d2 can be obtained more reliably.

[0049] Furthermore, for adjacent inductor elements 5, the distance d2 between the second portions 22 is smaller than the distance dc between the conductors 30 on one surface of the conductors 30. That is, d2 < dc. In the example shown in FIG. 4, for adjacent inductor elements 5A and 5B, the distance d1 between the second portion 22A of the external electrode 20A and the second portion 22B of the external electrode 20B is smaller than the distance dc between the conductors 30A and 30B on the first main surface 10a of the substrate 10.

[0050] By setting d2 < dc, the risk of dielectric breakdown occurring between the conductors 30 can be reduced, so that the distance between the conductors 30 can be made closer. As a result, the inductor elements 5 can be densely arranged within the substrate 10, and a smaller and higher-performance array-type inductor 1 can be obtained. Further, as shown in FIGS. 2 and 4, even when the conductor 30 has no wound portion and extends linearly, and the conductors 30 are arranged closer to each other than in the case of a wound-type conductor, dielectric breakdown between the conductors 30 can be suppressed.

[0051] Furthermore, in each of the inductor elements 5, it is preferable that the area of the second portion 22 is larger than the area of the conductor 30 in a plan view. Thereby, the relationship of d2 < dc can be obtained more reliably.

[0052] Also, in each of the inductor elements 5, it is preferable that the conductor 30 is provided within the range of the second portion 22 in a plan view. This configuration can also more reliably obtain the relationship of d2 < dc.

[0053] Also, d1 < dc. That is, for adjacent inductor elements 5, the distance d1 between the first portions 21 is smaller than the distance dc between the conductors 30 on one surface of the conductors 30. In the example shown in FIG. 4, for adjacent inductor elements 5A and 5B, the distance d1 between the first portion 21A of the external electrode 20A and the first portion 21B of the external electrode 20B is smaller than the distance dc between the conductors 30A and 30B on the first main surface 10a of the substrate 10.

[0054] Since d1 < dc, it is possible to secure the area of the portion of the external electrode 20 that is exposed to the outside, increase the degree of freedom in wiring during mounting of the array-type inductor 1, and reduce the risk of dielectric breakdown occurring between the conductors 30. For this reason, it becomes possible to bring the conductors 30 closer to each other, and the inductor elements 5 can be arranged densely within the substrate 10.

[0055] Furthermore, in each of the inductor elements 5, it is preferable that, in a plan view, the area of the first portion 21 is larger than the area of the conductor 30. Thereby, the relationship with the above d1 < dc can be obtained more reliably.

[0056] In each of the inductor elements 5, it is preferable that, in a plan view, the conductor 30 is provided within the range of the first portion 21. Also with this configuration, the relationship with the above d1 < dc can be obtained more reliably.

[0057] Thus, in the present embodiment, for adjacent inductor elements 5, the distance between the first portions 21 is d1, the distance between the second portions 22 is d2, and the distance between the conductors 30 on the one surface where the external electrode 20 is disposed is dc, and d1 < d2 < dc. Thereby, in the array-type inductor 1 in which a plurality of inductor elements 5 are provided close to each other, it is possible to secure a sufficiently large area for the external electrode 20 to ensure a high degree of freedom in wiring during mounting, and to reduce the risk of dielectric breakdown. According to the present embodiment, even when the substrate 10 is made of a magneto-metallic material that is likely to cause dielectric breakdown, the effect of suppressing dielectric breakdown is sufficiently exhibited.

[0058] Furthermore, the value (d2 / d1) of the ratio of the distance d1 between the first portions 21 to the distance d2 between the second portions may preferably be 5 or more and 25 or less, more preferably 10 or more and 20 or less. When d2 / d1 is within the above range, it is possible to suppress the risk of dielectric breakdown between adjacent second portions 22, and thus dielectric breakdown of the entire external electrode 20, secure the area of the first portion 21, increase the degree of freedom in wiring during mounting, and improve the effect that dense wiring becomes possible.

[0059] The ratio (dc / d1) of the distance dc between the conductors 30 to the distance d1 between the first portions may preferably be 10 or more, and more preferably 20 or more. By keeping dc / d1 within the above range, the risk of dielectric breakdown that may occur between the conductors 30 inside the base 10 can be reduced. Furthermore, from the perspective of compacting the arrayed inductor 1 by densely arranging the inductor elements 5 within the base 10, dc / d1 may preferably be 40 or less, and more preferably 30 or less.

[0060] The overall thickness (length in the Z direction) of the external electrode 20 may be preferably 8 μm or more and 50 μm or less, and more preferably 15 μm or more and 35 μm or less. When the external electrode 20 is composed of a first portion 21 and a second portion 22, the thickness of the external electrode 20 may be the sum of the thickness of the first portion 21 and the thickness of the second portion 22.

[0061] The thickness of the first portion 21 may be preferably 3 μm or more and 20 μm or less, more preferably 5 μm or more and 15 μm or less. The thickness of the second portion 22 may be preferably 5 μm or more and 30 μm or less, more preferably 10 μm or more and 20 μm or less.

[0062] Furthermore, the thickness of the first portion 21 of the external electrode 20 may be greater or less than the thickness of the second portion 22. However, it is preferable that the thickness (t2) of the second portion 22 of the external electrode 20 is greater than the thickness (t1) of the first portion 21 (t2>t1), since this ensures the electrical characteristics of the connection portion between the second portion 22 and the conductor 30 and provides a stable connection. The ratio (t1 / t2) of the thickness (t1) of the first portion 21 to the thickness (t2) of the second portion 22 may preferably be 0.1 or greater and less than 1, and more preferably 0.25 or greater and 0.8 or less.

[0063] 4, an insulating layer 40 may be disposed between the second portions 22 of the external electrodes 20. The insulating layer 40 can further reduce the risk of dielectric breakdown between the second portions 22. Furthermore, by providing the insulating layer 40 on the surface of the base 10, the water absorption rate of the array inductor 1 can be reduced. The water absorption rate of the array inductor 1 according to this embodiment can be preferably 2% or less, and more preferably 1% or less.

[0064] The insulating layer 40 is preferably provided between the second portions 22 on the surface of the base 10 on which the external electrodes 20 are arranged, and is preferably provided over the entire area of ​​the surface other than the portion on which the second portions 22 are arranged.

[0065] The insulating layer 40 is preferably 10 8 Ω·cm or more, preferably 10 12 The insulating layer 40 may be made of a material having a resistivity of Ω·cm or more. The material that makes up the insulating layer 40 may be either an organic material or an inorganic material. Specific examples include resins such as epoxy resin and polyimide resin, oxides such as SiO2, ZnO, and Al2O3, and glass.

[0066] The thickness of the insulating layer 40 may be preferably 2 μm or more and 20 μm or less, and more preferably 5 μm or more and 8 μm or less. When the thickness of the insulating layer 40 is 2 μm or more, the insulating effect can be improved, and when the thickness of the insulating layer 40 is 10 μm or less, the array type inductor 1 can be made small in size. Furthermore, the thickness of the insulating layer 40 may be the same as the thickness of the second portion 22. This allows the thickness of the first portion 21 arranged outside the insulating layer 40 and the second portion 22 to be uniform.

[0067] <Platform-type inductor embedded substrate> The array inductor 1 described above can preferably be built into a substrate to provide a component-embedded substrate (also referred to as an array-inductor-embedded substrate). FIG. 5 shows a schematic diagram of a component-embedded substrate 80 having the array inductor 1 built in as an example. In FIG. 5, the detailed configuration of the external electrodes 20, 20′ of the array inductor 1 and the arrangement of the insulating layer 40 are omitted. The component-embedded substrate 80 can be formed, for example, by placing the array inductor 1 in a through hole 81a formed in a substrate 81, sealing with resin, forming a via hole by irradiating a laser toward the external electrode 20, exposing the external electrode 20, and connecting wiring 83 to the external electrode 20 of the array inductor 1 by plating the via hole, and then sealing the array inductor 1 with sealing resin 82 on both the first principal surface 10a and the second principal surface 10b.

[0068] Compared to component-mounted wiring boards in which components are mounted on the main surface of the board, such component-embedded substrates 80 have the advantage of being more compact because elements can be arranged three-dimensionally, including in the thickness direction. However, since components such as CPUs are arranged closer to each other, the space for wiring is reduced, requiring more precise and less wasteful wiring. In the array-type inductor 1 according to the present disclosure, the inductor elements 5 can be arranged closely together, thereby shortening the wiring between the inductor elements 5. Since the external electrodes 20 have sufficient surface area, the degree of freedom in wiring is increased, enabling high-density wiring. Furthermore, the array-type inductor 1 according to this embodiment is less susceptible to dielectric breakdown.

[0069] <Manufacturing method for array type inductors> The method for manufacturing an array-type inductor according to the present disclosure is not particularly limited, and can utilize known coil component manufacturing processes such as a lamination process, a thin-film process, etc. As an example, a method for manufacturing an array-type inductor using a lamination process will be described below.

[0070] 6 and 7 show an example of a manufacturing method using a lamination process. First, a magnetic sheet 71 is produced, which is a precursor of the substrate-forming sheet that constitutes the substrate 10 (FIG. 6(a1)). The magnetic sheet 71 can be obtained, for example, by kneading a metal magnetic material with a resin to produce a slurry, applying this slurry to a plastic base film using a method such as a doctor blade method, drying it, and cutting it to a predetermined size.

[0071] Next, through holes 71a are formed in predetermined positions of the magnetic sheet 71, penetrating the magnetic sheet 71 in the thickness direction (FIG. 6(a2)). A conductive paste is then printed on the upper surface of the magnetic sheet with the through holes 71a formed therein by a method such as screen printing, thereby filling the through holes 71a formed in the magnetic sheet with the conductive paste 30p, thereby producing a main body forming sheet 75 (FIG. 6(a3)). When forming multiple main body forming sheets 75 in this manner, the size and position of the through holes 71a formed in the main body forming sheets 75 can be made the same. Furthermore, the shape of the conductor that is finally obtained can be adjusted by changing the size, shape, or position of the through holes 71a.

[0072] On the other hand, as shown in Figures 6(b1) to (b3), an outermost layer forming sheet 77 is prepared for forming a layer including the second portions 22 that will become the inner portions of the external electrodes 20. The second portions 22 of the external electrodes 20 are formed by screen printing or the like using a conductive paste on the main body forming sheet 75 (Figure 6(a3)) obtained as shown in Figures 6(a1) to (a3) ​​(Figure 6(b2)). Furthermore, insulating layers 40 are formed by screen printing or the like using an insulating paste between the second portions 22 so as to be flush with the second portions 22, thereby forming the outermost layer forming sheet 77 (Figure 6(b3)).

[0073] A plurality of the obtained main body forming sheets 75 are stacked in the Z direction of the array type inductor 1 to be obtained, and outermost layer forming sheets 77 are stacked on the top and bottom sides in the Z direction (FIG. 7(a)). The obtained laminate may be thermocompressed using a press. Next, the laminate is cut into pieces of the desired size using a cutting machine such as a dicing machine, thereby obtaining individualized laminates. The individualized laminates may be subjected to polishing treatment such as barrel polishing, if necessary.

[0074] Next, the individual laminate (FIG. 7(b)) is degreased and heat-treated. The heat treatment forms an oxide layer on the surface of each soft magnetic metal powder contained in the magnetic sheet, and adjacent soft magnetic metal powder particles are bonded together via the oxide layer. The heat treatment of the chip laminate is performed, for example, at a heating temperature of 600°C to 800°C for a heating time of 20 to 120 minutes. Furthermore, the first portions 21 of the external electrodes 20 are formed by plating or the like, and an array-type inductor 1 is obtained (FIG. 7(c)).

[0075] The above-mentioned lamination process is a method of laminating sheets having main surfaces aligned with the XY plane of the array inductor along the Z direction, but it may also be a process of laminating sheets having main surfaces aligned with the YZ plane of the array inductor along the X direction, or a process of laminating sheets having main surfaces aligned with the XZ plane of the array inductor along the Y direction.

[0076] In the thin-film process, for example, a positive resist obtained by developing a photoresist is plated with a conductor material, and then the positive resist is removed to form multiple conductors. The resulting multiple conductors are embedded in a substrate material, which is then singulated, degreased, and heated, and then plated to form external electrodes, resulting in an array-type inductor.

[0077] Although specific embodiments have been described above in detail, the present disclosure is not limited to the above embodiments. Furthermore, the above embodiments can be subject to various changes, modifications, substitutions, additions, deletions, and combinations within the scope of the claims.

[0078] Aspects of the present disclosure are, for example, as follows.

[0079] <1> An array-type inductor including a plurality of inductor elements in a substrate made of a ferromagnetic metal material, each of the inductor elements including a conductor and an external electrode connected to the conductor, the external electrodes of the plurality of inductor elements being arranged on one surface of the substrate spaced apart from each other, each of the external electrodes having a first portion arranged on the outermost side and a second portion connecting the first portion and the conductor, an insulating layer being arranged between the second portions, and for adjacent inductor elements, with the distance between the first portions being d1, the distance between the second portions being d2, and the distance between the conductors on the one surface being dc, an array-type inductor in which d1 < d2 < dc.

[0080] <2> The array-type inductor according to <1>, wherein the value (d2 / d1) of the ratio of the distance d2 between the second portions to the distance d1 between the first portions is 10 or more and 20 or less.

[0081] <3> The array-type inductor according to <1> or <2>, wherein the value (dc / d1) of the ratio of the distance dc between the conductors to the distance d1 between the first portions is 2 or more.

[0082] <4> The array-type inductor according to any one of <1> to <3>, wherein in each of the plurality of inductor elements, when viewed in the direction toward the one surface, the conductor is provided within the range of the first portion.

[0083] <5> The array-type inductor according to any one of <1> to <4>, wherein in each of the plurality of inductor elements, when viewed in the direction toward the one surface, the conductor is provided within the range of the first portion.

[0084] <6> In each of the plurality of inductor elements, the second portion is provided within a range of the first portion when viewed in a direction toward the one surface. <1> from <5> 10. The array type inductor according to claim 1, wherein [Explanation of symbols]

[0085] 1. Array type inductor (coil component) 5, 5A, 5B inductor elements 10 Base 10a 1st main surface (top surface) 10b 2nd principal surface (bottom surface) 10c 1st side 10d 2nd side 10e 1st end face 10f 2nd end face 20, 20A, 20B One of the external electrodes 20', 20A', 20B' Other external electrode 21, 21A, 21B First part of external electrode (outer part) 22, 22A, 22B Second part (inner part) of outer electrode 30 Conductors 40, 40' insulation layer 81 Circuit Board 81a Through hole 82 Sealing resin 83 Wiring 80 Component embedded board

Claims

1. An array type inductor including a plurality of inductor elements in a base body made of a metallic magnetic material, Each of the inductor elements includes a conductor and an external electrode connected to the conductor; the external electrodes of the plurality of inductor elements are spaced apart from one another and disposed on one surface of the base; Each of the external electrodes has a first portion disposed on the outermost side and a second portion connecting the first portion and the conductor, an insulating layer is disposed between the second portions; With respect to the adjacent inductor elements, the distance between the first portions is defined as d1, the distance between the second portions is defined as d2, and the distance between the conductors on the one surface is defined as dc, An array type inductor, where d1<d2<dc.

2. 2. The array type inductor according to claim 1, wherein a ratio of a distance d2 between said second portions to a distance d1 between said first portions is 10 or more and 20 or less.

3. The array-type inductor according to claim 1 , wherein a ratio of a distance dc between the conductors to a distance d1 between the first portions is 2 or greater.

4. 3. The array-type inductor according to claim 1, wherein in each of the plurality of inductor elements, the conductor is provided within the range of the first portion when viewed in the direction toward the one surface.

5. 3. The array-type inductor according to claim 1, wherein in each of the plurality of inductor elements, the conductor is provided within a range of the second portion when viewed in a direction toward the one surface.

6. 3. The array-type inductor according to claim 1, wherein in each of the plurality of inductor elements, the second portion is provided within a range of the first portion when viewed in a direction toward the one surface.

7. 3. The array type inductor according to claim 1, which is a component built into a substrate.

Citation Information

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