Method of manufacturing multilayer wiring board

Abstract

To provide a multilayer wiring board having high insulation reliability, and to provide a method of manufacturing the same.SOLUTION: This is a multilayer wiring board in which at least one layer or more of insulating resin layers 001 and 001' and a conductor wiring layer 006 are formed. The barrier metal film 003 is formed on the lower surface and both side surfaces of the conductive wiring layer 006.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a multilayer wiring board, such as a micro wiring board, having high insulation reliability. [Background technology]

[0002] In recent years, as electronic devices become smaller and more sophisticated, there is a demand for finer pitch wiring in multilayer wiring boards. As wiring pitch becomes finer, insulation degradation due to migration between wirings becomes a problem. Therefore, when forming wiring by the damascene method as in Patent Document 1, a barrier metal may be formed in advance. However, even if the insulating resin has high dielectric strength, migration may easily occur at the resin interface between the wiring (conductor wiring layer) and the insulating resin layers formed above and below it. In such cases, with the method of Patent Document 1, since no barrier metal is formed on the top of the conductor such as wiring where the resin interface exists, migration may progress from the contact area between the resin interface and the conductor such as wiring, resulting in a short circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6028432 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a multilayer wiring board having high insulation reliability and a method for manufacturing the same. [Means for solving the problem]

[0005] To solve the problem, an aspect of the present invention is a multilayer wiring board in which at least one insulating resin layer and one or more conductor wiring layers are formed, and the conductor wiring layer has a barrier metal film formed on the bottom surface and side surfaces. Here, the lower surface refers to a surface facing one direction in the thickness direction, for example, the surface facing the substrate side (the lower surface in the stacking direction). In addition, a method for manufacturing a multilayer wiring board according to an aspect of the present invention includes the steps of forming a resist on an insulating resin layer for forming wiring using plated copper, forming a barrier metal film and a plating seed layer on the resist and the insulating resin in this order, forming copper by plating up to above the upper end surface position of the resist in the thickness direction, removing the copper, seed layer and barrier metal film above the resist so that the upper end surface of the resist is exposed, thereby forming a conductor wiring layer, and removing the resist. [Effects of the Invention]

[0006] According to this aspect of the present invention, a barrier metal film is interposed at the resin interface between the lower surface of the wiring and both side surfaces in the width direction, making it possible to provide a multilayer wiring board with high insulation reliability. [Brief explanation of the drawings]

[0007] [Figure 1] 1A to 1C are explanatory views showing a multilayer wiring board and a manufacturing method thereof according to a first embodiment of the present invention. [Figure 2] 5A to 5C are explanatory views showing a multilayer wiring board and a manufacturing method thereof according to a second embodiment of the present invention. [Figure 3] 1 is an enlarged cross-sectional view showing a portion of a multilayer wiring board according to an embodiment of the present invention. [Figure 4] FIG. 10 is an enlarged cross-sectional view showing a portion of a multilayer wiring board according to a second embodiment of the present invention. [Figure 5] FIG. 10 is an enlarged cross-sectional view showing a modified example of a multilayer wiring board according to an embodiment of the present invention. [Figure 6] FIG. 1 is an enlarged cross-sectional view showing a portion of a multilayer wiring board formed by a conventional damascene process. [Figure 7] FIG. 1 is an enlarged cross-sectional view showing a portion of a multilayer wiring board manufactured by a conventional semi-additive method. DETAILED DESCRIPTION OF THE INVENTION

[0008] Next, an embodiment based on the present invention will be described with reference to the drawings. Here, for convenience of explanation, the dimensional ratios in the drawings may differ from the actual ratios, and some components may be omitted from the drawings. (composition) The multilayer wiring board of this embodiment is a multilayer wiring board in which at least one insulating resin layer and one or more conductor wiring layers are formed, as shown in Figures 1(h), 2(i), 3, and 4. In the example of the multilayer wiring board shown in Figures 1(h), 2(i), 3, and 4, a conductor wiring layer 006 is formed on an insulating resin layer 001, and further, an insulating resin layer 001' is formed on the insulating resin layer 001 so as to cover the conductor wiring layer 006.

[0009] The conductive wiring layer 006 has a barrier metal film 003 formed on the bottom surface and both side surfaces. The wiring width of the wiring made of the conductor wiring layer 006 may be configured such that the width of the upper surface is wider than the width of the lower surface, as shown in Fig. 4. For example, it is preferable that the wiring width is configured to increase upward in the stacking direction. The barrier metal film 003 is made of, for example, titanium or a metal that has a lower tendency to ionize than copper. The thickness of the barrier metal film 003 is, for example, 20 nm or more and 200 nm or less. The material that forms the conductor wiring layer 006 is, for example, copper. As described above, in the multilayer wiring board of this embodiment, the barrier metal film 003 is interposed at the interfaces with the insulating resin layers 001, 001′ on the lower surface and both widthwise sides of the wiring, so that it is possible to provide a multilayer wiring board with high insulation reliability.

[0010] (Manufacturing method) The method for manufacturing a multilayer wiring board of this embodiment includes, for example, the following steps a to e. a: A process of forming a resist on an insulating resin layer to form wiring using plated copper. b: A process of forming a barrier metal film and a plating seed layer in this order on the resist and insulating resin. c) forming copper by plating above the upper end surface position in the thickness direction of the resist; d: A step of forming a conductor wiring layer by removing copper, the seed layer, and the barrier metal film located above the resist so that the upper end surface of the resist in the thickness direction is exposed. e: Step of removing the resist Here, the copper, seed layer, and barrier metal film located above the upper end surface of the resist in the thickness direction are removed by, for example, wet etching, dry etching, CMP, or a combination thereof.

[0011] An example of a method for manufacturing a multilayer wiring board according to this embodiment will now be described in detail with reference to the drawings. First Embodiment A method for manufacturing a multilayer wiring board according to the first embodiment will be described with reference to FIG. First, a resist 002 is applied onto an insulating resin layer 001, and then exposed and developed to form a resist pattern corresponding to the conductor pattern on the resist 002 (see FIG. 1(b)). Here, when forming an opening corresponding to the conductor pattern in the resist 002, The exposure and development may be performed so that the opening has a tapered shape (see FIG. 4). In this case, it becomes easier to form a barrier metal film 003 and a plating seed layer 004 (described later) on the side surface of the opening.

[0012] Next, a barrier metal film 003 is formed on the surface of the resist 002 and its openings by sputtering (see FIG. 1(c)). If the barrier metal film is too thin, the barrier effect is reduced, and if it is too thick, the wiring becomes thin and removal becomes difficult. Therefore, the film thickness is preferably 20 nm to 200 nm. The barrier metal film 003 is preferably made of a metal that has a lower ionization tendency than copper, and is also preferably made of a metal such as titanium that is passivated and stabilized by oxidation or the like.

[0013] Next, an electrolytic plating seed layer 004 is formed on the barrier metal film 003 by sputtering or electroless plating (see FIG. 1(d)). Next, a conductor layer 005 made of an electrolytic plating layer is formed on the seed layer 004 by electrolytic plating (see FIG. 1(e)). For example, by using filling plating for electrolytic copper plating, the openings in the resist 002 can be filled with a conductor, thereby obtaining a plated conductor layer 005 with a flat surface. The conductor pattern includes conductor wiring, lands that correspond to terminal portions, and dummy patterns that do not actually function as electrical circuits but are placed to prevent warping, heat accumulation, electromagnetic wave shielding, etc.

[0014] Next, the conductor layer 005, the seed layer 004, and the barrier metal film 003 are removed flat by CMP or the like until the resist 002 is exposed (see FIG. 1(f)). Next, the resist 002 is removed (see FIG. 1(g)). This forms a conductor wiring layer 006. The conductor wiring layer 006 has a barrier metal film 003 formed (coated) on its bottom and side surfaces. Next, an insulating resin layer 001 ′ is formed on the conductor wiring layer 006 and the insulating resin layer 001 . By repeating the same procedures as those from the formation of the resist 002 to the formation of the insulating resin layer 001', a multilayer wiring board can be formed.

[0015] Second Embodiment Next, a method for manufacturing a multilayer wiring board according to the second embodiment will be described with reference to FIG. The steps up to the formation of the conductor layer 005 (FIGS. 2(a) to 2(e)) are the same as those in the first embodiment, and therefore a description thereof will be omitted. In the second embodiment, after the conductor layer 005 is formed, the electroplated layer 005 and the seed layer 004 are removed by wet etching until the barrier metal film 003 above the wiring is exposed (see FIGS. 2(f) and 2(g)). At this time, the barrier metal film 003 on the side of the wiring becomes slightly lower than the top of the wiring due to the etching. The difference is that the electroplated layer 005, the seed layer 004, and the barrier metal film 003 are removed by wet etching or dry etching. The steps after removing the resist 002 (FIGS. 2(h) and 2(i)) are the same as those in the first embodiment, and therefore the description thereof will be omitted. In this way, in the wiring layer 006 formed in the first and second embodiments, as shown in Figures 3 to 5, the distance between the upper and lower resin interfaces and the copper that is not covered by the barrier metal film 003 is large, so that the occurrence of migration at the resin interface is suppressed. However, when a barrier metal film is formed using the conventional damascene method (Figure 6) or semi-additive method (Figure 7), the distance between the resin interface and the copper where the barrier metal film is not formed is short, making migration more likely to occur at the resin interface. [Example]

[0016] Example 1 In Example 1, an example in which a multilayer wiring board according to the first embodiment was fabricated will be described. First, an insulating resin was spin-coated onto a thermally oxidized silicon wafer to form an approximately 7 μm thick insulating resin layer 001. Photoresist 002 was spin-coated onto the insulating resin layer 001 to a thickness of approximately 3 μm, and a resist pattern for the wiring was formed by exposure and development. Next, titanium was formed on the insulating resin layer 001 and the resist 002 by sputtering to a thickness of about 100 nm, and copper was formed thereon by sputtering to a thickness of 200 nm. Next, copper was formed on the resist by electrolytic plating to a thickness of about 3 μm. Next, the upper end surface of the resist 002 was exposed by polishing it by about 5 μm by CMP, and then the resist 002 was peeled off to form the conductive wiring layer 006. Next, an insulating resin was spin-coated on the insulating resin layer 001 and the conductive wiring layer 006 to form an insulating resin layer 001' so that the thickness on the wiring was about 5 μm. [Explanation of symbols]

[0017] 001, 001'...insulating resin layer 002...Resist 003...Barrier metal film 004...seed layer 005...Conductor layer (electrolytic plating layer) 006...Conductor wiring layer 007...Wiring section 008...Beer section 009...Pad section 010...Via opening

Claims

1. forming a resist on the insulating resin layer for forming wiring using plated copper; forming a barrier metal film and a plating seed layer in this order on the resist and the insulating resin; forming copper by plating to above the upper end surface position in the thickness direction of the resist; a step of forming a conductor wiring layer by removing copper, the seed layer, and the barrier metal film above the resist so that an upper end surface of the resist is exposed; removing the resist; A method for manufacturing a multilayer wiring board having the above structure.

2. 2. The method for manufacturing a multilayer wiring board according to claim 1, wherein the copper, the seed layer and the barrier metal film above the resist are removed by wet etching, dry etching, CMP or a combination thereof.

3. Removal of the copper, seed layer and barrier metal film above the resist is performed by wet etching; 2. The method for manufacturing a multilayer wiring board according to claim 1, characterized in that the wet etching removes the barrier metal film so that the upper end surface of the barrier metal film formed along the side surface of the copper in the thickness direction is positioned lower than the upper end surface of the copper in the thickness direction.

4. 4. The method for manufacturing a multilayer wiring board according to claim 1, wherein the wiring width of the wiring made of the conductor wiring layer is such that the width of the upper surface in the stacking direction is wider than the width of the lower surface.

5. 5. The method for manufacturing a multilayer wiring board according to claim 4, wherein the barrier metal film has a thickness of 200 nm or less.

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