Electronic control unit

Abstract

To provide an electronic control device capable of preventing an output voltage from exceeding a guaranteed operating range. [Solution] An electronic control device (10) includes a multiphase power supply (22) having a plurality of inductors (25), a processor (31) that operates in response to the output voltage of the multiphase power supply (22), a processor (32) that monitors the processor (31), and a detection unit (50). The detection unit (50) detects an inter-inductor short circuit of the multiphase power supply (22) based on the output voltage of the multiphase power supply (22). The processor (32) controls the processing load of the processor (31) in accordance with the detection result of the inter-inductor short circuit by the detection unit (50).

Description

[Technical Field]

[0001] The disclosure herein relates to electronic control devices. [Background technology]

[0002] Patent Document 1 discloses an electronic device. The contents of the prior art document are incorporated by reference as explanations of the technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5052526 Summary of the Invention [Problem to be solved by the invention]

[0004] In the electronic device disclosed in Patent Document 1, when a malfunction occurs in the electronic device, the device transitions from a normal mode to a degraded mode, thereby preventing avalanche-type malfunctions due to overheating or excessive consumption.

[0005] In an electronic control device including a multi-phase power supply having multiple inductors and a processor that operates by receiving an output voltage from the multi-phase power supply, when the process of transitioning to the derating mode described above is performed, the processing load of the processor drops suddenly. If the processing load of the processor suddenly changes when an inductor short occurs, the short circuit between the inductors degrades the processor's ability to follow the load response, and the output voltage of the multi-phase power supply may exceed the processor's guaranteed operating range. In other words, the processor may malfunction. Further improvements are required for electronic control devices in the above respects and in other respects not mentioned.

[0006] One object of the present disclosure is to provide an electronic control device that can prevent the output voltage from exceeding the guaranteed operating range. [Means for solving the problem]

[0007] An electronic control device according to one aspect of the disclosure includes: a multiphase power supply (22) having a plurality of inductors (25); a detection unit (50) that detects a short circuit between inductors of the multiphase power supply based on an output voltage of the multiphase power supply; a first processor (31) that operates upon receiving the output voltage; a second processor (32) that monitors the first processor; Equipped with The second processor controls the processing load of the first processor according to the result of detection of an inter-inductor short circuit by the detection unit.

[0008] The disclosed electronic control device includes a detection unit and a second processor, enabling control in response to an inductor short circuit. For example, when an inductor short circuit occurs, the second processor controls the processing load of the first processor to prevent a sudden load fluctuation. This prevents the output voltage from exceeding the guaranteed operating range of the first processor.

[0009] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are intended to exemplarily indicate the corresponding parts of the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a diagram illustrating an electronic control device according to a first embodiment. [Figure 2] FIG. 1 is a circuit diagram showing a multiphase power supply. [Figure 3] FIG. 1 is a perspective view showing a coupled inductor. [Figure 4]FIG. [Figure 5] FIG. [Figure 6] FIG. 10 is a diagram illustrating an example of a short circuit between inductors. [Figure 7] 10A and 10B are diagrams showing PWM waveforms of each phase and a Vout11 waveform. [Figure 8] FIG. 2 is a block diagram showing a detection unit. [Figure 9] 4 is a timing chart showing various signal waveforms. [Figure 10] 10A and 10B are diagrams showing the Iout waveform and Vout1 waveform in a normal state in a reference example. [Figure 11] 10A and 10B are diagrams showing the Iout waveform and the Vout1 waveform when a short circuit occurs between inductors in a reference example. [Figure 12] 10 is a flowchart illustrating an example of processing executed by a real-time CPU. [Figure 13] 10 is a timing chart showing a case where a short circuit occurs between inductors during high load processing. [Figure 14] 10 is a timing chart showing a case where a short circuit occurs between inductors during low load processing. [Figure 15] 10 is a timing chart of a reference example. [Figure 16] 10 is a flowchart showing an example of processing executed by a real-time CPU in an electronic control unit according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, several embodiments will be described with reference to the drawings. Note that in each embodiment, corresponding components are designated by the same reference numerals, and redundant description may be omitted. When only a portion of the configuration is described in each embodiment, the configuration of another embodiment previously described may be applied to the remaining portion of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of several embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.

[0012] (First embodiment) The electronic control device according to this embodiment can be applied to, for example, a mobile body. Mobile bodies include vehicles such as engine-driven vehicles, hybrid vehicles, and motor-driven vehicles, as well as flying objects such as drones and eVTOLs, ships, construction machinery, and agricultural machinery. eVTOL is an abbreviation for electronic Vertical Take-Off and Landing aircraft. For example, when applied to a vehicle, the electronic control device controls equipment mounted on the vehicle. The electronic control device is sometimes referred to as an ECU. ECU is an abbreviation for Electronic Control Unit.

[0013] The electronic control unit may, for example, execute control related to the movement of a mobile object, or may execute control unrelated to movement. The electronic control unit may, for example, be an autonomous driving ECU, or an ADAS ECU that executes control to assist the driver in driving operations. ADAS is an abbreviation for Advanced Driving Assistant System. For example, levels 3 to 5 defined by the Society of Automotive Engineers International (SAE International) correspond to autonomous driving levels, and levels 1 and 2 correspond to driving assistance levels. The electronic control unit may be an infotainment ECU or a cockpit ECU. The cockpit ECU controls meter devices, navigation devices, air conditioning devices, etc.

[0014] <Electronic control device> FIG. 1 shows an example of an electronic control device according to this embodiment. The electronic control unit (ECU) 10 includes a power supply circuit 20, an SoC 30, a peripheral device 40, and a detection unit 50. The power supply circuit 20 has at least a multiphase power supply. The illustrated electronic control unit 10 is mounted on a vehicle. The power supply circuit 20 includes a primary power supply circuit 21 and secondary power supply circuits 22 and 23. The secondary power supply circuits 22 and 23 are arranged in parallel with each other. Of the secondary power supply circuits 22 and 23, at least the secondary power supply circuit 22 is a multiphase power supply. The illustrated secondary power supply circuits 22 and 23 are both multiphase power supplies. The secondary power supply circuits 22 and 23 are redundant. Hereinafter, the secondary power supply circuit 22 that supplies power to the application CPU 31 may be referred to as the multiphase power supply 22. The power supply circuit 20 is required to include at least the multiphase power supply 22.

[0015] The primary power supply circuit 21 and the secondary power supply circuits 22, 23 are configured to be able to step down an input voltage to a predetermined voltage and output it. The primary power supply circuit 21 and the secondary power supply circuits 22, 23 are step-down DC-DC converters. For example, the primary power supply circuit 21 generates a constant voltage (e.g., 5 V) lower than the power supply voltage based on power supplied from a battery installed in the vehicle. The secondary power supply circuits 22, 23 each generate a constant voltage (e.g., around 1 V) lower than the voltage generated by the primary power supply circuit 21 based on the output of the primary power supply circuit 21. The primary power supply circuit 21 is sometimes referred to as a primary power supply. The secondary power supply circuits 22, 23 are sometimes referred to as core power supplies.

[0016] The SoC 30 is a single semiconductor chip on which multiple components for realizing the functions of a system or device are implemented. SoC is an abbreviation for System On Chip. The exemplary SoC 30 includes a processor (PU1) 31, a processor (PU2) 32, a processor (PU3) 33, a flash memory (Flash) 34, a memory controller (MC) 35, a communication IF 36, and the like. IF is an abbreviation for Interface. The SoC 30 may also include a wireless communication module, an analog front end, a DSP, and the like. DSP is an abbreviation for Digital Signal Processor. The electronic control device 10 may include a SiP instead of or in addition to the SoC 30. SiP is an abbreviation for System in Package.

[0017] The peripheral device 40 is a device that cooperates with the SoC 30 and extends its functions. An example peripheral device 40 includes a DRAM 41, a flash memory 42, a CAN transceiver (CANTr) 43, an Ethernet PHY 44, and the like. DRAM is an abbreviation for Dynamic Random Access Memory. CAN is an abbreviation for Controller Area Network. PHY is an abbreviation for Physical Layer Device. At least a portion of the peripheral device 40 may be built into the SoC 30. CAN is a registered trademark. Ethernet is a registered trademark.

[0018] Processors 31, 32, and 33 are processors that operate by receiving a power supply (electricity) from power supply circuit 20. In the exemplary SoC 30, processor 31 is an application CPU that executes an operating system (OS), applications, etc. Processor 31 is responsible for system control within SoC 30. Processor 32 is a real-time CPU that executes tasks that require real-time performance. Processor 32 monitors at least the operation of processor 31. Processor 32 may execute the same processing as processor 31. In other words, processor 32 may be provided redundantly to processor 31. Processor 33 is a GPU that processes video data, etc. CPU is an abbreviation for Central Processing Unit. GPU is an abbreviation for Graphics Processing Unit.

[0019] The processor 31 operates by receiving a supply of power from the secondary power supply circuit 22. The processor 32 may receive a supply of power from either the secondary power supply circuit 22 or the secondary power supply circuit 23. As illustrated, the processor 32 is preferably configured to operate by receiving a supply of power from a power source separate from that of the processor 31, i.e., the secondary power supply circuit 23. The GPU 33 may receive a supply of power from either the secondary power supply circuit 22 or the secondary power supply circuit 23. The GPU 33 may receive a supply of power from a secondary power supply circuit separate from the secondary power supply circuits 22 and 23.

[0020] The core voltage of processors 31, 32, and 33 is around 1 V (for example, less than 1 V), and the load current is several tens of amperes or more (for example, 100 A or more). To accommodate such low voltages and large currents, electronic control device 10 is equipped with multi-phase power supplies as secondary power supply circuits 22 and 23. The multi-phase power supplies step down the input voltage to a voltage corresponding to the core voltage of processors 31, 32, and 33, and output the voltage. Use of multi-phase power supplies makes it possible to accommodate higher performance of processors 31, 32, and 33, for example, in line with improvements in autonomous driving levels and advances in infotainment functions, particularly autonomous driving level 3 and above.

[0021] The processors 31, 32, and 33 execute predetermined control processes by executing programs stored in the storage while utilizing the temporary storage function of the memory. The memory includes, for example, RAM. RAM is an abbreviation for Random Access Memory. The memory may include cache and registers. The storage is, for example, ROM. ROM is an abbreviation for Read Only Memory. The storage may be an HDD, SSD, or the like. The storage is a non-transitory tangible storage medium that non-temporarily stores computer-readable programs, data, and the like. In the exemplary electronic control device 10, the DRAM 41 corresponds to the memory (RAM). The flashes 34 and 42 correspond to the storage (ROM). A portion of the control program is stored in the flash 34 built into the SoC, and another portion of the control program is stored in the external flash 42.

[0022] The memory controller 35 reads, writes, and refreshes data from and to the DRAM 41. The memory controller 35 manages data exchange between the processors 31, 32, and 33 and the flashes 34 and 42.

[0023] The communication IF 36 performs data conversion and other operations to exchange data between the processors 31, 32, and 33 and the physical layer devices. In the illustrated electronic control device 10, the physical layer devices are a CAN transceiver 43 and an Ethernet PHY 44. The CAN transceiver 43 enables bidirectional communication between the CAN bus (not shown) and the SoC 30 by converting electrical characteristics between the CAN bus and the SoC 30. The CAN transceiver 43 converts digital signals into electrical signals for the CAN bus and, conversely, converts signals from the CAN bus back into digital signals. The Ethernet PHY 44 is a hardware circuit that converts analog signals for Ethernet-compliant communication back into digital signals for the MAC. MAC stands for Media Access Controller. The Ethernet PHY 44 converts digital data into analog signals, transmits them over a cable, and converts received analog signals back into digital data.

[0024] The detection unit 50 detects short circuits that occur between inductors that make up the multiphase power supply. The detection unit 50 detects short circuits that occur between different inductors 25 based on the output voltage Vout1 of the multiphase power supply that makes up the secondary power supply circuit 22. The detection unit 50 may be provided outside the secondary power supply circuit 22 as shown in the example, or may be built into the secondary power supply circuit 22. The electronic control device 10 may also include a detection unit that has a configuration similar to the detection unit 50 and detects short circuits that occur between different inductors of the secondary power supply circuit 23 based on the output voltage Vout2 of the multiphase power supply that makes up the secondary power supply circuit 23. Details of the detection unit 50 will be described later.

[0025] <Multiphase power supply> FIG. 2 is a circuit diagram showing a multiphase power supply. For convenience, some of the drivers are shown in a simplified form in FIG. 2. The multiphase power supply 22 shown in FIG. 2 constitutes a secondary power supply circuit that supplies power to the processor 31 as described above. The multiphase power supply 22 includes a plurality of drivers 24, a plurality of inductors 25 provided corresponding to the drivers 24, and a capacitor 26. The multiphase power supply 22 has a plurality of phases. A phase may also be referred to as a stage, a channel, or the like. If the secondary power supply circuit 23 is a multiphase power supply, it may have a configuration similar to that of the multiphase power supply 22.

[0026] The driver 24 includes switching elements 24H and 24L, respectively. The switching elements 24H and 24L may be, for example, MOSFETs or IGBTs. The switching elements 24H and 24L may be bipolar transistors. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. The switching elements 24H and 24L are connected in series, with the switching element 24H on the high side, between a power supply line to which an input voltage Vin is input and a ground (GND) line. The input voltage Vin is the output of the primary power supply circuit 21.

[0027] One end of the inductor 25 is connected to the connection point (midpoint) of the switching elements 24H and 24L. The other end of the inductor 25 is connected to the output line. The inductor 25 is provided individually for each driver 24. The drivers 24 and inductors 25 of each phase are connected in parallel with each other. Parallelization can increase the output current from the multiphase power supply 22, i.e., the load current. The number of phases is not particularly limited. The illustrated multiphase power supply 22 has three phases.

[0028] The capacitor 26 is connected to the output line. The positive terminal of the capacitor 26 is connected to the output line. The negative terminal of the capacitor 26 is connected to ground. The capacitor 26 may be provided individually for each phase, or may be provided commonly to multiple phases. In the exemplary multiphase power supply 22, a capacitor 26 is provided for each phase.

[0029] The multiphase power supply 22 may include a control unit (not shown). The control unit performs voltage mode control, for example, by feedback of the output voltage Vout1, to control the operation of the driver 24, i.e., the operation of the switching elements 24H and 24L. The control unit determines the pulse width (duty ratio) of the PWM signal based on the output voltage Vout1, and controls the output voltage Vout1 of the multiphase power supply 22. The control unit may perform current mode control instead of voltage mode control.

[0030] The control unit synchronizes and controls the multiple drivers 24 so that they perform switching operations at different phases. Using multiple phases in this manner can artificially increase the switching frequency even when the multiple drivers 24 have the same switching frequency. This reduces the ripple component of the output voltage Vout1 and improves responsiveness. The control unit switches the driver 24 to perform switching operations, i.e., the number of drive phases, depending on the load current. The control unit compares the load current with a threshold current and increases and / or decreases the number of drive phases depending on the comparison result.

[0031] The multiphase power supply 22 may be configured with a plurality of individually provided inductors 25. The multiphase power supply 22 may be configured with an inductor component in which a plurality of inductors 25 are packaged. An exemplary multiphase power supply 22 is configured with a coupled inductor 25C. FIG. 3 is a perspective view showing an example of a coupled inductor. FIG. 4 is a perspective view showing a core. FIG. 5 is a perspective view showing a coil.

[0032] In the following, the direction in which multiple coils are arranged is referred to as the X direction. The direction perpendicular to the X direction, in which the two end cores are arranged, is referred to as the Y direction. The direction perpendicular to both the X and Y directions is referred to as the Z direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The planar view from the Z direction may sometimes be simply referred to as the planar view.

[0033] One coupled inductor 25C provides the multiple inductors 25 that make up the multiphase power supply 22. As shown in FIGS. 3 to 5, the coupled inductor 25C includes a core 27 and multiple coils 28. The coils 28 are arranged on one core 27, i.e., the common core 27, and are magnetically coupled to each other. By using the coupled inductor 25C, magnetic fluxes between phases can be canceled out, reducing the effective inductance.

[0034] The core 27 is formed using a magnetic material such as ferrite. The core 27 functions as a magnetic circuit. The core 27 has a plurality of core cores 271 and end cores 272, 273. The core 27 may be formed of a single member or a combination of a plurality of members. A coil 28 is inserted through the core 27. The core cores 271 are provided individually for the coils 28. The coils 28 are wound around the core cores 271. The core cores 271 extend in the Y direction. The plurality of core cores 271 are lined up in the X direction at predetermined intervals. The illustrated core 27 has three core cores 271. Each core core 271 is substantially rectangular parallelepiped-shaped. The three core cores 271 have the same shape.

[0035] The end cores 272, 273 are arranged opposite to each other in the Y direction. The end cores 272, 273 sandwich the core core 271 between them. The end cores 272, 273 extend in the X direction, which is the arrangement direction of the multiple core cores 271. One ends of the multiple core cores 271 are connected to the end core 272, and the other ends of the multiple core cores 271 are connected to the end core 273. The end cores 272, 273 magnetically connect the multiple core cores 271. The illustrated end cores 272, 273 have the same shape. The end cores 272, 273 are substantially rectangular parallelepipeds with the X direction as their longitudinal direction.

[0036] The coil 28 is formed using a metal material with good conductivity, such as copper. The coil 28 is formed by processing a metal plate material, rather than a metal wire material. The metal plate material is sometimes called a metal frame. The multiple coils 28 are formed using the same material and have the same shape. The multiple coils 28 have approximately the same inductance. The multiple coils 28 are lined up in the X direction at a predetermined interval. The multiple coils 28 are lined up in the same direction. The coils 28 are fixed to the core 27, for example, by adhesive. By bringing adjacent coils 28 closer to each other, the magnetic flux cancellation effect can be enhanced. In other words, the effective inductance reduction effect can be enhanced.

[0037] The coil 28 is formed by bending a metal plate having a predetermined thickness. The coil 28 (coupled inductor 25C) is mounted on a substrate (not shown). The coil 28 has terminal portions 281 and 282, side wall portions 283 and 284, and an upper wall portion 285. The terminal portions 281 and 282 are external connection terminals of the coil 28. The plate thickness direction of the terminal portions 281 and 282 is approximately parallel to the Z direction. The terminal portions 281 and 282 extend in the Y direction. The illustrated terminal portions 281 and 282 have a substantially rectangular planar shape with the Y direction as their longitudinal direction. The terminal portions 281 and 282 are aligned in the X direction at a predetermined interval. A portion of the side surface of the terminal portion 281 and a portion of the side surface of the terminal portion 282 face each other in the X direction.

[0038] The side wall portion 283 is continuous with a portion of the terminal portion 281 that faces the terminal portion 282. The side wall portion 283 is bent so as to form an angle of approximately 90 degrees with respect to the terminal portion 281. The thickness direction of the side wall portion 283 is approximately parallel to the X direction. The side wall portion 283 has a width equal to the length of the facing portions of the terminal portions 281, 282, and extends in the Z direction. Similarly, the side wall portion 284 is continuous with a portion of the terminal portion 282 that faces the terminal portion 281. The side wall portion 284 is bent so as to form an angle of approximately 90 degrees with respect to the terminal portion 282. The thickness direction of the side wall portion 284 is approximately parallel to the X direction. The side wall portion 284 has a width equal to the length of the facing portions of the terminal portions 281, 282, and extends in the Z direction, the same direction as the side wall portion 283. The lower ends of the side walls 283 and 284 are continuous with the terminal portions 281 and 282 .

[0039] The upper wall portion 285 bridges the side wall portions 283, 284. The upper wall portion 285 extends in the X direction. One end of the upper wall portion 285 is continuous with the upper end of the side wall portion 283, and the other end is continuous with the upper end of the side wall portion 284. The upper wall portion 285 has the same width as the side wall portions 283, 284.

[0040] The opposing portions of terminal portions 281, 282, side wall portions 283, 284, and upper wall portion 285 surround core portion 271. The opposing portions of terminal portions 281, 282, side wall portions 283, 284, and upper wall portion 285 are attached to and wound around core portion 271. End portion cores 272, 273 are arranged in the portions excluding the opposing portions of terminal portions 281, 282, i.e., in the extended portions.

[0041] <Inductor short circuit and ripple fluctuation> 6 is a diagram showing an example of an inter-inductor short circuit. In a configuration having multiple inductors 25, for example, a configuration in which multiple inductors 25 are lined up in a predetermined direction, there is a risk of a short circuit occurring between adjacent inductors due to the inclusion of conductive foreign matter, migration, etc. In particular, when using coupled inductor 25C, bringing adjacent coils 28 closer to each other as described above makes it easier for a short circuit to occur between adjacent inductors.

[0042] 6, among the three phases, a short circuit occurs between the inductor 25 of phase 1 and the inductor 25 of phase 2. Vout11 shown in FIG.

[0043] Figure 7 shows the PWM waveforms of each phase and the Vout11 waveform. Figure 7 shows a simplified representation of the on-period of a given duty ratio. The PWM waveform indicates the on-period and off-period. Figure 7 shows the waveform when a coupled inductor is used. Of the output voltage Vout11, the dashed line indicates the normal waveform, and the solid line indicates the waveform when a short circuit occurs. The solid line indicates the waveform when a short circuit occurs between the inductors of phase1 and phase2, as shown in Figure 6. The two-dot chain lines for the output voltage Vout11 indicate the overvoltage detection threshold and undervoltage detection threshold.

[0044] Under normal conditions, the output voltage Vout11 rises significantly during the on-period of phase 1. Due to the influence of magnetic coupling, the output voltage Vout11 also rises during the on-period of phase 2 and phase 3. The rises during the on-period of phase 2 and phase 3 are smaller than the rise during the on-period of phase 1.

[0045] When an inductor short occurs, the output voltage Vout11 rises significantly during the on-period of phase 1 and the on-period of phase 2. Due to the effects of magnetic coupling, the output voltage Vout11 also rises during the on-period of phase 3. The rise during the on-period of phase 3 is smaller than the rise during the on-period of phase 1 and the on-period of phase 2. Although the ripple fluctuation approximately doubles due to an inductor short, there are almost no cases where the guaranteed operating range of the processor in the SoC30 is exceeded during steady-state operation with no load fluctuations.

[0046] <Detection section> 8 is a block diagram showing an example of a detection unit. The detection unit 50 detects an inter-inductor short circuit in the multi-phase power supply 22 as described above. At least a portion of the functions of the detection unit 50 may be implemented in hardware, or at least a portion of the functions may be implemented in software. The detection unit 50 may include, for example, an analog circuit or a digital circuit. The example detection unit 50 includes a high-pass filter (HPF) 51, a comparator (CMP1) 52, an integrator (INT) 53, and a comparator (CMP2) 54.

[0047] The high-pass filter 51 is a filter that passes signals with frequencies higher than a predetermined frequency (cutoff frequency). The high-pass filter 51 passes ripple components, which are AC components, in the output voltage Vout1 of the multi-phase power supply 22. The ripple components are sometimes referred to as ripple voltage.

[0048] The comparator 52 compares the ripple component with a threshold value (TH1) 55 and outputs the comparison result. The comparator 52 determines whether the ripple component is increasing. The integrator 53 counts the comparison result of the comparator 52. The integrator 53 counts when the ripple component exceeds the threshold value 55. The integrator 53 detects whether an increase in the ripple component is occurring continuously. The comparator 54 compares the output of the integrator 53 with a threshold value (TH2) 56 and outputs the comparison result. The comparator 54 determines whether an inter-inductor short circuit has occurred based on the output of the integrator 53. The comparator 54 outputs the comparison result to the processor 32. When the output of the integrator 53 exceeds the threshold value 56, the comparator 54 outputs a signal that is different from when the output of the integrator 53 is equal to or less than the threshold value 56.

[0049] FIG. 9 is a timing chart showing an example of various signal waveforms. FIG. 9 shows the PWM waveforms of each phase, the Vout1 waveform, the output waveform of the high-pass filter (HPC) 51, the output waveform of the comparator (CMP1) 52, the output waveform of the integrator (INT) 53, and the output waveform of the comparator (CMP2) 54. As with FIG. 7, FIG. 9 shows a simplified version of the ON period of a predetermined duty ratio. Also, the Vout1 waveform is shown in a simplified version. TH1 in FIG. 9 indicates a threshold value 55 (threshold voltage), and TH2 indicates a threshold value 56 (threshold voltage).

[0050] FIG. 9 shows waveforms when a short circuit occurs between inductor 25 of phase 1 and inductor 25 of phase 2 at time T1, as in FIG. 6. When a short circuit occurs between the inductors of phases 1 and 2 at time T1, current flows through inductors 25 of phases 1 and 2 during the on-period of phase 1. Also, current flows through inductors 25 of phases 1 and 2 during the on-period of phase 2. Therefore, fluctuations in Vout1 become larger after time T1.

[0051] As a result, fluctuations in the output of high-pass filter (HPF) 51 after timing T1, i.e., fluctuations in the ripple component, also increase. Therefore, the output voltage of high-pass filter 51 periodically exceeds threshold value (TH1) 56 after timing T1. The output voltage of high-pass filter 51 exceeds threshold value 56 during the on-periods of phases 1 and 2.

[0052] Comparator (CMP1) 52 outputs an H-level signal indicating an increase in the ripple component when the output voltage of high-pass filter 51 exceeds threshold 56. Comparator 52 outputs an L-level signal when the output voltage of high-pass filter 51 is equal to or lower than threshold 56. Comparator 52 periodically outputs H-level signals from timing T1 onwards.

[0053] The integrator (INT) 53 counts the number of H-level signals output from the comparator 52. When the comparator 52 outputs an H-level signal, the integrator 53 adds a voltage. Between voltage additions, the voltage decreases due to discharge. After timing T1, the comparator 52 periodically outputs H-level signals, so the output of the integrator 53 increases with each count. When the comparator 52 outputs H-level signals a predetermined number of times in succession, the output of the integrator 53 exceeds the threshold value (TH2) 56.

[0054] Threshold value 56 is set to a value that is greater than the output voltage of integrator 53 when the number of times that comparator 52 outputs an H-level signal is less than a predetermined number, and is smaller than the output of integrator 53 when the number of times that comparator 52 outputs an H-level signal is equal to or greater than the predetermined number. The predetermined number is set to a number that is greater than the number of times that the ripple component exceeds threshold value 55 under maximum fluctuation conditions of a processor (e.g., processor 31) that receives power from secondary power supply circuit 22. The maximum fluctuation conditions are fluctuation conditions under which the fluctuation of the ripple component is greatest among load fluctuations.

[0055] The comparator (CMP2) 54 outputs a signal indicating the comparison result to the processor 32. For example, when the output of the integrator 53 exceeds a threshold (TH2) 56, the comparator 54 outputs an H-level signal. When the output of the integrator 53 is equal to or less than the threshold 56, the comparator 54 outputs an L-level signal. The comparator 54 outputs the detection result of an inter-inductor short circuit, i.e., whether or not an inter-inductor short circuit exists. When the output of the integrator 53 exceeds the threshold 56, the comparator 54 notifies that an inter-inductor short circuit has occurred. When the output of the integrator 53 is equal to or less than the threshold 56, the comparator 54 notifies that an inter-inductor short circuit has not occurred. The notification to the processor 32 is made via a communication interface such as SPI or I2C, or via a direct line. SPI is an abbreviation for Serial Peripheral Interface. I2C is an abbreviation for Inter-Integrated Circuit.

[0056] The configuration of the detection unit 50 is not limited to the above example. For example, the detection unit 50 may monitor fluctuations in the ripple component (ripple voltage) and determine that an inter-inductor short circuit has occurred if the ripple component is larger than normal.

[0057] <Effects of load fluctuations> 10 and 11 show the influence of load fluctuations in a reference example in which the control described below is not executed. FIG. 10 shows the Iout waveform and Vout1 waveform under normal conditions. FIG. 11 shows the Iout waveform and Vout1 waveform when an inter-inductor short circuit occurs. FIGS. 10 and 11 show the time of switching from high load processing to low load processing. Iout is the current consumption of processor 31. Multiphase power supply 22 of the reference example includes coupled inductor 25C.

[0058] In the normal state shown in FIG. 10, even if the current consumption Iout fluctuates suddenly, i.e., even if the load fluctuates suddenly, the output voltage Vout1 does not exceed the guaranteed operating range of the processor 31. However, in the case of an inter-inductor short circuit shown in FIG. 11, in addition to the increase in the ripple component shown in FIG. 7, the inter-inductor short circuit reduces the number of phases that function as the coupled inductor 25C. In other words, the effective inductance increases, and the ability of the output voltage Vout1 to follow the load response deteriorates. Due to this deterioration in the load fluctuation characteristics, there is a risk that the output voltage Vout1 will exceed the guaranteed operating range of the processor 31.

[0059] In the reference example, unlike the electronic control device 10 shown in this embodiment, no measures are taken to prevent a sudden change in load when an inductor short occurs. Therefore, there is a risk that the processor 31 may malfunction in cases where the load changes suddenly, for example, when switching from the automatic driving mode to the manual driving mode.

[0060] <Control when an inductor short is detected> As shown in FIGS. 1 and 8, the processor 32 receives a notification indicating the detection result of an inductor short circuit from the detection unit 50. The processor 32 receives, for example, a notification indicating that an inductor short circuit has occurred. The processor 32 controls the processing load of the processor 31 according to the detection result of the inductor short circuit by the detection unit. When an inductor short circuit occurs, the processor 32 sends a command to the processor 31 to transition to a low-load mode. When an inductor short circuit occurs in the multi-phase power supply 22, the processor 32 controls the processor 31 to reduce the processing load. This allows the processor 31 to execute a low-load process when an inductor short circuit occurs. For example, it is possible to switch from automatic operation to manual operation.

[0061] As described above, when an inter-inductor short circuit occurs, the ability of the output voltage Vout1 to follow the load response deteriorates, and there is a risk that the output voltage Vout1 will exceed the guaranteed operating range of the processor 31. Therefore, the processor 32 acquires a signal indicating the processing load state of the processor 31, and transmits a command to the processor 31 to transition to the low-load mode so as to prevent a sudden load fluctuation.

[0062] The processing executed by the processor 31 includes low-load processing, high-load processing with a higher processing load than the low-load processing, and medium-load processing with a processing load between the low-load processing and the high-load processing. For example, the high-load processing is an automatic driving mode. The medium-load processing is an automatic driving mode in which some functions are restricted compared to the high-load processing. The medium-load processing is a mode with a lower level of automatic driving than the high-load processing. The low-load processing is a manual driving mode. The processor 31 can execute processing with at least three different processing load levels. The processor 31 can execute multiple modes with different processing loads, for example, a high-load mode, a medium-load mode, and a low-load mode.

[0063] Fig. 12 is a flowchart showing an example of processing executed by the real-time CPU. Fig. 12 shows the transition processing to the low-load mode executed by the processor (PU2) 32 when an inter-inductor short circuit is detected. The processor 32 executes processing to limit the processor 31 to the low-load mode when an inter-inductor short circuit is detected. When power is supplied and the processor 32 starts up, it executes the processing shown below.

[0064] First, the processor 32 determines whether or not there is a short circuit detection notification (step S10). The processor 32 repeatedly executes step S10 until it receives a notification indicating the detection of an inter-inductor short circuit from the detection unit 50. For example, when the output of the comparator 54 switches to an H level, the processor 32 receives the notification indicating the detection of an inter-inductor short circuit.

[0065] Upon receiving the short detection notification, processor 32 then checks the processing load of processor 31 (step S20). Processor 32 requests processor 31 to return the processing load status. Upon receiving the request, processor 31 transmits a signal indicating the processing load status to processor 32. Processor 31 transmits, for example, a signal indicating which mode is being executed.

[0066] Next, the processor 32 determines whether the processing load of the processor 31 is high (step S30). The processor 32 determines whether high-load processing is being executed based on the signal indicating the processing load state transmitted by the processor 31.

[0067] If it is determined that the processing load is not high, processor 32 proceeds to step S60 without executing the processes of steps S40 and S50. If it is determined that the processing load is high, processor 32 first sends a command to processor 31 to transition to a medium load mode in which medium load processing is performed (step S40). Upon receiving the medium load transition command, processor 31 switches from a high load mode in which high load processing is performed to the medium load mode. Once the mode switch is complete, processor 31 sends a transition completion notification to processor 32.

[0068] Next, the processor 32 determines whether or not there is a notification of completion of transition to medium load processing (step S50). The processor 32 repeatedly executes step S50 until it receives a notification of completion of transition from high load processing to medium load processing.

[0069] When processor 32 receives the notification of completion of transition to medium-load processing, it sends a command to processor 31 to transition to a low-load mode in which low-load processing is executed (step S60). When processor 31 receives the low-load transition command, it switches from the medium-load mode to the low-load mode in which low-load processing is executed.

[0070] If the processing load of processor 31 is medium in step S30, processor 32 transmits a command to transition to low-load mode in step S60. Upon receiving the low-load transition command, processor 31 switches from medium-load mode to low-load mode, which executes low-load processing. If the processing load of processor 31 is low in step S30, processor 32 transmits a command to maintain the low-load mode in step S60. Upon receiving a low-load maintenance command, processor 31 maintains the low-load mode. After receiving a low-load transition command or a low-load maintenance command from processor 32, processor 31 maintains (maintains) the low-load mode. Upon completing the switch to low-load mode or maintenance of low-load mode, processor 31 transmits a transition completion notification to processor 32.

[0071] Next, the processor 32 determines whether or not there is a notification of completion of transition to low-load processing (step S70). The processor 32 repeatedly executes step S70 until it receives a notification of completion of transition to low-load processing. When it receives a notification of completion of transition to low-load processing, the processor 32 ends the series of processes described above.

[0072] FIG. 13 shows an example of a timing chart when an inductor short circuit occurs during high-load processing. FIG. 14 shows an example of a timing chart when an inductor short circuit occurs during low-load processing. FIG. 15 shows a timing chart of a reference example. Like FIG. 13, FIG. 15 shows a timing chart when an inductor short circuit occurs during high-load processing. In FIGS. 13, 14, and 15, PU1 indicates the processing (control mode) performed by the processor 31. Iout indicates the current consumption of the processor 31. Vout1 indicates the output voltage of the multi-phase power supply 22. In FIGS. 13 and 14, PU2 indicates the processing (control mode) performed by the processor 32. The notification is a notification signal of the result of the detection of an inductor short circuit by the detection unit 50.

[0073] In FIG. 13, an inter-inductor short circuit occurs at timing T11. After timing T11, the ripple component of the output voltage Vout1 increases. When a notification indicating the detection of an inter-inductor short circuit is received, the mode executed by processor 32 switches from abnormality monitoring of processor 31 to low-load mode transition processing. As described above, processor 32 requests processor 31 to confirm the processing status, and processor 31 returns a signal indicating the processing status to processor 32. Because processor 31 is executing high-load processing, processor 32 sends a transition command to processor 31 to transition to medium-load mode.

[0074] Upon receiving the transition command, processor 31 switches from high load processing to medium load processing at timing T12. As a result, current consumption Iout1 becomes lower than during high load processing. Although the short circuit between the inductors reduces the ability of output voltage Vout1 to follow the load response, because high load processing is switched to medium load processing, output voltage Vout1 does not exceed the guaranteed operating range of processor 31. At timing T12, processor 31 sends a notification to processor 32 indicating completion of transition to medium load processing. Upon receiving the transition completion notification, processor 32 sends a transition command to processor 31 to switch to low load mode.

[0075] In response to the transition command, the processor 31 switches from medium load processing to low load processing at timing T13. As a result, the current consumption Iout1 becomes lower than during medium load processing. Because the processing switches from medium load processing to low load processing, the output voltage Vout1 does not exceed the guaranteed operating range of the processor 31. At timing T13, the processor 31 transmits a notification to the processor 32 indicating the completion of the transition to low load processing. Upon receiving the transition completion notification, the mode executed by the processor 32 switches from low load mode transition processing to abnormality monitoring.

[0076] In FIG. 14, an inter-inductor short circuit occurs at timing T21. After timing T21, the ripple component of the output voltage Vout1 increases. When a notification indicating the detection of an inter-inductor short circuit is received, the mode executed by processor 32 switches from abnormality monitoring to low-load mode transition processing. Processor 32 requests processor 31 to confirm the processing status, and processor 31 returns a signal indicating the processing status to processor 32. Because processor 31 is executing low-load processing, processor 32 sends a command to processor 31 to maintain the low-load mode.

[0077] Upon receiving the hold command, the processor 31 ends the process of holding the low-load processing at timing T22. To hold (maintain) the low-load processing, the output voltage Vout1 does not exceed the guaranteed operating range of the processor 31. At timing T22, the processor 31 transmits a notification indicating that the low-load processing has been held to the processor 32. Upon receiving the hold completion notification, the mode executed by the processor 32 switches from the low-load mode transition process to abnormality monitoring.

[0078] In FIG. 15, an inter-inductor short circuit occurs at timing T31. After timing T31, the ripple component of the output voltage Vout1 increases. In the reference example shown in FIG. 15, the inter-inductor short circuit is not detected, and the processing load of the processor 31 is not controlled in accordance with the detection result. Therefore, even if an inter-inductor short circuit occurs, the processor 31 continues to perform high-load processing.

[0079] At timing T32, the processor 31 switches from high-load processing to low-load processing. For example, a user input switches from a high-load automatic operation mode to a low-load manual operation mode. This causes a sudden drop in the current consumption Iout1. In addition to the increase in ripple components, the short circuit between the inductors has deteriorated the ability of the output voltage Vout1 to follow the load response. Therefore, the sudden load change from a high load to a low load causes the output voltage Vout1 to increase, exceeding the guaranteed operating range of the processor 31. This may cause the processor 31, and ultimately the SoC 30, to malfunction.

[0080] Instead of performing step S70, the processor 32 may end the above series of processes by powering off the processor 32. The processor 32 may execute the process of transitioning to the low-load mode in response to the receipt of a notification indicating the detection of an inter-inductor short circuit. The processor 32 may execute at least a part of the process of transitioning to the low-load mode in parallel with the abnormality monitoring process.

[0081] <Summary of the First Embodiment> The electronic control device 10 of this embodiment includes a multiphase power supply 22 having a plurality of inductors 25, a detection unit 50, a processor 31 that operates by receiving an output voltage supplied from the multiphase power supply 22, and a processor 32 that monitors the processor 31. The detection unit 50 detects an inter-inductor short circuit based on the output voltage of the multiphase power supply 22. The processor 32 controls the processing load of the processor 31 in accordance with the detection result of the inter-inductor short circuit by the detection unit 50. The processor 31 corresponds to a first processor, and the processor 32 corresponds to a second processor.

[0082] According to the disclosed electronic control device, by including the detection unit 50 and the processor 32, it is possible to perform control in response to an inter-inductor short circuit. For example, when an inter-inductor short circuit occurs, the processor 32 controls the processing load of the processor 31 so as to prevent a sudden load fluctuation. This makes it possible to prevent the output voltage from exceeding the guaranteed operating range of the processor 31. For example, it is possible to prevent malfunction of the processor 31, and therefore malfunction of the SoC 30.

[0083] As illustrated, the processor 32 may operate by receiving power from a power source (secondary power supply circuit 23) separate from the multiphase power supply 22. This allows the processor 32 to control the processing load of the processor 31 even if an inductor short occurs in the multiphase power supply 22 that supplies power to the processor 31. The processor 32 can execute low-load mode transition processing.

[0084] As illustrated in the example, when processor 32 receives a notification from detection unit 50 indicating the detection of an inter-inductor short circuit, it may check the processing load of processor 31 and control the processing load of processor 31 according to the check result. By checking the processing load of processor 31 when an inter-inductor short circuit is detected, processor 32 can reliably execute control that does not cause a sudden load fluctuation.

[0085] As illustrated, the processor 32 may control the processor 31 to execute low-load processing when the processing load of the processor 31 is lower than the processing load when high-load processing is being executed. The low-load processing corresponds to the first load processing, and the high-load processing corresponds to the second load processing. The medium-load processing corresponds to the third load processing. When the processing load of the processor 31 is medium, the load fluctuation is small even when switching from the medium-load processing to the low-load processing. When the processing load of the processor 31 is low, the low-load processing is maintained, so there is almost no load fluctuation. Therefore, it is possible to prevent the output voltage from exceeding the guaranteed operating range of the processor 31. Furthermore, after detecting an inter-inductor short, the processing load of the processor 31 can be immediately reduced.

[0086] As shown in the example, when the processing load of the processor 31 is the processing load during high-load processing, the processor 32 controls the processor 31 to transition (shift) from high-load processing to medium-load processing. Rather than suddenly switching from high-load processing to low-load processing, the processor 32 temporarily switches to medium-load processing. This makes it possible to prevent the processing load of the processor 31 from fluctuating suddenly and causing the output voltage to exceed the guaranteed operating range of the processor 31.

[0087] As illustrated, the processor 32 is controlled to transition to low-load processing once the transition to medium-load processing is complete. Since the processor 32 switches to low-load processing after the transition to medium-load processing is complete, abrupt fluctuations in the processing load of the processor 31 can be more reliably suppressed. The processing of the processor 31 can be suppressed from switching from medium-load processing to high-load processing. When an inter-inductor short circuit occurs, abrupt fluctuations in the processing load of the processor 31 can be suppressed and the processing load of the processor 31 can be reduced.

[0088] As illustrated, the multiphase power supply 22 may have a coupled inductor 25C including multiple inductors 25 arranged side by side in a predetermined direction and magnetically coupled to one another. By employing a coupled inductor 25C with such a configuration, it is possible to enhance the effect of magnetic flux cancellation and reduce the effective inductance. However, when adjacent inductors 25 approach each other, a short circuit between the inductors is more likely to occur due to a foreign object or the like. However, by providing the above-described detection unit 50, it is possible to detect a short circuit between the inductors. The processor 32 can control the processing load of the processor 31 according to the detection result of the detection unit 50.

[0089] (Second embodiment) This embodiment is a modification of the preceding embodiment as a basic form, and the description of the preceding embodiment can be used. In addition to the preceding embodiment, the restriction on the low load mode may be lifted when the short circuit between the inductors is resolved.

[0090] Fig. 16 is a flowchart showing an example of processing executed by the real-time CPU in the electronic control unit according to this embodiment. Fig. 16 corresponds to Fig. 12. The processing up to step S70 is the same as that shown in Fig. 12.

[0091] When the transition completion notification to the low-load processing is acquired in step S70, the processor 32 then determines whether or not there is a notification of recovery from the inductor short circuit (step S80). The processor 32 determines whether or not a recovery notification has been acquired. For example, when the output of the comparator 54 switches from H level to L level, the detection unit 50 outputs a recovery notification to the processor 32 indicating that the inductor short circuit has been resolved.

[0092] Processor 32 repeatedly executes step S80 until it receives a restoration notification. Upon receiving the restoration notification, processor 32 releases the low-load restriction (step S90) and terminates the above-described series of processes. In step S90, processor 32 sends a command to processor 31 to release the restriction on low-load processing. As a result, processor 31 is no longer subject to the processing load restriction imposed by processor 32 and executes predetermined processing in accordance with the program. With the restriction released, processor 31 is able to execute processing other than low-load processing. Processor 32 executes the processing from step S10 onwards again, for example. The other configurations are the same as those described in the preceding embodiment. Note that the restriction release processing may be executed separately from the low-load mode transition processing.

[0093] <Summary of the second embodiment> As illustrated, when the processor 32 receives a notification from the detection unit 50 indicating recovery from the inductor short circuit, the processor 32 may cancel the restriction of the processor 31's processing to low-load processing. When the inductor short circuit of the multi-phase power supply 22 is resolved, the effective inductance decreases, improving the ability of the output voltage Vout1 to follow the load response. By returning the processor 31 to a normal operating state after the inductor short circuit is resolved, the output voltage Vout1 can be prevented from exceeding the guaranteed operating voltage of the processor 31. For example, even when switching from high-load processing to low-load processing, the output voltage Vout1 can be prevented from exceeding the guaranteed operating voltage.

[0094] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure encompasses the exemplified embodiments and modifications thereto by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and / or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses the omission of parts and / or elements from the embodiments. The disclosure encompasses the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are defined by the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the claims.

[0095] The disclosure in the specification, drawings, etc. is not limited by the claims. The disclosure in the specification, drawings, etc. encompasses the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being bound by the claims.

[0096] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly on, coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, no intervening elements or layers are present. Other terms used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items. That is, reference to A and / or B means at least one of A and B.

[0097] Spatially relative terms such as "inside," "outside," "back," "below," "low," "top," "top," and the like are used herein to facilitate the description of one element or feature's relationship to other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were turned over, elements described as "below" or "directly below" other elements or features would then be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0098] Although an example in which the power supply circuit 20 includes the primary power supply circuit 21 and the secondary power supply circuit 22 has been described, the present invention is not limited to this. Although an example in which the multi-phase power supply 22 forms the secondary power supply circuit has been described, the present invention is not limited to this.

[0099] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be written in a multiple dependent form, with the subsequent clause referring to the preceding clause as an alternative. Furthermore, some clauses may be written in a multiple dependent form, referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.

[0100] <Technical philosophy 1> a multiphase power supply (22) having a plurality of inductors (25); a detection unit (50) that detects a short circuit between inductors of the multiphase power supply based on an output voltage of the multiphase power supply; a first processor (31) that operates upon receiving the output voltage; a second processor (32) that monitors the first processor; Equipped with The second processor controls the processing load of the first processor in accordance with a detection result of the inter-inductor short circuit by the detection unit.

[0101] <Technical philosophy 2> The electronic control device according to Technical Idea 1, wherein the second processor operates by receiving a supply of power from a power source (23) separate from the multi-phase power source.

[0102] <Technical philosophy 3> the processes executed by the first processor include a first load process, a second load process having a processing load higher than that of the first load process, and a third load process having a processing load between that of the first load process and that of the second load process; The electronic control device according to Technical Idea 1 or Technical Idea 2, wherein when the second processor receives a notification from the detection unit indicating the detection of a short circuit between the inductors, it checks the processing load of the first processor and controls the processing load of the first processor according to the checking result.

[0103] <Technical philosophy 4> The electronic control device described in technical idea 3, wherein the second processor controls the first processor to execute the first load processing when the processing load of the first processor is lower than the processing load when the second load processing is executed.

[0104] <Technical philosophy 5> The electronic control device described in Technical Idea 3 or Technical Idea 4, wherein the second processor controls the first processor to transition from the second load processing to the third load processing when the processing load of the first processor is the processing load when the second load processing is being executed.

[0105] <Technical philosophy 6> The electronic control device according to Technical Concept 5, wherein the second processor controls the transition to the first load process when the transition to the third load process is completed.

[0106] <Technical philosophy 7> The electronic control device described in any one of technical ideas 3 to 6, wherein when the second processor receives a notification from the detection unit indicating recovery from the short circuit between the inductors, it releases the restriction on the processing of the first processor to the first load processing.

[0107] <Technical philosophy 8> The multiphase power supply has a coupled inductor (25C) including a plurality of the inductors, The electronic control device according to any one of Technical Concepts 1 to 7, wherein the coupled inductors are arranged side by side in a predetermined direction and are magnetically coupled to each other. [Explanation of symbols]

[0108] 10...Electronic control device, 20...Power supply circuit, 21...Primary power supply circuit, 22...Secondary power supply circuit (multi-phase power supply), 23...Secondary power supply circuit, 24...Driver, 24H, 24L...Switching element, 25...Inductor, 25C...Coupled inductor, 26...Capacitor, 27...Core, 271...Center core, 272, 273...End core, 28...Coil, 281, 282...Terminal portion, 283, 284...Side wall portion, 285...Upper wall portion, 30...SoC, 31, 32, 33...Processor, 34...Flash, 35...Memory controller, 36...Communication IF, 40...Peripheral device, 41...DRAM, 42...Flash, 43...CAN transceiver, 44...Ethernet PHY, 50...Detection portion, 51...HPF, 52...Comparator, 53...Integrator, 54...Comparator, 55...First threshold, 56...Second threshold

Claims

1. a multiphase power supply (22) having a plurality of inductors (25); a detection unit (50) that detects a short circuit between inductors of the multiphase power supply based on an output voltage of the multiphase power supply; a first processor (31) that operates upon receiving the output voltage; a second processor (32) that monitors the first processor; Equipped with The second processor controls a processing load of the first processor in accordance with a detection result of the inter-inductor short circuit by the detection unit.

2. 2. The electronic control device according to claim 1, wherein the second processor operates by receiving power from a power source (23) separate from the multi-phase power source.

3. the processes executed by the first processor include a first load process, a second load process having a processing load higher than that of the first load process, and a third load process having a processing load between that of the first load process and that of the second load process; 3. The electronic control device according to claim 1, wherein the second processor, upon receiving a notification from the detection unit indicating the detection of the inter-inductor short circuit, checks the processing load of the first processor and controls the processing load of the first processor according to the check result.

4. 4. The electronic control device according to claim 3, wherein the second processor controls the first processor to execute the first load process when the processing load of the first processor is lower than the processing load when the second load process is executed.

5. 4. The electronic control device according to claim 3, wherein the second processor controls the first processor to transition from the second load process to the third load process when the processing load of the first processor is the processing load during execution of the second load process.

6. The electronic control device according to claim 5 , wherein the second processor controls the transition to the first load process when the transition to the third load process is completed.

7. 4. The electronic control device according to claim 3, wherein the second processor, upon receiving a notification from the detection unit indicating recovery from the short circuit between the inductors, cancels the restriction of the processing of the first processor to the first load processing.

8. The multiphase power supply has a coupled inductor (25C) including a plurality of the inductors, 3. The electronic control device according to claim 1, wherein the coupled inductors are arranged side by side in a predetermined direction and are magnetically coupled to each other.

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