Manufacturing method of printed circuit boards

Abstract

Improving the productivity of printed circuit boards. [Solution] The present disclosure is a method for manufacturing a printed circuit board, comprising forming via holes in an insulating layer covering a conductor pad to expose the conductor pad, and forming via conductors in the via holes to connect with the conductor pad, wherein forming the via holes includes plasma etching the insulating layer.

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a printed wiring board.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a wiring board including an insulating layer covering a pad, an opening formed in the insulating layer by a laser and exposing a part of the pad, and a via provided in the opening and connected to the pad.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a configuration where via holes are formed in an insulating layer, when the via holes are formed by laser irradiation, the shape of the via holes may not be as desired.

Means for Solving the Problems

[0005] The method for manufacturing a printed wiring board according to the present disclosure includes forming via holes that expose the conductor pads in an insulating layer covering the conductor pads, and forming via conductors connected to the conductor pads in the via holes, and forming the via holes includes plasma etching the insulating layer.

[0006] According to the method for manufacturing a printed wiring board of the present disclosure, the shape of the via holes can be made closer to the target compared to a configuration where the via holes are formed by laser irradiation.

Brief Description of the Drawings

[0007] [Figure 1] It seems there is a missing number in the "

Patent Documents

[0008] Next, an example of an embodiment of the technology of this disclosure will be described with reference to the drawings. Arrow W indicates the width direction of the printed circuit board. Arrow H indicates the stacking direction of the printed circuit board. The width direction and the stacking direction are perpendicular to each other. The direction perpendicular to both the width direction and the stacking direction is defined as the depth direction of the printed circuit board. These directions are introduced for convenience and will change depending on the orientation of the printed circuit board.

[0009] <Overall Structure> Figure 11 is a cross-sectional view showing a portion of the printed circuit board 10 of the embodiment of this disclosure (hereinafter referred to as "this embodiment").

[0010] As shown in FIG. 11, the printed wiring board 10 of the present embodiment is formed with via conductors 60 in a part of a plate-like body in which a plurality of members are laminated. The printed wiring board 10 includes conductor pads 20, an interlayer material 30, via holes 50, via conductors 60, and lands 70.

[0011] (Conductor Pad) The conductor pads 20 are made of metal along the width direction and the depth direction. The conductor pads 20 are made of, for example, Cu (copper). The conductor pads 20 have electrical conductivity. Note that the conductor pads 20 may be a part of a wiring pattern formed under the interlayer material 30 described later, or may be terminals of electronic components (not shown) embedded in the printed wiring board 10.

[0012] (Interlayer Material) The interlayer material 30 is formed along the width direction and the depth direction and is disposed above the conductor pads 20 in the stacking direction. The interlayer material 30 is an insulator having a greater thickness in the stacking direction than the conductor pads 20. The interlayer material 30 insulates the electrical conduction to the conductor pads 20.

[0013] The interlayer material 30 has a first surface 31 forming the upper surface in the stacking direction and a second surface 32 which is the surface opposite to the first surface 31 and forms the lower surface in the stacking direction. In the present embodiment, the interlayer material 30 covers the conductor pads 20 in a state of being adhered to the conductor pads 20 by the second surface 32. The interlayer material 30 is an example of an insulating layer.

[0014] (Via Hole) The via holes 50 have openings extending in the depth direction and the width direction, and are holes formed along the stacking direction of the conductor pads 20 and the interlayer material 30. Specifically, the via holes 50 penetrate the interlayer material 30 in the stacking direction and are formed up to the surface layer portion 22 in the stacking direction of the conductor pads 20. The via diameter of the via holes 50 is, for example, 10 μm or less. The formation of the via holes 50 will be described later.

[0015] (Via Conductor) The via conductor 60 is a conductor formed in the via hole 50. Specifically, the via conductor 60 is a conductor in which the via hole 50 is filled with a plating material.

[0016] The via conductor 60 fills the via hole 50 along the hole wall of the via hole 50 in the depth direction and the width direction of the via hole 50. The via conductor 60 is electrically connected to the surface layer portion 22 of the conductor pad 20. The via conductor 60 includes a seed layer 61 and an electrolytic plating layer 62.

[0017] (Land) The land 70 is formed by plating on the first surface 31 side of the interlayer material 30. The land 70 includes a seed layer 71 and an electrolytic plating layer 72. The seed layer 71 is formed integrally with the seed layer 61 of the via conductor 60. Also, the electrolytic plating layer 72 is formed integrally with the electrolytic plating layer 62 of the via conductor 60 on the upper side in the lamination direction than the seed layer 71. The land 70 covers the first surface 31 of the interlayer material around the via conductor 30. That is, the land 70 is formed so as to protrude more than the via conductor 60 in the width direction.

[0018] The land 70 is made of, for example, copper. The land 70 is a conductor pattern in a specific layer of the printed wiring board 10.

[0019] Thus, the printed wiring board 10 is configured.

[0020] <Manufacturing method of printed wiring board> Next, the manufacturing method of the printed wiring board 10 of the present embodiment will be described. For convenience, the printed wiring board 10 in the manufacturing process is referred to as material M.

[0021] As shown in FIG. 1, an interlayer material 30 that covers the conductor pad 20 in the width direction and the depth direction is prepared.

[0022] As shown in FIG. 2, a mask 40 that covers the first surface 31 of the interlayer material 30 is formed. For example, the mask 40 is a copper thin film having a thickness of about 3 to 10 μm. The copper thin film is an example of a metal thin film.

[0023] As shown in Figure 3, a portion of the resist 90 is formed on the side of the mask 40 opposite to the interlayer material 30. For the resist 90, for example, a dry film resist is used.

[0024] As shown in Figure 4, copper etching is performed on the mask 40. Copper etching creates an exposed portion 42 on the mask 40, where a part of the first surface 31 side, which is the side of the interlayer material 30 opposite to the side covering the conductor pad 20, is exposed facing upward in the lamination direction.

[0025] As shown in Figure 5, the resist 90 is removed from the mask 40.

[0026] As shown in Figure 6, with material M placed inside a vacuum chamber (not shown), plasma irradiation is performed on material M along the stacking direction using a plasma irradiation device 80 with plasma-converted process gas, carbon tetrafluoride gas. Plasma etching is performed on the interlayer material 30 by plasma irradiation.

[0027] As shown in Figure 7, when the exposed interlayer material 30 disappears from the exposed portion 42 of the mask 40 and the surface layer 22 of the conductive pad 20 is exposed, the plasma irradiation is terminated. Then, the material M is removed from the vacuum chamber.

[0028] Copper etching is performed on the material M after plasma irradiation is complete. Specifically, copper etching is performed on material M until the mask 40 on the first surface 31 of the interlayer material 30 is removed. As a result, via holes 50 are formed as shown in Figure 8. Note that the surface layer 22 of the conductor pad 20 may be slightly abraded by the copper etching.

[0029] As shown in Figure 9, seed layers 61 and 71 that are electrically connected to the conductor pad 20 are formed on the via holes 50 and the first surface 31 of the interlayer material 30 by electroless plating.

[0030] As shown in Figure 10, a plating resist 92 is formed on the seed layer 71. Furthermore, electroplating layers 62 and 72 are formed on the seed layers 61 and 71 that are exposed from the plating resist 92.

[0031] Then, as shown in Figure 11, the plating resist 92 and the seed layer 71 exposed from the electroplating layer 72 are removed by etching. This completes the formation of the via conductor 60 and the land 70.

[0032] Based on the above, the printed circuit board 10 is manufactured.

[0033] <Effects and Effects> In a configuration in which via holes are formed in an insulating layer, when the via holes are formed by laser irradiation, particularly when forming via holes with a diameter of 10 μm or less, the shape of the via holes may not be as intended.

[0034] A method for manufacturing a printed circuit board 10 according to an embodiment of the present disclosure includes forming via holes 50 in an interlayer material 30 covering a conductor pad 20 to expose the conductor pad 20, and forming via conductors 60 connected to the conductor pad 20 in the via holes 50, wherein forming the via holes 50 includes plasma etching the interlayer material 30.

[0035] According to this manufacturing method, resin etching is performed when the interlayer material 30 is irradiated with plasma. As a result, via holes with holes aligned with the stacking direction are formed. Therefore, compared to a configuration in which via holes with tapered holes intersecting the stacking direction are formed by laser irradiation, the shape of the via holes 50 can be brought closer to the desired shape.

[0036] Furthermore, in the manufacturing method of the printed circuit board 10 according to the embodiment of this disclosure, plasma etching is performed using a mask 40 that exposes a portion of the interlayer material 30.

[0037] This manufacturing method makes production easier than controlling plasma etching to match the location where via holes are formed.

[0038] Furthermore, the manufacturing method of the printed circuit board 10 according to the embodiment of this disclosure includes forming a thin copper film on the first surface 31 of the interlayer material 30 as the mask 40.

[0039] According to this manufacturing method, when forming multiple via holes, the exposed portions 42 can be formed collectively.

[0040] In the method for manufacturing the printed circuit board 10 according to the embodiments of this disclosure, plasma etching is performed using carbon tetrafluoride as the gas.

[0041] Furthermore, in the manufacturing method of the printed circuit board 10 according to the embodiment of the present disclosure, forming via holes 50 includes forming via holes 50 with a via diameter of 10 μm or less.

[0042] <Variation> Although the present disclosure has been described in detail with respect to specific embodiments, it will be apparent to those skilled in the art that the present disclosure is not limited to these embodiments and can take various other forms within the scope of the present disclosure. For example, the following modifications are possible, but are not limited to these.

[0043] In the printed circuit board manufacturing method of the above embodiment, plasma etching is performed using a mask 40 that exposes a portion of the interlayer material 30. However, these are not essential for implementing the present disclosure. For example, the plasma irradiation position may be controlled to match the via hole formation position without using a mask 40.

[0044] Furthermore, the method for manufacturing a printed circuit board in the above embodiment includes forming a thin copper film on the first surface 31 of the interlayer material 30 as the mask 40. However, these are not essential for implementing this disclosure. For example, when forming multiple via holes, a thin film may be formed with a metal other than copper.

[0045] Furthermore, in the manufacturing method of the printed circuit board 10 of the embodiment of this disclosure, plasma etching is performed using carbon tetrafluoride as a gas. However, these are not essential for implementing this disclosure.

[0046] In the above embodiment, the printed circuit board 10 has a single layer of interlayer material 30 covering the conductor pads 20, but it is not limited to this. For example, the printed circuit board 10 may have a build-up section in which multiple layers of interlayer material 30 are laminated.

[0047] In the above embodiment, the printed circuit board 10 is completed by the above manufacturing method, but the invention is not limited to this. For example, new steps may be added to the manufacturing method of the printed circuit board 10.

[0048] In the above embodiment, the mask 40 is a thin copper film, but it is not limited to this. For example, the mask may be a thin film made of titanium, nickel, or the like.

[0049] In the above embodiment, for example, a dry film resist was used for the resist 90, but it is not limited to this. [Explanation of symbols]

[0050] 10 Printed circuit boards 20 Conductor Pads 22 Surface layer 30 Interlayer material (an example of an insulating layer) 31 Page 1 32 2nd page 40 masks 42 Exposed part 50 via holes 60 via conductors 60 Conductor Pads 70 rand 80 Plasma irradiation device 90 Resist

Claims

1. A via hole is formed in the insulating layer covering the conductor pad, exposing the conductor pad. A method for manufacturing a printed circuit board, comprising forming via conductors connected to the conductor pads in the via holes, Forming the via holes includes plasma etching the insulating layer.

2. A method for manufacturing a printed circuit board according to claim 1, The plasma etching is performed using a mask that exposes a portion of the insulating layer.

3. A method for manufacturing a printed circuit board according to claim 2, The aforementioned mask includes forming a thin metal film on the surface of the insulating layer.

4. A method for manufacturing a printed circuit board according to claim 1, The aforementioned plasma etching is performed using carbon tetrafluoride as the gas.

5. A method for manufacturing a printed circuit board according to claims 1 to 4, Forming the via holes includes forming via holes with a via diameter of 10 μm or less.

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