Wiring circuit board

Abstract

To provide a wiring circuit board that can achieve high transparency. [Solution] The wiring circuit board 1 comprises a transparent substrate 10 and a metal layer 20 formed in a mesh pattern on the transparent substrate 10. The metal layer 20 includes a plurality of intersection portions 21 and a plurality of wiring portions 22 connecting the plurality of intersection portions 21. Each wiring portion 22 has a width W of 1 μm or more and 10 μm or less. On one surface of the transparent substrate 10, a plurality of intersection-forming regions where a plurality of intersection portions 21 should be formed and a plurality of wiring-forming regions where a plurality of wiring portions 22 should be formed are defined. The intersection-surrounding region AR surrounding each intersection-forming region is divided into a plurality of sub-regions SR by a plurality of wiring-forming regions extending from the intersection-forming region. The area of ​​the metal layer 20 that extends from the intersection portions 21 formed on each intersection-forming region onto each sub-region SR surrounding the intersection-forming region is 4.00 μm 2 The following applies:

Description

[Technical Field]

[0001] The present invention relates to a wiring circuit board in which wiring is formed on a transparent substrate. [Background technology]

[0002] There are wiring circuit boards in which wiring is formed on a transparent substrate. Such wiring circuit boards are used in various devices such as touch panels and defroster devices, and it is required that the wiring circuit board be perceived as transparent by the user who sees it. For example, Patent Document 1 describes a conductive sheet containing a base material and a plurality of patterned conductors as an example of a wiring circuit board. The base material is a transparent electrically insulating film and corresponds to the transparent substrate described above. Each patterned conductor has a linear shape and is arranged on one surface of the base material and corresponds to the wiring described above. The conductive sheet is placed in a part of the side window of a passenger car and has a certain degree of transparency. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-12773 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] The wiring formed on the transparent substrate mentioned above can reduce the transparency of the circuit board. Depending on the function required of the circuit board, a mesh-like wiring pattern may be formed on the transparent substrate. In this case, multiple intersections where multiple wires intersect will be formed on the transparent substrate. If the size of each intersection is large, it will be more easily visible to the user. In other words, the transparency of the circuit board will decrease.

[0005] The objective of the present invention is to provide a wiring circuit board that can achieve high transparency. [Means for solving the problem]

[0006] A wiring circuit board according to one aspect of the present invention comprises a transparent substrate having one surface and a metal layer formed in a mesh pattern on the one surface of the transparent substrate, wherein the metal layer includes a plurality of intersections and a plurality of wiring sections connecting the plurality of intersections, the plurality of wiring sections are formed such that three or more wiring sections extend from each intersection on the one surface of the transparent substrate, each wiring section has a width of 1 μm or more and 10 μm or less, and the plurality of intersections are to be formed on the one surface of the transparent substrate according to the design Multiple intersection formation regions and multiple design wiring formation regions where the multiple wiring portions are to be formed are defined, and on one surface of the transparent substrate, the region surrounding each intersection formation region is divided into three or more sub-regions surrounding the intersection formation region by the three or more wiring formation regions extending from the intersection formation region, and the area of ​​the portion of the metal layer that extends from the intersection portion formed on each intersection formation region onto each sub-region surrounding the intersection formation region is 4.00 μm². 2 The following applies: [Effects of the Invention]

[0007] According to the present invention, a wiring circuit board with high transparency can be realized. [Brief explanation of the drawing]

[0008] [Figure 1] This is a perspective view of the external appearance of a wiring circuit board according to one embodiment of the present invention. [Figure 2] This is a cross-sectional view of the wiring circuit board inside the outlet shown by line AA in Figure 1. [Figure 3] This is a plan view showing an example of a region on one surface of a transparent substrate where a metal layer should be formed. [Figure 4] Figure 3 is a plan view showing an example of a wiring circuit board fabricated using a transparent substrate. [Figure 5] Figure 4 is a partially enlarged plan view of the wiring circuit board. [Figure 6]It is a plan view showing a plurality of intersection formation regions and a plurality of wiring formation regions of a transparent substrate according to a first modification example. [Figure 7] It is a plan view showing a wiring circuit board according to a first modification example manufactured using the transparent substrate of FIG. 6. [Figure 8] It is a partially enlarged plan view of the wiring circuit board of FIG. 7. [Figure 9] It is a plan view showing a plurality of intersection formation regions and a plurality of wiring formation regions of a transparent substrate according to a second modification example. [Figure 10] It is a plan view showing a wiring circuit board according to a second modification example manufactured using the transparent substrate of FIG. 9. [Figure 11] It is a partially enlarged plan view of the wiring circuit board of FIG. 10. [Figure 12] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 13] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 14] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 15] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 16] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 17] It is a schematic cross-sectional view for explaining a method of manufacturing a wiring circuit board according to an embodiment of the present invention. [Figure 18] It is a SEM image of sample A. [Figure 19] It is a SEM image of sample B. [Figure 20] It is a SEM image of sample C. [Figure 21] It is a SEM image of sample D. [Figure 22] It is a figure showing the results of a transparency evaluation test. [Figure 23]This is a cross-sectional view of a wiring circuit board according to another embodiment. [Modes for carrying out the invention]

[0009] Hereinafter, a wiring circuit board according to one embodiment of the present invention will be described with reference to the drawings. In the following description, the degree of agreement (degree of agreement) between the image of a predetermined space perceived by the user when the user looks at the predetermined space directly and the image of the predetermined space perceived by the user when the user looks at the predetermined space with the wiring circuit board in between will be referred to as the transparency of the wiring circuit board. The transparency of the wiring circuit board is considered to be higher the higher the degree of agreement between the two images. The degree of agreement between the two images includes the degree of agreement in brightness, the degree of agreement in contrast, and the degree of agreement in contours of the two images perceived by the user.

[0010] 1. Configuration of the wiring circuit board Figure 1 is an external perspective view of a wiring circuit board 1 according to one embodiment of the present invention. The wiring circuit board 1 according to this embodiment mainly has a configuration in which a metal layer 20 and a cover insulating layer 90 are formed in that order on a transparent substrate 10.

[0011] The transparent substrate 10 has a light transmittance of, for example, 80% or more in the visible light region (e.g., 380 nm to 780 nm) and is electrically insulating. The transparent substrate 10 according to this embodiment is formed from a cycloolefin polymer resin. The transparent substrate 10 may also be formed from an organic insulating material such as polyester resin, acrylic resin, polycarbonate resin, or polyimide resin. Furthermore, a glass substrate and a transparent ceramic substrate may be used as the transparent substrate 10. The transparent substrate 10 has a thickness of, for example, 20 μm to 200 μm.

[0012] The metal layer 20 is formed in a mesh pattern on one surface of the transparent substrate 10. Details of the metal layer 20 will be described later. The cover insulating layer 90 is formed on one surface of the transparent substrate 10 so as to cover the metal layer 20. The cover insulating layer 90 according to this embodiment is made of a transparent synthetic resin such as epoxy resin, cycloolefin polymer resin, polycarbonate resin, polyethylene terephthalate resin, polystyrene resin, or polyethylene naphthalate resin. The cover insulating layer 90 has a thickness of, for example, 1 μm to 30 μm. Note that the cover insulating layer 90 is not necessarily required in the wiring circuit board 1.

[0013] The metal layer 20 consists of one or more metals. In Figure 1, within the dashed-dotted outline, an enlarged plan view of a portion of the external perspective view of the wiring circuit board 1 (the portion within the thick dashed-dotted outline) is shown.

[0014] As shown in the callout in Figure 1, the metal layer 20 is formed in a mesh pattern in plan view. More specifically, the metal layer 20 in this example includes a plurality of intersections 21 and a plurality of wiring sections 22 having a common length. The plurality of intersections 21 and the plurality of wiring sections 22 are formed such that, in plan view, four wiring sections 22 extend from each intersection 21 in four mutually orthogonal directions, and each wiring section 22 connects two intersections 21.

[0015] Figure 2 is a cross-sectional view of the outlet of the wiring circuit board 1 shown in Figure 1, taken along line AA. As shown in Figure 2, the metal layer 20 includes a seed layer 20a and a plating layer 20b. In Figure 2, the cross-section of the wiring portion 22 of the metal layer 20 is shown, but the cross-section of the intersection portion 21 has basically the same configuration as the cross-section of the wiring portion 22.

[0016] The seed layer 20a according to this embodiment has a structure in which, for example, a copper thin film is further laminated on a base layer. The base layer is composed of one or more laminated thin films. The one or more thin films constituting the base layer include thin films made of a metal or alloy containing one or more elements from titanium, molybdenum, tungsten, nickel, aluminum, and chromium. In addition to the above example, the base layer may also include a thin film made of indium tin oxide (ITO). On the base layer of the seed layer 20a, instead of the copper thin film described above, a thin film made of a metal or alloy containing one or more elements from gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium may be formed.

[0017] Each thin film constituting the seed layer 20a is formed, for example, by sputtering or electroless plating. The seed layer 20a has a thickness of 0.01 μm or more and 1 μm or less.

[0018] The plating layer 20b is formed by electroplating and is made of a metal or alloy containing one or more elements from among gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium. In this embodiment, the plating layer 20b is made of copper.

[0019] In this embodiment, each wiring portion 22 of the metal layer 20 has a width W of 1 μm to 10 μm. Furthermore, each wiring portion 22 has a thickness T of 0.5 μm to 10 μm in a direction perpendicular to one surface of the transparent substrate 10.

[0020] 2. Details of the metal layer 20 Before the manufacturing of the wiring circuit board 1, a design area is determined on one surface of the transparent substrate 10 in which the metal layer 20 should be formed. Figure 3 is a plan view showing an example of an area on one surface of the transparent substrate 10 in which the metal layer 20 should be formed.

[0021] As shown in Figure 3, on one surface of the transparent substrate 10 before the manufacture of the wiring circuit board 1, there are defined multiple intersection formation regions 11 where multiple intersections 21 of the metal layer 20 are to be formed, and multiple wiring formation regions 12 where multiple wiring portions 22 of the metal layer 20 are to be formed. These regions (11,12) are formed such that, in a plan view, four wiring formation regions 12 extend from each intersection formation region 11 in four mutually orthogonal directions. Furthermore, these regions (11,12) are formed so that each wiring formation region 12 connects two intersection formation regions 11 that are spaced apart from each other. In Figure 3, dot patterns of different densities are applied to the intersection formation regions 11 and the wiring formation regions 12 to make them easier to distinguish.

[0022] Furthermore, in the transparent substrate 10 according to this embodiment, an intersection surrounding region AR is defined to surround each intersection forming region 11, so as to be associated with the said intersection forming region 11. More specifically, the intersection surrounding region AR is defined such that its outer edge forms a circle centered on the corresponding intersection forming region 11, as shown by the dashed line in Figure 3.

[0023] Furthermore, the intersection surrounding region AR is divided into multiple (four in this example) sub-regions SR by multiple (four in this example) wiring formation regions 12 extending from the intersection formation region 11 within the intersection surrounding region AR.

[0024] Incidentally, the metal layer 20 is opaque or has significantly lower transparency than the transparent substrate 10 and the cover insulating layer 90. Therefore, the transparency of the wiring circuit board 1 is determined mainly by the size and shape of the metal layer 20 formed on the transparent substrate 10. As described above, a plurality of intersection formation regions 11 and a plurality of wiring formation regions 12 are predetermined on the transparent substrate 10 before the manufacturing of the wiring circuit board 1. However, if these formation regions (11,12) are excessively large, or if the metal layer 20 is formed so as to extend beyond the formation regions (11,12), the transparency of the wiring circuit board 1 will decrease.

[0025] Figure 4 is a plan view showing an example of a wiring circuit board 1 fabricated using the transparent substrate 10 shown in Figure 3. In Figure 4, the boundaries between multiple intersection formation regions 11 and multiple wiring formation regions 12 on one surface of the transparent substrate 10 and the regions other than these regions (11,12) are shown by dotted lines, and one intersection surrounding region AR is shown by a dashed line.

[0026] Here, if the width W of each wiring portion 22 formed on the wiring circuit board 1 is excessively large, the transparency of the wiring circuit board 1 will be greatly reduced. Also, each of the multiple wiring portions 22 is in close proximity to other wiring portions 22 near the intersection portion 21 to which the wiring portion 22 is connected. Therefore, when manufacturing the wiring circuit board 1, a portion of the metal layer 20 may protrude from the intersection portion 21 into multiple small regions SR. If a large amount of the metal layer 20 protrudes into at least one of the multiple small regions SR surrounding a single intersection portion 21, the transparency of the wiring circuit board 1 will be greatly reduced.

[0027] Therefore, the inventors conducted various experiments and simulations to find the dimensional conditions of each part of the wiring circuit board 1 that must be satisfied in order to obtain a wiring circuit board 1 with high transparency (hereinafter referred to as transparency conditions).

[0028] The transparency condition includes that each wiring portion 22 of the metal layer 20 has a width W of 1 μm or more and 10 μm or less. Furthermore, the transparency condition includes that the area of ​​the portion of the metal layer 20 that extends from the intersection portion 21 formed on each intersection-forming region 11 onto each small region SR surrounding the wiring-forming region 12 is 4.00 μm. 2 This includes the following:

[0029] Figure 5 is a partially enlarged plan view of the wiring circuit board 1 shown in Figure 4. Figure 5 shows an enlarged plan view of one intersection 21 and its vicinity in the plan view of Figure 4. The wiring circuit board 1 according to this embodiment satisfies the transparency conditions described above. In this case, each wiring portion 22 has a width W of 1 μm or more and 10 μm or less. By having a width W of 1 μm or more for each wiring portion 22, the occurrence of defects in the formation of the wiring portion 22 due to making the width W of the wiring portion 22 excessively small is prevented. This suppresses a decrease in the reliability of the wiring circuit board 1. Furthermore, by having a width W of 10 μm or less for each wiring portion 22, the area occupied by the metal layer 20 on one surface of the transparent substrate 10 is reduced compared to the case where wiring portions 22 with a width W greater than 10 μm are provided on one surface of the transparent substrate 10.

[0030] Preferably, each wiring section 22 has a width W of 1 μm to 5 μm. In this case, the area occupied by the metal layer 20 on one surface of the transparent substrate 10 is further reduced. Also, preferably, each wiring section 22 has a thickness T of 5 μm to 10 μm. In this case, since each wiring section 22 has a width W of 1 μm to 10 μm, the aspect ratio of the wiring section 22 (the ratio of thickness T to width W (T / W)) does not become significantly low. As a result, the area occupied by each wiring section 22 on one surface of the transparent substrate 10 can be reduced while ensuring a certain amount of cross-sectional area of ​​the wiring section 22 (the area of ​​the cross-section perpendicular to the direction in which the wiring section 22 extends). Therefore, it becomes possible to lower the resistance value of the wiring section 22.

[0031] In the partially enlarged plan view of Figure 5, the portion of the metal layer 20 that extends from one intersection 21 into each sub-region SR is shown as a dot pattern. As shown in Figure 5, the metal layer 20 does not necessarily extend uniformly into the multiple sub-regions SR surrounding one intersection 21.

[0032] As described above, the wiring circuit board 1 according to this embodiment satisfies the transparency requirement. Therefore, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm². 2The following is achieved. This suppresses the enlargement of the metal layer 20 at each intersection 21. As a result, the wiring circuit board 1 has high transparency.

[0033] Here, it is preferable that the angle α between two adjacent wiring sections 22 (hereinafter referred to as the wiring angle) around each intersection 21 (four in this example) is 30° or more. In the wiring circuit board 1 shown in Figures 1 to 5, the wiring angle α between two adjacent wiring sections 22 is 90°.

[0034] When the wiring angle α is 30° or greater, a wider space is formed between each intersection 21 and between two adjacent wiring sections 22 around that intersection 21, compared to when the wiring angle α is less than 30°. In other words, it is less likely that a significantly narrow and long space will be formed between two adjacent wiring sections 22. Therefore, it becomes unnecessary to form extremely fine wiring sections 22 patterns. As a result, when manufacturing the wiring circuit board 1, the occurrence of large amounts of overhang from each intersection 21 into multiple small regions SR is suppressed.

[0035] 3. The first variation In the wiring circuit board 1 according to this embodiment, the metal layer 20 only needs to be formed on one surface of the transparent substrate 10 so as to satisfy the transparency conditions described above. Figure 6 is a plan view showing a plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 of the transparent substrate 10 according to the first modified example. In the plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 in Figure 6, the angular spacing of the four wiring-forming regions 12 extending from each intersection-forming region 11 is different from that of the transparent substrate 10 in Figure 3. In this example as well, an intersection-enclosing region AR is defined to surround each intersection-forming region 11. Furthermore, the intersection-enclosing region AR is divided into four sub-regions SR by the four wiring-forming regions 12 extending from the intersection-forming regions 11 within the intersection-enclosing region AR.

[0036] Figure 7 is a plan view showing a wiring circuit board 1 according to the first modified example, which was fabricated using the transparent substrate 10 of Figure 6. In Figure 7, the boundaries between the multiple intersection-forming regions 11 and multiple wiring-forming regions 12 on one surface of the transparent substrate 10 and the regions other than those regions (11,12) are shown by dotted lines, and one intersection-enclosing region AR is shown by a dashed line. As shown in Figure 7, the metal layer 20 according to the first modified example is basically formed to overlap the multiple intersection-forming regions 11 and multiple wiring-forming regions 12 defined on the transparent substrate 10 of Figure 6.

[0037] Figure 8 is a partially enlarged plan view of the wiring circuit board 1 shown in Figure 7. Figure 8 shows an enlarged plan view of one intersection 21 and its vicinity from the plan view in Figure 7. Each wiring section 22 in this example has a width W of 1 μm to 10 μm, similar to the wiring circuit board 1 examples in Figures 1 to 5. The area of ​​the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm. 2 The following is the result. As a result, the wiring circuit board 1 has high transparency. In the partially enlarged plan view of Figure 8, as in the example in Figure 5, the portion of the metal layer 20 that extends from one intersection 21 into each small region SR is shown as a dot pattern.

[0038] Here, as shown in Figure 8, in this example, four wiring sections 22 extend from each intersection 21, so four wiring angles α are defined in the circumferential direction with respect to the intersection 21. Specifically, in the wiring circuit board 1 according to the first modified example, the wiring angles α around one intersection 21 are set in the order of 60°, 120°, 60°, and 120°.

[0039] In this example as well, the wiring angle α is 30° or greater. This suppresses the occurrence of large amounts of overflow from each intersection 21 into multiple small regions SR during the manufacturing of the wiring circuit board 1.

[0040] 4. Second variation Figure 9 is a plan view showing a plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 of a transparent substrate 10 according to a second modified example. The plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 in Figure 9 are formed such that three wiring-forming regions 12 extend from each intersection-forming region 11, which differs from the example of the transparent substrate 10 in Figure 3. In this example as well, an intersection-enclosing region AR is defined to surround each intersection-forming region 11. Furthermore, the intersection-enclosing region AR is divided into three sub-regions SR by the three wiring-forming regions 12 extending from the intersection-forming regions 11 within the intersection-enclosing region AR.

[0041] Figure 10 is a plan view showing a wiring circuit board 1 according to a second modified example, fabricated using the transparent substrate 10 of Figure 9. In Figure 10, the boundaries between the multiple intersection-forming regions 11 and multiple wiring-forming regions 12 on one surface of the transparent substrate 10 and the regions other than those regions (11,12) are shown by dotted lines, and one intersection-enclosing region AR is shown by a dashed line. As shown in Figure 10, the metal layer 20 according to the first modified example is basically formed to overlap the multiple intersection-forming regions 11 and multiple wiring-forming regions 12 defined on the transparent substrate 10 of Figure 9.

[0042] Figure 11 is a partially enlarged plan view of the wiring circuit board 1 shown in Figure 10. Figure 11 shows an enlarged plan view of one intersection 21 and its vicinity from the plan view of Figure 10. Each wiring section 22 in this example has a width W of 1 μm to 10 μm, similar to the wiring circuit board 1 examples in Figures 1 to 5. The area of ​​the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm. 2 The following is the result. As a result, the wiring circuit board 1 has high transparency. In the partially enlarged plan view of Figure 11, as in the example in Figure 5, the portion of the metal layer 20 that extends from one intersection 21 into each small region SR is shown as a dot pattern.

[0043] Here, as shown in Figure 11, in this example, three wiring sections 22 extend from each intersection 21, so three wiring angles α are determined in the circumferential direction with respect to the intersection 21. Specifically, in the wiring circuit board 1 according to the second modified example, the wiring angle α between each pair of adjacent wiring sections 22 is 120°.

[0044] In this example as well, the wiring angle α is 30° or greater. This suppresses the occurrence of large amounts of overflow from each intersection 21 into multiple small regions SR during the manufacturing of the wiring circuit board 1.

[0045] 5. Manufacturing method of the wiring circuit board 1 Figures 12 to 17 are schematic cross-sectional views illustrating a method for manufacturing a wiring circuit board 1 according to one embodiment of the present invention. Note that the schematic cross-sectional views in Figures 12 to 17 correspond to the cross-sectional view along line AA in Figure 1 (Figure 2). First, as shown in Figure 12, a transparent substrate 10 having a flat top surface (one surface) and a flat bottom surface is prepared. The transparent substrate 10 in this example is made of a cycloolefin polymer resin and is flexible.

[0046] Next, as shown in Figure 13, a seed layer 20a is formed so as to cover the entire surface of the transparent substrate 10. In this example, the seed layer 20a has a structure in which a copper thin film is laminated on a base layer. In this case, for example, a base layer made of an indium tin oxide (ITO) thin film is formed on one surface of the transparent substrate 10 by sputtering. Subsequently, a copper thin film is formed on the base layer by sputtering.

[0047] Next, after photoresist is applied to the surface of the seed layer 20a, exposure and development processes are performed. As a result, a plating resist layer 30 having a predetermined pattern of openings 31 is formed on the seed layer 20a, as shown in Figure 14. In this example, the openings 31 are a mesh pattern. Alternatively, the plating resist layer 30 may be formed by attaching a dry film resist to the surface of the seed layer 20a and then performing exposure and development processes, instead of applying photoresist to the surface of the seed layer 20a.

[0048] Next, as shown in Figure 15, a plating layer 20b is formed by electroplating in the area of ​​the seed layer 20a where the plating resist layer 30 is not formed, i.e., the portion of the seed layer 20a exposed through the opening 31. After that, as shown in Figure 16, the plating resist layer 30 is removed.

[0049] Next, as shown in Figure 17, any unwanted portion of the exposed seed layer 20a is removed, for example, by wet etching or dry etching. When removing the unwanted portion of the seed layer 20a, an etching resist may be formed on the upper surface of the exposed plating layer 20b. In this way, a metal layer 20 consisting of the seed layer 20a and the plating layer 20b is formed, and the wiring circuit board 1 is completed.

[0050] As shown in the example in Figure 2, in the wiring circuit board 1, a cover insulating layer 90 covering the metal layer 20 may be formed on one surface of the transparent substrate 10.

[0051] In the wiring circuit board 1, the metal layer 20 has a pattern corresponding to the openings 31 of the plating resist layer 30 in Figure 14. As a result, the metal layer 20 is formed in a mesh-like manner on one surface of the transparent substrate 10. Consequently, the metal layer 20 has multiple intersections 21 and multiple wiring portions 22 in a plan view of the wiring circuit board 1.

[0052] As described above, the transparent substrate 10 in this example is made of a cycloolefin polymer resin and is flexible. In this case, the wiring circuit board 1 can be manufactured by a roll-to-roll method.

[0053] In the roll-to-roll method, for example, a roll (hereinafter referred to as the "feed-out roll") on which a long transparent substrate 10 is wound is prepared, and the transparent substrate 10 is fed out from the feed-out roll. The fed-out transparent substrate 10 is then wound onto another roll (hereinafter referred to as the "wind-up roll"). At this time, multiple processes described using Figures 12 to 17 and Figure 2 above are sequentially applied to each part of the transparent substrate 10 as it is transported between the feed-out roll and the wind-up roll. This makes it possible to manufacture a large number of wiring circuit boards 1 with high efficiency.

[0054] The wiring circuit board 1 may be manufactured by a method other than the roll-to-roll method. For example, if the transparent substrate 10 is made of a material with poor flexibility such as glass, the wiring circuit board 1 may be manufactured by a single-wafer method in which processing is performed sequentially on a single sheet.

[0055] 6. Effects (a) In the wiring circuit board 1 according to this embodiment, each of the plurality of wiring portions 22 has a width W of 1 μm or more and 10 μm or less. Furthermore, the area of ​​the portion formed so as to extend from each of the plurality of intersection portions 21 of the metal layer 20 into each small region SR region surrounding the intersection portion 21 is 4.00 μm 2 The following is the result. As a result, the wiring circuit board 1 has high transparency.

[0056] (b) Furthermore, in the wiring circuit board 1, the wiring angle α between each pair of adjacent wiring sections 22 extending from each intersection 21 of the metal layer 20 is 30° or more. This suppresses the occurrence of large amounts of overhang from each intersection 21 to multiple small regions SR during the manufacturing of the wiring circuit board 1.

[0057] (c) The metal layer 20 of the wiring circuit board 1 shown in Figures 4, 8, and 9 is formed such that three or four wiring sections 22 extend from each intersection 21. In this case, the shape of the metal layer 20 is less likely to become complicated at each intersection 21 and its vicinity compared to the case where five or more wiring sections 22 extend from each intersection 21. As a result, the occurrence of metal layer 20 overhang at each intersection 21 is reduced.

[0058] 7. Transparency evaluation test To determine the degree of difference in transparency between a wiring circuit board 1 that satisfies the transparency requirements and a wiring circuit board 1 that does not, the inventors prepared four wiring circuit boards 1 as Sample A, Sample B, Sample C, and Sample D. SEM (scanning electron microscope) images of these Samples A, B, C, and D are shown in Figures 18 to 21.

[0059] Figure 18 shows an SEM image of sample A. As shown in Figure 18, the wiring circuit board 1 of sample A has the same configuration as the wiring circuit board 1 in Figure 10. Note that sample A does not have the configuration corresponding to the cover insulating layer 90 in Figure 1. In sample A, the intersection surrounding region AR surrounding one intersection 21 is divided into three sub-regions SR by three wiring sections 22. To distinguish the three sub-regions SR in Figure 18 from each other, these sub-regions SR are referred to as the first sub-region SR11, the second sub-region SR12, and the third sub-region SR13.

[0060] Figure 19 shows an SEM image of sample B. As shown in Figure 19, the wiring circuit board 1 of sample B has the same configuration as the wiring circuit board 1 in Figure 1. Note that sample B does not have the configuration corresponding to the cover insulating layer 90 in Figure 1. In sample B, the intersection surrounding region AR surrounding one intersection 21 is divided into four sub-regions SR by four wiring sections 22. To distinguish the four sub-regions SR in Figure 19 from each other, these sub-regions SR are called the first sub-region SR21, the second sub-region SR22, the third sub-region SR23, and the fourth sub-region SR24.

[0061] Figure 20 shows an SEM image of sample C. As shown in Figure 20, the wiring circuit board 1 of sample C has the same configuration as the wiring circuit board 1 in Figure 7. Note that sample C does not have the same configuration as the cover insulating layer 90 in Figure 1. In sample C, the intersection surrounding region AR surrounding one intersection 21 is divided into four sub-regions SR by four wiring sections 22. To distinguish the four sub-regions SR in Figure 20 from each other, these sub-regions SR are referred to as the first sub-region SR31, the second sub-region SR32, the third sub-region SR33, and the fourth sub-region SR34.

[0062] Figure 21 shows an SEM image of sample D. As shown in Figure 21, the wiring circuit board 1 of sample D has the same configuration as the wiring circuit board 1 in Figure 7, as with sample C. However, the wiring angle α between each pair of adjacent wiring sections 22 is different between sample C and sample D. Sample D does not have a configuration corresponding to the cover insulating layer 90 in Figure 1. In sample D, the intersection surrounding region AR surrounding one intersection section 21 is divided into four sub-regions SR by four wiring sections 22. To distinguish the four sub-regions SR in Figure 21 from each other, these sub-regions SR are called the first sub-region SR41, the second sub-region SR42, the third sub-region SR43, and the fourth sub-region SR44.

[0063] As a transparency evaluation test, the inventors measured the width W of the wiring portion 22 of each sample A, B, C, and D, and also measured the area of ​​the metal layer 20 that extended into a plurality of sub-regions defined for each sample. Furthermore, they visually observed each sample A, B, C, and D and evaluated the transparency of each sample A, B, C, and D.

[0064] Figure 22 shows the results of the transparency evaluation test. In Figure 22, along with the transparency evaluation results, the measurement results of the width W of the wiring section 22 (see Figures 18 to 20) for samples A, B, C, and D are shown. In addition, the measurement results of the area of ​​the metal layer 20 that extends into multiple sub-regions defined for each sample A, B, C, and D are shown.

[0065] According to the measurement results in Figure 22, the width W of each wiring section 22 in samples A, B, C, and D is within the range of the transparency conditions (1 μm to 10 μm). In addition, in samples A, B, and C, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm. 2 The following applies. Therefore, samples A, B, and C satisfy the transparency conditions described above. On the other hand, in sample D, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into a small area SR of the transparent substrate 10 is 4.00 μm². 2 It exceeds the limit. Therefore, sample D does not meet the transparency requirements mentioned above.

[0066] As shown in Figure 22, the inventors visually observed a single intersection 21 and its surrounding area in sample A and evaluated that sample A has extremely high transparency. The inventors also visually observed a single intersection 21 and its surrounding area in sample B and evaluated that sample B has high transparency. The inventors also visually observed a single intersection 21 and its surrounding area in sample C and evaluated that sample C has moderately high transparency. Furthermore, the inventors visually observed a single intersection 21 and its surrounding area in sample D and evaluated that sample D has significantly lower transparency compared to samples A, B, and C. These results confirm that the wiring circuit board 1 has sufficiently high transparency by satisfying the above transparency conditions, as seen in samples A, B, and C.

[0067] 8. Other Embodiments (a) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 may include, in addition to the seed layer 20a and the plating layer 20b, a coating layer that covers the surface of the laminate consisting of the seed layer 20a and the plating layer 20b. That is, in the metal layer 20, a coating layer may be formed to cover the side portion of the seed layer 20a, the side portion of the plating layer 20b, and the upper surface portion of the plating layer 20b as shown in Figure 2. In this case, the coating layer may be formed of a black metal thin film, or it may be made of a black resin material such as polyimide resin or epoxy resin. Alternatively, the coating layer may be made of a black ceramic material.

[0068] (b) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 is formed by a so-called semi-additive method, but the present invention is not limited thereto. The metal layer 20 may be formed by an additive method or by a subtractive method.

[0069] (c) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 is formed such that a pattern of squares or hexagons having a common shape is arranged on one surface of the transparent substrate 10 by a plurality of intersections 21 and a plurality of wiring portions 22, but the present invention is not limited thereto. The metal layer 20 may be formed such that a pattern of other polygons, such as triangles or pentagons, is arranged on one surface of the transparent substrate 10. Alternatively, the metal layer 20 may be formed such that a pattern of multiple types of polygons of different sizes is randomly arranged on one surface of the transparent substrate 10.

[0070] (d) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 includes a seed layer 20a and a plating layer 20b, but the present invention is not limited thereto. The metal layer 20 does not have to include a seed layer 20a. Figure 23 is a cross-sectional view of a wiring circuit board 1 according to another embodiment. The cross-sectional view in Figure 23 corresponds to the cross-sectional view in Figure 2. In the wiring circuit board 1 of Figure 23, the metal layer 20X is formed as a single layer. This metal layer 20X is formed of a metal or alloy containing one or more elements from among copper, gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium, similar to the plating layer 20b according to the above embodiment.

[0071] 9. Correspondence between each part of the embodiment and each component of the claim The following describes examples of the correspondence between each component of the claim and each component of the embodiment. Various other elements having the configuration or function described in the claim can also be used as each component of the claim.

[0072] In the above embodiment, the transparent substrate 10 is an example of a transparent substrate, the metal layer 20 is an example of a metal layer, the plurality of intersections 21 is an example of a plurality of intersections, the plurality of wiring portions 22 is an example of a plurality of wiring portions, the plurality of intersection-forming regions 11 defined on the transparent substrate 10 is an example of a plurality of intersection-forming regions, and the plurality of wiring-forming regions 12 defined on the transparent substrate 10 is an example of a plurality of wiring-forming regions.

[0073] Furthermore, each intersection surrounding region AR defined on one surface of the transparent substrate 10 is an example of a region surrounding each intersection forming region, the small region SR is an example of a small region, the wiring angle α is an example of the angle formed by two adjacent wiring sections around an intersection, and the wiring circuit board 1 is an example of a wiring circuit board.

[0074] Furthermore, seed layer 20a is an example of a seed layer, plating layer 20b is an example of a plating layer, and plating resist layer 30 is an example of a resist layer.

[0075] 10. Summary of Embodiments (Item 1) The wiring circuit board according to Item 1, a transparent substrate having one surface, and a metal layer formed in a mesh shape on the one surface of the transparent substrate, wherein the metal layer includes a plurality of intersection portions, and a plurality of wiring portions connecting the plurality of intersection portions, wherein the plurality of wiring portions are formed on the one surface of the transparent substrate such that three or more wiring portions extend from each intersection portion, each wiring portion has a width of 1 μm or more and 10 μm or less, on the one surface of the transparent substrate, a plurality of intersection formation regions in design where the plurality of intersection portions are to be respectively formed, and a plurality of wiring formation regions in design where the plurality of wiring portions are to be respectively formed are defined, on the one surface of the transparent substrate, the region surrounding each intersection formation region is divided into three or more small regions surrounding the intersection formation region by the three or more wiring formation regions extending from the intersection formation region, in the metal layer, the area of the portion formed so as to protrude from the intersection portion formed on each intersection formation region onto each small region surrounding the intersection formation region is 4.00 μm 2 or less.

[0076] In the wiring circuit board, each of the plurality of wiring portions of the metal layer formed in a mesh shape has a width of 1 μm or more and 10 μm or less. In this case, since the width of the wiring portion is 1 μm or more, a decrease in the reliability of the wiring circuit board due to excessively reducing the cross-sectional area of the wiring portion is suppressed. Also, since the width of the wiring portion is 10 μm or less, the exclusive area of the metal layer on the one surface of the transparent substrate is reduced as compared with the case where a wiring portion having a width greater than 10 μm is provided on the one surface of the transparent substrate. Further, the area of the portion formed so as to protrude from each of the plurality of intersection portions of the metal layer onto each small region defined on the one surface of the transparent substrate is 4.00 μm 2 or less. Thereby, an increase in the size of each intersection portion of the metal layer is suppressed. As a result, a wiring circuit board having high transparency is realized.

[0077] (Paragraph 2) In the wiring circuit board relating to Paragraph 1, On the surface of the transparent substrate, among the three or more wiring sections extending from each intersection, the angle between two adjacent wiring sections around the intersection may be 30° or more.

[0078] When the angle between two adjacent wiring sections is 30° or more, a wider space is formed between them compared to when the angle between the two wiring sections is less than 30°. In other words, it becomes less likely for an extremely narrow and long space to form between the two wiring sections, eliminating the need to form extremely fine wiring patterns. Therefore, the occurrence of a large amount of overhang from the intersection into the space between the two wiring sections is suppressed.

[0079] (Article 3) In the wiring circuit board relating to Article 1 or Article 2, At least some of the wiring portions of the plurality of wiring portions may be formed on one surface of the transparent substrate such that three wiring portions extend from at least some of the intersections of the plurality of intersections.

[0080] In this case, the shape of the metal layer is less likely to become complex at each intersection and its vicinity. As a result, the occurrence of metal layer overhang at each intersection is reduced.

[0081] (Article 4) In the wiring circuit board relating to Article 1 or Article 2, At least some of the wiring portions of the plurality of wiring portions may be formed on one surface of the transparent substrate such that four wiring portions extend from at least some of the intersections of the plurality of intersections.

[0082] In this case, the shape of the metal layer is less likely to become complex at each intersection and its vicinity. As a result, the occurrence of metal layer overhang at each intersection is reduced.

[0083] (Article 5) In the wiring circuit board relating to Article 4, On one surface of the transparent substrate, the angle formed by one adjacent wiring section and another wiring section around each of the at least some intersections may be different from the angle formed by one adjacent wiring section and yet another wiring section around the intersection. In this case, the degree of freedom in designing the pattern formed on one surface of the transparent substrate by the metal layer is improved.

[0084] (Article 6) In a wiring circuit board relating to any one of paragraphs 1 to 5, Each of the aforementioned plurality of wiring formation regions may be defined to extend linearly with a predetermined width. In this case, a plurality of wiring portions extending linearly with a predetermined width are formed on one surface of the transparent substrate.

[0085] (Paragraph 7) The method for manufacturing a wiring circuit board relating to Paragraph 7 is: A process of preparing a transparent substrate having one surface, The process includes forming a mesh-like metal layer on one surface of the transparent substrate, which includes a plurality of intersections and a plurality of wiring portions connecting the plurality of intersections. The step of forming the aforementioned metal layer is: The process includes forming the plurality of wiring portions such that three or more wiring portions extend from each intersection on one surface of the transparent substrate, and each wiring portion has a width of 1 μm or more and 10 μm or less. On one surface of the transparent substrate, there are defined multiple design intersection formation regions where the multiple intersection portions are to be formed, and multiple design wiring formation regions where the multiple wiring portions are to be formed. On one surface of the transparent substrate, the region surrounding each intersection-forming region is divided into three or more sub-regions surrounding the intersection-forming region by three or more wiring-forming regions extending from the intersection-forming region. The area of ​​the portion of the metal layer that extends from the intersection formed on each intersection-forming region into each sub-region surrounding the said intersection-forming region is 4.00 μm². 2 The following applies:

[0086] In the manufacturing method of the wiring circuit board, the wiring circuit board is manufactured by forming a mesh-like metal layer on one surface of a transparent substrate. In the manufactured wiring circuit board, each of the multiple wiring sections of the mesh-like metal layer has a width of 1 μm to 10 μm. In this case, the fact that the width of the wiring section is 1 μm or more suppresses the decrease in reliability of the wiring circuit board caused by excessively reducing the cross-sectional area of ​​the wiring section. Furthermore, by having a wiring section width of 10 μm or less, the area occupied by the metal layer on one surface of the transparent substrate is reduced compared to the case where wiring sections with a width greater than 10 μm are provided on one surface of the transparent substrate. In addition, the area of ​​the portion formed so as to extend from each of the multiple intersections of the metal layer into each sub-region defined on one surface of the transparent substrate is 4.00 μm. 2 The following is achieved. This suppresses the enlargement of each intersection point of the metal layer. As a result, a wiring circuit board with high transparency is realized.

[0087] (Paragraph 8) In the method for manufacturing a wiring circuit board relating to Paragraph 7, The step of forming the aforementioned metal layer is: A seed layer is formed on one surface of the prepared transparent substrate, A resist layer having a predetermined pattern of openings is formed on the seed layer, A plating layer is formed in the aforementioned opening by electroplating, After forming the aforementioned plating layer, the resist layer is removed, The process may also include removing the exposed portion of the seed layer after removing the resist layer, thereby forming the laminate of the seed layer and the plating layer into the metal layer.

[0088] In this case, compared to forming the metal layer using the subtractive method, the dimensional accuracy of each part of the metal layer of the manufactured wiring circuit board can be improved. [Explanation of Symbols]

[0089] 1…Wiring circuit board, 10…Transparent substrate, 11…Intersection formation region, 12…Wiring formation region, 20, 20X…Metal layer, 20a…Seed layer, 20b…Plating layer, 21…Intersection part, 22…Wiring part, 30…Plating resist layer, 31…Opening, 90…Cover insulating layer, AR…Region, SR…Small region, SR11, SR21, SR31, SR41…First small region, SR12, SR22, SR32, SR42…Second small region, SR13, SR23, SR33, SR43…Third small region, SR24, SR34, SR44…Fourth small region

Claims

1. A transparent substrate having one surface, The transparent substrate comprises a metal layer formed in a mesh-like manner on one of its surfaces, The aforementioned metal layer is Multiple intersection points, It includes a plurality of wiring sections that connect the plurality of intersections, The plurality of wiring sections are formed on one surface of the transparent substrate such that three or more wiring sections extend from each intersection. Each wiring section has a width of 1 μm or more and 10 μm or less. On one surface of the transparent substrate, there are defined multiple design intersection formation regions where the multiple intersection portions are to be formed, and multiple design wiring formation regions where the multiple wiring portions are to be formed. On one surface of the transparent substrate, the region surrounding each intersection-forming region is divided into three or more sub-regions surrounding the intersection-forming region by the three or more wiring-forming regions extending from the intersection-forming region. The area of ​​the portion of the metal layer that extends from the intersection formed on each intersection-forming region into each sub-region surrounding the said intersection-forming region is 4.00 μm². ２ The following is a wiring circuit board.

2. The wiring circuit board according to claim 1, wherein, on one surface of the transparent substrate, the angle between two adjacent wiring portions around each intersection, among the three or more wiring portions extending from each intersection, is 30° or more.

3. The wiring circuit board according to claim 1 or 2, wherein at least some of the wiring portions of the plurality of wiring portions are formed on one surface of the transparent substrate such that three wiring portions extend from at least some of the intersections of the plurality of intersections.

4. The wiring circuit board according to claim 1 or 2, wherein at least some of the wiring portions of the plurality of wiring portions are formed on one surface of the transparent substrate such that four wiring portions extend from at least some of the intersections of the plurality of intersections.

5. The wiring circuit board according to claim 4, wherein, on one surface of the transparent substrate, the angle formed by one adjacent wiring portion and another wiring portion around each of the at least some intersections is different from the angle formed by one adjacent wiring portion and yet another wiring portion around the intersection.

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