Low resistivity contacts and interconnects
By employing metal halides to remove metal oxides and directly depositing conductive materials on semiconductor features, the method addresses the challenge of low-resistivity metal film deposition, enhancing electrical connectivity and reducing resistivity in semiconductor devices.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- LAM RES CORP
- Filing Date
- 2026-01-14
- Publication Date
- 2026-04-14
AI Technical Summary
The challenge of depositing low-resistivity metal films in semiconductor fabrication processes has become increasingly difficult due to device miniaturization and complex patterning schemes, particularly in forming low-resistivity metal contacts and interconnects between metal layers and devices.
A method involving the use of metal halides to remove metal oxide layers from metal surfaces, followed by direct deposition of conductive materials without intervening layers, using processes like atomic layer deposition (ALD) or chemical vapor deposition (CVD), with selective or non-selective deposition options, to create barrierless connections between metal and dielectric surfaces.
This approach enables the formation of low-resistivity conductive interconnects with minimal damage to dielectric surfaces, reducing resistivity and improving the electrical connectivity of semiconductor devices.
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Figure 2026065092000001_ABST
Abstract
Description
[Background technology]
[0001] [References] As part of this application, a PCT application is filed concurrently with this specification. Each application specified in this concurrently filed PCT application, for which this application claims benefit or priority, is incorporated herein by reference in its entirety for all purposes.
[0002] The background information provided herein is intended to provide a general overview of the contents of this disclosure. Any research by the inventors named at this time, as well as any description that is not otherwise considered prior art at the time of filing, within the scope described in this background information section, shall not be recognized as prior art to this disclosure, whether express or implied.
[0003] Metal deposition is an essential part of many semiconductor fabrication processes. These materials can be used for horizontal interconnects, vias between adjacent metal layers, and contacts between metal layers and devices. However, as devices shrink and more complex patterning schemes are used in industry, depositing low-resistivity metal films has become a challenge. [Overview of the Initiative]
[0004] One aspect of the present disclosure relates to a method for providing a feature on a substrate, wherein the feature includes a metal surface having a layer of metal oxide formed thereon, and a dielectric surface, and to exposing the feature to a metal halide to remove the layer of metal oxide from the metal surface.
[0005] In some embodiments, the method further includes filling the features with a conductive material. In some such embodiments, the conductive material is in direct contact with the metal surface and the dielectric surface without an intervening layer. In some such embodiments, the exposure of the features to the metal halide and the filling of the features with the conductive material are carried out in the same chamber. In some such embodiments, the exposure of the features to the metal halide and the filling of the features with the conductive material are carried out at different stations in the same chamber. In some embodiments, the exposure of the features to the metal halide and the filling of the features with the conductive material are carried out in different chambers.
[0006] In some embodiments, filling a feature with a conductive material involves depositing a nucleation layer of the conductive material before depositing the bulk conductive material. In some embodiments, filling a feature with a conductive material involves depositing the bulk conductive material without depositing a nucleation layer.
[0007] In some embodiments, filling features involves an atomic layer deposition process or a chemical vapor deposition process, including a plasma strengthening process or a thermal process, to deposit a bulk conductive material.
[0008] In some such embodiments, the deposition of bulk conductive material is selective for metal surfaces compared to dielectric surfaces.
[0009] In some such embodiments, the deposition of bulk conductive material is non-selective to metal and dielectric surfaces. According to various embodiments, the conductive material may be selected from molybdenum (Mo), ruthenium (Ru), tungsten (W), iridium (Ir), chromium (Cr), cobalt (Co), and titanium nitride (TiN).
[0010] In some embodiments, the metal surface is a titanium nitride (TiN) surface, molybdenum nitride (MoN) x) Surface, tungsten nitride (WN) surface, carbon tungsten nitride (WC) x N y ) Surface, tungsten carbide (WCx) surface, titanium aluminum carbide (TiAl x C y It is either a surface or a tantalum nitride (TaN) surface.
[0011] In some embodiments, the metal of the metal halide is one of Mo, W, Cr, Ti, Ta, and vanadium (V).
[0012] In some embodiments, the metal halide is one of tungsten hexafluoride (WF6), tungsten hexachloride (WCl6), tungsten pentachloride (WCl5), or tungsten hexabromide (WBr6).
[0013] In some embodiments, the metal halide is one of molybdenum hexafluoride (MoF6) and molybdenum pentachloride (MoCl5).
[0014] In some embodiments, the metal halide is one of niobium pentachloride (NbCl5) and niobium pentabromide (NbBr5).
[0015] In some embodiments, the metal halide is one of tantalum pentafluoride (TaF5) and tantalum pentachloride (TaCl5).
[0016] In some embodiments, the metal halide is one of vanadium pentafluoride (VF5), chromium pentafluoride (CrF5), and titanium tetrachloride (TiCl4).
[0017] In some embodiments, the method further involves performing a reduction treatment to remove residual halogens after removing the metal oxide layer.
[0018] These and other aspects of the present disclosure are further described below with reference to the drawings.
Brief Description of the Drawings
[0019] [Figure 1] FIG. 1 is a diagram illustrating an example of features according to various embodiments.
[0020] [Figure 2] FIG. 2 is a diagram showing an exemplary embodiment of a patterned feature on which deposition of a conductive material can be performed.
[0021] [Figure 3] FIG. 3 is a flowchart showing an example of a deposition method for filling a feature with a conductive material.
[0022] [Figure 4] FIG. 4 is a diagram showing an example of a schematic cross-sectional view of a patterned feature after a specific operation of the embodiment of the method of FIG. 3.
[0023] [Figure 5A] FIG. 5A is a diagram showing a comparison of the oxygen content at the cobalt (Co) / molybdenum (Mo) interface when tungsten hexafluoride (WF6) treatment is performed and not performed before ALD deposition of Mo on a Co surface on which Co oxide is formed.
[0024] [Figure 5B] FIG. 5B is a diagram showing the cleaning of a titanium nitride (TiN) surface using molybdenum pentachloride (MoCl5).
[0025] [Figure 6] FIG. 6 is a schematic diagram of an embodiment of a process station that can be used for various operations.
[0026] [Figure 7] FIG. 7 is a diagram showing an example of a processing system including a plurality of chambers.
Modes for Carrying Out the Invention
[0027] A method is provided for filling features, including metal and dielectric surfaces, with a conductive material. The method involves cleaning the metal surface with little or no damage to the dielectric surface. After cleaning, the features can be exposed to one or more reactants and then filled with the conductive material in an atomic layer deposition (ALD) or chemical vapor deposition (CVD) process. The deposition may be selective or non-selective to the metal surface. In some embodiments, the filled features are barrierless, so that the conductive material is in direct contact with the metal and dielectric surfaces without the interposition of a barrier or adhesive layer.
[0028] A method for cleaning the metal surface of a feature, including metal and dielectric surfaces, is also provided. The method can be performed before depositing conductive material on the feature. In some embodiments, the filled feature is barrierless, so that the conductive material comes into direct contact with the metal and dielectric surfaces without the interposition of a barrier or adhesive layer.
[0029] Figure 1 illustrates an example of feature 100 according to various embodiments. Feature 100 includes a bottom surface 102 and one or more side wall surfaces 104. The bottom surface 102 is the metal surface of the metal contact 106. Feature 100 is filled with a conductive material to form an interconnect 108 that provides an electrical connection to the underlying metal contact 106.
[0030] The metal contact 106 and its surface (bottom surface 102) may be any suitable metal such as cobalt (Co), ruthenium (Ru), copper (Cu), tungsten (W), molybdenum (Mo), nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), and titanium (Ti). In some embodiments, the metal surface 102 is an elemental metal surface. In some embodiments, the metal contact 106 and its surface (bottom surface 102) may be a titanium nitride (TiN) surface, molybdenum nitride (MoN) x) surface, tungsten nitride (WN) surface, tungsten carbonitride (WC x N y ) surface, tungsten carbide (WCx) surface, titanium aluminum carbide (TiAl x C y ) surface, or a metal compound such as tantalum nitride (TaN) surface. These surfaces may exhibit deposition selectivity with respect to the dielectric oxide. The bottom surface 102 is a part of the underlying metal contact 106 in the example of FIG. 1. The bottom surface 102 may be a part of the conductor of the underlying layer rather than a thin layer such as a barrier or adhesion layer.
[0031] One or more sidewall surfaces 104 are dielectric surfaces. Such surfaces include silicon-based oxides such as alkoxides such as poly(2-ethyl-2-oxazoline) (PEOX), and tetraethyl orthosilicate (TEOS) oxide, flowable silicon-based oxide, carbon-doped silicon-based oxide, etc. In some embodiments, these surfaces are part of the main dielectric layer 109 surrounding the feature. In some embodiments, the sidewall surface may be a nitride rather than an oxide (e.g., Si x N y ). The nitride can be a silicon-based nitride or a silicon-based oxynitride.
[0032] The interconnect 108 may be Mo, Ru, W, Ir, chromium (Cr), Co, TiN, and other transition metals or transition metal compounds. The interconnect 108 directly contacts the dielectric material of one or more sidewall surfaces 104 and the metal surface of the metal contact 106. In the example of FIG. 1, a barrier layer or adhesion layer is not disposed between the interconnect 108 and the metal contact 106, and between the interconnect 108 and the metal contact 106. Materials such as TiN / Ti are common barrier / adhesion layers in the interconnect structure, but in the embodiment described with respect to FIG. 1, when used, TiN or other metal nitrides are conductors of the metal contact rather than barrier layers.
[0033] The interconnection 108 may be part of any suitable portion of a partially fabricated semiconductor device, including a source / drain (S / D) connection, a middle-of-line (MOL) structure, or a back-end-of-line (BEOL) structure. Furthermore, although it is called an interconnection, it may also include any conductive film embedded in a dielectric, such as a metal line.
[0034] Figure 2 shows an exemplary embodiment of a patterned feature on which a conductive material can be deposited. The patterned feature may be a via or trench or other suitable feature formed as a result of a patterning operation in the dielectric layer. Feature 210 shows an example of a patterned feature having an open profile that gradually widens from the bottom of the feature to the feature opening 214.
[0035] Feature 220 shows an example of a patterned feature having a reentrant profile that narrows from the bottom of the feature to the feature opening 214. The reentrant profile may also include an overhang at the feature opening 214. Feature 230 shows a feature having a metallic undercut profile. According to various embodiments, the profile has a metallic surface 202 below the sidewall base 218 of feature 230. A void may exist between the bottom surface 202 and the sidewall base 218. In each of the above profiles, the bottom surface 202 is a metallic surface as described above. A metallic oxide 216 may be formed on the bottom surface 202. Feature 240 shows an example of a patterned feature having a substantially vertical sidewall. The metallic oxide may be an oxide of an elemental metal (e.g., copper oxide on a Cu surface) or an oxide of a metallic compound (e.g., titanium oxynitride on a TiN surface).
[0036] Figure 3 is a flowchart showing an example of a deposition method 300 for filling features with a conductive material. Figure 4 shows an example of a schematic cross-section of a patterned feature after a specific operation of an embodiment of the method in Figure 3. In particular, Figure 4 shows examples of selective and non-selective deposition.
[0037] In Figure 3, during operation 305, a substrate containing unfilled features is provided. As shown above, the features may be part of a partially fabricated semiconductor device. The features include the metal surface and dielectric surface described above. The metal surface includes a metal oxide that may be formed from exposure to air or another oxidizing environment. The substrate may be provided to the processing chamber as further described below.
[0038] In Figure 4, patterned features including the bottom surface 402 and the side wall surface 404, as well as the metal oxide 416 formed on the bottom surface, are shown at 410 and 420.
[0039] Returning to Figure 3, the substrate is exposed to a metal halide in operation 315 to reduce oxides. The metal halide is supplied as a gas to the chamber containing the substrate and may be pulsed or continuously flowed into the chamber. The metal halide can effectively reduce oxides on the bottom surface of features with little to no damage to the dielectric. This differs from other halide treatments that can damage the dielectric. For example, nitrogen trifluoride increases the limiting dimensions of features by etching the dielectric. Halide compounds are more effective at removing oxide layers than other reducing agents such as ammonia or hydrazine.
[0040] In some embodiments, the metal halide is pulsed, and the pulses are separated by an inert purge gas. An example of an inert purge gas is argon (Ar). This avoids saturation due to continuous flow.
[0041] The metal halide is any that is volatile or has a vapor pressure sufficient to be supplied to the substrate below the substrate temperature. An exemplary substrate temperature during operation 315 is in the range of 100°C to 450°C. For some metal halides, dielectric etching may occur at higher temperatures. The metal halides may include any suitable metal, including Mo, W, Cr, Ti, Ta, and vanadium (V), as well as any halide, including fluorine (F), chlorine (Cl), bromine (Br), and iodine (I). Examples of usable tungsten halides include tungsten hexafluoride (WF6), tungsten hexachloride (WCl6), tungsten pentachloride (WCl5), and tungsten hexabromide (WBr6). Examples of usable molybdenum halides include molybdenum hexafluoride (MoF6) and molybdenum pentachloride (MoCl5). Examples of usable niobium halides include niobium pentachloride (NbCl5), niobium tetraiodide (NbI4), and niobium pentabromide (NbBr5). Examples of usable tantalum halides include tantalum pentafluoride (TaF5), tantalum pentaiodide (TaI5), and tantalum pentachloride (TaCl5). An example of usable vanadium halides is vanadium pentafluoride (VF5). Examples of usable chromium halides are chromium pentafluoride (CrF5) and chromium diiodide (CrI2). An example of usable titanium halides is titanium tetrachloride (TiCl4).
[0042] Metal halides can be mixed with inert gases such as argon (Ar) and helium (He). This may be done to dilute the metal halide and control the reduction rate. Examples of chamber pressure during operation 315 are in the range of 1 to 30 Torr. Processing time may be in the range of 2 seconds to 4 minutes, or 2 seconds to 60 seconds. In some embodiments, processing time may be about 2 to 3 minutes. In some embodiments, pulses of 1 to 60 seconds, or 1 to 10 seconds are used.
[0043] It is understood that exposure to a specific metal halide may include exposure to other halides formed in the gas source, gas inlet, and / or chamber. For example, WBr6 may decompose into tungsten pentabromide (WBr5) and tungsten tetrabromide (WBr4), and WF6 may decompose into tungsten pentafluoride (WF5) and tungsten tetrafluoride (WF4). Metal halides can exist in various forms, including dimers and other oligomers; for example, MoCl5 can decompose into the dimer Mo2Cl 10 The metal halide forms a galvanic layer. The metal halide may be oxygen-free. (Some metal oxyhalides, such as molybdenum tetrachloride (MoOCl4), can etch / reduce metal oxides, but they are generally less effective than metal halides. Other metal oxyhalides are listed below in relation to ALD or CVD deposition.) The choice of a specific metal halide depends on the etching selectivity of the metal oxide to silicon oxide or other dielectric materials.
[0044] In Figure 4, at 430 and 440, a patterned feature is shown including the bottom surface 402 and the side wall surface 404, where the metal oxide has been removed from the bottom surface and is therefore ready for deposition. In some embodiments, a portion of the contact itself may be removed accidentally when removing the metal oxide, or intentionally, for example, to increase the aspect ratio. Exceptional amounts of etched material may range from 5–6 angstroms to remove only the oxide, or up to 20 angstroms or more to remove the underlying contact.
[0045] In operation 325, a conductive material is deposited on the feature. As shown above, this is done without a barrier or adhesive layer. Operation 325 may involve one of the following processes: ALD, CVD, or PVD. The ALD and CVD processes may be plasma-enhanced (PEALD or PECVD) processes or thermal ALD or CVD processes. The feature includes both dielectric and metallic surfaces, and deposition may be selective or non-selective to the metallic surface. Selectivity may depend on specific precursors and reaction conditions, examples of which are further provided in the following description.
[0046] In Figure 4, at 450, the patterned feature during selective deposition is shown. The filling is bottom-up, with little to no deposition on the sidewalls. In some embodiments, some amount of material may be deposited on the sidewalls. At 460, the patterned feature during non-selective deposition is shown. The filling is conformal. The filled feature is shown at 470 and 480.
[0047] As will be further described below, in other embodiments, metal can be deposited after the metal halide reduction operation using sputtering and other methods such as physical vapor deposition (PVD) or plating processes. The deposition of the conductive material is a bulk deposition process and may or may not include the deposition of a nucleated layer prior to bulk deposition.
[0048] Operations 315 and 325 may be performed in the same chamber or in different chambers, and may or may not be integrated under a common vacuum. In some embodiments, operations 315 and 325 are performed at different stations in a multi-station chamber.
[0049] As shown above, in some embodiments, operation 325 includes the deposition of bulk conductive material by CVD or ALD. In the context of this description, CVD refers to a process in which the reactants are simultaneously present in the gas phase within the reactor and are generally introduced simultaneously, while ALD refers to a process in which the reactants are introduced in continuous pulses, typically separated by purging. Exemplary reactants and reaction conditions that can be used in ALD and / or CVD reactions to fill features with conductive material are shown below.
[0050] In some embodiments, the feature surface may readily absorb halogens from metal halides during operation 315. Operation 325 can use relatively high temperatures to assist in the desorption or removal of the absorbed halogens. In some embodiments, exposure to a reducing gas such as H2 at relatively high temperatures can remove residual halogens. Such operations can be performed between operations 315 and 325.
[0051] In some embodiments, the methods described herein involve the deposition of a nucleation layer before the deposition of the bulk conductive layer. The nucleation layer is typically a thin conformal layer that facilitates the subsequent deposition of the bulk conductive material thereon. In certain embodiments, the nucleation layer is deposited using the ALD technique. The thickness of the nucleation layer may depend on the method of deposition of the nucleation layer, as well as the desired quality of the bulk deposition. Generally, the thickness of the nucleation layer is sufficient to support a high-quality, uniform bulk deposition. Since the nucleation layer has a higher resistivity than the bulk layer, it is generally not thicker than the bulk layer. For example, it may be in the range of 10 Å to 100 Å. In certain embodiments, the bulk conductive material can be deposited directly onto the feature without using a nucleation layer. The bulk conductive material can be deposited by ALD or CVD. The particle size is larger and the resistivity is lower than that of the nucleation layer.
[0052] In CVD or ALD processes, a metal-containing precursor can be reacted with a reducing agent or other reactant to form a metal or metal compound material.
[0053] Examples of W-containing precursors for ALD and CVD of tungsten or tungsten-containing materials include WF6, WCl6, WCl5, and tungsten hexacarbonyl (W(CO)6). In some embodiments, oxyhalogenated tungsten, including WO2Cl2, WOBr4, WOCl4, and WOF4, may be used. Organometallic precursors such as MDNOW (methylcyclopentadienyl-dicarbonylnitrosyl-tungsten) and EDNOW (ethylcyclopentadienyl-dicarbonylnitrosyl-tungsten) can also be used. In some embodiments, nitrogen-containing tungsten-containing organometallic precursors such as bis(tert-butylimino)bis(dimethylamino)tungsten(W[N(C4H9)]2[N(CH3)2]2) can be used to deposit tungsten or tungsten nitride films.
[0054] Examples of Mo-containing precursors for ALD or CVD of molybdenum or molybdenum-containing materials include MoF6, MoCl5, molybdenum dichloride dioxide (MoO2Cl2), molybdenum tetrachloride (MoOCl4), and hexacarbonylmolybdenum (Mo(CO)6). Formula Mo x O x H z Other Mo oxyhalides include H, a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)), and x, y, and z, any number greater than zero that can form a stable molecule. These include molybdenum tetrafluoride (MoOF4), molybdenum dibromide dioxide (MoO2Br2), molybdenum oxyiodide (MoO2I), and MoO4O 11 I is one example. Organometallic precursors can also be used, such as in examples involving Mo precursors having cyclopentadienyl ligands. Further examples include formula Mo2L n The precursors are listed, where each L is independently selected from the amidate ligand, the amidinate ligand, and the guanidinate ligand, and n is 2-5. Mo2L nThe precursors contain multiple molybdenum-molybdenum bonds (such as double bonds or any multiple bonds having bond orders 2-5). Further examples include halide-containing heteroreptic molybdenum compounds (i.e., compounds with different types of ligands). A specific example of such a precursor is a compound containing molybdenum, at least one halide that forms a bond with molybdenum, and at least one organic ligand having one of the elements N, O, and S, where an atom of any of these elements forms a bond with molybdenum. Examples of suitable organic ligands that provide a nitrogen or oxygen bond include amidinates, amidates, iminopyrrolidineates, diazadienes, betaiminoamides, alphaminoalkoxides, betaaminoalkoxides, beta-diketiminates, beta-ketoimiminates, beta-diketonates, amines, and pyrazolates. Examples of suitable organic ligands that provide a sulfur bond include thioethers, thiolates, dithiolenes, dithiolates, and α-iminothiolenes. These ligands may be substituted or unsubstituted. In some embodiments, these ligands include one or more substituents independently selected from the group consisting of H, alkyl, fluoroalkyl, alkylsilyl, alkylamino, and alkoxy substituents. The organic ligands may be neutral or anionic (e.g., monoanionic or dianionic), and molybdenum may be in various oxidation states such as +1, +2, +3, +4, +5, and +6.
[0055] Examples of Ru-containing precursors for ALD or CVD or ruthenium or ruthenium-containing reactions include (ethylbenzyl)(1-ethyl-1,4-cyclohexadienyl)Ru(0), (1-isopropyl-4-methylbenzyl)(1,3-cyclohexadienyl)Ru(0), (2,3-dimethyl-1,3-butadienyl)Ru(0) tricarbonyl, (1,3-cyclohexadienyl)Ru(0) tricarbonyl, and (cyclopentadienyl)(ethyl)Ru(II) dicarbonyl, which can be used in oxidation reactions. Examples of ruthenium precursors that react with non-oxidizing agents include bis(5-methyl-2,4-hexanediketonate)Ru(II) dicarbonyl and bis(ethylcyclopentadienyl)Ru(II). An example of an additional ruthenium precursor is Ru3(CO) 12 Examples include (2,4-dimethylpentadienyl)(ethylcyclopentadienyl)ruthenium, tricarbonyl(h4-cyclohexa-1,3-diene)ruthenium and similar analogues, as well as (η4-2,3-dimethylbutadiene)(tricarbonyl)ruthenium.
[0056] Examples of Co-containing precursors for ALD or CVD of cobalt or cobalt-containing materials include tris(2,2,6,6-tetramethyl-3,5-heptanedionato)cobalt, bis(cyclopentadienyl)cobalt, dicobalthexacarbonylbutylacetylene, dicarbonylcyclopentadienylcobalt(I), cobalt carbonyl, various cobalt amidinate precursors, cobalt diazadienyl complexes, cobalt amidinate / guanidinate precursors, and combinations thereof. Examples of Ti-containing precursors for ALD or CVD include TiCl4 and tetrakis(dimethylamino)titanium (TDMAT). Examples of Ta-containing precursors for ALD or CVD of tantalum or tantalum-containing materials include TaF5 and pentakis-dimethylaminotantalum (PDMAT).
[0057] Examples of reducing agents include hydrogen (H2), boron-containing reducing agents including diborane (B2H6) and other boranes, silicon-containing reducing agents including silane (SiH4) and other silanes, hydrazine, and Gelmane. In some embodiments, pulses of metal-containing precursors can be alternated with pulses of one or more reducing agents, such as S / W / S / W / B / W, where W represents a tungsten-containing precursor, S represents a silicon-containing precursor, and B represents a boron-containing precursor. In some embodiments, separate reagents may not be used, for example, the metal-containing precursor may undergo thermal decomposition or plasma-assisted decomposition. In some embodiments, H2 is used as a reducing agent for bulk layer deposition to deposit a high-purity film.
[0058] As described above, the selectivity of deposition can depend on the material being deposited, the precursor, and the process conditions. For example, molybdenum deposited from a metal halide precursor grows on an oxide surface, but can be selectively deposited by controlling the Mo-containing precursor, temperature, and reactant partial pressure. Oxyhalide molybdenum can be used to selectively deposit on a metal surface in operation 325. Temperature affects selectivity, particle size, and resistance. High temperatures can reduce the selectivity of the Mo film, resulting in growth on the oxide or nitride of the sidewall surface 404, as well as on the metal-containing bottom surface 402. However, if the temperature is too low, the impurity level may increase, reducing particle size and increasing resistance. The substrate temperature can be 350°C to 600°C (including both ends) for selective deposit of Mo using a chlorine-containing chemical. As described above, selectivity can improve as the temperature decreases. Therefore, in some embodiments, the substrate temperature may be about 350°C to 550°C, or 350°C to 450°C, in the case of a chlorine-containing precursor. The substrate temperature for fluorine-containing chemicals may be lower, for example, between 150°C and 350°C.
[0059] To perform deposition non-selectively (or less selectively), the temperature can be controlled to allow nucleation on the sidewall surface and field region. This may be suitable when features are sufficiently filled, and thus good feature filling can be achieved using co-formation length without the risk of voids. The temperature is at least 500°C and may be as high as 800°C, provided that the heat balance in the device structure allows it.
[0060] Deposition of pure metal films from oxygen-containing precursors is difficult because oxygen is readily incorporated into the film during the deposition process. When oxygen is incorporated, the resistivity increases. The methods and apparatus described herein may, in some embodiments, be carried out for pure metal films with less than 1 atomic percent of oxygen. The ratio of reducing agent to metal oxyhalide precursor is considerably greater than 1, and the deposited film contains less than 1 atomic percent of oxygen. A molar ratio of at least 100:1 may be used. In some embodiments, the deposited film contains 1E18 atoms / cm³. 3 The following halogen concentrations are present. To deposit a pure film with less than 1 atomic percent oxygen, the reducing agent to metal precursor ratio is considerably greater than 1, for example, at least 20:1 or at least 50:1. Examples of temperatures may range from 350°C to 600°C for chlorine-containing precursors and from 150°C to 500°C for fluorine-containing precursors. Examples of chamber pressures may range from 1 torr to 100 torr. The reducing agent:precursor ratio used to obtain a pure film may decrease as the temperature increases. In some embodiments, the temperature for chlorine-containing precursors is at least 400°C. With increasing partial pressure of the reducing agent, higher pressures may also be used to decrease the reducing agent:precursor ratio.
[0061] As shown above, in some embodiments, relatively high deposition temperatures (e.g., 500°C or higher) may be useful for removing residual fluorine or other halogens after metal halide treatment. Therefore, in some embodiments, the substrate temperature rises by at least 50°C, 100°C, or 150°C between operations 315 and 325.
[0062] In the above description, the metallic surface of a feature including a dielectric surface is exposed to a metal halide. In other embodiments, any metal-containing surface can be exposed to the metal halide described above to remove oxides formed thereon. For example, a feature as shown in Figure 2 may have a thin barrier and / or adhesive layer coating at least the dielectric sidewall surface. The metal halide treatment may be used to clean the barrier and / or adhesive layer.
[0063] Figure 5A shows a comparison of the oxygen content at the Co / Mo interface with and without WF6 treatment before ALD deposition of Mo on a Co surface where Co oxide is formed. As can be seen from the graph, the oxygen content decreases by an order of magnitude at the interface. According to various embodiments, the residual oxygen at the interface is 1E20 atoms / cm³. 3 The following are possible:
[0064] Figure 5B shows etching of a TiN surface using pulses of MoCl5 separated by purging. As can be seen, the amount of material etched is linearly related to the number of pulse / purge cycles, allowing for digital control of the amount etched. In the example in Figure 5B, both titanium oxynitride and the underlying titanium nitride were etched.
[0065] Device As shown above, operations 315 and 325 in Figure 3 can be performed in the same or different chambers and the same or different stations. Figure 6 illustrates a schematic diagram of one embodiment of a process station 600 that can be used for operations 315 and / or 325. The process station 600 is in fluid communication with a reactant delivery system 601a for supplying process gas to a distribution showerhead 606. The reactant delivery system 601a includes a mixing vessel 604 for blending and / or preparing process gases (such as metal halide gas and inert gas for metal halide reduction treatment, or metal precursor-containing gas and hydrogen-containing gas for deposition) for supply to the showerhead 606. One or more mixing vessel inlet valves 620 can control the introduction of process gas into the mixing vessel 604.
[0066] The embodiment in Figure 6 includes a vaporization point 605 for the process solid supplied to the mixing vessel 604. In another scenario, the vaporized process solid may be supplied directly to the showerhead 606. Vaporization can be sublimation, i.e., sublimation from solid to liquid and then to vapor. Except for WF6 and MoF6, metal halides are generally solid at room temperature.
[0067] As an example, one embodiment in Figure 6 includes a vaporization point 603 for vaporizing a liquid reactant supplied to a mixing vessel 604. In some embodiments, the vaporization point 603 may be a heated vaporizer. In some embodiments, the liquid precursor or liquid reactant may be vaporized in a liquid injector (not shown). For example, a liquid injector can inject pulses of liquid reactant into the carrier gas flow upstream of the mixing vessel 604. In one embodiment, the liquid injector can vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another example, the liquid injector can spray the liquid into dispersed microdroplets, which are then vaporized in a heated feed pipe. Smaller droplets can vaporize faster than larger droplets, reducing the delay between liquid injection and complete vaporization. Faster vaporization can reduce the length of piping downstream from the vaporization point 603. In one scenario, the liquid injector can be directly attached to the mixing vessel 604. In another scenario, the liquid injector can be directly attached to the shower head 606.
[0068] In some embodiments, a liquid flow controller (LFC) may be located upstream of the vaporization point 603 to control the mass flow rate of the liquid that is vaporized and supplied to the process chamber 602. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller via electrical communication with the MFM. However, stabilizing the liquid flow using feedback control may take more than one second. This can extend the time available for flowing the liquid reactant. Therefore, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, this may be done by disabling the sense tubes of the LFC and the PID controller.
[0069] The showerhead 606 distributes the gas toward the substrate 612. In the embodiment shown in Figure 6, the substrate 612 is located below the showerhead 606 and is shown stationary on the base 608. The showerhead 606 may have any suitable shape and may have any suitable number and arrangement of ports for distributing the process gas toward the substrate 612.
[0070] In some embodiments, the base 608 can be raised or lowered to expose the substrate 612 to the volume between the substrate 612 and the shower head 606. In some embodiments, the base 608 may be temperature-controlled via a heater 610. The base 608 can be set to any suitable temperature, such as about 150°C to about 600°C, during operation to carry out various disclosed embodiments. In some embodiments, it will be understood that the height of the base can be programmatically adjusted by a suitable computer controller 650. At the end of a process stage, the base 608 can be lowered during a transfer stage of another substrate, allowing the substrate 612 to be removed from the base 608.
[0071] In some embodiments, the position of the shower head 606 can be adjusted relative to the base 608 to change the volume between the substrate 612 and the shower head 606. Furthermore, it will be understood that the vertical position of the base 608 and / or the shower head 606 may be changed by any suitable mechanism within the scope of this disclosure. In some embodiments, the base 608 may include a pivot axis for rotating the orientation of the substrate 612. In some embodiments, it will be understood that one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers 650.
[0072] In some embodiments where the plasma can be used for PECVD or PEALD, the showerhead 606 and base 608 electrically communicate with a radio frequency (RF) power supply 614 and a matching network 616 to power the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 614 and matching network 616 can operate at any suitable power to form a plasma having a specific composition of radical species. Similarly, the RF power supply 614 can provide RF power at any suitable frequency. In some embodiments, the RF power supply 614 may be configured to control high-frequency and low-frequency RF power supplies independently of each other. Exemplary low-frequency RF frequencies may include, but are not limited to, frequencies from 0 kHz to 900 kHz. Exemplary high-frequency RF frequencies may include, but are not limited to, frequencies from 1.8 MHz to 2.45 GHz, or above about 13.56 MHz, or above 27 MHz, or above 80 MHz, or above 60 MHz. It will be understood that any suitable parameters can be adjusted discretely or continuously to provide the plasma energy necessary for the surface reaction.
[0073] In some embodiments, the plasma can be monitored in situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, plasma density and / or process gas concentration may be measured by one or more emission spectroscopic sensors (OES). In some embodiments, one or more plasma parameters can be programmed to adjust based on measurements from such in situ plasma monitors. For example, OES sensors may be used in a feedback loop to provide programmed control of plasma power. In some embodiments, it will be understood that other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.
[0074] In some embodiments, instructions to the controller 650 may be controlled via input / output control (IOC) sequence instructions. For example, instructions for setting conditions for process stages may be included in the corresponding recipe stages of the process recipe. In some cases, process recipe stages may be arranged sequentially so that all instructions for process stages are executed simultaneously with those process stages. In some embodiments, instructions for setting one or more reactor parameters may be included in the recipe stages. For example, a first recipe stage may include instructions for setting the flow rate of a metal halide gas, instructions for setting the flow rate of a carrier gas (such as argon), and a time delay instruction for the first recipe stage. A second subsequent recipe stage may include instructions for adjusting or stopping the flow rate of the metal halide gas, instructions for adjusting the flow rate of a carrier gas or purge gas, and a time delay instruction for the second recipe stage.
[0075] In the case of ALD deposition, the first recipe step may include commands to adjust the flow rate of a first reactant gas (e.g., a metal precursor gas), commands to adjust the flow rate of a carrier gas or purge gas, and a time delay command for the first recipe step. The second subsequent recipe step may include commands to adjust or stop the flow rate of the reactant gas, commands to adjust the flow rate of a carrier gas or purge gas, and a time delay command for the second recipe step. The third recipe step may include commands to adjust a second reactant gas such as H2, commands to adjust the flow rate of a carrier gas or purge gas, commands to ignite the plasma, and a time delay command for the third recipe step. The fourth subsequent recipe step may include commands to adjust or stop the flow rate of an inert gas and / or reactant gas, commands to adjust the flow rate of a carrier gas or purge gas, and a time delay command for the fourth recipe step. It will be understood that these recipe steps may be further subdivided and / or repeated in any suitable manner within the scope of this disclosure.
[0076] Furthermore, in some embodiments, pressure control for the process station 600 may be provided by a butterfly valve 618. As shown in the embodiment of Figure 6, the butterfly valve 618 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control for the process station 600 can also be adjusted by changing the flow rate of one or more gases introduced into the process station 600.
[0077] As described above, operations 315 and 325 may be performed in a single station of a single or multi-station chamber, in different stations of a multi-station chamber, or in different chambers. When performed in different chambers, operations 315 and 325 may be integrated under a common vacuum environment to prevent oxidation of the metal after metal halide treatment and metal oxide removal. In some embodiments, operations 315 and 325 may not be integrated with the metal halide treatment, which provides a passivation effect to prevent oxidation, at least for a relatively short period of time.
[0078] Figure 7 shows an example of a processing system including multiple chambers. System 700 includes a transfer module 703. The transfer module 703 provides a clean vacuum environment to minimize the risk of substrate contamination as the substrate moves between various reactor modules during processing. The transfer module 703 is fitted with a multi-station reactor 709 capable of performing ALD and CVD according to the embodiment. In some embodiments, the reactor 709 also performs metal halide exposure before ALD or CVD.
[0079] The reactor 709 may include a plurality of stations 711, 713, 715, and 717 that can sequentially perform operations according to the disclosed embodiments. For example, the reactor 709 may be configured such that station 711 performs the metal halide reduction treatment described herein, station 713 performs nucleation layer deposition by ALD, and stations 715 and 717 perform bulk layer deposition by ALD or CVD. Two or more stations may be included in, for example, a 2 to 6 multi-station reactor, with operations appropriately distributed. For example, a 2-station reactor may be configured to expose a substrate to a metal halide at a first station, and then deposit a conductive material at a second station. As described above with respect to Figure 6, the stations may include a heated base or substrate support, one or more gas inlets, or a showerhead or dispersion plate.
[0080] The transfer module 703 may also be fitted with one or more single or multi-station modules 707. In some embodiments, exposure to a metal halide may be performed in module 707, after which the substrate is transferred under vacuum to another module (e.g., another module 707 or reactor 709) for deposition of a conductive material. Module 707 may be a pre-cleaning module that performs cleaning such as Ar sputtering and / or H2 plasma cleaning before deposition. In some embodiments, exposure to a metal halide is performed in such a pre-cleaning module before or after sputtering and / or plasma cleaning.
[0081] The system 700 also includes one or more wafer source modules 701, where wafers are stored before and after processing. An atmospheric robot (not shown) in an atmospheric transfer chamber 719 can initially move the wafer from the source module 701 to the load lock 721. A wafer transfer device (typically a robotic arm unit) in a transfer module 703 moves the wafer from the load lock 721 to modules attached to the transfer module 703, or moves it between modules.
[0082] In various embodiments, a system controller 729 is used to control process conditions during deposition. The controller 729 typically includes one or more memory devices and one or more processors. The processors may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, and the like.
[0083] The controller 729 can control all of the apparatus's activities. The system controller 729 runs system control software that includes a set of instructions for controlling timing, gas mixing, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power level, wafer chuck position or pedestal position, and other parameters of a particular process. In some embodiments, other computer programs stored in a memory device associated with the controller 729 may be used.
[0084] Typically, a user interface is associated with the controller 729. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and user input devices such as a pointing device, keyboard, touchscreen, or microphone.
[0085] System control logic can be configured in any suitable way. Generally, logic can be designed or configured in hardware and / or software. Instructions for controlling drive circuits may be hardcoded or provided as software. Instructions may also be provided by “programming.” Such programming is understood to include all forms of logic, including hardcoded logic of digital signal processors, application-specific integrated circuits, and other devices with specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that can be executed on a general-purpose processor. System control software can be coded in any suitable computer-readable programming language.
[0086] Computer program code for controlling germanium-containing reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses in a process sequence, as well as other processes, can be written in any conventional computer-readable programming language (e.g., assembly language, C, C++, Pascal, Fortran, etc.). The compiled object code or script is executed by the processor to perform the tasks identified by the program. Alternatively, as shown, the program code may be hardcoded.
[0087] Controller parameters relate to process conditions such as process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe and can be entered using the user interface.
[0088] Signals for monitoring the process may be provided by the analog and / or digital input connections of the system controller 729. Signals for controlling the process are output by the analog and digital output connections of the deposition unit 700.
[0089] System software can be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control the operation of the chamber components necessary to perform the deposition process according to the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.
[0090] In some embodiments, the controller 729 is part of a system, and such a system may be part of the examples described above. Such a system may include semiconductor processing equipment comprising one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic equipment for controlling system operation before, during, and after processing of semiconductor wafers or substrates. Such electronic equipment may be referred to as a “controller” and may control various components or sub-components of one or more systems. Depending on the processing requirements and / or the type of system, the controller 729 may be programmed to control any of the processes disclosed herein. Such processes may include supplying processing gases, setting temperature (e.g., heating and / or cooling), setting pressure, setting vacuum, setting power, setting radio frequency (RF) generators in some systems, setting RF matching circuits, setting frequency, setting flow rates, setting fluid supply, setting position and operation, loading and unloading wafers to and from tools, and loading and unloading wafers to and from other transport tools and / or load locks connected to or interlocked with a particular system.
[0091] In a broad sense, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive and issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits may include chips in the form of firmware that store program instructions, chips defined as digital signal processors (DSPs), application-specific integrated circuits (ASICs), and / or one or more microprocessors, i.e., microcontrollers that execute program instructions (e.g., software). Program instructions are instructions communicated to the controller in the form of various individual settings (or program files) that may define operating parameters for performing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to realize one or more processing steps in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.
[0092] In some embodiments, the controller 729 may be part of a computer integrated with or coupled to the system, or otherwise networked to the system, or coupled to such a computer, or a combination thereof. For example, the controller 729 may be in the “cloud” or may be all or part of a fab host computer system. This enables remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of fabrication operations, review the history of past fabrication operations, review trends or performance criteria from multiple fabrication operations, modify parameters of the current process, set processing steps following the current process, or start a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to the system over a network. Such a network may include a local network or the internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the controller receives instructions in the form of data. Such data identifies parameters for each processing step performed during one or more operations. The parameters may be specific to the type of process being performed and the type of tools the controller is configured to interact with or control. Thus, as described above, the controller may be distributed by including, for example, one or more individual controllers that are networked together and cooperate toward a common purpose (such as the processes and controls described herein). An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber that communicate with one or more integrated circuits that are remotely located (for example, at the platform level or as part of a remote computer) and combined to control the processes in the chamber.
[0093] Exemplary systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etching chambers or modules, PVD chambers or modules, CVD chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, tracking chambers or modules, and any other semiconductor processing systems that may be used in connection with or for the fabrication and / or manufacture of semiconductor wafers.
[0094] As described above, depending on one or more process steps performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used for material handling to load and unload wafer containers to and from tool locations and / or load ports within the semiconductor manufacturing plant.
[0095] The controller 729 may include various programs. A substrate positioning program may include program code for controlling chamber components used to load the substrate onto a pedestal or chuck and to control the distance between the substrate and other parts of the chamber, such as the gas inlet and / or target. A process gas control program may include code for controlling the gas composition, flow rate, pulse time, and optionally code for supplying gas to the chamber before deposition in order to stabilize the pressure in the chamber. A pressure control program may include code for controlling the pressure in the chamber, for example, by adjusting the throttle valve of the chamber's exhaust system. A heater control program may include code for controlling the current to a heating unit used to heat the substrate. Alternatively, the heater control program can control the supply of a heat transfer gas (such as helium) to the wafer chuck.
[0096] Examples of chamber sensors that can be monitored during deposition include mass flow controllers, pressure sensors (such as pressure gauges), and thermocouples located in a pedestal or chuck. Appropriately programmed feedback and control algorithms can be used in conjunction with data from these sensors to maintain desired process conditions.
[0097] The implementation of the disclosed embodiments in single or multi-chamber semiconductor processing tools has been described above. The apparatus and processes described herein may be used in conjunction with lithography patterning tools or processes for, for example, the fabrication or manufacture of semiconductor devices, displays, LEDs, solar panels, etc. Typically, although not essential, such tools / processes are used or performed together in a common fabrication facility. Film lithography patterning typically involves some or all of the following steps, each made possible by a variety of available tools: (1) applying photoresist to a workpiece (i.e., substrate) using a spin-on or spray-on tool; (2) curing the photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist with visible light, UV light, or X-ray light using a tool such as a wafer stepper; (4) developing the resist and selectively removing it using a tool such as a wet bench, thereby patterning the resist; (5) transferring the resist pattern to the underlying film or workpiece by using a dry etching tool or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
[0098] conclusion While the embodiments described above have been described in some detail for clear understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many other ways of carrying out the processes, systems, and apparatus of these embodiments. Therefore, these embodiments should be considered illustrative rather than restrictive, and their embodiments should not be limited to the details described herein.
Claims
1. The method involves providing a feature on a substrate, wherein the feature includes a metal surface having a layer of metal oxide formed thereon, and a dielectric surface. The feature is exposed to a metal halide to remove the layer of metal oxide from the metal surface. Methods that include...
2. The method according to claim 1, A method further comprising filling the feature with a conductive material.
3. The method according to claim 2, A method wherein the conductive material is in direct contact with the metal surface and the dielectric surface without an intervening layer.
4. The method according to claim 2, A method for filling the features with a conductive material, comprising depositing a nucleating layer of the conductive material before depositing the bulk conductive material.
5. The method according to claim 2, A method for filling the features with a conductive material, comprising depositing a bulk conductive material without depositing a nucleation layer.
6. The method according to claim 1, A method for filling the aforementioned features, comprising an atomic layer deposition process or a chemical vapor deposition process, including a plasma strengthening process or a thermal process, for depositing a bulk conductive material.
7. The method according to claim 6, A method wherein the deposition of the bulk conductive material is selective to the metal surface compared to the dielectric surface.
8. The method according to claim 6, A method wherein the deposition of the bulk conductive material is non-selective to the metal surface and the dielectric surface.
9. A method according to any of claim 2, A method wherein the exposure of the feature to the metal halide and the filling of the feature with a conductive material are carried out in the same chamber.
10. The method according to claim 2, A method wherein the exposure of the feature to the metal halide and the filling of the feature with a conductive material are carried out at different stations in the same chamber.
11. A method according to any of claim 2, A method wherein the exposure of the feature to the metal halide and the filling of the feature with a conductive material are carried out in different chambers.
12. The method according to claim 1, The conductive material is selected from molybdenum (Mo), ruthenium (Ru), tungsten (W), iridium (Ir), chromium (Cr), cobalt (Co), and titanium nitride (TiN).
13. The method according to claim 1, The aforementioned metal surface is a titanium nitride (TiN) surface, molybdenum nitride (MoN) x ) Surface, tungsten nitride (WN) Surface, carbon tungsten nitride (WC x N y ) Surface, tungsten carbide (WCx) surface, titanium aluminum carbide (TiAl x C y A method that is one of the following: a surface, or a tantalum nitride (TaN) surface.
14. A method according to any one of claims 1 to 13, The method wherein the metal of the metal halide is one of Mo, W, Cr, Ti, Ta, and vanadium (V).
15. A method according to any one of claims 1 to 13, The metal halide is tungsten hexafluoride (WF 6 ), tungsten hexachloride (WCl 6 ), tungsten pentachloride (WCl 5 ), tungsten hexabromide (WBr 6 ), and is one of them, a method.
16. A method according to any one of claims 1 to 13, The aforementioned metal halide is molybdenum hexafluoride (MoF 6 ) and molybdenum pentachloride (MoCl 5 One of the methods.
17. A method according to any one of claims 1 to 13, The aforementioned metal halide is niobium pentachloride (NbCl 5 ) and niobium pentabromide (NbBr 5 One of the methods.
18. A method according to any one of claims 1 to 13, The aforementioned metal halide is tantalum pentafluoride (TaF 5 ) and tantalum pentachloride (TaCl 5 One of the methods.
19. A method according to any one of claims 1 to 13, The aforementioned metal halide is vanadium pentafluoride (VF 5 ), chromium pentafluoride (CrF 5 ), and titanium tetrachloride (TiCl 4 One of the methods.
20. The method according to claim 1, A method further comprising performing a reduction treatment to remove residual halogens after removing the metal oxide layer.