Hybrid differential amplifier and hybrid differential amplification method

Abstract

This invention provides a low-cost hybrid differential amplifier and a hybrid differential amplification method that exhibit high linearity. [Solution] The hybrid differential amplifier according to the present invention, which generates a differential output signal based on a differential input signal to drive a load, comprises a first amplifier and a second amplifier. The first amplifier is configured as an inductive switching converter and generates a first output signal of the differential output signal by performing pulse width modulation (PWM) conversion on a first input signal of the differential input signal to switch inductors. The second amplifier is configured to generate a second output signal of the differential output signal based on a second input signal of the differential input signal. The second amplifier is configured as a different type of amplifier separate from the inductive switching converter and further generates a second output signal based on feedback from the differential output signal, thereby linearly correlating the differential output signal with the differential input signal.

Description

Technical Field

[0001] (Cross - reference to Related Applications) This invention claims priority to TW113139195 (filed on October 15, 2024, access code 729F) and claims priority to US18 / 964,715 (filed on December 2, 2024, access code 1251).

[0002] This invention relates to differential amplifiers, and more particularly, to differential amplifiers that can use a hybrid conversion method to improve speed, linearity, and resistance to various filtering circuits (LC filters).

Background Art

[0003] Compared with class - A or class - AB amplifiers, conventional class - D amplifiers are more efficient. However, due to their switching characteristics, class - D amplifiers often require passive lossless LC filters to demodulate signals, limit bandwidth, and reduce electromagnetic interference (EMI). The presence of inductors in LC filters increases cost, size, and weight. In applications such as electric vehicles or fully wireless earphones, removing the inductor can reduce cost, size, and weight and extend battery life.

[0004] Related prior art includes U.S. Patent US20230098806. Figure 1 shows a simplified block diagram of an amplifier from the prior art. This prior art differential amplifier includes a first amplifier circuit and a second amplifier circuit. These amplify the first input signal Vip and the second input signal Vin of the differential input signal, respectively, to produce the corresponding first output signal Vop and second output signal Von. The first amplifier circuit is configured as a switching Class D converter, and the second amplifier circuit is configured as an analog amplifier. Compared to a conventional pure Class D amplifier, this prior art eliminates the LC filter. However, in this prior art, a feedback loop filter for the output signal is configured within the switching first stage amplifier circuit. This configuration limits the unity gain bandwidth by the switching frequency.

[0005] Taking into consideration the shortcomings of the prior art, the present invention proposes a hybrid differential amplifier that balances the aforementioned requirements. [Overview of the project] [Problems that the invention aims to solve]

[0006] The advantages of this invention lie in its ability to reduce inductor current ripple, support multiple input sources (multi-stage), implement a switched-capacitor regulator, and incorporate local feedback and filters. These features improve speed, linearity, and resistance to various filtering circuits (LC filters). [Means for solving the problem]

[0007] From one perspective, the present invention provides a hybrid differential amplifier for driving a load by generating a differential output signal based on a differential input signal. A hybrid differential amplifier includes a first amplifier and a second amplifier. The first amplifier is configured as an inductive switching converter and switches inductors by performing pulse-width modulation (PWM) conversion based on the first input signal of the differential input signal to generate the first output signal of the differential output signal. The second amplifier is configured to generate a second output signal of a differential output signal based on a second input signal of a differential input signal. The second amplifier is configured as a different type of amplifier than the inductive switching converter. The second amplifier further generates a second output signal based on feedback from the differential output signal, thereby linearly correlating the differential output signal with the differential input signal.

[0008] In one preferred embodiment, the first amplifier includes a signal conditioning circuit, a first pulse width modulation circuit, and a switching power stage circuit. The signal adjustment circuit is configured to generate a distorted amplified signal by applying distortion processing to the first input signal. The first pulse width modulation circuit is configured to generate a PWM output signal based on a comparison between the distorted amplified signal and the first triangular wave. The switching power stage circuit is configured to generate a first output signal by switching inductors based on a PWM output signal. Distortion processing includes amplifying and clamping either the first or second input signal to generate a saturated amplified signal, and then linearly superimposing the first input signal with the saturated amplified signal to generate a distorted amplified signal.

[0009] In one preferred embodiment, the second amplifier is configured as a linear amplifier operating in the continuous-time domain. The second amplifier includes a loop filter circuit configured to generate a loop filter signal by linearly integrating the difference between a differential output signal and a differential input signal; a gain stage circuit configured to generate a gain output signal by linearly amplifying the loop filter signal; and an amplification stage circuit configured to generate a second output signal by linearly amplifying the gain output signal.

[0010] In one preferred embodiment, the second amplifier further includes an adder configured to superimpose the saturated amplified signal and the loop filtered signal. The gain stage circuit is further configured to amplify the superposition of the saturated amplified signal and the loop filter signal to generate a gain output signal, and the difference between the distorted amplified signal and the gain output signal is linearly correlated with the differential input signal.

[0011] In one preferred embodiment, the second output signal is fed back from the amplification stage circuit to the gain stage circuit. The gain stage circuit is further configured to generate a gain output signal based on the difference between the feedback signal associated with the second output signal and the loop filter signal.

[0012] In one preferred embodiment, the signal conditioning circuit consists of one of the following configurations 1 to 3.

[0013] Configuration 1: The signal conditioning circuit includes a common-mode amplifier and a clamping circuit. A common-mode amplifier circuit is configured to amplify either a first input signal or a second input signal to generate a common-mode amplified signal. The clamp circuit is configured to limit the common-mode amplified signal to a predetermined range and generate a distorted amplified signal.

[0014] Configuration 2: The signal conditioning circuit includes a common-mode amplifier, a clamping amplifier, and an inverting amplifier. A common-mode amplifier circuit is configured to amplify either a first input signal or a second input signal to generate a common-mode amplified signal. The clamp circuit is configured to limit the common-mode amplified signal to a predetermined range and generate a saturated amplified signal. An inverting amplifier circuit is configured to amplify a saturated amplified signal to generate a distorted amplified signal.

[0015] Configuration 3: The signal adjustment circuit includes a non-inverting amplifier circuit, a clamping circuit, and an inverting adder circuit. The non-inverting amplifier circuit is configured to amplify one of the first input signal or the second input signal to generate a non-inverting amplified signal. The clamping circuit is configured to limit the non-inverting amplified signal within a predetermined range to generate a saturated amplified signal. The inverting adder circuit is configured to superimpose the saturated amplified signal on the other of the first input signal or the second input signal to generate a distortion amplified signal.

[0016] In one preferred embodiment, the amplification stage circuit includes an AB-class amplifier and a level shifter. The AB-class amplifier includes an upper transistor and a lower transistor. The first end and the second end of the level shifter are respectively coupled to the gate of the upper transistor and the gate of the lower transistor to maintain a preset voltage difference between the gates of the upper transistor and the lower transistor. The upper transistor and the lower transistor are connected in series and configured to generate a second output signal. The level shifter is further configured to shift the level of the gain output signal to control the gates of the upper transistor and the lower transistor.

[0017] In one preferred embodiment, the first pulse width modulation circuit is configured to compare the distortion amplified signal with a first triangular wave to generate a first PWM signal, and the distortion amplified signal and the first triangular wave share the same common mode level. The hybrid differential amplifier further includes a second pulse width modulation circuit, a load detection circuit, and an output selection circuit. The second pulse width modulation circuit is configured to generate a second PWM signal based on the comparison between the distortion amplified signal and a second triangular wave, and the common mode level of the first triangular wave and the common mode level of the second triangular wave have a non-zero offset. The load detection circuit is configured to determine whether the hybrid differential amplifier is in a light load state or a non-light load state and generate a corresponding selection signal. The output selection circuit is configured to select the second PWM signal as the PWM output signal during the light load state and select the first PWM signal as the PWM output signal during the non-light load state.

[0018] In one preferred embodiment, the first pulse width modulation circuit is configured to generate the first PWM signal by comparing the distortion amplification signal with the first triangular wave. The hybrid differential amplifier further includes a second pulse width modulation circuit, a load detection circuit, and an output selection circuit. The second pulse width modulation circuit is configured to generate the second PWM signal based on the comparison between the distortion amplification signal and the second triangular wave, and the amplitude of the first triangular wave is greater than the amplitude of the second triangular wave. The load detection circuit is configured to determine whether the hybrid differential amplifier is in a light load state or a non-light load state and generate a corresponding selection signal. The output selection circuit is configured to select the first PWM signal as the PWM output signal during the non-light load state, control the switching power stage circuit to switch the inductor according to the first amplitude to generate the first output signal, and select the second PWM signal as the PWM output signal during the light load state, control the switching power stage circuit to switch the inductor according to the second amplitude to generate the first output signal. The first amplitude is greater than the second amplitude.

[0019] In one preferred embodiment, the second amplifier is configured as a switched capacitor converter. The switched capacitor converter includes a loop filter circuit, a gain stage circuit, a pulse width modulation circuit, and a switched capacitor power stage circuit. The loop filter circuit is configured to integrate the difference between the differential output signal and the differential input signal to generate a loop filter signal. The gain stage circuit is configured to amplify the difference between the loop filter signal and the feedback signal associated with the second output signal to generate a gain output signal. The pulse width modulation circuit is configured to generate multiple PWM signals based on a comparison between a gain output signal and multiple ramp signals. A switched-capacitor power stage circuit includes multiple switches configured to control the switching of at least one capacitor based on multiple PWM signals and generate a second output signal through a switched-capacitor power conversion.

[0020] From another perspective, the present invention provides a hybrid differential amplification method for generating a differential output signal based on a differential input signal to drive a load. The method includes the following steps: A step of generating a first output signal of a differential output signal by performing pulse width modulation (PWM) conversion based on a first input signal of a differential input signal to switch inductors. A step of generating a second output signal of a differential output signal, excluding inductor switching, based on a second input signal of a differential input signal. A step of generating a second output signal based on feedback from a differential output signal, thereby linearly correlating the differential output signal with the differential input signal.

[0021] In one preferred embodiment, the step of generating a first output signal includes the following: Applying distortion processing to the first input signal to generate a distorted and amplified signal. To generate a PWM output signal based on a comparison between a distorted amplified signal and a first triangular wave. The inductor is switched based on the PWM output signal to generate a first output signal. Distortion processing involves amplifying and clamping either the first or second input signal to generate a saturated amplified signal, and then linearly superimposing the first input signal with the saturated amplified signal to generate a distorted amplified signal.

[0022] In one preferred embodiment, the step of generating a second output signal includes the following: This method generates a loop filter signal by linearly integrating the difference between the differential output signal and the differential input signal. This involves linearly amplifying a loop filter signal to generate a gain output signal. The process involves linearly amplifying the gain output signal to generate a second output signal.

[0023] In one preferred embodiment, the step of generating a second output signal further includes amplifying the superposition of the saturated amplified signal and the loop filter signal to generate a gained output signal. The difference between the distortion amplification signal and the gain output signal is linearly correlated with the differential input signal.

[0024] In one preferred embodiment, the step of generating a second output signal further includes generating a gain output signal based on the difference between a feedback signal associated with the second output signal and a loop filter signal.

[0025] In one preferred embodiment, the step of generating a distortion-amplified signal includes one of the following: The process involves amplifying either the first or second input signal to generate a common-mode amplified signal, and then limiting the common-mode amplified signal to a predetermined range to generate a distorted amplified signal. The process involves amplifying either the first or second input signal to generate a common-mode amplified signal, limiting the common-mode amplified signal to a predetermined range to generate a saturated amplified signal, and amplifying the saturated amplified signal to generate a distorted amplified signal. Alternatively, the method involves amplifying either the first or second input signal to generate a common-mode amplified signal, limiting the common-mode amplified signal to a predetermined range to generate a saturated amplified signal, and superimposing the saturated amplified signal with the other of the first or second input signal to generate a distorted amplified signal.

[0026] In one preferred embodiment, the step of generating a second output signal includes controlling a Class AB amplifier using the gain output signal. A Class AB amplifier includes an upper transistor and a lower transistor. Controlling a Class AB amplifier involves shifting the level of the gain output signal to control the gates of the upper and lower transistors, while maintaining a preset voltage difference between the gates of the upper and lower transistors.

[0027] In one preferred embodiment, the step of generating a first output signal further includes the following: Assuming that the distorted amplified signal and the first triangular wave have the same common-mode level, the first PWM signal is generated by comparing the distorted amplified signal with the first triangular wave. Assuming that the common-mode levels of the first triangular wave and the second triangular wave have a non-zero offset, a second PWM signal is generated by comparing the distorted amplified signal with the second triangular wave. Determine whether the differential input signal is under a light load or not. During light load conditions, the second PWM signal is selected as the PWM output signal, and during non-light load conditions, the first PWM signal is selected as the PWM output signal.

[0028] In one preferred embodiment, the step of generating a first output signal further includes the following: The first PWM signal is generated by comparing the distorted amplified signal with the first triangular wave. Assuming that the amplitude of the first triangular wave is greater than the amplitude of the second triangular wave, a second PWM signal is generated by comparing the distorted amplified signal with the second triangular wave. Determine whether the differential input signal is under a light load or not. During a non-light load state, a first PWM signal is selected as the PWM output signal, and the inductor is switched according to the first amplitude to generate the first output signal. During a light load state, a second PWM signal is selected as the PWM output signal, and the inductor is switched according to the amplitude of the second signal to generate the first output signal. The first amplitude is greater than the second amplitude.

[0029] In one preferred embodiment, the step of generating a second output signal further includes the following: This involves integrating the difference between a differential output signal and a differential input signal to generate a loop filter signal. The process involves amplifying the difference between the loop filter signal and the feedback signal associated with the second output signal to generate a gain output signal. The process of generating multiple PWM signals based on a comparison between a gain output signal and multiple ramp signals. Controlling multiple switches based on multiple PWM signals to switch at least one capacitor, thereby generating a second output signal through switched-capacitor power conversion.

[0030] The object, technical details, features, and effects of the present invention will be better understood with reference to the drawings and the following detailed description of embodiments. [Brief explanation of the drawing]

[0031] [Figure 1] This is a diagram showing a conventional amplifier. [Figure 2] This is a circuit block diagram of a hybrid differential amplifier according to one embodiment of the present invention. [Figure 3A] This is a circuit block diagram of a hybrid differential amplifier according to one embodiment of the present invention. [Figure 3B] This is a circuit block diagram of a loop filter circuit for a hybrid differential amplifier according to one embodiment of the present invention. [Figure 4A] This is a schematic diagram of a signal adjustment circuit for a hybrid differential amplifier according to an embodiment of the present invention. [Figure 4B] This is a schematic diagram of a signal adjustment circuit for a hybrid differential amplifier according to an embodiment of the present invention. [Figure 4C] This is a schematic diagram of the signal conditioning circuit of a hybrid differential amplifier according to one embodiment of the present invention. [Figure 4D]This is a schematic waveform diagram of signals related to the signal adjustment circuit of a hybrid differential amplifier according to one embodiment of the present invention. [Figure 5] This is a circuit block diagram of a hybrid differential amplifier according to another embodiment of the present invention. [Figure 6] This is a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. [Figure 7] This is a schematic diagram of the amplifier stage circuit of a hybrid differential amplifier according to one embodiment of the present invention. [Figure 8A] This is a schematic diagram of the gain stage circuit and amplifier stage circuit of a hybrid differential amplifier according to an embodiment of the present invention. [Figure 8B] This is a schematic diagram of the gain stage circuit and amplifier stage circuit of a hybrid differential amplifier according to an embodiment of the present invention. [Figure 9A] This is a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. [Figure 9B] This is a schematic waveform diagram of the signals related to the hybrid differential amplifier shown in Figure 9A, according to one embodiment of the present invention. [Figure 9C] This is a schematic diagram of the amplifier stage circuit of the hybrid differential amplifier shown in Figure 9A, according to one embodiment of the present invention. [Figure 10A] This is a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. [Figure 10B] This is a schematic waveform diagram of the signals related to the hybrid differential amplifier shown in Figure 10A according to one embodiment of the present invention. [Figure 10C] Figure 10A is a schematic diagram of the amplifier stage circuit of the hybrid differential amplifier according to one embodiment of the present invention. [Figure 11A] This is a schematic diagram of an amplifier circuit for a hybrid differential amplifier according to yet another embodiment of the present invention. [Figure 11B] This is a schematic waveform diagram of the signals related to the amplifier of the hybrid differential amplifier shown in Figure 11A, according to one embodiment of the present invention. [Figure 12] This is a schematic waveform diagram of signals related to a hybrid differential amplifier according to one embodiment of the present invention. [Modes for carrying out the invention]

[0032] The drawings referenced throughout this description of the present invention are for illustrative purposes only to illustrate the relationship between circuits and signal waveforms and are not drawn to the actual scale of the circuit size and signal amplitude and frequency.

[0033] Figure 2 shows a circuit block diagram of a hybrid differential amplifier according to one embodiment of the present invention. As shown in Figure 2, the hybrid differential amplifier 20 generates a differential output signal Vod based on a differential input signal Vid to drive a load. The hybrid differential amplifier 20 includes amplifiers 201 and 202. Amplifier 201 performs pulse-width modulation (PWM) conversion on a first input signal (e.g., Vip) of the differential input signal Vid to switch inductor L and generate a first output signal Vop of the differential output signal Vod. In one embodiment, amplifier 201 is configured as an inductive switching converter. Amplifier 202 generates a second output signal Von of the differential output signal Vod based on a second input signal (e.g., Vin) of the differential input signal Vid. In one embodiment, amplifier 202 is configured as a different type of amplifier separate from the inductive switching converter. Amplifier 202 further generates a second output signal Von based on feedback from the differential output signal Vod, thereby linearly correlating the differential output signal Vod with the differential input signal Vid. In one embodiment, the differential input signal Vid represents the difference between the first input signal Vip and the second input signal Vin, and the differential output signal Vod represents the difference between the first output signal Vop and the second output signal Von.

[0034] Figure 3A shows a circuit block diagram of a hybrid differential amplifier according to one embodiment of the present invention. As shown in Figure 3A, the amplifier 201 includes a signal conditioning circuit 2011, a pulse width modulation circuit 2012, a logic / level shift circuit 2013, and an amplification stage circuit 2014. The signal conditioning circuit 2011 applies distortion processing to a first input signal Vip to generate a distorted amplified signal Vdist. In one embodiment, the distortion processing includes amplifying and clamping one of the input signals (Vip or Vin) to generate a saturated amplified signal, and then linearly superimposing the saturated amplified signal with the first input signal Vip to generate a distorted amplified signal Vdist. The pulse width modulation circuit 2012 compares the distorted amplified signal Vdist with a triangular wave VTR1 to generate a PWM output signal SPW. The logic / level shift circuit 2013 generates a drive signal Sdrv for the amplification stage circuit 2014 based on the PWM output signal SPW and shifts the level of Sdrv to the required operating range of the amplification stage circuit 2014. In one embodiment, the amplification stage circuit 2014 is a switching power stage circuit. The amplification stage circuit 2014 switches the inductor L according to the drive signal Sdrv (detailed in Figure 9) to generate a first output signal Vop.

[0035] In one embodiment, amplifier 202 is configured as a linear amplifier operating in the continuous-time domain. Amplifier 202 includes a loop filter circuit 2021, a gain stage circuit 2022, and an amplification stage circuit 2023. The loop filter circuit 2021 linearly integrates the difference between the differential output signal Vod and the differential input signal Vid to generate a loop filter signal Vftr. The gain stage circuit 2022 linearly amplifies the loop filter signal Vftr to generate a gain output signal Vgo. The amplification stage circuit 2023 linearly amplifies the gain output signal Vgo to generate a second output signal Von. In one embodiment, the difference between the distortion amplification signal Vdist and the gain output signal Vgo is linearly correlated with the differential input signal Vid.

[0036] Figure 3B shows a circuit block diagram of a loop filter circuit for a hybrid differential amplifier according to one embodiment of the present invention. This embodiment is an example of the loop filter circuit 2021 from Figure 3A. As shown in Figure 3B, the loop filter circuit 2021 generates a loop filter signal Vftr based on the difference Vdp between a first input signal Vip and a first output signal Vop, and the difference Vdn between a second input signal Vin and a second output signal Von. Figure 3B shows a typical embodiment and does not limit the method for obtaining the difference between the differential output signal Vod and the differential input signal Vid.

[0037] Figures 4A and 4B show schematic diagrams of signal conditioning circuits for a hybrid differential amplifier according to embodiments of the present invention. In one embodiment, as shown in Figure 4A, the signal conditioning circuit 2011a includes a common-mode amplifier circuit 20111 and a clamp circuit 20112. The common-mode amplifier circuit 20111 amplifies either a first input signal Vip or a second input signal Vin to generate a common-mode amplified signal Vnia. The clamp circuit 20112 limits the common-mode amplified signal Vnia to a predetermined range (e.g., upper limit Vlmt_H and lower limit Vlmt_L, without limitation) to generate a distorted amplified signal Vdist. In another embodiment, as shown in Figure 4B, the signal conditioning circuit 2011b includes a common-mode amplifier circuit 20111, a clamp circuit 20112, and an inverting amplifier circuit 20113. The common-mode amplifier circuit 20111 and the clamp circuit 20112 in this embodiment are the same as those in Figure 4A and will not be described in detail. The inverting amplifier circuit 20113 amplifies the saturated amplified signal Vin_sat or Vip_sat generated by the clamp circuit 20112 to produce a distorted amplified signal Vdist.

[0038] Figure 4C shows a schematic diagram of the signal conditioning circuit of a hybrid differential amplifier according to one embodiment of the present invention. In yet another embodiment, as shown in Figure 4C, the signal conditioning circuit 2011c includes a common-mode amplifier circuit 20111, a clamp circuit 20112, and an inverting adder circuit 20114. The common-mode amplifier circuit 20111 and the clamp circuit 20112 in this embodiment are the same as those in Figure 4A and will not be described in detail. The inverting adder circuit 20114 superimposes the saturated amplified signal Vin_sat or Vip_sat generated by the clamp circuit 20112 with another input signal from Vip or Vin to generate a distorted amplified signal Vdist. In a particular embodiment corresponding to amplifier 201 in Figure 3A, the distorted amplified signal Vdist can be a superposition of the first input signal Vip and the saturated amplified signal Vin_sat. As a result, a second output signal Von is generated via feedback control by the loop filter circuit 2021 to obtain a waveform corresponding to the saturated amplified signal Vin_sat (see Figure 12).

[0039] Figure 4D shows schematic waveforms of signals related to the signal conditioning circuit of a hybrid differential amplifier according to one embodiment of the present invention. The saturated amplification signal Vip_sat and the first input signal Vip are shown in Figure 4D.

[0040] Figure 5 shows a circuit block diagram of a hybrid differential amplifier according to another embodiment of the present invention. As shown in Figure 5, this embodiment is similar to the embodiment in Figure 3A, except that the amplifier 202 in this embodiment further includes an adder 2027. The adder 2027 superimposes the saturated amplified signal Vip_sat or Vin_sat with the loop filter signal Vftr' to generate a combined loop filter signal Vftr. In this embodiment, the gain stage circuit 2022 amplifies the combined loop filter signal Vftr to generate a gain output signal Vgo. By pre-superimposing the saturated amplified signal Vip_sat or Vin_sat with the loop filter signal Vftr', the required signal range within the loop filter circuit 2021 can be reduced, thereby reducing the requirements for bandwidth, gain, or slew rate of the loop filter circuit 2021.

[0041] Figure 6 shows a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. As shown in Figure 6, this embodiment is similar to the embodiment in Figure 3A, except that the second output signal Von is fed back from the amplification stage circuit 2023 to the gain stage circuit 2022. The gain stage circuit 2022 generates a gain output signal Vgo by amplifying the difference between the feedback signal Vfb (related to the second output signal Von) and the loop filter signal Vftr.

[0042] Figure 7 shows a schematic diagram of the amplification stage circuit of a hybrid differential amplifier according to one embodiment of the present invention. This embodiment is an example of amplification stage circuit 2023. As shown in Figure 7, amplification stage circuit 2023 includes a level shifter 20231a and a Class AB amplifier 20232a. The Class AB amplifier 20232a includes an upper transistor QU1 and a lower transistor QL1. The first and second ends of the level shifter 20231a are coupled to the gates of the upper transistor QU1 and the lower transistor QL1, respectively, maintaining a preset voltage difference between their gates. The upper transistor QU1 and the lower transistor QL1 are connected in series to generate a second output signal Von. The input terminal of the level shifter 20231a is coupled to a gain output signal Vgo. In this embodiment, the gain output signal Vgo is coupled to control the gate of the lower transistor QL1. The level-shifted gain output signal Vgo' is coupled to control the gate of the upper transistor QU1. The level shifter 20231a in this embodiment may include multiple diodes to provide a level shift voltage.

[0043] Figure 8A shows schematic diagrams of the gain stage and amplification stage circuits of a hybrid differential amplifier according to one embodiment of the present invention. This embodiment is another example of the amplification stage circuit 2023. As shown in Figure 8A, the amplification stage circuit 2023 includes a Class AB amplifier 20232b and a level shifter 20231b. The Class AB amplifier 20232b includes an upper transistor QU2 and a lower transistor QL2. The first and second ends of the level shifter 20231b are coupled to the gates of the upper transistor QU2 and the lower transistor QL2, respectively, to maintain a preset voltage difference between their gates. The upper transistor QU2 and the lower transistor QL2 are connected in series to generate a second output signal Von. The second end of the level shifter 20231b is coupled to the gain stage circuit 2022. In this embodiment, the level shifter 20231b may include two complementary transistors connected in parallel to provide a level shift voltage.

[0044] Figure 8B shows schematic diagrams of the gain stage and amplification stage circuits of a hybrid differential amplifier according to one embodiment of the present invention. This embodiment is a specific example of Figure 8A, and the gain stage circuit is a local feedback amplifier 2022a. The local feedback amplifier 2022a amplifies the difference between the loop filter signal Vftr and the feedback signal Vfb to generate a gain output signal Vgo. The feedback signal Vfb relates to a second output signal Von (for example, as a voltage divider of the second output signal Von).

[0045] Figure 9A shows a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. This embodiment is similar to the embodiment in Figure 6, except that, as shown in Figure 9A, amplifier 201 includes pulse width modulation circuits 2012a and 2012b, a load detection circuit 2015, and an output selection circuit 2016, while amplifier 202 includes an adder 2029 and a common-mode shifter 2030. Pulse width modulation circuit 2012a generates a PWM signal SPW1 by comparing a distorted amplified signal Vdist with a triangular wave VTR1. In one embodiment, the distorted amplified signal Vdist and the triangular wave VTR1 share the same common-mode level VCM1. Pulse width modulation circuit 2012b generates a PWM signal SPW2 by comparing a distorted amplified signal Vdist with a triangular wave VTR2. Referring to both Figures 9A and 9B, the common-mode levels VCM1 of the triangular wave VTR1 and VCM2 of the triangular wave VTR2 have a non-zero offset Vos. The load detection circuit 2015 determines whether the hybrid differential amplifier 20 is in a light-load or non-light-load state based on the levels of the differential input signals (Vip and / or Vin) and generates a selection signal Sel representing the corresponding state. The output selection circuit 2016 selects the PWM signal SPW2 as the PWM output signal SPW if the selection signal Sel indicates a light-load state, and selects the PWM signal SPW1 as the PWM output signal SPW if the selection signal Sel indicates a non-light-load state. The common-mode shifter 2030 offsets the selection signal Sel by the shift voltage to generate a level-adjusted signal Sel'. The adder 2029 superimposes the loop filter signal Vftr' and the level-adjusted signal Sel' to generate a combined loop filter signal Vftr.

[0046] Figure 9B shows schematic waveforms of signals related to the hybrid differential amplifier of Figure 9A according to one embodiment of the present invention. The clock signal CK, triangular waves VTR1 and VTR2, distortion amplification signals Vdist, common mode levels VCM1 and VCM2, offset Vos, and PWM signals SPW, SPW1, and SPW2 are shown in Figure 9B. Figure 9C shows a schematic diagram of the amplification stage circuit of the hybrid differential amplifier of Figure 9A according to one embodiment of the present invention. As shown in Figure 9C, the amplification stage circuit 2014 includes an upper switch QU3, a lower switch QL3, and an inductor L. The upper switch QU3 is coupled between the power supply voltage PVDD and the switching node LXp, and the lower switch QL3 is coupled between the switching node LXp and ground. The inductor L is coupled between the switching node LXp and the first output signal Vop. Referring to both Figures 9B and 9C, the logic / level shift circuit 2013 generates drive signals HS and LS based on the PWM signal SPW, controlling the upper switch QU3 and the lower switch QL3, thereby alternating the switching node voltage Vlxp between the power supply voltage PVDD and ground.

[0047] Figure 10A shows a circuit block diagram of a hybrid differential amplifier according to yet another embodiment of the present invention. Figure 10B shows schematic waveform diagrams of signals related to the hybrid differential amplifier of Figure 10A according to one embodiment of the present invention. The clock signal CK, triangular waves VTR1 and VTR2, distortion amplification signal Vdist, common mode level VCM1, PWM signals SPW, SPW1 and SPW2, and the first output signal Vop are shown in Figure 10B. This embodiment is similar to the embodiment in Figure 6, except that the amplifier 201 includes pulse width modulation circuits 2012a and 2012b, a load detection circuit 2015, and an output selection circuit 2016, as shown in Figure 10A. The pulse width modulation circuit 2012a generates the PWM signal SPW1 by comparing the distortion amplification signal Vdist with the triangular wave VTR1, and the pulse width modulation circuit 2012b generates the PWM signal SPW2 by comparing the distortion amplification signal Vdist with the triangular wave VTR2. In one embodiment, the amplitude of the triangular wave VTR1 is greater than that of the triangular wave VTR2 (as shown in Figure 10B). The load detection circuit 2015 determines whether the hybrid differential amplifier 20 is in a light-load or non-light-load state based on the levels of the first input signal Vip and / or the second input signal Vin, and generates a corresponding selection signal Sel. The output selection circuit 2016 selects the PWM signal SPW2 as the PWM output signal SPW during the light-load state and drives the amplification stage circuit 2014a to switch the inductor L by a switching node voltage Vlxp having one amplitude (i.e., PVDD2), thereby generating a first output signal Vop. On the other hand, the output selection circuit 2016 selects the PWM signal SPW1 as the PWM output signal SPW during the non-light load state and drives the amplification stage circuit 2014a to switch the inductor L by a switching node voltage Vlxp having a different amplitude (i.e., PVDD1), thereby generating the first output signal Vop. In one embodiment, PVDD1 is greater than PVDD2.

[0048] Figure 10C shows a schematic diagram of the amplification stage circuit of the hybrid differential amplifier of Figure 10A according to one embodiment of the present invention. As shown in Figure 10C, the amplification stage circuit 2014a includes upper switches QU4 and QU5, a lower switch QL4, and an inductor L. The upper switch QU4 is coupled between the power supply voltage PVDD1 and the switching node LXp, the upper switch QU5 is coupled between the power supply voltage PVDD2 and the switching node LXp, and the lower switch QL4 is coupled between the switching node LXp and ground. The inductor L is coupled between the switching node LXp and the first output signal Vop. Referring to Figures 10A, 10B, and 10C, the logic / level shift circuit 2013' generates drive signals HS1, HS2, and LS based on the PWM signal SPW and the selection signal Sel, and controls the upper switches QU4 and QU5 and the lower switch QL4. If the load detection circuit 2015 determines that the hybrid differential amplifier 20 is in a non-light load state, the drive signals HS1 and LS periodically switch the upper switch QU4 and the lower switch QL4 based on the PWM signal SPW, causing the switching node voltage Vlxp to alternately change between the power supply voltage PVDD1 and ground, while the drive signal HS2 keeps the upper switch QU5 off. Conversely, if the load detection circuit 2015 determines that the hybrid differential amplifier 20 is in a light load state, the drive signals HS2 and LS periodically switch the upper switch QU5 and the lower switch QL4 based on the PWM signal SPW, causing the switching node voltage Vlxp to alternately change between the power supply voltage PVDD2 and ground, while the drive signal HS1 keeps the upper switch QU4 off. As shown in Figure 10B, the power supply voltage PVDD2 is smaller than PVDD1.

[0049] Figure 11A shows a schematic diagram of an amplifier in a hybrid differential amplifier according to yet another embodiment of the present invention. This embodiment is similar to the embodiment in Figure 6, except that the amplifier 202 is configured as a switched-capacitor converter, as shown in Figure 11A. Specifically, in this embodiment, the amplifier 202 includes pulse width modulation circuits 2024a and 2024b, a logic / level shift circuit 2025, and a switched-capacitor power stage circuit 2026. The pulse width modulation circuits 2024a and 2024b compare a gain output signal Vgo with a plurality of ramp signals RMP1 and RMP2 to generate a plurality of corresponding PWM signals SPW1 and SPW2. The logic / level shift circuit 2025 generates operation signals G1, G2, G3, and G4 for the switched-capacitor power stage circuit 2026 based on the plurality of PWM signals SPW1 and SPW2. The logic / level shift circuit 2025 also shifts the levels of the operating signals G1, G2, G3, and G4 to the required operating levels of the switched-capacitor power stage circuit 2026. The switched-capacitor power stage circuit 2026 includes multiple switches Q1-Q4. The multiple switches Q1-Q4 control the switching of at least one capacitor Cf based on the multiple operating signals G1, G2, G3, and G4, thereby generating a second output signal Von through the switched-capacitor power conversion.

[0050] Figure 11B shows schematic waveforms of signals related to the amplifier of the hybrid differential amplifier shown in Figure 11A according to one embodiment of the present invention. Ramp signals RMP1 and RMP2 are shown in Figure 11B. In this embodiment, ramp signals RMP1 and RMP2 have a phase difference of 180 degrees from each other.

[0051] Figure 12 shows schematic waveforms of signals related to a hybrid differential amplifier according to one embodiment of the present invention. The first input signal Vip, the saturated amplification signal Vin_sat, the superposition signal of the first input signal Vip and the saturated amplification signal Vin_sat (i.e., the distortion amplification signal Vdist), and the loop filter signal Vftr are shown in Figure 12. As shown in Figure 12, since the saturated amplification signal Vin_sat is closer to a square wave, the distortion amplification signal Vdist, which arises from the superposition of the saturated amplification signal Vin_sat and the first input signal Vip, has a shorter gap near zero (the same applies to the second output signal Von). Therefore, in embodiments where the amplification stage circuit is a Class AB amplifier, the time during which current flows simultaneously through both the upper and lower transistors is reduced, thereby eliminating the need for additional inductors while maintaining higher conversion efficiency compared to conventional Class D amplifiers.

[0052] The present invention has been described in considerable detail with reference to certain preferred embodiments. It should be understood that this description is illustrative and not intended to limit the broadest scope of the invention. Embodiments or claims of the invention do not need to achieve all the objectives or advantages of the invention. The title and abstract are provided to aid in searching and are not intended to limit the scope of the invention. Those skilled in the art will readily recall variations and modifications within the spirit of the invention. For example, performing an action "according to" a particular signal as described in the context of the invention is not strictly limited to performing an action according to the signal itself, but can also be performed according to a transformed or augmented or reduced form of the signal. That is, the signal can be processed before the action is performed by voltage-to-current conversion, current-to-voltage conversion, and / or ratio conversion, etc. Each of the embodiments described herein is not limited to being used alone. In accordance with the spirit of the invention, two or more of the embodiments described herein can be used in combination. For example, two or more embodiments can be used together, or parts of one embodiment can be used to replace corresponding parts of another embodiment. In light of the foregoing, the spirit of the present invention encompasses all such and other modifications and variations, which should be interpreted as falling within the scope of the claims and their equivalents. [Explanation of symbols]

[0053] 20 Hybrid Differential Amplifiers 201 Amplifier 2011 Signal conditioning circuit 2011a signal conditioning circuit 2011c signal conditioning circuit 20111 Common-mode amplifier circuit 20112 Clamp Circuit 20114 Inverting Adder Circuit 2012 Pulse Width Modulation Circuit 2012a Pulse width modulation circuit 2012b Pulse width modulation circuit 2013 Logic / Level Shift Circuits 2013' Logic / Level Shift Circuit 2014 Amplifier Stage Circuit 2014a Amplifier stage circuit 2015 Load detection circuit 2016 Output Selection Circuit 202 Amplifier 2021 Loop Filter Circuit 2022 Gain Stage Circuit 2022a Local Feedback Amplifier 2023 Amplifier Stage Circuit 20231a Level Shifter 20231b Level Shifter 20232b Class AB Amplifier 2024a Pulse width modulation circuit 2024b Pulse width modulation circuit 2025 Logic / Level Shift Circuits 2026 Switched Capacitor Power Stage Circuit 2027 Adder 2029 Adder 2030 Common Mode Shifter CK clock signal G1 Operating signal G2 operating signal G3 operating signal G4 operating signal HS drive signal HS1 drive signal HS2 drive signal HLS drive signal PVDD Power supply voltage PVDD1 Power Supply Voltage PVDD2 Power Supply Voltage QU1 Upper Transistor QU2 upper transistor QL1 lower transistor QL2 lower transistor QU3 Top Switch QU4 Top Switch QU5 Top Switch QL3 Lower Switch QL4 Lower Switch Q1 Switch Q2 Switch Q3 Switch Q4 Switch RMP1 ramp signal RMP2 ramp signal Sel' Level-adjusted signal SPW PWM signal, PWM output signal SPW1 PWM signal SPW2 PWM signal Sel selection signal Sdrv drive signal Vnia common-mode amplified signal Vftr loop filter signal Vftr' Loop filter signal Vgo gain output signal Vip First Input Signal Vin is the second input signal. Vop First output signal Von, the second output signal Vid differential input signal VOD differential output signal Vdist Distortion Amplification Signal Vin_sat Saturation Amplification Signal Vip_sat Saturation Amplification Signal Vftr combined loop filter signal Vfb feedback signal VTR1 triangle wave VTR2 triangle wave VCM1 Common Mode Level VCM2 Common Mode Level Vos Offset Vlxp switching node voltage

Claims

1. A hybrid differential amplifier for driving a load by generating a differential output signal based on a differential input signal, wherein the hybrid differential amplifier is A first amplifier configured as an inductive switching converter, which performs pulse width modulation (PWM) conversion based on a first input signal of the differential input signal to switch inductors and generate a first output signal of the differential output signal, A second amplifier configured to generate a second output signal of the differential output signal based on a second input signal of the differential input signal, It has, The second amplifier is configured as an amplifier of a different type from the inductive switching converter. A hybrid differential amplifier characterized in that the second amplifier further generates the second output signal based on feedback from the differential output signal, thereby linearly correlating the differential output signal with the differential input signal.

2. The first amplifier is, A signal adjustment circuit configured to generate a distorted amplified signal by applying distortion processing to the first input signal, A first pulse width modulation circuit configured to generate a PWM output signal based on a comparison of the aforementioned distortion amplified signal and a first triangular wave, A switching power stage circuit configured to generate the first output signal by switching the inductor based on the PWM output signal, It has, The hybrid differential amplifier according to claim 1, wherein the distortion processing includes amplifying and clamping either the first input signal or the second input signal to generate a saturated amplified signal, and linearly superimposing the first input signal with the saturated amplified signal to generate the distortion amplified signal.

3. The second amplifier is configured as a linear amplifier operating in the continuous-time domain, and the second amplifier is A loop filter circuit is configured to generate a loop filter signal by linearly integrating the difference between the differential output signal and the differential input signal, A gain stage circuit configured to linearly amplify the aforementioned loop filter signal to generate a gain output signal, An amplification stage circuit configured to linearly amplify the gain output signal to generate a second output signal, A hybrid differential amplifier according to claim 2, including the above.

4. The second amplifier further, Includes an adder configured to superimpose the saturated amplified signal and the loop filter signal, The gain stage circuit is further configured to generate the gain output signal by amplifying the superposition of the saturated amplified signal and the loop filter signal. The hybrid differential amplifier according to claim 3, wherein the difference between the distortion amplification signal and the gain output signal is linearly correlated with the differential input signal.

5. The second output signal is fed back from the amplification stage circuit to the gain stage circuit. The hybrid differential amplifier according to claim 3, wherein the gain stage circuit is further configured to generate the gain output signal based on the difference between a feedback signal related to the second output signal and the loop filter signal.

6. The hybrid differential amplifier according to claim 2, wherein the signal adjustment circuit is composed of one of the following configurations 1 to 3. Configuration 1: The signal adjustment circuit includes a common-mode amplifier circuit and a clamping circuit. The common-mode amplifier circuit is configured to amplify either the first input signal or the second input signal to generate a common-mode amplified signal. The clamp circuit is configured to generate the distortion amplification signal by limiting the common-mode amplification signal to a predetermined range. Configuration 2: The signal adjustment circuit includes a common-mode amplifier circuit, a clamping circuit, and an inverting amplifier circuit. The common-mode amplifier circuit is configured to amplify either the first input signal or the second input signal to generate a common-mode amplified signal. The clamp circuit is configured to limit the common-mode amplification signal to a predetermined range and generate the saturated amplification signal. The inverting amplifier circuit is configured to amplify the saturated amplified signal to generate the distorted amplified signal. or Configuration 3: The signal adjustment circuit includes a common-mode amplifier circuit, a clamping circuit, and an inverting adder circuit. The common-mode amplifier circuit is configured to amplify either the first input signal or the second input signal to generate a common-mode amplified signal. The clamp circuit is configured to limit the common-mode amplification signal to a predetermined range and generate the saturated amplification signal. The inverting adder circuit is configured to generate the distortion amplified signal by superimposing the saturated amplified signal with the other of the first input signal or the second input signal.

7. The aforementioned amplification stage circuit is A Class AB amplifier including an upper transistor and a lower transistor, A level shifter, wherein the first and second ends of the level shifter are coupled to the gate of the upper transistor and the gate of the lower transistor, respectively, to maintain a preset voltage difference between the gates of the upper transistor and the lower transistor. Includes, The upper transistor and the lower transistor are connected in series and configured to generate the second output signal. The hybrid differential amplifier according to claim 3, wherein the level shifter is further configured to shift the level of the gain output signal to control the gates of the upper transistor and the lower transistor.

8. The first pulse width modulation circuit is configured to generate a first PWM signal by comparing the distorted amplified signal with the first triangular wave, the distorted amplified signal and the first triangular wave share the same common-mode level, and the hybrid differential amplifier further, A second pulse width modulation circuit configured to generate a second PWM signal based on a comparison of the distortion amplified signal and a second triangular wave, wherein the common-mode level of the first triangular wave and the common-mode level of the second triangular wave have a non-zero offset. A load detection circuit is configured to determine whether the hybrid differential amplifier is in a light load state or a non-light load state and to generate a corresponding selection signal. An output selection circuit is configured to select the second PWM signal as the PWM output signal during the light load state, and to select the first PWM signal as the PWM output signal during the non-light load state, A hybrid differential amplifier according to claim 2, having the following features.

9. The first pulse width modulation circuit is configured to generate a first PWM signal by comparing the distorted amplified signal with a first triangular wave, and the hybrid differential amplifier further, A second pulse width modulation circuit configured to generate a second PWM signal based on a comparison of the distortion amplified signal and a second triangular wave, wherein the amplitude of the first triangular wave is greater than the amplitude of the second triangular wave. A load detection circuit is configured to determine whether the hybrid differential amplifier is in a light load state or a non-light load state and to generate a corresponding selection signal. An output selection circuit is configured to: select the first PWM signal as the PWM output signal during the light-load state and control the switching power stage circuit to switch the inductor according to the first amplitude to generate the first output signal; and select the second PWM signal as the PWM output signal during the light-load state and control the switching power stage circuit to switch the inductor according to the second amplitude to generate the first output signal; It has, The hybrid differential amplifier according to claim 2, wherein the first amplitude is greater than the second amplitude.

10. The second amplifier is configured as a switched-capacitor converter, and the switched-capacitor converter is A loop filter circuit configured to generate a loop filter signal by integrating the difference between the differential output signal and the differential input signal, A gain stage circuit configured to amplify the difference between the loop filter signal and the feedback signal associated with the second output signal to generate a gain output signal, A pulse width modulation circuit configured to generate multiple PWM signals based on a comparison between the gain output signal and multiple ramp signals, A switched-capacitor power stage circuit including a plurality of switches configured to control the switching of at least one capacitor based on the plurality of PWM signals and generate the second output signal through switched-capacitor power conversion, A hybrid differential amplifier according to claim 2, including the above.

11. A hybrid differential amplification method for generating a differential output signal based on a differential input signal to drive a load, The steps include: generating a first output signal of the differential output signal by performing pulse width modulation (PWM) conversion based on the first input signal of the differential input signal and switching the inductor; A step of generating a second output signal of the differential output signal, excluding the switching of the inductor, based on the second input signal of the differential input signal, The steps include: generating a second output signal based on feedback from the differential output signal, thereby linearly correlating the differential output signal with the differential input signal; A hybrid differential amplification method characterized by including [a specific feature].

12. The step of generating the first output signal is: Applying distortion processing to the first input signal to generate a distorted amplified signal, A PWM output signal is generated based on a comparison between the aforementioned distorted amplified signal and the first triangular wave. The inductor is switched based on the PWM output signal to generate the first output signal, Includes, The hybrid differential amplification method according to claim 11, wherein the distortion processing includes amplifying and clamping one of the first input signal or the second input signal to generate a saturated amplified signal, and linearly superimposing the first input signal with the saturated amplified signal to generate the distorted amplified signal.

13. The step of generating the second output signal is: The difference between the differential output signal and the differential input signal is linearly integrated to generate a loop filter signal, The loop filter signal is linearly amplified to generate a gain output signal, The above-mentioned gain output signal is linearly amplified to generate a second output signal, The hybrid differential amplification method according to claim 12, including the method described in claim 12.

14. The step of generating the second output signal further includes: The process includes amplifying the superposition of the saturated amplified signal and the loop filter signal to generate the gain output signal, The hybrid differential amplification method according to claim 13, wherein the difference between the distortion amplification signal and the gain output signal is linearly correlated with the differential input signal.

15. The step of generating the second output signal further includes: The hybrid differential amplifier method according to claim 13, further comprising generating the gain output signal based on the difference between the feedback signal associated with the second output signal and the loop filter signal.

16. The step of generating the aforementioned distortion amplification signal is: The process involves amplifying either the first input signal or the second input signal to generate a common-mode amplified signal, and limiting the common-mode amplified signal to a predetermined range to generate the distortion amplified signal. The process involves amplifying either the first or second input signal to generate a common-mode amplified signal, limiting the common-mode amplified signal to a predetermined range to generate a saturated amplified signal, and amplifying the saturated amplified signal to generate a distortion amplified signal. Alternatively, the first input signal or the second input signal may be amplified to generate a common-mode amplified signal, the common-mode amplified signal may be limited to a predetermined range to generate a saturated amplified signal, and the saturated amplified signal may be superimposed with the other of the first input signal or the second input signal to generate the distortion amplified signal. The hybrid differential amplification method according to claim 12, comprising one of the following.

17. The step of generating the second output signal includes controlling a Class AB amplifier using the gain output signal, The aforementioned Class AB amplifier includes an upper transistor and a lower transistor, Controlling the Class AB amplifier includes shifting the level of the gain output signal to control the gates of the upper transistor and the lower transistor, The hybrid differential amplifier method according to claim 13, which maintains a preset voltage difference between the gates of the upper transistor and the lower transistor.

18. The step of generating the first output signal further includes: Assuming that the distortion amplification signal and the first triangular wave have the same common-mode level, a first PWM signal is generated by comparing the distortion amplification signal with the first triangular wave. Assuming that the common-mode level of the first triangular wave and the common-mode level of the second triangular wave have a non-zero offset, a second PWM signal is generated by comparing the distorted amplified signal with the second triangular wave. The differential input signal is to be determined to be in a light load state or a non-light load state, During the light load state, the second PWM signal is selected as the PWM output signal, and during the non-light load state, the first PWM signal is selected as the PWM output signal. The hybrid differential amplification method according to claim 12, including the method described in claim 12.

19. The step of generating the first output signal further includes: A first PWM signal is generated by comparing the aforementioned distortion amplified signal with the first triangular wave. Assuming that the amplitude of the first triangular wave is greater than the amplitude of the second triangular wave, a second PWM signal is generated by comparing the distortion amplified signal with the second triangular wave. The differential input signal is to be determined to be in a light load state or a non-light load state, During the non-light load state, the first PWM signal is selected as the PWM output signal, and the inductor is switched according to the first amplitude to generate the first output signal. During the light load state, the second PWM signal is selected as the PWM output signal, and the inductor is switched according to the second amplitude to generate the first output signal. Includes, The hybrid differential amplification method according to claim 12, wherein the first amplitude is greater than the second amplitude.

20. The step of generating the second output signal further includes: The difference between the differential output signal and the differential input signal is integrated to generate a loop filter signal, The difference between the loop filter signal and the feedback signal associated with the second output signal is amplified to generate a gain output signal. The process involves generating multiple PWM signals based on a comparison between the aforementioned gain output signal and multiple ramp signals, Based on the aforementioned multiple PWM signals, a plurality of switches are controlled to switch at least one capacitor, thereby generating the second output signal through switched-capacitor power conversion. The hybrid differential amplification method according to claim 12, including the method described in claim 12.

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