Wiring board and method for manufacturing the same

Abstract

In a wiring board having a through-hole that penetrates a glass core layer and a laminate stacked on the core layer, the invention aims to suppress cracking of the glass. [Solution] The wiring board comprises a glass core layer having one surface and another surface, a first through-hole extending from one surface of the core layer to the other surface, a resin portion covering the inner wall surface of the first through-hole, a first laminate including a wiring layer and an insulating layer provided on one surface of the core layer, and a second through-hole extending through the first laminate and the core layer. In the portion of the second through-hole that penetrates the inside of the first through-hole and the core layer, the inner wall surface of the second through-hole is made of the resin portion.

Description

Technical Field

[0001] The present invention relates to a wiring board and a method for manufacturing the same.

Background Art

[0002] A wiring board having a core layer and a laminate including wiring layers and insulating layers alternately laminated on the core layer is known. In such a wiring board, a through hole that continuously penetrates the core layer and the laminate may be formed. The through hole can be used, for example, when specifying the orientation of the wiring board or positioning the wiring board.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In some cases, a glass core layer is used for a wiring board. In this case, when a through hole that penetrates the core layer and the laminate is formed, there is a high possibility that cracks will occur in the glass constituting the core layer, and it has been difficult to realize a highly reliable wiring board.

[0005] The present invention has been made in view of the above points, and an object thereof is to suppress cracks from occurring in glass in a wiring board having a glass core layer and a through hole that penetrates a laminate laminated on the core layer.

Means for Solving the Problems

[0006] This wiring board comprises a glass core layer having one surface and another surface, a first through-hole extending from one surface of the core layer to the other surface, a resin portion covering the inner wall surface of the first through-hole, a first laminate including a wiring layer and an insulating layer provided on one surface of the core layer, and a second through-hole extending through the first laminate and the core layer. In the portion of the second through-hole that penetrates the inside of the first through-hole and penetrates the core layer, the inner wall surface of the second through-hole is made of the resin portion. [Effects of the Invention]

[0007] According to the disclosed technology, in a wiring substrate having a through-hole that penetrates a glass core layer and a laminate stacked on the core layer, it is possible to suppress cracking of the glass. [Brief explanation of the drawing]

[0008] [Figure 1] This is a plan view illustrating a wiring board according to the first embodiment. [Figure 2] This is a cross-sectional view illustrating a wiring board according to the first embodiment. [Figure 3] This is a diagram (part 1) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 4] This is a diagram (part 2) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 5] This is a diagram (part 3) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 6] This is a plan view illustrating a wiring board according to a modified example of the first embodiment. [Figure 7] This is a cross-sectional view illustrating a wiring board according to a modified example of the first embodiment. [Figure 8] This is a cross-sectional view illustrating a semiconductor device according to the second embodiment. [Modes for carrying out the invention]

[0009] The embodiments for carrying out the invention will be described below with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0010] <First Embodiment> [Structure of the wiring board according to the first embodiment] Figure 1 is a plan view illustrating a wiring board according to the first embodiment, where Figure 1(a) is an overall view and Figure 1(b) is a partially enlarged view of the vicinity of the first penetration portion 10y in Figure 1(a). However, in Figure 1(b), the layers above the core layer 10 are not shown. Figure 2 is a cross-sectional view illustrating a wiring board according to the first embodiment, where Figure 2(a) is a cross-sectional view along line AA in Figure 1(a) and Figure 2(b) is a cross-sectional view along line BB in Figure 1(a).

[0011] Referring to Figures 1 and 2, the wiring board 1 has a core layer 10, a first laminate 51 including wiring layers and insulating layers alternately stacked on one surface 10a of the core layer 10, and a second laminate 52 including wiring layers and insulating layers alternately stacked on the other surface 10b of the core layer 10. The wiring board 1 may also have external connection terminals 18.

[0012] The first laminate 51 has a wiring layer 12, an insulating layer 13, a wiring layer 14, an insulating layer 15, a wiring layer 16, and a solder resist layer 17, which are sequentially laminated on one surface 10a of the core layer 10. The second laminate 52 has a wiring layer 22, an insulating layer 23, a wiring layer 24, an insulating layer 25, a wiring layer 26, and a solder resist layer 27, which are sequentially laminated on the other surface 10b of the core layer 10.

[0013] In the first embodiment, for convenience, the solder resist layer 17 side of the wiring board 1 is referred to as the upper side or one side, and the solder resist layer 27 side as the lower side or the other side. Also, the surface on the solder resist layer 17 side of each part is referred to as one surface or the upper surface, and the surface on the solder resist layer 27 side is referred to as the other surface or the lower surface. However, the wiring board 1 can be used upside down or positioned at any angle. Furthermore, a plan view refers to viewing the object from the direction normal to one surface 10a of the core layer 10, and a planar shape refers to the shape of the object viewed from the direction normal to one surface 10a of the core layer 10.

[0014] The core layer 10 is made of glass. The type of glass used to make up the core layer 10 is not limited; for example, alkali-free glass, quartz glass, borosilicate glass, etc., can be used. The thickness of the core layer 10 is, for example, about 100 to 1000 μm. The core layer 10 is provided with through-holes 10x that penetrate through the core layer 10 in the thickness direction. The planar shape of the through-holes 10x is, for example, circular. The diameter of the through-holes 10x can be, for example, 100 μm or more and 500 μm or less.

[0015] The wiring board 1 has a first through-hole 10y that penetrates from one surface 10a to the other surface 10b of the core layer 10, and a resin part 41 that covers the inner wall surface of the first through-hole 10y. The first through-hole 10y is a groove that is recessed inward from the side surface 10c of the core layer 10. The first through-hole 10y is, for example, semicircular in plan view. In plan view, the distance from the side surface 10c of the core layer 10 to the deepest part in the first through-hole 10y in the direction perpendicular to the side surface 10c can be, for example, 0.8 mm or more and 1.8 mm or less. The resin part 41 is provided along the inner wall surface of the first through-hole 10y and covers the entire inner wall surface. The resin part 41 is, for example, semicircular in plan view. As the material of the resin part 41, for example, an insulating resin mainly composed of epoxy resin or polyimide resin can be used.

[0016] The wiring board 1 has a second through-hole 1y that penetrates the first laminate 51, the core layer 10, and the second laminate 52. The second through-hole 1y is a groove that recesses inward from the side surfaces of the first laminate 51, the core layer 10, and the second laminate 52. The second through-hole 1y penetrates inside the first through-hole 10y, and in the portion penetrating the core layer 10, the inner wall surface of the second through-hole 1y is constituted by a resin portion 41. The second through-hole 1y is, for example, a semi-circular shape having a smaller diameter than the first through-hole 10y in a plan view. In a plan view, in the second through-hole 1y, the distance from the side surface 10c of the core layer 10 to the deepest part in the direction perpendicular to the side surface 10c can be, for example, 0.5 mm or more and 1.5 mm or less.

[0017] The wiring board 1 may have at least one set of the combination of the first through-hole 10y, the resin portion 41, and the second through-hole 1y, and may have two or more sets. In the illustrated example, the wiring board 1 has four sets of the combination of the first through-hole 10y, the resin portion 41, and the second through-hole 1y. Two sets of the first through-hole 10y, the resin portion 41, and the second through-hole 1y are arranged on one side of the opposing side surfaces in a plan view of the wiring board 1, and the other two sets are arranged on the other side of the opposing side surfaces in a plan view of the wiring board 1.

[0018] The second through-hole 1y can be used, for example, when specifying the orientation of the wiring board 1 or positioning the wiring board 1. When the wiring board 1 has a plurality of second through-holes 1y, it is preferable to arrange the plurality of second through-holes 1y asymmetrically left and right in a plan view. Thereby, it becomes easy to specify the orientation of the wiring board 1 and to position the wiring board 1. Note that the second through-hole 1y may be used for purposes other than specifying the orientation of the wiring board 1 or positioning the wiring board 1.

[0019] The wiring layer 12 is disposed on one surface 10a of the core layer 10. The wiring layer 22 is disposed on the other surface 10b of the core layer 10. The wiring layer 12 and the wiring layer 22 are electrically connected by a through-wiring 11 formed in the through-hole 10x. The wiring layers 12 and 22 are each patterned into a predetermined planar shape. As the material of the wiring layers 12 and 22 and the through-wiring 11, for example, copper (Cu) or the like can be used. The thickness of the wiring layers 12 and 22 is, for example, about 10 to 40 μm. Note that the wiring layer 12, the wiring layer 22, and the through-wiring 11 may be integrally formed.

[0020] The insulating layer 13 is an interlayer insulating layer disposed on one surface 10a of the core layer 10 and covering the wiring layer 12. The insulating layer 13 is also disposed on the upper surface of the resin portion 41. As the material of the insulating layer 13, for example, an insulating resin mainly composed of an epoxy resin or a polyimide resin can be used. The thickness of the insulating layer 13 can be, for example, about 30 to 40 μm. The insulating layer 13 can contain a filler such as silica (SiO2).

[0021] A via hole 13x penetrating the insulating layer 13 and exposing the upper surface of the wiring layer 12 is formed in the insulating layer 13. The via hole 13x can be an inverted frustum-shaped recess in which the diameter of the opening on the insulating layer 15 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 12.

[0022] The wiring layer 14 is formed on one side of the insulating layer 13. The wiring layer 14 includes a via wiring filled in the via hole 13x and a wiring pattern formed on the upper surface of the insulating layer 13. The wiring pattern is electrically connected to the wiring layer 12 via the via wiring. The material of the wiring layer 14 and the thickness of the wiring pattern can be, for example, the same as those of the wiring layer 12.

[0023] The insulating layer 15 is formed so as to cover the wiring layer 14 on the upper surface of the insulating layer 13. The material and thickness of the insulating layer 15 can be the same as, for example, the insulating layer 13. The insulating layer 15 may contain fillers such as silica (SiO2).

[0024] The insulating layer 15 has via holes 15x that penetrate the insulating layer 15 and expose the upper surface of the wiring layer 14. The via holes 15x can be inverted truncated cone-shaped recesses in which the diameter of the opening that opens to the solder resist layer 17 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 14.

[0025] The wiring layer 16 is formed on one side of the insulating layer 15. The wiring layer 16 consists of via wiring filled in via holes 15x and a pad formed on the upper surface of the insulating layer 15. The pad is electrically connected to the wiring layer 14 via the via wiring. The material of the wiring layer 16 and the thickness of the pad can be the same as, for example, the same as the wiring layer 12. The thickness of the pad may be greater than the thickness of the wiring layer 12. In addition to the pad, the wiring layer 16 may also include a wiring pattern.

[0026] The solder resist layer 17 is a protective insulating layer located on the outermost side of the wiring substrate 1, and is formed to cover the wiring layer 16 on the upper surface of the insulating layer 15. The solder resist layer 17 has an opening 17x, and a portion of the upper surface of the wiring layer 16 is exposed within the opening 17x. The planar shape of the opening 17x can be, for example, circular. The wiring layer 16 exposed within the opening 17x can be used, for example, as a pad for electrically connecting to electronic components such as semiconductor chips. The solder resist layer 17 can be formed from, for example, a photosensitive epoxy insulating resin or an acrylic insulating resin. The thickness of the solder resist layer 17 is, for example, about 15 to 35 μm.

[0027] Furthermore, a metal layer may be formed on the surface of the wiring layer 16 exposed within the opening 17x, or an organic coating may be formed by applying an anti-oxidation treatment such as OSP (Organic Solderability Preservative) treatment. Examples of metal layers include an Au layer, a Ni / Au layer (a metal layer in which Ni and Au layers are stacked in that order), a Ni / Pd / Au layer (a metal layer in which Ni, Pd, and Au layers are stacked in that order), and a Sn layer.

[0028] If necessary, external connection terminals 18 may be provided on the wiring layer 16 exposed within the opening 17x. The external connection terminals 18 are, for example, solder bumps. As the material for the solder bumps, for example, alloys containing Pb, alloys of Sn and Cu, alloys of Sn and Ag, alloys of Sn, Ag and Cu, etc. can be used.

[0029] The insulating layer 23 is an interlayer insulating layer located on the other surface 10b of the core layer 10 and covering the wiring layer 22. The insulating layer 23 is also located on the lower surface of the resin part 41. The material and thickness of the insulating layer 23 can be the same as, for example, the insulating layer 13. The insulating layer 23 may contain fillers such as silica (SiO2).

[0030] The insulating layer 23 has via holes 23x that penetrate the insulating layer 23 and expose the lower surface of the wiring layer 22. The via holes 23x can be frustoconical recesses in which the diameter of the opening on the insulating layer 25 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 22.

[0031] The wiring layer 24 is formed on the other side of the insulating layer 23. The wiring layer 24 comprises via wiring filled in via holes 23x and a wiring pattern formed on the underside of the insulating layer 23. The wiring pattern is electrically connected to the wiring layer 22 via the via wiring. The material and thickness of the wiring layer 24 can be the same as, for example, the wiring layer 12.

[0032] The insulating layer 25 is formed on the lower surface of the insulating layer 23 so as to cover the wiring layer 24. The material and thickness of the insulating layer 25 can be the same as, for example, the insulating layer 13. The insulating layer 25 may contain fillers such as silica (SiO2).

[0033] The insulating layer 25 has via holes 25x that penetrate the insulating layer 25 and expose the lower surface of the wiring layer 24. The via holes 25x can be frustoconical recesses in which the diameter of the opening that opens to the solder resist layer 27 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 24.

[0034] The wiring layer 26 is formed on the other side of the insulating layer 25. The wiring layer 26 comprises via wiring filled in via holes 25x and a wiring pattern formed on the underside of the insulating layer 25. The wiring pattern is electrically connected to the wiring layer 24 via the via wiring. The material and thickness of the wiring layer 26 can be the same as, for example, the wiring layer 12.

[0035] The solder resist layer 27 is a protective insulating layer located on the outermost side of the wiring board 1, and is formed to cover the wiring layer 26 on the underside of the insulating layer 25. The material and thickness of the solder resist layer 27 can be the same as, for example, the solder resist layer 17. The solder resist layer 27 has an opening 27x, and a portion of the underside of the wiring layer 26 is exposed within the opening 27x. The planar shape of the opening 27x can be, for example, circular. The wiring layer 26 exposed within the opening 27x can be used as a pad for electrically connecting to a mounting board such as a motherboard. If necessary, the aforementioned metal layer may be formed on the underside of the wiring layer 26 exposed within the opening 27x, or an anti-oxidation treatment such as OSP treatment may be applied.

[0036] [Manufacturing method for wiring boards] Figures 3 to 5 illustrate the manufacturing process of a wiring board according to the first embodiment. Figure 3 is a plan view, and Figures 4 and 5 are partial cross-sectional views corresponding to the position of the CC line in Figure 3.

[0037] First, in the process shown in Figures 3 and 4(a), a glass core layer 10 is prepared. The core layer 10 has multiple wiring regions R that are separated into individual pieces to form a wiring substrate, and cutting regions D that are cut when the core is separated into individual pieces. In Figures 3 and 4(a), the cutting regions D are shown as lines, but they may be regions with a certain width. Next, through holes 10x that penetrate from one surface 10a to the other surface 10b are formed in the core layer 10 located in the wiring regions R.

[0038] Furthermore, a first through-hole 10y is formed that penetrates the core layer 10 from one surface 10a to the other surface 10b, straddling the cutting region D. The first through-hole 10y can be, for example, circular in shape in plan view. The diameter of the first through-hole 10y can be, for example, substantially constant regardless of its position in the depth direction. When the second through-hole 1y is formed by drilling in the process shown in Figure 5(b) described later, the diameter of the first through-hole 10y should be larger than the diameter of the drill used in the process shown in Figure 5(b). The diameter of the first through-hole 10y can be, for example, 1.6 mm or more and 3.6 mm or less.

[0039] The through-hole 10x and the first through-hole 10y can be formed, for example, by wet etching. Examples of etching solutions used in this process include hydrofluoric acid and strong alkaline solutions. If the through-hole 10x and the first through-hole 10y are formed by drilling, there is a risk of cracks occurring in the glass constituting the core layer 10. However, by using wet etching, the through-hole 10x and the first through-hole 10y can be formed without causing cracks in the glass.

[0040] Next, the process shown in Figure 4(b) involves forming a resin portion 41 that fills the first through-hole 10y. The resin portion 41 can be formed, for example, by filling the first through-hole 10y with uncured thermosetting resin using a printing method, and then heating and curing it. If the resin portion 41 protrudes from one surface 10a and / or the other surface 10b, it may be polished to make the upper surface of the resin portion 41 flush with one surface 10a, and the lower surface of the resin portion 41 flush with the other surface 10b.

[0041] Next, in the process shown in Figures 4(c) to 5(a), a first laminate 51 is formed on one surface 10a of the core layer 10, including alternately stacked wiring layers and insulating layers. A second laminate 52 is also formed on the other surface 10b of the core layer 10, including alternately stacked wiring layers and insulating layers. Specifically, as shown in Figure 4(c), first, wiring layers 12 are placed in each wiring region R on one surface 10a of the core layer 10, and wiring layers 22 are placed in each wiring region R on the other surface of the core layer 10, forming through-holes 10x. For example, a seed layer (copper, etc.) is formed to cover one surface 10a of the core layer 10, the other surface 10b, and the inner wall surface of the through-holes 10x by electroless plating or sputtering, and an electroplated layer (copper, etc.) is formed on the seed layer by electroplating using the seed layer as a power supply layer. As a result, the through-holes 10x are filled with an electroplated layer formed on the seed layer, and a conductive layer is formed on one surface 10a and the other surface 10b of the core layer 10, with the seed layer and the electroplated layer laminated together. Next, the conductive layer is patterned into a predetermined planar shape by subtractive method or the like to form wiring layers 12 and 22.

[0042] Next, as shown in Figure 4(d), insulating layers 13 and 23, and wiring layers 14 and 24 are formed. First, insulating layers 13 are placed in each wiring region R and each cutting region D on one surface 10a of the core layer 10 to cover the wiring layer 12 and the upper surface of the resin part 41. Specifically, for example, a semi-cured film-like epoxy resin is laminated to one surface 10a of the core layer 10 to cover the wiring layer 12 and the resin part 41, and then cured to form the insulating layer 13. Alternatively, instead of laminating with a film-like epoxy resin, a liquid or paste-like epoxy resin may be applied and then cured to form the insulating layer 13. The material and thickness of the insulating layer 13 are as described above. Similarly, insulating layers 23 are placed in each wiring region R and each cutting region D on the other surface 10b of the core layer 10 to cover the wiring layer 22 and the lower surface of the resin part 41.

[0043] Next, via holes 13x are formed in the insulating layer 13, penetrating the insulating layer 13 and exposing the upper surface of the wiring layer 12. Similarly, via holes 23x are formed in the insulating layer 23, penetrating the insulating layer 23 and exposing the lower surface of the wiring layer 22. The via holes 13x and 23x can be formed, for example, by a laser processing method using a CO2 laser. After forming the via holes 13x and 23x, it is preferable to perform a desmear treatment to remove any resin residue adhering to the surfaces of the wiring layers 12 and 22 exposed at the bottom of the via holes 13x and 23x.

[0044] Next, a wiring layer 14 is formed on one side of the insulating layer 13. The wiring layer 14 consists of via wiring filled in via holes 13x and a wiring pattern formed on the upper surface of the insulating layer 13. The wiring layer 14 is electrically connected to the wiring layer 12 exposed at the bottom of the via holes 13x. Similarly, a wiring layer 24 is formed on the other side of the insulating layer 23. The wiring layer 24 consists of via wiring filled in via holes 23x and a wiring pattern formed on the lower surface of the insulating layer 23. The wiring layer 24 is electrically connected to the wiring layer 22 exposed at the bottom of the via holes 23x. The materials and thickness of the wiring patterns of the wiring layers 14 and 24 can be the same as those of the wiring layer 12, for example. The wiring layers 14 and 24 are formed, for example, by a semi-additive method.

[0045] Next, as shown in Figure 5(a), insulating layers 15 and 25, wiring layers 16 and 26, solder resist layers 17 and 27, and external connection terminals 18 are formed. First, the same process as in Figure 4(d) is repeated to form insulating layers 15 and 25 and wiring layers 16 and 26. Next, a solder resist layer 17 is formed on the upper surface of insulating layer 15 so as to cover the wiring layer 16. Also, a solder resist layer 27 is formed on the lower surface of insulating layer 25 so as to cover the wiring layer 26. The solder resist layer 17 can be formed, for example, by applying a liquid or paste-like photosensitive epoxy insulating resin to the upper surface of insulating layer 15 by screen printing, roll coating, or spin coating so as to cover the wiring layer 16. Alternatively, for example, a film-like photosensitive epoxy insulating resin may be laminated to the upper surface of insulating layer 15 so as to cover the wiring layer 16. The method for forming the solder resist layer 27 is the same as for the solder resist layer 17. Subsequently, the solder resist layers 17 and 27 are exposed and developed to form an opening 17x in the solder resist layer 17 that exposes the wiring layer 16. An opening 27x is also formed in the solder resist layer 27 that exposes a portion of the lower surface of the wiring layer 26. If necessary, an external connection terminal 18 may be provided on the wiring layer 16 exposed within the opening 17x. The external connection terminal 18 is, for example, a solder bump formed by solder reflow.

[0046] Next, in the process shown in Figure 5(b), a second penetration portion 1y is formed that penetrates the first laminate 51, the resin portion 41, and the second laminate 52. For example, the second penetration portion 1y is formed such that, in a plan view, its center substantially coincides with the center of the resin portion 41 or the center of the first penetration portion 10y. The second penetration portion 1y can be, for example, a circular shape with a smaller diameter than the first penetration portion 10y in a plan view. The diameter of the second penetration portion 1y can be, for example, substantially constant regardless of its position in the depth direction. The diameter of the second penetration portion 1y can be, for example, 1 mm or more and 3 mm or less. The second penetration portion 1y can be formed, for example, by drilling. The resin portion 41 is, for example, annular in a plan view, and in the portion that penetrates the core layer 10, the inner wall surface of the second penetration portion 1y is composed of the resin portion 41.

[0047] Next, in the process shown in Figure 5(c), the first laminate 51, the core layer 10, and the second laminate 52 are cut in the cutting region D shown in Figure 5(b) to produce a plurality of individual wiring boards 1. Cutting can be done, for example, by a dicer. By cutting in the cutting region D, the circular second penetration portion 1y in plan view is divided into a semicircular shape in plan view and is exposed on the side surface of each individual wiring board 1. In addition, the annular resin portion 41 in plan view is divided into a semicircular shape in plan view, and the inner wall surface of the second penetration portion 1y in the portion that penetrates the core layer 10 is composed of the resin portion 41.

[0048] In this manufacturing method for the wiring board 1, a first through-hole 10y is formed in the glass core layer 10 using a method that is less likely to cause cracks, such as etching, and a resin portion 41 is filled into the first through-hole 10y. Then, a first laminate 51 is formed on one surface 10a of the core layer 10, and a second laminate 52 is formed on the other surface 10b of the core layer 10. After that, a second through-hole 1y is formed that penetrates the first laminate 51, the resin portion 41 of the core layer 10, and the second laminate 52. The second through-hole 1y penetrates the resin portion 41, but not the glass constituting the core layer 10, so no cracks occur in the glass. In other words, it is possible to suppress cracks in the glass constituting the core layer 10 in the wiring board 1.

[0049] <Variations of the first embodiment> In the modified version of the first embodiment, an example is shown in which the positions of the first through-hole, the resin part, and the second through-hole differ from those of the wiring board according to the first embodiment. In the modified version of the first embodiment, descriptions of components that are the same as those described in the previously described embodiment may be omitted.

[0050] Figure 6 is a plan view illustrating a modified wiring board according to the first embodiment, where Figure 6(a) is an overall view and Figure 6(b) is a partially enlarged view of the vicinity of the first penetration portion 10z in Figure 6(a). However, in Figure 6(b), the layers above the core layer 10 are not shown. Figure 7 is a cross-sectional view illustrating a modified wiring board according to the first embodiment, showing a cross-section along the DD line in Figure 6(a).

[0051] Referring to Figures 6 and 7, in the wiring board 1A, the core layer 10 includes a first through-hole 10z that penetrates from one surface 10a to the other surface 10b, and a resin portion 42 that covers the inner wall surface of the first through-hole 10z. The first through-hole 10z is, for example, circular in shape in plan view. The diameter of the first through-hole 10z can be, for example, 1.6 mm or more and 3.6 mm or less.

[0052] The resin portion 42 is provided along the inner wall surface of the first through portion 10z and covers the entire inner wall surface. The resin portion 42 is, for example, annular in plan view. The material and thickness of the resin portion 42 can be, for example, the same as those of the resin portion 41. Unlike the wiring board 1, the first through portion 10z and the resin portion 42 are not exposed on the side surface 10c of the wiring board 1A.

[0053] The wiring board 1A has a second through-hole 1z that penetrates the first laminate 51, the core layer 10, and the second laminate 52. The second through-hole 1z penetrates the inside of the first through-hole 10z, and in the portion that penetrates the core layer 10, the inner wall surface of the second through-hole 1z is made of resin 42. The second through-hole 1z is, for example, a circular shape with a smaller diameter than the first through-hole 10z in plan view. The second through-hole 1z can be, for example, provided concentrically with the first through-hole 10z in plan view. The diameter of the first through-hole 10z can be, for example, 1 mm or more and 3 mm or less. Unlike the wiring board 1, the second through-hole 1z is not exposed on the side surface 10c of the wiring board 1A.

[0054] The first through portion 10z, the resin portion 42, and the second through portion 1z can be prevented from being exposed on the side surface of the individualized wiring board 1A by forming the first through portion 10z in the wiring region R so as not to come into contact with the cutting region D, for example, in the process corresponding to Figures 3 and 4(a) of the first embodiment.

[0055] Thus, although the second penetration portion 1z penetrates the resin portion 42, it does not penetrate the glass constituting the core layer 10, and therefore no cracks occur in the glass. In other words, it is possible to suppress cracks from occurring in the glass constituting the core layer 10 in the wiring board 1A.

[0056] <Second Embodiment> The second embodiment shows an example of a semiconductor device in which a semiconductor chip is mounted on a wiring board according to the first embodiment. In the second embodiment, descriptions of components that are the same as those described in the previously described embodiments may be omitted.

[0057] Figure 8 is a cross-sectional view illustrating a semiconductor device according to the second embodiment. Referring to Figure 8, the semiconductor device 2 includes the wiring board 1 shown in Figure 1, a semiconductor chip 70, bumps 80, and underfill resin 90.

[0058] The semiconductor chip 70 has a chip body 71 and electrodes 72. The chip body 71 is formed by creating a semiconductor integrated circuit (not shown) on a thin semiconductor substrate (not shown) made of, for example, silicon. Electrodes 72 are formed on the semiconductor substrate (not shown) and are electrically connected to the semiconductor integrated circuit.

[0059] The bump 80 is formed on the electrode 72 of the semiconductor chip 70 and electrically connects the electrode 72 to the external connection terminal 18 of the wiring board 1. The electrode 72 can be formed from, for example, copper. The bump 80 is, for example, a solder bump. As the material for the solder bump, for example, an alloy containing Pb, an alloy of Sn and Cu, an alloy of Sn and Ag, an alloy of Sn, Ag and Cu, etc. can be used. The underfill resin 90 is filled between the semiconductor chip 70 and the upper surface of the solder resist layer 17 of the wiring board 1.

[0060] In this way, a semiconductor device can be realized by mounting a semiconductor chip on the wiring board according to the first embodiment. Wiring board 1A may be used instead of wiring board 1.

[0061] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0062] For example, the above embodiment described a wiring board having a first laminate on one side of a glass core layer and a second laminate on the other side. However, the present invention can also be applied to a wiring board having a first laminate on one side of a glass core layer and not having a second laminate on the other side, and will achieve similar effects. When the wiring board does not have a second laminate, the wiring board has a second through-hole that penetrates the first laminate and the core layer, and the second through-hole penetrates the inside of the first through-hole. In the portion that penetrates the core layer, the inner wall surface of the second through-hole is made of resin. Note that when the wiring board does not have a second laminate, through-holes do not need to be provided in the core layer. [Explanation of Symbols]

[0063] 1.1A Wiring Board 1y,1z 2nd penetration part 2 Semiconductor devices 10 core layers 10a One side 10b The other side 10c side 10x Through Hole 10y,10z 1st penetration part 11. Through-wiring 12,14,16,22,24,26 wiring layer 13, 15, 23, 25 Insulating layer 13x, 15x, 23x, 25x Beer Hall 17,27 Solder Resist Layer 17x,27x opening 18 External connection terminals 41,42 Resin parts 51. First layer 52. Second layer 71 Chip body 72 electrode 80 Bump 90 Underfill resin

Claims

1. A glass core layer having one side and the other side, A first penetrating portion that penetrates from one surface of the core layer to the other surface, A resin portion covering the inner wall surface of the first penetration portion, A first laminate including a wiring layer and an insulating layer provided on one side of the core layer, It has the first laminate and the second penetrating portion that penetrates the core layer, The second through portion penetrates the inside of the first through portion, A wiring board in which, in the portion that penetrates the core layer, the inner wall surface of the second penetrating portion is made of the resin portion.

2. The first through-hole is a groove that is recessed inward from the side surface of the core layer. The wiring board according to claim 1, wherein the second through-port is a groove recessed inward from the side surface of the first laminate and the side surface of the core layer.

3. The first through portion is a through hole that penetrates the core layer, The wiring board according to claim 1, wherein the second through-hole is a through-hole that penetrates the first laminate and the core layer.

4. The second laminate includes a wiring layer and an insulating layer provided on the other side of the core layer, The wiring board according to any one of claims 1 to 3, wherein the second through-port penetrates the first laminate, the core layer, and the second laminate.

5. A process of preparing a glass core layer having multiple wiring regions that will be separated into individual pieces to form a wiring board, and cutting regions that will be cut during the separation process, The process involves forming a first penetration portion in the core layer that penetrates from one surface to the other surface, A step of forming a resin portion that fills the first through-hole, A step of forming a first laminate including a wiring layer and an insulating layer on one side of the core layer, The process includes the step of forming a second penetration portion that penetrates the first laminate and the resin portion, A method for manufacturing a wiring board, wherein in the portion that penetrates the core layer, the inner wall surface of the second penetrating portion is made of the resin portion.

6. The first through portion, the second through portion, and the resin portion are formed to straddle the cutting region, After forming the second through portion, the process includes cutting the first laminate and the core layer at the cutting region to produce a plurality of individual wiring boards, The method for manufacturing a wiring board according to claim 5, wherein the second through-portion is exposed on the side surface of each individual wiring board, and in the portion that penetrates the core layer, the inner wall surface of the second through-portion is made of the resin portion.

7. The method for manufacturing a wiring board according to claim 5, wherein the first through-hole is formed in the wiring region so as not to come into contact with the cutting region.

8. A method for manufacturing a wiring board according to any one of claims 5 to 7, wherein the first through-hole is formed by wet etching and the second through-hole is formed by drilling.

9. In the step of forming the first through portion, together with the first through portion, a through hole is formed that penetrates the core layer from one surface to the other surface. A method for manufacturing a wiring board according to any one of claims 5 to 7, further comprising the step of forming through-holes after the step of forming the resin portion.

10. Prior to the step of forming the second through-port, the process includes a step of forming a second laminate including a wiring layer and an insulating layer on the other side of the core layer, The method for manufacturing a wiring board according to any one of claims 5 to 7, wherein the second through-port penetrates the first laminate, the core layer, and the second laminate.

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