transistor

Abstract

The present invention provides a display device with a novel configuration, a display system with a novel configuration, or a method for operating these. [Solution] A method for operating a display system having a first display device and a second display device, comprising the following steps: A first step of connecting the first display device and the second display device by wireless communication. A second step of transmitting first image data displayed on the first display device to the second display device. A third step of displaying second image data on the second display device, which is obtained by processing at least a portion of the first image data. A fourth step of stopping the display on the first display device. And a fifth step of processing the second image data in response to an operation on the second display device.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device and a display system. Another aspect of the present invention relates to a method for operating a display system.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, imaging devices, display devices, light-emitting devices, energy storage devices, memory devices, display systems, electronic devices, lighting devices, input devices, input / output devices, methods for driving them, or methods for manufacturing them.

[0003] In this specification, the term "semiconductor device" refers to any device that can function by utilizing semiconductor properties. Display devices (liquid crystal displays, light-emitting displays, etc.), projection devices, lighting devices, electro-optical devices, energy storage devices, memory devices, semiconductor circuits, imaging devices, and electronic devices may be considered semiconductor devices. Alternatively, they may be said to have semiconductor devices. [Background technology]

[0004] Electronic devices equipped with displays for augmented reality (AR) or virtual reality (VR) are becoming increasingly popular, including wearable and stationary electronic devices. Examples of wearable electronic devices include head-mounted displays (HMDs) and eyeglasses. Examples of stationary electronic devices include head-up displays (HUDs).

[0005] In electronic devices such as HMDs where the distance between the display unit and the user is short, since the user can easily visually recognize the pixels and strongly feel the granularity, the immersion or sense of presence in AR or VR may be reduced. For this reason, it is preferable to provide a display device with fine pixels in the HMD so that the user does not visually recognize the pixels. In Patent Document 1, a method of realizing an HMD having fine pixels by using a transistor capable of high-speed driving is disclosed.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] By making the pixels of the display device fine, the pixel density can be increased. As a result, a large number of pixels can be provided in the display device, and a high sense of immersion or presence can be obtained. In order to obtain a greater sense of immersion or presence, it is preferable that there are few pixel defects (such as bright spots or dark spots).

[0008] Alternatively, as the display device (or electronic device), a plurality of display devices may be used. In this case, since it is necessary to operate each of the plurality of display devices, there is a problem that the operation method becomes very complicated.

[0009] One aspect of the present invention aims to provide a display device with a novel configuration or a display system with a novel configuration. Alternatively, one aspect of the present invention aims to provide an operation method for a display device with a novel configuration or an operation method for a display system with a novel configuration.

[0010] Furthermore, the description of multiple problems does not preclude the existence of each other. Moreover, one embodiment of the present invention does not need to solve all of these problems. Additionally, problems other than those listed will become apparent from the description in the specification, drawings, claims, etc., and these problems may also be addressed by one embodiment of the present invention. [Means for solving the problem]

[0011] One aspect of the present invention is a method for operating a display system having a first display device and a second display device, comprising the following steps: a first step of connecting the first display device and the second display device by wireless communication; a second step of transmitting first image data displayed on the first display device to the second display device; a third step of displaying second image data on the second display device, which is obtained by processing at least a portion of the first image data; a fourth step of stopping the display on the first display device; and a fifth step of processing the second image data in response to an operation on the second display device.

[0012] Another aspect of the present invention is a method for operating a display system having a first display device and a second display device, comprising the following steps: a first step of connecting the first display device and the second display device by wireless communication; a second step of transmitting first image data displayed on the first display device to the second display device; a third step of displaying second image data on the second display device, which is obtained by processing at least a portion of the first image data; a fourth step of stopping the display on the first display device; and a fifth step of moving the position of the second image data in response to an operation on the second display device.

[0013] Another aspect of the present invention is a method for operating a display system having a first display device and a second display device, comprising the following steps: a first step of connecting the first display device and the second display device by wireless communication; a second step of transmitting first image data displayed on the first display device to the second display device; a third step of displaying second image data on the second display device, which is obtained by processing at least a portion of the first image data; a fourth step of stopping the display on the first display device; and a fifth step of changing the size of the second image data in response to an operation on the second display device.

[0014] Furthermore, in any of the above, the fifth step is preferably performed using multiple input data.

[0015] Furthermore, in any of the above, it is preferable that the first display device has either a call function or a time display function, or both. In addition, it is preferable that the second display device has either a function to display augmented reality or a function to display virtual reality, or both.

[0016] Furthermore, in any of the above, it is preferable that the second display device has the function of acquiring one or more of the user's visual, auditory, tactile, gustatory, olfactory, and electroencephalographic information.

[0017] Furthermore, in any of the above, it is preferable that the second display device has a detection unit. In this case, it is preferable that the fourth step is performed in response to an operation on the detection unit.

[0018] Furthermore, in any of the above, it is preferable that the second display device has a plurality of detection units. In this case, it is preferable that the fifth step is performed in response to operations on the plurality of detection units.

[0019] Further embodiments of the present invention are described in the following descriptions of embodiments and in the drawings. [Effects of the Invention]

[0020] One embodiment of the present invention can provide a display device with a novel configuration, or a display system with a novel configuration. Alternatively, one embodiment of the present invention can provide a method for operating a display device with a novel configuration, or a method for operating a display system with a novel configuration.

[0021] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one embodiment of the present invention does not need to possess all of these effects. Other effects will naturally become apparent from the description in the specification, drawings, and claims, and it is possible to extract other effects from the description in the specification, drawings, and claims. [Brief explanation of the drawing]

[0022] [Figure 1] Figures 1A to 1C show examples of the configuration of a display device and a display system. [Figure 2] Figures 2A and 2B show examples of the configuration of a display device and a display system. [Figure 3] Figures 3A to 3D show examples of images of a display device and a display system. [Figure 4] Figure 4 shows an example of how the display system operates. [Figure 5] Figures 5A to 5D show examples of images of a display device and a display system. [Figure 6] Figure 6 shows an example of how the display system operates. [Figure 7] Figure 7 is a block diagram showing an example of a display device configuration. [Figure 8] Figure 8 is a block diagram showing an example of a display device configuration. [Figure 9] Figure 9 is a block diagram showing an example of a display device configuration. [Figure 10] Figures 10A and 10B are circuit diagrams showing example configurations of display devices. [Figure 11]Figures 11A to 11C are circuit diagrams and schematic diagrams showing examples of the configuration of a display device. [Figure 12] Figure 12 is a block diagram showing an example of a display device configuration. [Figure 13] Figures 13A to 13C show examples of the configuration of a light-emitting device. [Figure 14] Figures 14A to 14C show examples of the configuration of a display device. [Figure 15] Figure 15 is a cross-sectional view showing an example of the configuration of a display device. [Figure 16] Figure 16 is a cross-sectional view showing an example of the configuration of a display device. [Figure 17] Figure 17 is a cross-sectional view showing an example of the configuration of a display device. [Figure 18] Figure 18 is a cross-sectional view showing an example of the configuration of a display device. [Figure 19] Figure 19 is a cross-sectional view showing an example of the configuration of a display device. [Figure 20] Figure 20A is a top view showing an example of a transistor configuration. Figures 20B and 20C are cross-sectional views showing an example of a transistor configuration. [Figure 21] Figure 21A illustrates the classification of IGZO crystal structures. Figure 21B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 21C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 22] Figures 22A to 22D show examples of electronic devices. [Figure 23] Figures 23A and 23B show examples of electronic devices. [Modes for carrying out the invention]

[0023] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different forms, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention shall not be construed as being limited to the contents of the following embodiments.

[0024] Furthermore, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings.

[0025] Furthermore, unless otherwise specified in this specification, off-current refers to the drain current when the transistor is in the off state (also called the non-conducting state or cutoff state). Unless otherwise specified, the off state in an n-channel transistor is defined as the voltage V between the gate and source. gs The threshold voltage V th Lower than (in p-channel transistors, V th This refers to a state that is higher than [a certain value].

[0026] In this specification, "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also called oxide semiconductors or simply OS), etc. For example, when a metal oxide is used in the active layer of a transistor, that metal oxide may be referred to as an oxide semiconductor. In other words, when an OS transistor is described, it can be rephrased as a transistor having an oxide or oxide semiconductor.

[0027] Furthermore, in this specification, the term "display device" may be read as "electronic device."

[0028] (Embodiment 1) In this embodiment, a display device and a display system, which are aspects of the present invention, will be described with reference to Figures 1 to 6.

[0029] <Example configuration of display device and display system> Figures 1A to 1C are diagrams illustrating an example configuration of a display device and a display system according to one aspect of the present invention.

[0030] As shown in Figure 1A, a display system according to one aspect of the present invention comprises a first display device 100A and a second display device 102A. The first display device 100A and the second display device 102A each have wireless communication capabilities. The second display device 102A also has a region with a higher pixel density (also called resolution) than the first display device 100A. Furthermore, it has a function to display the screen of the first display device 100A, or a part of its screen, on the second display device 102A using the wireless communication capabilities described above.

[0031] As shown in Figure 1A, one embodiment of the present invention is a display system having multiple display devices. These multiple display devices exchange data using wireless communication, and a portion of the image data displayed on the screen of one display device can be processed by processing methods such as upconversion or downconversion and displayed on the other display device. By using such a display system, user convenience can be improved, images can be displayed with optimal image quality for each display device, or the power consumption of the display devices can be reduced.

[0032] The first display device 100A includes a display unit 110, a housing 111, a communication unit 112, and a control unit 114. In Figure 1A, the user's right hand 130R is shown. The second display device 102A includes a display unit 120, a housing 121, a communication unit 122, a mounting unit 123, a control unit 124, and a camera unit 125. Wireless communication between the first display device 100A and the second display device 102A can be performed between the communication unit 112 and the communication unit 122, as shown in Figure 1A. The communication unit 112 has the function of transmitting information to the second display device 102A in response to operations on the first display device 100A. The communication unit 122 also has the function of transmitting information to the first display device 100A in response to operations on the second display device 102A.

[0033] The camera unit 125 of the second display device 102A has the function of acquiring external information. For example, data acquired by the camera unit 125 can be output to the display unit 120 or the display unit 110 of the first display device 100A. In addition, the user can attach the second display device 102A to their head using the attachment part 123 of the second display device 102A. In Figure 1A, it is illustrated as having a shape like the temples (joints, etc.) of eyeglasses, but it is not limited to this. The attachment part 123 only needs to be able to be attached by the user, and may be in the shape of a helmet or a band, for example.

[0034] Although an example with a camera unit 125 is shown here, any distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object can be provided. In other words, the camera unit 125 is one form of a detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as LiDAR (Light Detection and Ranging) can be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be acquired, enabling more accurate gesture control.

[0035] The user can manipulate the image (also called a data object) displayed on the display unit 120 of the second display device 102A as if it were a real object, using intuitive gesture controls. For example, an image displayed as if floating in a flat shape can be pinched with a hand. The pinched image can also be thrown like a frisbee to make it disappear. The pinched image can also be moved up, down, left, and right. The pinched image can be enlarged or reduced by moving it back and forth. The front and back of the pinched image can also be flipped. In this case, the axis of rotation can be vertical, horizontal, or diagonal. The flat image can also be pulled out by pinching and pulling the edge of the field of view where nothing is displayed. The flat image can also be made to disappear by pushing it away from the user. The image can also be made to disappear by placing a hand on the edge of the flat image and then moving the hand from side to side. Such image erasure actions may switch to another image after the image has been erased. The user may also register specific information in the first display device 102A in advance. For example, actions such as spreading the palm or connecting the thumb and index finger (making a circle with the thumb and index finger) can be registered as first processing information, and second processing information can be executed based on this first processing information. Furthermore, the second processing information can be any data that the user wishes to execute, such as deleting an image, displaying a specific image, or displaying a shortcut icon.

[0036] Furthermore, in order to enable users to perform gesture operations using multiple movements, such as using both hands, with high precision, it is preferable to provide multiple detection units on the display device or electronic device. This allows for more accurate detection of the three-dimensional positional information of multiple objects, thereby enabling input through complex gesture operations.

[0037] The user can manipulate the image (also called a data object) displayed on the display unit 120 of the second display device 102A as if it were a real object, for example, by using gestures with both hands. For example, the user can pinch two points (for example, top and bottom, left and right, or diagonally) on an image that is displayed as if floating in a plate shape. The user can also enlarge the image by stretching it while pinching it with both hands. The user can also shrink the image by shrinking it while pinching it with both hands. The user can erase the image by crushing it with both hands after pinching it with both hands, or by placing their hands on both ends of the image. The user can also erase the image by pinching the top edge of the image with both hands and tearing it to the left and right. The user can also erase the image by pinching it with both hands and folding it. Furthermore, the user can pinch the image with one hand and perform gesture operations (tap, swipe, pinch in, pinch out, etc.) on the image with the other hand. In addition, as described above, the user can pre-register information about specific actions and the processes associated with those actions in the second display device 102A.

[0038] In one embodiment of the present invention, it is preferable that the first display device 100A and the second display device 102A are each capable of network connectivity. This allows the first display device 100A and the second display device 102A to be used independently as communication tools. For example, an image or a part of an image displayed on the second display device 102A worn by the first user can be displayed on the second display device 102A worn by the second user. Alternatively, an image or a part of an image displayed on the second display device 102A worn by the first user can be displayed on the first display device 100A held by the second user. With such a display system, multiple users can share the same image data, thereby enhancing communication. By using the display system in one embodiment of the present invention, a highly convenient display system or a method for operating a display system can be provided.

[0039] The processing that the first display device 100A and the second display device 102A can perform as described in this embodiment is merely an example, and various processing can be performed depending on the application software incorporated into the first display device 100A or the second display device 102A.

[0040] Next, we will explain an example of a configuration different from the one shown in Figure 1A, using Figure 1B.

[0041] The first display device 100B shown in Figure 1B includes a display unit 110, a housing 111, a communication unit 112, a band 113, and a control unit 114. Figure 1B also shows the user's right hand 130R and the user's left hand 130L. The configuration of the second display device 102A shown in Figure 1B is the same as that shown in Figure 1A, so its explanation is omitted here.

[0042] The first display device 100A shown in Figure 1A functions as a so-called personal information terminal (typically a smartphone), and the first display device 100B shown in Figure 1B functions as a so-called wristwatch-type personal information terminal. The first display device 100A and the first display device 100B have at least one or both of the following functions: a calling function and a time display function. The second display device 102A has either one or both of the following functions: a function to display augmented reality (AR) content and a function to display virtual reality (VR) content. In addition to AR and VR, the second display device 102A may also have the function to display substitute reality (SR) or mixed reality (MR) content. The second display device 102A having the function to display AR, VR, SR, MR, etc., can enhance the user's sense of immersion.

[0043] Next, an embodiment of the present invention, a display device and a display system, will be described with reference to Figures 1C, 2A, and 2B.

[0044] Figure 1C illustrates a display device and a display system according to one aspect of the present invention. As shown in Figure 1C, the first display device 100 has at least a display unit 110 and a communication unit 112, and the second display device 102 has a display unit 120 and a communication unit 122.

[0045] Furthermore, as shown in Figure 2A, the first display device 100 includes a display unit 110, a communication unit 112, a control unit 114, a power supply unit 116, and a sensor unit 118. Also, as shown in Figure 2A, the second display device 102 includes a display unit 120, a communication unit 122, a control unit 124, a power supply unit 126, and a sensor unit 128.

[0046] In Figures 1C and 2A, the first display device 100 and the second display device 102 are shown as examples of configurations having the same function, but the diagram is not limited to these configurations. For example, as shown in Figure 2B, the first display device 100 and the second display device 102 may have different functions.

[0047] In Figure 2B, the first display device 100 has, in addition to the configuration shown in Figure 2A, a camera unit 115 (also called a detection unit) and a second communication unit 119. The second display device 102 has, in addition to the configuration shown in Figure 2A, a camera unit 125 and a headphone unit 129. The camera unit 115 only needs to have an imaging unit such as an image sensor. Multiple cameras may be provided to accommodate multiple angles of view such as telephoto and wide-angle. The second communication unit 119 only needs to have a function to perform communication with a different function from that of the communication unit 112. For example, the communication unit 112 has a function to communicate with the communication unit 122, and the second communication unit 119 has a function to enable voice calls using a third-generation mobile communication system (3G), a fourth-generation mobile communication system (4G), or a fifth-generation mobile communication system (5G), or has a communication means that enables electronic payment, etc.

[0048] Furthermore, as shown in Figures 1A, 1B, 1C, 2A, and 2B, it is preferable that the display unit 120 has a higher resolution than the display unit 110. For example, the display unit 110 can have a resolution of HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), or WQHD (2560 x 1440 pixels). It is also preferable that the display unit 120 has an extremely high resolution such as WQXGA (2560 x 1600 pixels), 4K2K (3840 x 2160 pixels), or 8K4K (7680 x 4320 pixels). In particular, a resolution of 4K2K, 8K4K, or higher is preferred.

[0049] Furthermore, it is preferable that the display unit 120 has a higher pixel density (resolution) than the display unit 110. For example, the display unit 110 can have a pixel density of 100 ppi or more and less than 1000 ppi, preferably 300 ppi or more and 800 ppi or less. The display unit 120 can have a pixel density of 1000 ppi or more and 10000 ppi or less, preferably 2000 ppi or more and 6000 ppi or less, and even more preferably 3000 ppi or more and 5000 ppi or less.

[0050] There are no particular limitations on the aspect ratio of the display units 110 and 120. For example, the display units 110 and 120 can support various aspect ratios such as 1:1 (square), 3:4, 16:9, and 16:10, respectively.

[0051] Preferably, the display unit 110 is formed on a glass substrate, and the display unit 120 is formed on a silicon substrate. By forming the display unit 110 on a glass substrate, manufacturing costs can be reduced. On the other hand, when the display unit 110 is formed on a glass substrate, it may be difficult to increase the pixel density of the display unit 110 (typically 1000 ppi or more) due to the limitations of the manufacturing equipment. Therefore, in a display device and display system according to one aspect of the present invention, the pixel density of the display unit 120 can be increased (typically 1000 ppi or more) by forming the display unit 120 on a silicon substrate. In other words, the display unit 120 can supplement and display images with a resolution that the display unit 110 cannot handle.

[0052] A display system according to one aspect of the present invention comprises two display devices having different resolutions or different pixel densities. To make image data that can be displayed on one display device suitable for the other display device, part or all of the image data may be compressed or decompressed.

[0053] By increasing the resolution or detail of the display unit 120, the user is unable to perceive individual pixels (for example, lines that may occur between pixels are not visible), thus enhancing the sense of immersion, presence, and depth.

[0054] Furthermore, as shown in Figure 1A, the first display device 100A has a period during which the display unit does not display anything, and during this period it functions as an input / output means (for example, a controller) for the second display device 102A. By having such a function, the usage period of the power supply unit 116 of the first display device 100A can be extended. In other words, a display system according to one aspect of the present invention can be made more energy-efficient. For example, a lithium-ion secondary battery can be used as the power supply unit 116.

[0055] Next, the configurations of the display device and display system according to one embodiment of the present invention, as shown in Figures 1A, 1B, 1C, 2A, and 2B, will be described below.

[0056] <Display section> Display unit 110 and display unit 120 each have a display function. For display unit 110 and display unit 120, one or more can be selected from, for example, liquid crystal display devices, light-emitting devices including organic EL, and light-emitting devices including light-emitting diodes such as micro-LEDs. Considering productivity and luminous efficiency, it is preferable to use light-emitting devices including organic EL for display unit 110 and display unit 120.

[0057] <Communications Department> Communication unit 112 and communication unit 122 each have the function of communicating wirelessly or via a wired connection. It is preferable that communication unit 112 and communication unit 122 have the function of communicating wirelessly, as this allows for the elimination of the number of components such as connecting cables.

[0058] If the communication unit 112 and the communication unit 122 have the function of communicating wirelessly, the communication unit 112 and the communication unit 122 can communicate via an antenna. As a means (communication method) of communication between the communication unit 112 and the communication unit 122, each device can be connected to a computer network such as the Internet (which is the foundation of the World Wide Web), an intranet, an extranet, a PAN (Personal Area Network), a LAN (Local Area Network), a CAN (Campus Area Network), a MAN (Metropolitan Area Network), a WAN (Wide Area Network), or a GAN (Global Area Network) to communicate. When performing wireless communication, communication protocols or technologies that can be used include communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), and W-CDMA (registered trademark), or specifications standardized by IEEE such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark).

[0059] <Department Head> Control unit 114 and control unit 124 each have the function of controlling the display unit. Control unit 114 and control unit 124 include, for example, a pixel circuit, a backup circuit, and an image conversion circuit. The image conversion circuit can perform amplification conversion or downconversion processing of image data. This makes it possible to upconvert low-resolution image data or downconvert high-resolution image data to match the resolution of the display unit, thereby displaying high-quality images on the display unit. The pixel circuit and backup circuit will be described in detail in Embodiment 2.

[0060] <Power supply section> Power supply units 116 and 126 each have the function of supplying power to the display unit. Power supply units 116 and 126 can use, for example, primary batteries or secondary batteries. Lithium-ion secondary batteries are preferably used as the secondary batteries.

[0061] <Sensor section> Sensor unit 118 and sensor unit 128 each have the function of acquiring one or more pieces of information from the user's sight, hearing, touch, taste, and smell. More specifically, sensor unit 118 and sensor unit 128 each have the function of measuring at least one of the following: force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, power, radiation, humidity, gradient, vibration, odor, and infrared radiation.

[0062] Furthermore, it is preferable that the sensor unit 128 has the function of measuring brain waves in addition to the above functions. For example, it may have multiple electrodes that come into contact with the head and a mechanism that measures brain waves from the weak current flowing through these electrodes. By having the function of measuring brain waves in the sensor unit 128, the user can display the image of the display unit 110, or a part of the image of the display unit 110, on the display unit 120 at a location of their choosing. In this case, the user does not need to use both hands to operate the display device, and can perform input operations, etc., with both hands free (with nothing in their hands).

[0063] [Example Image 1] Next, an example of an image of a display device and display system according to one embodiment of the present invention will be explained using Figures 3A, 3B, 3C, and 3D.

[0064] The following describes an example of an operation method that a user can experience and an image that can be presented to the user using a display system according to one aspect of the present invention.

[0065] Figure 3A shows user 130 performing gesture operations while wearing the glasses-type second display device 102A. At this time, the display unit of the first display device 100A is turned off, thus reducing the power consumption of the first display device 100A. Furthermore, since the first display device 100A is located in the pocket of user 130's clothing, user 130 can operate the display system with both hands free.

[0066] Figure 3B shows an example of an image 140 that appears in the field of view of user 130 in a room, as shown in Figure 3A. In the image 140 shown in Figure 3B, image information 141 is shown superimposed on an image of the actual room scenery, such as the floor, walls, and doors. Here, the image information 141 is part of the image displayed on the display unit of the first display device 100A. User 130 can also operate the first display device 100A (for example, a smartphone) paired with the second display device 102A while wearing the second display device 102A.

[0067] Furthermore, when user 130 makes a grasping motion with their left hand 130L over the space where image information 141 is displayed, the display device 102A recognizes this motion as a gesture operation and makes the position of image information 141 changeable. In this state, when user 130's left hand 130L moves, as shown in Figure 3B, the image information 141 can change position in accordance with the movement of the left hand 130L. At this time, in addition to moving the image information 141 left and right, up and down, and forward and backward in accordance with the movement of the left hand 130L, the image information 141 can also be rotated.

[0068] Figure 3C shows user 130 performing a gesture action, which is different from the action shown in Figure 3A. User 130 has the first display device 100A in his pocket, with the display unit turned off, as described above.

[0069] Figure 3D shows image 140 as seen in the field of view of user 130, who is indoors, as shown in Figure 3C. User 130 can discard image information 141 by performing a grasping motion in the space where image information 141 is displayed, and then throwing the object, like throwing a frisbee. At this time, image information 141 moves away from user 130 and at some point disappears or is ejected outside the field of view. In this way, user 130 can discard (close) content images displayed in their field of view through gesture actions.

[0070] Thus, a display device and a display system according to one aspect of the present invention can also be operated by new operating methods and methods.

[0071] Next, an example of how to operate a display system according to one embodiment of the present invention will be explained using Figure 4.

[0072] [Example of display system operation method 1] The following describes an example of how the display system operates. Figure 4 is a flowchart illustrating how the display system operates.

[0073] In step S01, the operation is initiated. At this time, the first display device 100A is in a startup state (operable state), and the second display device 102A is powered on.

[0074] In step S02, the second display device 102A is attached. The second display device 102A recognizes that it has been attached and the system starts up. In step S02, for example, if the second display device 102A is in the form of goggles, the user may be provided with an image from a front camera, or an image of other content may be displayed.

[0075] In step S03, pairing is performed between the first display device 100A and the second display device 102A. Once pairing is complete, the first display device 100A and the second display device 102A become capable of exchanging data bidirectionally.

[0076] In step S04, the first image displayed on the display unit 110 of the first display device 100A is displayed on the display unit 120 of the second display device 102A. This allows the user to view the information displayed on the second display device 102A without having to look at the screen of the first display device 100A.

[0077] In this case, since the pixel density of the display units of the first display device 100A and the second display device 102A are different, it is preferable to display a second image on the second display device 102A that has been processed by upconverting or downconverting the first image so that it is the optimal size when displayed on the display unit 120 of the second display device 102A, rather than displaying the first image as is.

[0078] In step S05, information is transmitted from the second display device 102A to the first display device 100A. For example, the information may include a code indicating that the display of the first image has been completed.

[0079] In step S06, the first display device 100A turns off the display unit 110 based on the received information. At this time, the touch sensor of the display unit 110 of the first display device 100A remains active. As a result, the display unit 110 of the first display device 100A functions as an input means (touchpad) or the like.

[0080] In step S07, the second display device 102A detects a gesture action by the user using the detection unit of the second display device 102A and acquires gesture information corresponding to the gesture action.

[0081] In step S08, the second display device 102A performs various processes based on the gesture information. For example, it can perform image processing on the image information displayed on the display unit 120 of the second display device 102A, and display the processed image information on the display unit 120.

[0082] In step S09, the process ends. Step S09 may include, for example, removing the second display device 102A, turning off the power to the first display device 100A or the second display device 102A, or unpairing the first display device 100A and the second display device 102A.

[0083] The above is a description of an example of the operation method of a display system according to one embodiment of the present invention.

[0084] [Example image 2] Next, using Figures 5A, 5B, 5C, and 5D, we will explain different examples of operating methods that a user can experience and images that can be presented to a user using a display system according to one embodiment of the present invention.

[0085] Figure 5A shows user 130 performing gesture operations while wearing the glasses-type second display device 102A. At this time, the display unit of the first display device 100A is turned off, thus reducing the power consumption of the first display device 100A. Furthermore, since the first display device 100A is located in the pocket of user 130's clothing, user 130 can operate the display system with both hands free.

[0086] Figure 5B shows an example of an image 140 that appears in the field of view of user 130 in a room, as shown in Figure 5A. In the image 140 shown in Figure 5B, image information 141 is shown superimposed on an image of the actual room scenery, such as the floor, walls, and doors. Here, the image information 141 is part of the image displayed on the display unit of the first display device 100A. User 130 can also operate the first display device 100A (for example, a smartphone) paired with the second display device 102A while wearing the second display device 102A.

[0087] Furthermore, as shown in Figure 5B, when user 130 grasps the space where image information 141 is displayed with their left hand 130L and right hand 130R, the display device 102A recognizes this action as a gesture operation and makes it possible to change the shape of image information 141. In this state, when the left hand 130L and right hand 130R move closer together, the image information 141 deforms to shrink, as shown in Figure 5B. On the other hand, when the left hand 130L and right hand 130R move further apart, the image information 141 can be enlarged. At this time, it is also possible to move or rotate the image information 141 in accordance with the movement of the left hand 130L and right hand 130R.

[0088] Figure 5C shows user 130 performing a gesture action, which is different from the action shown in Figure 5A. User 130 has the first display device 100A in his pocket, with the display unit turned off, as described above.

[0089] Figure 5D shows the image 140 as seen in the field of view of user 130, who is in a room, as shown in Figure 5C. User 130 can discard the image information 141 by grasping the space where the image information 141 is displayed with their left hand 130L and right hand 130R, and then opening it to the left and right. At this time, as shown in Figure 5D, the image information 141 is displayed as if it has been torn to the left and right. In this way, user 130 can discard (close) content images displayed in their field of view through a gesture.

[0090] Thus, a display device and a display system according to one aspect of the present invention can also be operated by a new operating method.

[0091] [Example of display system operation method 2] The following describes an example of how the display system operates. Figure 6 is a flowchart illustrating how the display system operates.

[0092] In Figure 6, steps S11 to S16 are the same as steps S01 to S06 of the flowchart illustrated in Figure 4, so they can be used as a reference.

[0093] In step S17, the second display device 102A detects the user's gesture action using multiple detection units it has. Based on the information output from the multiple detection units (also called input data), the second display device 102A acquires gesture information corresponding to the gesture action.

[0094] In step S18, the second display device 102A performs various processes based on the gesture information. For example, it can perform image processing on the image information displayed on the display unit 120 of the second display device 102A, and display the processed image information on the display unit 120.

[0095] In step S19, the process ends. Step S19 may include, for example, removing the second display device 102A, turning off the power to the first display device 100A or the second display device 102A, or unpairing the first display device 100A and the second display device 102A.

[0096] The above is a description of an example of the operation method of a display system according to one embodiment of the present invention.

[0097] As described above, by using a display device and display system according to one aspect of the present invention, a display device with a novel configuration or a display system with a novel configuration can be provided. Furthermore, by using a display device and display system according to one aspect of the present invention, a method for operating a display device with a novel configuration or a method for operating a display system with a novel configuration can be provided.

[0098] This embodiment can be appropriately combined with descriptions of other embodiments.

[0099] (Embodiment 2) This embodiment describes a display device and a display system that are aspects of the present invention.

[0100] <Example of display device configuration> Figure 7 is a schematic block diagram showing an example configuration of a display device 10, which is a display device according to one aspect of the present invention. The display device 10 has a layer 20 and a layer 30, and the layer 30 can be laminated, for example, on top of the layer 20. An interlayer insulator or a conductor for making an electrical connection between different layers can be provided between the layer 20 and the layer 30.

[0101] The transistor provided in layer 20 can be, for example, a transistor having silicon in the channel formation region (also called a Si transistor), or a transistor having single-crystal silicon in the channel formation region. In particular, using a transistor having single-crystal silicon in the channel formation region as the transistor provided in layer 20 allows for a large on-current of the transistor. Therefore, it is preferable because the circuit of layer 20 can be driven at high speed. Furthermore, since Si transistors can be formed with microfabrication such as a channel length of 3 nm to 10 nm, they can be used in a display device 10 equipped with an accelerator such as a CPU or GPU, an application processor, etc.

[0102] The transistor provided in layer 30 can be, for example, an OS transistor. In particular, it is preferable to use an OS transistor having an oxide containing at least one of indium, element M (where element M is aluminum, gallium, yttrium, or tin), and zinc in the channel formation region. Such an OS transistor has the characteristic of having a very low off-current. Therefore, it is preferable to use an OS transistor as a transistor provided in the pixel circuit of the display unit in particular, because it can retain the analog data written to the pixel circuit for a long period of time.

[0103] Layer 20 is provided with a drive circuit 40 and a functional circuit 50. Since layer 20 is equipped with Si transistors with high on-current, each circuit in layer 20 can be driven at high speed.

[0104] Layer 30 is provided with a display unit 60 having multiple pixels 61. Each pixel 61 is provided with pixel circuits 62R, 62G, and 62B that control the emission of red, green, and blue light. Pixel circuits 62R, 62G, and 62B function as sub-pixels of pixel 61. Since pixel circuits 62R, 62G, and 62B have OS transistors, they can retain analog data written to the pixel circuits for a long period of time. Each pixel 61 in layer 30 is also provided with a backup circuit 82. Note that the backup circuit may also be called a storage circuit or memory circuit.

[0105] The drive circuit 40 includes gate line drive circuits, source line drive circuits, etc., for driving the pixels 61 (pixel circuits 62R, 62G, 62B) of the display unit 60. By arranging the drive circuit 40 on a layer 20 different from the layer 30 on which the display unit is provided, the area occupied by the display unit on layer 30 can be increased. The drive circuit 40 may also include an LVDS (Low Voltage Differential Signaling) circuit or a D / A (Digital to Analog) conversion circuit, etc., which function as an interface for receiving data such as image data from outside the display device 10. The Si transistors on layer 20 can have their on-current increased. Depending on the operating speed of each circuit, the channel length or channel width of the Si transistors may be varied.

[0106] The functional circuit 50 has a processor (e.g., a CPU) used for data processing. The CPU has multiple CPU cores. Within each CPU core, there are flip-flops. The flip-flops have multiple scan flip-flops. Flip-flop 80 inputs and outputs the data (backup data) from the scan flip-flops to and from the backup circuit 82. In Figure 7, the backup data BD is shown as the data signal held by the backup circuit 82.

[0107] For the backup circuit 82, a memory having an OS transistor is preferable, for example. Using an OS transistor with an extremely low off-current in the backup circuit has advantages such as being able to retain the voltage of the analog data written to the backup circuit for a long period of time and consuming almost no power to retain the data. The backup circuit 82 having an OS transistor can be provided in the display unit 60 where multiple pixels 61 are arranged. Figure 7 illustrates how the backup circuit 82 is provided for each pixel 61.

[0108] The backup circuit 82, composed of OS transistors, can be stacked with the layer 20 having Si transistors. The backup circuit 82 may be arranged in a matrix similar to the subpixels within the pixel 61, or it may be arranged for each of multiple pixels. In other words, the backup circuit 82 can be placed within the layer 30 without being constrained by the arrangement of the pixels 61. Therefore, it is possible to increase the degree of freedom of the display unit / circuit layout, and to place it without increasing the circuit area, thereby increasing the memory capacity of the backup circuit 82 required for calculation processing.

[0109] <Example configuration of pixel circuit and backup circuit> Figures 8 and 9 illustrate an example of the arrangement of the backup circuit 82 and the sub-pixels, pixel circuits 62R, 62G, and 62B, within the display unit 60.

[0110] Figure 8 illustrates a configuration in the display unit 60 in which multiple pixels 61 are arranged in a matrix. Each pixel 61 has pixel circuits 62R, 62G, and 62B, as well as a backup circuit 82. As mentioned above, both the backup circuit 82 and the pixel circuits 62R, 62G, and 62B can be made of OS transistors and can therefore be arranged within the same pixel.

[0111] <Block diagram of the display device> Next, Figure 9 shows a block diagram illustrating the various components of the display device 10. The display device includes a drive circuit 40, a function circuit 50, and a display unit 60.

[0112] The drive circuit 40 includes, for example, a gate driver 41 and a source driver 42. The gate driver 41 has the function of driving multiple gate lines GL for outputting signals to pixel circuits 62R, 62G, and 62B. The source driver 42 has the function of driving multiple source lines SL for outputting signals to pixel circuits 62R, 62G, and 62B. The drive circuit 40 also supplies voltage to the pixel circuits 62R, 62G, and 62B via multiple wires for displaying signals.

[0113] The functional circuit 50 has a CPU 51. The CPU 51 has a CPU core 53. The CPU core 53 has a flip-flop 80 for temporarily holding data used in arithmetic processing. The flip-flop 80 has a plurality of scan flip-flops 81, and each scan flip-flop 81 is electrically connected to a backup circuit 82 provided in the display unit 60.

[0114] The display unit 60 has multiple pixels 61, each equipped with pixel circuits 62R, 62G, 62B, and a backup circuit 82. As explained in Figure 8, the backup circuit 82 does not necessarily need to be placed within the repeating unit of pixels 61. It can be freely arranged depending on the shape of the display unit 60, the shapes of the pixel circuits 62R, 62G, 62B, etc.

[0115] <Example of pixel circuit configuration> Figures 10A and 10B show examples of the configuration of the pixel circuit 62 applicable to the pixel circuits 62R, 62G, and 62B, and the light-emitting element 70 connected to the pixel circuit 62. Figure 10A is a diagram showing the connections of each element, and Figure 10B is a diagram schematically showing the hierarchical relationship between the drive circuit 40, the pixel circuit 62, and the light-emitting element 70.

[0116] In this specification, the term "element" may sometimes be replaced with "device." For example, display elements, light-emitting elements, and liquid crystal elements may be replaced with, for example, display devices, light-emitting devices, and liquid crystal devices.

[0117] The pixel circuit 62 shown as an example in Figures 10A and 10B includes a switch SW21, a switch SW22, a transistor M21, and a capacitor C21. Switches SW21 and SW22 and transistor M21 can be composed of OS transistors. It is preferable that each OS transistor of switch SW21, switch SW22, and transistor M21 has a back gate electrode. In this case, the back gate electrode can be configured to receive the same signal as the gate electrode, or to receive a different signal from the gate electrode.

[0118] Transistor M21 comprises a gate electrode electrically connected to switch SW21, a first electrode electrically connected to light-emitting element 70, and a second electrode electrically connected to wiring ANO. Wiring ANO is a wire that provides a potential for supplying current to the light-emitting element 70.

[0119] Switch SW21 has a first terminal electrically connected to the gate electrode of transistor M21 and a second terminal electrically connected to the source line SL. Switch SW21 also has a function to control the conduction state or non-conduction state based on the potential of the gate line GL1.

[0120] Switch SW22 has a first terminal electrically connected to wiring V0 and a second terminal electrically connected to the light-emitting element 70. Switch SW22 also has a function to control the conduction state or non-conduction state based on the potential of the gate wire GL2. Wiring V0 is wiring for supplying a reference potential and wiring for outputting the current flowing through the pixel circuit 62 to the drive circuit 40 or the function circuit 50.

[0121] Capacitor C21 comprises a conductive film electrically connected to the gate electrode of transistor M21 and a conductive film electrically connected to the second electrode of switch SW22.

[0122] The light-emitting element 70 includes a first electrode electrically connected to the first electrode of the transistor M21 and a second electrode electrically connected to the wiring VCOM. The wiring VCOM is supplied with a potential for supplying current to the light-emitting element 70.

[0123] This allows the intensity of light emitted by the light-emitting element 70 to be controlled according to the image signal applied to the gate electrode of transistor M21. Furthermore, the amount of current flowing through the light-emitting element 70 can be increased by the reference potential of the wiring V0 provided via switch SW22. By monitoring the amount of current flowing through wiring V0 with an external circuit, the amount of current flowing through the light-emitting element can be estimated. This allows for the detection of pixel defects and other issues.

[0124] In the configuration shown as an example in Figure 10B, the wiring electrically connecting the pixel circuit 62 and the drive circuit 40 can be shortened, thereby reducing the wiring resistance. As a result, data writing becomes faster, and the display device 10 can be driven at high speed. This ensures a sufficient frame duration even if the display device 10 has a large number of pixels 61, and increases the pixel density of the display device 10. Furthermore, increasing the pixel density of the display device 10 increases the resolution of the image displayed by the display device 10. For example, the pixel density of the display device 10 can be set to 1000 ppi or more, or 5000 ppi or more, or 7000 ppi or more. Therefore, the display device 10 can be used as a display device for AR or VR, and can be suitably applied to electronic devices such as HMDs where the distance between the display unit and the user is close.

[0125] In Figure 10B, gate lines GL1, GL2, wiring ANO, VCOM, V0, and source line SL are shown to be supplied via wiring from the drive circuit 40 located below the pixel circuit 62. However, the present invention is not limited to this. For example, the wiring that supplies the signals and voltages of the drive circuit 40 may be routed to the outer periphery of the display unit 60 and electrically connected to each pixel circuit 62 arranged in a matrix on layer 30. In this case, it is effective to provide the gate driver 41 of the drive circuit 40 on layer 30. That is, it is effective to use an OS transistor for the gate driver 41. It is also effective to provide part of the function of the source driver 42 of the drive circuit 40 on layer 30. For example, it is effective to provide a demultiplexer on layer 30 that distributes the signals output by the source driver 42 to each source line. It is also effective to use an OS transistor for the demultiplexer.

[0126] <Example of a display correction system configuration> A display system according to one aspect of the present invention may include a display correction system. The display correction system includes a current I flowing through the light-emitting element 70. EL By correcting these issues, display defects caused by faulty pixels such as bright spots or dark spots can be reduced.

[0127] The circuit diagram shown in Figure 11A is an excerpt illustrating a portion of the pixel circuit 62 shown in Figure 10A. In the case of a defective pixel that causes bright spots or dark spots, the current I flowing through the light-emitting element 70 is different compared to a normal pixel. EL It becomes extremely large or extremely small.

[0128] CPU51 monitors the current I flowing through switch SW23. MONI The data is acquired periodically. The monitor current I MONIThe current amount is converted into digital data that can be processed by the CPU 51, and arithmetic processing is performed by the CPU 51 using the digital data. Bad pixels are estimated by the arithmetic processing in the CPU 51, and the CPU 51 performs correction to make it difficult to visually recognize display defects caused by the bad pixels. For example, when the pixel 61D illustrated in FIG. 11B is a bad pixel, the current I EL flowing through the light-emitting element 70 of the adjacent pixel 61N is corrected.

[0129] The correction can be estimated by executing operations based on artificial neural networks such as deep neural networks (DNN), convolutional neural networks (CNN), recurrent neural networks (RNN), autoencoders, deep Boltzmann machines (DBM), and deep belief networks (DBN).

[0130] By the above-described correction, the current I EL flowing through the pixel 61N adjacent to the bad pixel is corrected to the current I EL_C (see FIG. 11C). As shown in FIG. 11C, by performing display as the pixel 61G in which the bad pixel and the pixel 61N are combined, it is possible to make it difficult to visually recognize display defects caused by bad pixels such as bright spots or dark spots, and to achieve normal display.

[0131] In addition, in the operation by the display correction system for correcting the current flowing through the pixel, the data during the operation can be continuously held as backup data. Therefore, it is particularly effective in performing a huge amount of arithmetic processing such as an operation based on an artificial neural network. By making the CPU 51 function as an application processor, it is possible to combine operations such as driving with a variable frame frequency in addition to the operation, and to reduce power consumption in addition to reducing display defects.

[0132] <Modified Example of Display Device> FIG. 12 shows a modified example of each configuration included in the display device 10 described above.

[0133] The block diagram of the display device 10A shown in Figure 12 corresponds to a configuration in which an accelerator 52 is added to the functional circuit 50 of the display device 10 in Figure 9.

[0134] In the display correction system described above, when calculations based on an artificial neural network are performed, the configuration involves repeatedly performing multiply-accumulate operations. The accelerator 52 functions as a dedicated calculation circuit for the multiply-accumulate operations of the artificial neural network NN. Calculations using the accelerator 52 can perform processes such as correcting the image contours by correcting the display defects mentioned above, or by upconverting the display data. Furthermore, power consumption can be reduced by configuring the CPU 51 to be power-gated while the accelerator 52 is performing calculations.

[0135] This embodiment can be appropriately combined with descriptions of other embodiments.

[0136] (Embodiment 3) This embodiment describes a light-emitting element (light-emitting device) that can be used in a display device according to one aspect of the present invention.

[0137] In this specification, devices fabricated using a metal mask or an FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or an FMM may be referred to as MML (Metal Maskless) structured devices.

[0138] In this specification, a structure in which different light-emitting layers are created or painted for each color of light-emitting device (here, blue (B), green (G), and red (R)) may be referred to as an SBS (Side By Side) structure. Also, in this specification, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (for example, a color filter) to create a full-color display device.

[0139] Furthermore, light-emitting devices can be broadly classified into single-structure and tandem-structure devices. A single-structure device has one light-emitting unit between a pair of electrodes, and it is preferable that this light-emitting unit includes one or more light-emitting layers. To obtain white light emission, one should select light-emitting layers such that the light emitted from each of the two or more layers is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a configuration that emits white light as a whole can be obtained. The same applies to light-emitting devices having three or more light-emitting layers.

[0140] A tandem device preferably has two or more light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, the device should be configured such that the light from the light-emitting layers of the multiple light-emitting units is combined to produce white light emission. The configuration for obtaining white light emission is the same as that for a single-structure device. In a tandem device, it is preferable to provide an intermediate layer, such as a charge-generating layer, between the multiple light-emitting units.

[0141] Furthermore, when comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use SBS structure light-emitting devices. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0142] <Example configuration of light-emitting element 70> The EL layer 786 of the light-emitting element 70 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430, as shown in Figure 13A. Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). Light-emitting layer 4411 may contain, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0143] A configuration having a layer 4420, an emissive layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single emissive unit, and in this specification, the configuration shown in Figure 13A is referred to as a single structure.

[0144] Furthermore, as shown in Figure 13B, a configuration in which multiple light-emitting layers (light-emitting layers 4411, 4412, and 4413) are provided between layer 4420 and layer 4430 is also a variation of the single structure.

[0145] Furthermore, as shown in Figure 13C, a configuration in which multiple light-emitting units (EL layers 786a, 786b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure in this specification. In this specification, the configuration shown in Figure 13C is referred to as a tandem structure, but it is not limited to this, and for example, a tandem structure may also be called a stack structure. By using a tandem structure, a light-emitting element capable of high-brightness emission can be made.

[0146] The light-emitting color of the light-emitting element 70 can be red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 786. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting element 70.

[0147] A light-emitting element that emits white light preferably has a configuration that includes two or more types of light-emitting materials in its light-emitting layer. To obtain white light emission, it is sufficient to select light-emitting materials such that the light emitted by each of the two or more materials is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary in color, a light-emitting element that emits white light as a whole can be obtained. The same applies to light-emitting elements that have three or more light-emitting layers.

[0148] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). Alternatively, it is preferable to have two or more light-emitting materials, and for each light-emitting material to emit light that contains spectral components of two or more colors from R, G, and B.

[0149] <Method for forming the light-emitting element 70> The following describes a method for forming the light-emitting element 70 provided on the pixel circuit 62.

[0150] Figure 14A shows a schematic top view of a display device according to one embodiment of the present invention. The display unit 60 has multiple red light-emitting elements 70R, multiple green light-emitting elements 70G, and multiple blue light-emitting elements 70B. In Figure 14A, the labels R, G, and B are added within the light-emitting area of ​​each light-emitting element for easy distinction. The configuration of the light-emitting elements 70 shown in Figure 14A may also be called an SBS (Side By Side) structure. Furthermore, although the configuration shown in Figure 14A is an example with three colors, red (R), green (G), and blue (B), it is not limited to this. For example, a configuration with four or more colors may be used.

[0151] The light-emitting elements 70R, 70G, and 70B are each arranged in a matrix. Figure 14A shows a so-called stripe arrangement, in which light-emitting elements of the same color are arranged in one direction. Note that the arrangement method of the light-emitting elements is not limited to this; other arrangement methods such as delta arrangement and zigzag arrangement may be applied, and pentile arrangement can also be used.

[0152] It is preferable to use organic EL devices such as OLED (Organic Light Emitting Diode) or QLED (Quantum-dot Light Emitting Diode) as the light-emitting elements 70R, 70G, and 70B. Examples of light-emitting materials for the EL elements include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (such as quantum dot materials).

[0153] Figure 14B is a schematic cross-sectional view corresponding to the dashed line A1-A2 in Figure 14A.

[0154] Figure 14B shows cross-sections of the light-emitting element 70R, light-emitting element 70G, and light-emitting element 70B. Each of the light-emitting elements 70R, 70G, and 70B is provided on the substrate 251 and has a conductor 772 that functions as a pixel electrode and a conductor 788 that functions as a common electrode.

[0155] The light-emitting element 70R has an EL layer 786R between the conductor 772 and the conductor 788. The EL layer 786R has a luminescent organic compound that emits light having a peak in at least the red wavelength range. The EL layer 786G of the light-emitting element 70G has a luminescent organic compound that emits light having a peak in at least the green wavelength range. The EL layer 786B of the light-emitting element 70B has a luminescent organic compound that emits light having a peak in at least the blue wavelength range.

[0156] Each of the EL layers 786R, 786G, and 786B may have, in addition to a layer containing a light-emitting organic compound (light-emitting layer), one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0157] A conductor 772 is provided for each light-emitting element. A conductor 788 is provided as a continuous layer common to all light-emitting elements. A conductive film that is transparent to visible light is used for either conductor 772 or conductor 788, while a conductive film that is reflective is used for the other. By making conductor 772 transparent and conductor 788 reflective, a bottom-emission type display device can be created. Conversely, by making conductor 772 reflective and conductor 788 transparent, a top-emission type display device can be created. Furthermore, by making both conductor 772 and conductor 788 transparent, a dual-emission type display device can be created.

[0158] An insulating layer 272 is provided to cover the end of the conductor 772. Preferably, the end of the insulating layer 272 is tapered.

[0159] Each of the EL layers 786R, 786G, and 786B has a region in contact with the upper surface of the conductor 772 and a region in contact with the surface of the insulating layer 272. The edges of the EL layers 786R, 786G, and 786B are located on the insulating layer 272.

[0160] As shown in Figure 14B, a gap is provided between the two EL layers between light-emitting elements of different colors. It is preferable that the EL layers 786R, 786G, and 786G are arranged so that they do not touch each other. This effectively prevents current from flowing through two adjacent EL layers, which can cause unintended light emission (also known as crosstalk). Therefore, contrast can be enhanced, and a display device with high display quality can be realized.

[0161] EL layer 786R, EL layer 786G, and EL layer 786G can be differentiated by methods such as vacuum deposition using a shadow mask like a metal mask. Alternatively, they can be differentiated by photolithography. By using photolithography, it is possible to realize a display device with high resolution that is difficult to achieve when using a metal mask.

[0162] Furthermore, a protective layer 271 is provided on the conductive material 788, covering the light-emitting elements 70R, 70G, and 70B. The protective layer 271 has the function of preventing impurities such as water from diffusing to each light-emitting element from above.

[0163] The protective layer 271 can be, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide films, silicon oxide nitride films, silicon nitride films, silicon nitride films, aluminum oxide films, aluminum oxide nitride films, and hafnium oxide films. Alternatively, semiconductor materials such as indium gallium oxide and indium gallium zinc oxide may be used as the protective layer 271. The protective layer 271 may be formed using ALD, CVD, and sputtering methods. Although the example shows a configuration including an inorganic insulating film as the protective layer 271, it is not limited to this. For example, the protective layer 271 may be a multilayer structure of an inorganic insulating film and an organic insulating film.

[0164] Figure 14C shows a different example from the one described above.

[0165] Figure 14C shows a light-emitting element 70W that emits white light. The light-emitting element 70W has an EL layer 786W that emits white light between the conductor 772 and the conductor 788.

[0166] The EL layer 786W can be configured, for example, by stacking two or more light-emitting layers selected so that their respective light-emitting colors are complementary. Alternatively, a stacked EL layer with a charge-generating layer sandwiched between the light-emitting layers may be used.

[0167] Figure 14C shows three light-emitting elements 70W arranged side by side. A colored layer 264R is provided on top of the left light-emitting element 70W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on top of the center light-emitting element 70W, and a colored layer 264B that transmits blue light is provided on top of the right light-emitting element 70W. This allows the display device to display a color image.

[0168] Here, the EL layer 786W and the conductor 788 are separated between two adjacent light-emitting elements 70W. This effectively prevents current from flowing through the EL layer 786W between two adjacent light-emitting elements 70W, thus preventing unintended light emission. In particular, when using a stacked EL element in which a charge generation layer is provided between two light-emitting layers as the EL layer 786W, the effect of crosstalk becomes more pronounced as the resolution increases, i.e., the distance between adjacent pixels decreases, resulting in a decrease in contrast. Therefore, this configuration makes it possible to realize a display device that combines high resolution and high contrast.

[0169] It is preferable to separate the EL layer 786W and the conductor 788 by photolithography. This allows for a narrower spacing between light-emitting elements, enabling the realization of a display device with a higher aperture ratio compared to cases where a shadow mask such as a metal mask is used.

[0170] In the case of a bottom-emission type light-emitting element, a colored layer can be provided between the conductor 772 and the substrate 251.

[0171] The above is an explanation of light-emitting elements.

[0172] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0173] (Embodiment 4) In this embodiment, an example of the cross-sectional configuration of a display device 10, which is one aspect of the present invention, will be described.

[0174] Figure 15 is a cross-sectional view showing an example of the configuration of the display device 10. The display device 10 has a substrate 701 and a substrate 705, and the substrate 701 and the substrate 705 are bonded together by a sealing material 712.

[0175] A single-crystal semiconductor substrate, such as a single-crystal silicon substrate, can be used as the substrate 701. Alternatively, a semiconductor substrate other than a single-crystal semiconductor substrate may be used as the substrate 701.

[0176] Transistors 441 and 601 are provided on the substrate 701. Transistors 441 and 601 can be the transistors provided on layer 20 as shown in Embodiment 2.

[0177] The transistor 441 consists of a conductor 443 that functions as a gate electrode, an insulator 445 that functions as a gate insulator, and a part of the substrate 701, and has a semiconductor region 447 including a channel formation region, a low-resistance region 449a that functions as either a source region or a drain region, and a low-resistance region 449b that functions as either a source region or a drain region. The transistor 441 may be either a p-channel or an n-channel type.

[0178] Transistor 441 is electrically isolated from other transistors by the element isolation layer 403. Figure 15 shows the case where transistor 441 and transistor 601 are electrically isolated by the element isolation layer 403. The element isolation layer 403 can be formed using the LOCOS (LOCal Oxidation of Silicon) method or the STI (Shallow Trench Isolation) method, etc.

[0179] In this case, the transistor 441 shown in Figure 15 has a convex semiconductor region 447. Furthermore, the sides and top surface of the semiconductor region 447 are covered by a conductor 443 via an insulator 445. Note that Figure 15 does not show how the conductor 443 covers the sides of the semiconductor region 447. In addition, a material that adjusts the work function can be used for the conductor 443.

[0180] A transistor with a convex semiconductor region, such as transistor 441, can be called a fin-type transistor because it utilizes the convex portion of the semiconductor substrate. It may also have an insulator in contact with the upper part of the convex portion, functioning as a mask for forming the convex portion. Furthermore, while Figure 15 shows a configuration where a portion of the substrate 701 is processed to form the convex portion, a semiconductor with a convex shape may also be formed by processing an SOI substrate.

[0181] Note that the configuration of transistor 441 shown in Figure 15 is just one example, and the system is not limited to this configuration. An appropriate configuration may be used depending on the circuit configuration or the way the circuit operates. For example, transistor 441 may be a planar transistor.

[0182] Transistor 601 can have the same configuration as transistor 441.

[0183] On the substrate 701, in addition to the element isolation layer 403, transistors 441 and 601, insulators 405, 407, 409, and 411 are provided. Conductors 451 are embedded in insulators 405, 407, 409, and 411. Here, the height of the upper surface of the conductor 451 and the height of the upper surface of the insulator 411 can be made to be approximately the same.

[0184] Insulators 421 and 214 are provided on the conductor 451 and on the insulator 411, respectively. The conductor 453 is embedded in the insulator 421 and in the insulator 214. Here, the height of the upper surface of the conductor 453 and the height of the upper surface of the insulator 214 can be made to be approximately the same.

[0185] An insulator 216 is provided on the conductor 453 and on the insulator 214. The conductor 455 is embedded in the insulator 216. Here, the height of the upper surface of the conductor 455 and the height of the upper surface of the insulator 216 can be made to be approximately the same.

[0186] Insulators 222, 224, 254, 280, 274, and 281 are provided on the conductor 455 and on the insulator 216. The conductor 305 is embedded in insulators 222, 224, 254, 280, 274, and 281. Here, the height of the upper surface of the conductor 305 and the height of the upper surface of the insulator 281 can be made to be approximately the same.

[0187] An insulator 361 is provided on the conductor 305 and on the insulator 281. Conductors 317 and 337 are embedded in the insulator 361. Here, the height of the upper surface of the conductor 337 and the height of the upper surface of the insulator 361 can be made to be approximately the same.

[0188] An insulator 363 is provided on the conductor 337 and on the insulator 361. Conductors 347, 353, 355, and 357 are embedded in the insulator 363. Here, the height of the upper surfaces of conductors 353, 355, and 357 can be made to be approximately the same as the height of the upper surface of the insulator 363.

[0189] Connecting electrodes 760 are provided on the conductor 353, conductor 355, conductor 357, and insulator 363. An anisotropic conductor 780 is provided so as to be electrically connected to the connecting electrodes 760, and an FPC (Flexible Printed Circuit) 716 is provided so as to be electrically connected to the anisotropic conductor 780. Various signals and the like are supplied to the display device 10 from outside the display device 10 via the FPC 716.

[0190] As shown in Figure 15, the low-resistance region 449b, which functions as either the source region or the drain region of transistor 441, is electrically connected to the FPC 716 via conductors 451, 453, 455, 305, 317, 337, 347, 353, 355, 357, connecting electrode 760, and anisotropic conductor 780. Here, Figure 15 shows three conductors, conductors 353, 355, and 357, which have the function of electrically connecting the connecting electrode 760 and the conductor 347, but the present invention is not limited to these. There may be one, two, or four or more conductors that have the function of electrically connecting the connecting electrode 760 and the conductor 347. By providing multiple conductors that have the function of electrically connecting the connecting electrode 760 and the conductor 347, the contact resistance can be reduced.

[0191] A transistor 750 is provided on the insulator 214. The transistor 750 can be the transistor provided on layer 30 as shown in Embodiment 2. For example, it can be the transistor provided on pixel circuit 62. An OS transistor can preferably be used for transistor 750. OS transistors have the characteristic of having an extremely small off-current. Therefore, the retention time of image data, etc. can be extended, and the frequency of refresh operations can be reduced. Therefore, the power consumption of the display device 10 can be reduced.

[0192] Furthermore, transistor 750 can be a transistor provided in the backup circuit 82. Preferably, an OS transistor can be used for transistor 750. OS transistors have the characteristic of having an extremely small off-current. Therefore, the data held by the flip-flop can be retained even during periods when the power supply voltage sharing is stopped. This allows for normally-off operation of the CPU (an operation that intermittently stops the power supply voltage). Thus, the power consumption of the display device 10 can be reduced.

[0193] Conductors 301a and 301b are embedded in insulators 254, 280, 274, and 281, respectively. Conductor 301a is electrically connected to either the source or drain of transistor 750, and conductor 301b is electrically connected to the other source or drain of transistor 750. Here, the height of the upper surfaces of conductors 301a and 301b can be made to be approximately the same as the height of the upper surface of insulator 281.

[0194] Conductors 311, 313, 331, capacitor 790, 333, and 335 are embedded in the insulator 361. Conductors 311 and 313 are electrically connected to the transistor 750 and function as wiring. Conductors 333 and 335 are electrically connected to the capacitor 790. Here, the height of the upper surfaces of conductors 331, 333, and 335 can be made to be approximately the same as the height of the upper surface of the insulator 361.

[0195] Conductors 341, 343, and 351 are embedded in the insulator 363. Here, the height of the upper surface of conductor 351 and the height of the upper surface of insulator 363 can be made to be approximately the same.

[0196] Insulators 405, 407, 409, 411, 421, 214, 280, 274, 281, 361, and 363 may function as interlayer films and as planarizing films that cover the uneven surface beneath them. For example, the upper surface of insulator 363 may be planarized by a planarizing treatment such as chemical mechanical polishing (CMP) to improve its flatness.

[0197] As shown in Figure 15, the capacitor 790 has a lower electrode 321 and an upper electrode 325. An insulator 323 is provided between the lower electrode 321 and the upper electrode 325. In other words, the capacitor 790 has a laminated structure in which an insulator 323, which functions as a dielectric, is sandwiched between a pair of electrodes. Although Figure 15 shows an example in which the capacitor 790 is provided on an insulator 281, the capacitor 790 may be provided on an insulator different from the insulator 281.

[0198] Figure 15 shows an example in which conductors 301a, 301b, and 305 are formed in the same layer. It also shows an example in which conductors 311, 313, 317, and the lower electrode 321 are formed in the same layer. Furthermore, it shows an example in which conductors 331, 333, 335, and 337 are formed in the same layer. It also shows an example in which conductors 341, 343, and 347 are formed in the same layer. In addition, it shows an example in which conductors 351, 353, 355, and 357 are formed in the same layer. By forming multiple conductors in the same layer, the manufacturing process of the display device 10 can be simplified, thereby reducing the manufacturing cost of the display device 10. Note that these may be formed in different layers and may be made of different types of materials.

[0199] The display device 10 shown in Figure 15 has a light-emitting element 70. The light-emitting element 70 has a conductor 772, an EL layer 786, and a conductor 788. The EL layer 786 has an organic compound or an inorganic compound such as a quantum dot.

[0200] Materials that can be used in organic compounds include fluorescent materials or phosphorescent materials. Materials that can be used in quantum dots include colloidal quantum dot materials, alloy-type quantum dot materials, core-shell type quantum dot materials, and core-type quantum dot materials.

[0201] The conductor 772 is electrically connected to the other side of the source or drain of the transistor 750 via conductors 351, 341, 331, 313, and 301b. The conductor 772 is formed on the insulator 363 and functions as a pixel electrode.

[0202] The conductor 772 can be made of a material that is transparent to visible light or a material that is reflective to visible light. As a transparent material, for example, an oxide material containing indium, zinc, tin, etc., may be used. As a reflective material, for example, a material containing aluminum, silver, etc., may be used.

[0203] Although not shown in Figure 15, the display device 10 may be equipped with optical components (optical substrates) such as polarizing members, phase difference members, and anti-reflective members.

[0204] On the substrate 705 side, a light-shielding layer 738 and an insulator 734 in contact with them are provided. The light-shielding layer 738 has the function of blocking light emitted from adjacent areas. Alternatively, the light-shielding layer 738 has the function of preventing ambient light from reaching the transistor 750, etc.

[0205] In the display device 10 shown in Figure 15, an insulator 730 is provided on an insulator 363. Here, the insulator 730 can be configured to cover a portion of the conductor 772. The light-emitting element 70 has a light-transmitting conductor 788 and can be a top-emission type light-emitting element. The light-emitting element 70 may have a bottom-emission structure that emits light towards the conductor 772, or a dual-emission structure that emits light towards both the conductor 772 and the conductor 788.

[0206] The light-shielding layer 738 is provided so as to have an overlapping region with the insulator 730. The light-shielding layer 738 is covered with the insulator 734. The space between the light-emitting element 70 and the insulator 734 is filled with a sealing layer 732.

[0207] Furthermore, the structure 778 is provided between the insulator 730 and the EL layer 786. Also, the structure 778 is provided between the insulator 730 and the insulator 734.

[0208] Figure 16 is a cross-sectional view including the Si transistors of the drive circuit 40 in layer 20, the OS transistors of the pixel circuit 62 in layer 30, the Si transistors of the functional circuit 50 in layer 20, and the OS transistors of the backup circuit 82 in layer 30. The explanation of the cross-sectional view shown in Figure 16 is the same as that of the configurations in the cross-sectional view shown in Figure 15.

[0209] As shown in Figure 16, layer 20 can be provided with the Si transistor 91 of the drive circuit 40 and the Si transistor 94 of the functional circuit 50. Also as shown in Figure 16, layer 30 can be provided with the OS transistor 92 and capacitor 93 of the pixel circuit 62, and the OS transistor 95 and capacitor 96 of the backup circuit 82. Furthermore, a light-emitting element 70 can be provided on the upper layer of layer 30.

[0210] A modified version of the display device 10 shown in Figure 15 is shown in Figure 17. The display device 10 shown in Figure 17 differs from the display device 10 shown in Figure 15 in that it has a colored layer 736. The colored layer 736 is provided so as to have an area that overlaps with the light-emitting element 70. By providing the colored layer 736, the color purity of the light extracted from the light-emitting element 70 can be increased. As a result, the display device 10 can display high-resolution images. Furthermore, since, for example, all of the light-emitting elements 70 of the display device 10 can be made to emit white light, it is not necessary to form the EL layer 786 by painting different colors, and the display device 10 can be made high-resolution.

[0211] The light-emitting element 70 can have a microcavity structure. This allows light of a predetermined color (e.g., RGB) to be extracted without the need for a colored layer, enabling the display device 10 to display in color. By omitting the colored layer, light absorption by the colored layer can be suppressed. This allows the display device 10 to display high-brightness images and reduce the power consumption of the display device 10. Furthermore, even when the EL layer 786 is formed in island-like patterns for each pixel or in striped patterns for each row of pixels, i.e., by color separation, a configuration without a colored layer can be used. The brightness of the display device 10 can be, for example, 500 cd / m². 2 Preferably 1000 cd / m² 2 More than 10000cd / m 2 More preferably, 2000 cd / m² 2 More than 5000cd / m 2 The following is possible:

[0212] Figures 15 and 17 show a configuration in which transistors 441 and 601 are arranged inside a substrate 701 such that a channel formation region is formed, and OS transistors are stacked on top of transistors 441 and 601 to form an OS transistor. However, the present invention is not limited to this configuration. A modified example of Figure 17 is shown in Figure 18. The main difference between the display device 10 shown in Figure 18 and the display device 10 shown in Figure 17 is that it has OS transistors, transistors 602 and 603, instead of transistors 441 and 601. In addition, transistor 750 can be an OS transistor. In other words, the display device 10 shown in Figure 18 has OS transistors stacked on top of each other.

[0213] Insulators 613 and 614 are provided on the substrate 701, and transistors 602 and 603 are provided on the insulator 614. Note that transistors or the like may be provided between the substrate 701 and the insulator 613. For example, a transistor with the same configuration as transistors 441 and 601 shown in Figure 17 may be provided between the substrate 701 and the insulator 613.

[0214] Transistors 602 and 603 can be transistors provided in layer 20 as shown in Embodiment 2.

[0215] Transistors 602 and 603 can be transistors with the same configuration as transistor 750. Alternatively, transistors 602 and 603 may be OS transistors with a different configuration than transistor 750.

[0216] In addition to transistors 602 and 603, insulators 616, 622, 624, 654, 680, 674, and 681 are provided on insulator 614. Conductors 461 are embedded in insulators 654, 680, 674, and 681. Here, the height of the upper surface of conductor 461 and the height of the upper surface of insulator 681 can be made to be approximately the same.

[0217] An insulator 501 is provided on the conductor 461 and on the insulator 681. The conductor 463 is embedded in the insulator 501. Here, the height of the upper surface of the conductor 463 and the height of the upper surface of the insulator 501 can be made to be approximately the same.

[0218] Insulators 421 and 214 are provided on the conductor 463 and the insulator 501, respectively. Conductor 453 is embedded in insulator 421 and insulator 214. Here, the height of the upper surface of conductor 453 and the height of the upper surface of insulator 214 can be made to be approximately the same.

[0219] As shown in Figure 18, either the source or drain of transistor 602 is electrically connected to FPC 716 via conductors 461, 463, 453, 455, 305, 317, 337, 347, 353, 355, 357, connecting electrode 760, and anisotropic conductor 780.

[0220] Insulators 613, 614, 680, 674, 681, and 501 may function as interlayer films and as planarizing films that cover the uneven shapes beneath them.

[0221] By configuring the display device 10 as shown in Figure 18, the display device 10 can be made smaller and have a narrower bezel, while all of its transistors can be OS transistors. This allows, for example, the transistors provided in layer 20 and layer 30, as shown in Embodiment 2, to be manufactured using the same apparatus. Therefore, the manufacturing cost of the display device 10 can be reduced, making the display device 10 a low-cost product.

[0222] Figure 19 is a cross-sectional view showing an example configuration of the display device 10. It differs from the display device 10 shown in Figure 17 in that it has a layer with transistor 800 between the layer with transistor 750 and the layer with transistors 601 and 441.

[0223] In the configuration shown in Figure 19, the layer 20 shown in Embodiment 2 can be composed of a layer having transistors 601 and 441, and a layer having transistor 800. Transistor 750 can be the transistor provided in layer 30 shown in Embodiment 2.

[0224] Insulators 821 and 814 are provided on the conductor 451 and the insulator 411, respectively. The conductor 853 is embedded in insulator 821 and insulator 814. Here, the height of the upper surface of the conductor 853 and the height of the upper surface of the insulator 814 can be made to be approximately the same.

[0225] An insulator 816 is provided on the conductor 853 and on the insulator 814. The conductor 855 is embedded in the insulator 816. Here, the height of the upper surface of the conductor 855 and the height of the upper surface of the insulator 816 can be made to be approximately the same.

[0226] Insulators 822, 824, 854, 880, 874, and 881 are provided on the conductor 855 and on the insulator 816. Conductors 805 are embedded in insulators 822, 824, 854, 880, 874, and 881. Here, the height of the upper surface of the conductor 805 and the height of the upper surface of the insulator 881 can be made to be approximately the same.

[0227] Insulators 421 and 214 are provided on the conductor 817 and on the insulator 881, respectively.

[0228] As shown in Figure 19, the low-resistance region 449b, which functions as either the source region or the drain region of transistor 441, is electrically connected to the FPC 716 via conductors 451, 853, 855, 805, 817, 453, 455, 305, 317, 337, 347, 353, 355, 357, connecting electrode 760, and anisotropic conductor 780.

[0229] A transistor 800 is provided on the insulator 814. The transistor 800 can be the transistor provided on layer 20 as shown in Embodiment 2. It is preferable that the transistor 800 is an OS transistor. For example, the transistor 800 can be the transistor provided in the backup circuit 82.

[0230] Conductors 801a and 801b are embedded in insulators 854, 880, 874, and 881, respectively. Conductor 801a is electrically connected to either the source or drain of transistor 800, and conductor 801b is electrically connected to the other source or drain of transistor 800. Here, the height of the upper surfaces of conductors 801a and 801b can be made to be approximately the same as the height of the upper surface of insulator 881.

[0231] The transistor 750 can be a transistor provided in layer 30 as shown in Embodiment 2. For example, the transistor 750 can be a transistor provided in pixel circuit 62. It is preferable that the transistor 750 is an OS transistor.

[0232] Insulators 405, 407, 409, 411, 821, 814, 880, 874, 881, 421, 214, 280, 274, 281, 361, and 363 may function as interlayer films and as flattening films that cover the uneven shapes beneath them.

[0233] Figure 19 shows an example in which conductors 801a, 801b, and 805 are formed in the same layer. It also shows an example in which conductors 811, 813, and 817 are formed in the same layer.

[0234] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0235] (Embodiment 5) This embodiment describes a transistor that can be used in a display device according to one aspect of the present invention.

[0236] <Example of transistor configuration> Figures 20A, 20B, and 20C are a top view and a cross-sectional view of transistor 200A and its surroundings, which can be used in a display device according to one embodiment of the present invention. Transistor 200A can be applied to a display device according to one embodiment of the present invention.

[0237] Figure 20A is a top view of transistor 200A. Figures 20B and 20C are cross-sectional views of transistor 200A. Here, Figure 20B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 20A, and is also a cross-sectional view of transistor 200A in the channel length direction. Similarly, Figure 20C is a cross-sectional view of the area indicated by the dashed line A3-A4 in Figure 20A, and is also a cross-sectional view of transistor 200A in the channel width direction. Note that in the top view of Figure 20A, some elements have been omitted for clarity.

[0238] As shown in Figure 20B, etc., the transistor 200A has a metal oxide 230a disposed on a substrate (not shown), a metal oxide 230b disposed on the metal oxide 230a, conductors 242a and 242b disposed on the metal oxide 230b at a distance from each other, an insulator 280 disposed on the conductors 242a and 242b with an opening formed between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed between the metal oxide 230b, conductor 242a, conductor 242b, insulator 280, and conductor 260, and a metal oxide 230c disposed between the metal oxide 230b, conductor 242a, conductor 242b, insulator 280, and insulator 250. Here, as shown in Figures 20B and 20C, it is preferable that the upper surface of the conductor 260 substantially coincides with the upper surfaces of the insulators 250, 254, metal oxide 230c, and 280. In the following, metal oxides 230a, 230b, and 230c may be collectively referred to as metal oxide 230. Also, conductors 242a and 242b may be collectively referred to as conductor 242.

[0239] In the transistor 200A shown in Figure 20B, the sides of the conductors 242a and 242b facing the conductor 260 have a generally vertical shape. However, the transistor 200A shown in Figure 20B is not limited to this, and the angle between the side and bottom surfaces of the conductors 242a and 242b may be 10° to 80°, preferably 30° to 60°. Furthermore, the opposing sides of the conductors 242a and 242b may have multiple surfaces.

[0240] As shown in Figure 20B and the like, it is preferable that an insulator 254 is placed between the insulator 224, metal oxide 230a, metal oxide 230b, conductor 242a, conductor 242b, and metal oxide 230c and the insulator 280. Here, it is preferable that the insulator 254 is in contact with the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and metal oxide 230b, and the top surface of the insulator 224, as shown in Figures 20B and 20C.

[0241] In transistor 200A, a configuration is shown in which three layers of metal oxide 230a, metal oxide 230b, and metal oxide 230c are stacked in the region where the channel is formed (hereinafter also referred to as the channel formation region) and in its vicinity. However, the present invention is not limited to this. For example, a two-layer structure of metal oxide 230b and metal oxide 230c, or a stacked structure of four or more layers, may be provided. Also, in transistor 200A, the conductor 260 is shown as a two-layer stacked structure. However, the present invention is not limited to this. For example, the conductor 260 may be a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxides 230a, 230b, and 230c may have a stacked structure of two or more layers.

[0242] For example, if the metal oxide 230c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has the same composition as metal oxide 230b and the second metal oxide has the same composition as metal oxide 230a.

[0243] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source electrode or drain electrode, respectively. As described above, the conductor 260 is formed to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. In other words, in transistor 200A, the gate electrode can be positioned in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 260 can be formed without providing a positional margin, the occupied area of ​​transistor 200A can be reduced. This makes it possible to make the display device high-resolution. It also makes it possible to make the display device narrow-bezel.

[0244] As shown in Figure 20B and other figures, it is preferable that the conductor 260 has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0245] The transistor 200A preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on top of the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on top of the insulator 216 and the conductor 205, and an insulator 224 disposed on top of the insulator 222. It is preferable that a metal oxide 230a is disposed on top of the insulator 224.

[0246] It is preferable that insulators 274 and 281, which function as interlayer films, be placed on top of the transistor 200A. Here, it is preferable that insulator 274 is placed in contact with the upper surfaces of the conductor 260, insulator 250, insulator 254, metal oxide 230c, and insulator 280.

[0247] The insulator 222, the insulator 254, and the insulator 274 preferably have a function of suppressing the diffusion of at least one of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). For example, the insulator 222, the insulator 254, and the insulator 274 preferably have lower hydrogen permeability than the insulator 224, the insulator 250, and the insulator 280. Further, the insulator 222 and the insulator 254 preferably have a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, the insulator 222 and the insulator 254 preferably have lower oxygen permeability than the insulator 224, the insulator 250, and the insulator 280.

[0248] Here, the insulator 224, the metal oxide 230, and the insulator 250 are separated from the insulator 280 and the insulator 281 by the insulator 254 and the insulator 274. Therefore, it is possible to suppress impurities such as hydrogen contained in the insulator 280 and the insulator 281 or excessive oxygen from mixing into the insulator 224, the metal oxide 230a, the metal oxide 230b, and the insulator 250.

[0249] It is preferable to provide a conductor 240 (conductor 240a and conductor 240b) that is electrically connected to the transistor 200A and functions as a plug. An insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 that functions as a plug. That is, the insulator 241 is provided in contact with the inner walls of the openings of the insulator 254, the insulator 280, the insulator 274, and the insulator 281. Further, a first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 240 may be provided further inside. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 can be made approximately the same. In the transistor 200A, a configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are laminated is shown, but the present invention is not limited thereto. For example, the conductor 240 may be provided in a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, ordinal numbers may be assigned in the order of formation for distinction.

[0250] For the transistor 200A, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as an oxide semiconductor for the metal oxide 230 (metal oxides 230a, 230b, and 230c) including the channel formation region. For example, as the metal oxide serving as the channel formation region of the metal oxide 230, it is preferable to use one having a band gap of 2 eV or more, preferably 2.5 eV or more.

[0251] The above metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it preferably contains indium (In) and zinc (Zn). In addition to these, it is preferable that the element M is contained. As the element M, one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co) can be used. In particular, the element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Further, it is more preferable that the element M has either or both of Ga and Sn.

[0252] Also, as shown in FIG. 20B, the film thickness of the region where the metal oxide 230b does not overlap with the conductor 242 may be thinner than the film thickness of the region where the metal oxide 230b overlaps with the conductor 242. This is formed by removing a part of the upper surface of the metal oxide 230b when forming the conductors 242a and 242b. When a conductive film serving as the conductor 242 is formed on the upper surface of the metal oxide 230b, a region with low resistance may be formed in the vicinity of the interface with the conductive film. Thus, by removing the region with low resistance located between the conductors 242a and 242b on the upper surface of the metal oxide 230b, it is possible to prevent a channel from being formed in the region.

[0253] According to one aspect of the present invention, a display device with a small size transistor and high resolution can be provided. Alternatively, a display device with a large on-current transistor and high brightness can be provided. Alternatively, a display device with a fast-operating transistor and fast operation can be provided. Alternatively, a display device with a stable electrical characteristic transistor and high reliability can be provided. Alternatively, a display device with a small off-current transistor and low power consumption can be provided.

[0254] A detailed configuration of transistor 200A, which can be used in a display device according to one aspect of the present invention, will be described.

[0255] The conductor 205 is arranged so as to have an overlapping region with the metal oxide 230 and the conductor 260. Furthermore, it is preferable that the conductor 205 is embedded in the insulator 216.

[0256] The conductor 205 comprises conductor 205a, conductor 205b, and conductor 205c. Conductor 205a is provided in contact with the bottom surface and side wall of an opening provided in the insulator 216. Conductor 205b is provided so as to be embedded in a recess formed in conductor 205a. Here, the upper surface of conductor 205b is lower than the upper surface of conductor 205a and the upper surface of the insulator 216. Conductor 205c is provided in contact with the upper surface of conductor 205b and the side surface of conductor 205a. Here, the height of the upper surface of conductor 205c is approximately equal to the height of the upper surface of conductor 205a and the upper surface of the insulator 216. In other words, conductor 205b is enclosed by conductors 205a and 205c.

[0257] It is preferable to use conductive materials for conductors 205a and 205c that have the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use conductive materials that have the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0258] By using conductive materials that have the function of reducing hydrogen diffusion for conductors 205a and 205c, it is possible to suppress the diffusion of impurities such as hydrogen contained in conductor 205b into the metal oxide 230 via the insulator 224, etc. Furthermore, by using conductive materials that have the function of suppressing oxygen diffusion for conductors 205a and 205c, it is possible to suppress the oxidation of conductor 205b and the resulting decrease in conductivity. As conductive materials that have the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, the conductive material can be used as a single layer or in a laminate for conductor 205a. For example, titanium nitride can be used for conductor 205a.

[0259] Furthermore, it is preferable to use a conductive material whose main component is tungsten, copper, or aluminum for the conductor 205b. For example, tungsten may be used for the conductor 205b.

[0260] Here, conductor 260 may function as the first gate (also called the top gate) electrode. Also, conductor 205 may function as the second gate (also called the bottom gate) electrode. In that case, by changing the potential applied to conductor 205 independently of the potential applied to conductor 260, the V of transistor 200A can be controlled. th This can be controlled. In particular, by applying a negative potential to the conductor 205, the V of transistor 200A can be controlled. th By making the voltage greater than 0V, it becomes possible to reduce the off-current. Therefore, applying a negative potential to the conductor 205 reduces the drain current when the potential applied to the conductor 260 is 0V compared to not applying a negative potential.

[0261] The conductor 205 should be larger than the channel-forming region in the metal oxide 230. In particular, as shown in Figure 20C, it is preferable that the conductor 205 extends to the region outside the end that intersects the channel width direction of the metal oxide 230. That is, it is preferable that the conductor 205 and the conductor 260 are superimposed on the outside of the side surface in the channel width direction of the metal oxide 230, with an insulator in between.

[0262] With the above configuration, the channel-forming region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260, which functions as the first gate electrode, and the electric field of the conductor 205, which functions as the second gate electrode.

[0263] As shown in Figure 20C, the conductor 205 is extended to function as wiring. However, the configuration is not limited to this, and a conductor that functions as wiring may be provided beneath the conductor 205.

[0264] The insulator 214 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen from the substrate side into the transistor 200A. Therefore, it is preferable to use an insulating material for the insulator 214 that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (i.e., the above impurities are less permeable). Alternatively, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules) (i.e., the above oxygen is less permeable).

[0265] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 214. This suppresses the diffusion of impurities such as water or hydrogen from the substrate side to the transistor 200A side beyond the insulator 214. Alternatively, it suppresses the diffusion of oxygen contained in the insulator 224, etc., to the substrate side beyond the insulator 214.

[0266] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than insulator 214. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wiring can be reduced. For example, silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or porous silicon oxide may be used as insulators 216, 280, and 281.

[0267] Insulators 222 and 224 function as gate insulators.

[0268] Here, it is preferable that the insulator 224 in contact with the metal oxide 230 desorbs oxygen upon heating. In this specification, the oxygen that is desorbed upon heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be silicon oxide or silicon oxide nitride, etc., as appropriate. By providing an oxygen-containing insulator in contact with the metal oxide 230, the oxygen deficiency in the metal oxide 230 can be reduced, and the reliability of the transistor 200A can be improved.

[0269] Specifically, it is preferable to use an oxide material in which some oxygen is desorbed upon heating as the insulator 224. An oxide that desorbs oxygen upon heating is one in which the amount of oxygen desorbed, converted to oxygen atoms, is 1.0 × 10¹⁶ as determined by TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 Preferably 1.0 × 10 19 atoms / cm 3 More preferably 2.0 × 10 19 atoms / cm 3 Above, or 3.0 × 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C to 700°C, or 100°C to 400°C.

[0270] As shown in FIG. 20C, the thickness of the insulator 224 in the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b may be thinner than the thickness of the other regions. In the insulator 224, it is preferable that the thickness of the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b is a thickness that allows sufficient diffusion of the above oxygen.

[0271] Similar to the insulator 214 and the like, the insulator 222 preferably functions as a barrier insulating film that suppresses the entry of impurities such as water or hydrogen from the substrate side into the transistor 200A. For example, it is preferable that the insulator 222 has lower hydrogen permeability than the insulator 224. By the insulator 222, the insulator 254, and the insulator 274 surrounding the insulator 224, the metal oxide 230, the insulator 250, and the like, it is possible to suppress the entry of impurities such as water or hydrogen from the outside into the transistor 200A.

[0272] Furthermore, it is preferable that the insulator 222 has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (it is difficult for the above oxygen to permeate). For example, it is preferable that the insulator 222 has lower oxygen permeability than the insulator 224. Since the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, it is possible to reduce the diffusion of the oxygen possessed by the metal oxide 230 to the substrate side, which is preferable. In addition, it is possible to suppress the reaction of the conductor 205 with the oxygen possessed by the insulator 224 or the metal oxide 230.

[0273] The insulator 222 may be formed using an insulator containing one or both of aluminum oxide and hafnium oxide, which are insulating materials. As the insulator containing one or both of aluminum oxide and hafnium oxide, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the metal oxide 230 or the entry of impurities such as hydrogen from the peripheral portion of the transistor 200A into the metal oxide 230.

[0274] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be subjected to nitriding treatment. Silicon oxide, silicon oxide nitride, or silicon nitride may be laminated onto the above insulators.

[0275] The insulator 222 may be a single-layer or multi-layer insulator containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulator, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0276] Furthermore, the insulators 222 and 224 may have a laminated structure of two or more layers. In that case, the laminated structure is not limited to being made of the same material, but may be made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0277] The metal oxide 230 comprises a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. By having the metal oxide 230a below the metal oxide 230b, the diffusion of impurities from structures formed below the metal oxide 230a to the metal oxide 230b can be suppressed. Furthermore, by having the metal oxide 230c on the metal oxide 230b, the diffusion of impurities from structures formed above the metal oxide 230c to the metal oxide 230b can be suppressed.

[0278] Furthermore, it is preferable that the metal oxide 230 has a layered structure of multiple oxide layers with different atomic ratios of each metal atom. For example, if the metal oxide 230 contains at least indium (In) and element M, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 230a to the total number of atoms of all elements constituting metal oxide 230a is higher than the ratio of the number of atoms of element M contained in metal oxide 230b to the total number of atoms of all elements constituting metal oxide 230b. It is also preferable that the atomic ratio of element M contained in metal oxide 230a to In is higher than the atomic ratio of element M contained in metal oxide 230b to In. Here, metal oxide 230c can be any metal oxide that can be used in metal oxide 230a or metal oxide 230b.

[0279] It is preferable that the energy at the lower end of the conduction band of metal oxide 230a and metal oxide 230c is higher than the energy at the lower end of the conduction band of metal oxide 230b. In other words, it is preferable that the electron affinity of metal oxide 230a and metal oxide 230c is smaller than the electron affinity of metal oxide 230b. In this case, it is preferable that metal oxide 230c is a metal oxide that can be used for metal oxide 230a. Specifically, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 230c to the total number of atoms of all elements constituting metal oxide 230c is higher than the ratio of the number of atoms of element M contained in metal oxide 230b to the total number of atoms of all elements constituting metal oxide 230b. It is also preferable that the atomic ratio of element M contained in metal oxide 230c to In is higher than the atomic ratio of element M contained in metal oxide 230b to In.

[0280] Here, at the junctions of metal oxide 230a, metal oxide 230b, and metal oxide 230c, the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junctions of metal oxide 230a, metal oxide 230b, and metal oxide 230c can be said to change continuously or be continuously joined. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between metal oxide 230a and metal oxide 230b, and at the interface between metal oxide 230b and metal oxide 230c.

[0281] Specifically, a mixed layer with a low defect level density can be formed by having metal oxide 230a and metal oxide 230b, and metal oxide 230b and metal oxide 230c, all having a common element other than oxygen (which serves as the main component). For example, if metal oxide 230b is In-Ga-Zn oxide, then In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc., may be used as metal oxide 230a and metal oxide 230c. Furthermore, metal oxide 230c may be in a layered structure. For example, a layered structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a layered structure of In-Ga-Zn oxide and an oxide that does not contain In may be used as metal oxide 230c.

[0282] Specifically, for metal oxide 230a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. For metal oxide 230b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2 may be used. For metal oxide 230c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, In:Ga:Zn = 4:2:3, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Furthermore, specific examples of layered structures for metal oxide 230c include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0283] In this case, the main carrier pathway is metal oxide 230b. By configuring metal oxide 230a and metal oxide 230c as described above, the defect level density at the interface between metal oxide 230a and metal oxide 230b, and at the interface between metal oxide 230b and metal oxide 230c, can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and transistor 200A can obtain high on-current and high frequency characteristics. Furthermore, if metal oxide 230c is in a multilayer structure, in addition to the effect of reducing the defect level density at the interface between metal oxide 230b and metal oxide 230c as described above, it is expected that the diffusion of constituent elements of metal oxide 230c to the insulator 250 side will be suppressed. More specifically, by making metal oxide 230c in a multilayer structure and positioning an oxide that does not contain In on top of the multilayer structure, it is possible to suppress In that could diffuse to the insulator 250 side. Since insulator 250 functions as a gate insulator, if In diffuses, it will result in poor transistor characteristics. Therefore, by using a layered structure for the metal oxide 230c, it becomes possible to provide a highly reliable display device.

[0284] A conductor 242 (conductor 242a and conductor 242b) that functions as a source electrode and a drain electrode is provided on the metal oxide 230b. It is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum as the conductor 242, or an alloy containing the above metal elements, or an alloy combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0285] By providing the conductor 242 in contact with the metal oxide 230, the oxygen concentration in the vicinity of the conductor 242 in the metal oxide 230 may be reduced. In addition, a metal compound layer containing the metal in the conductor 242 and the components of the metal oxide 230 may be formed in the vicinity of the conductor 242 in the metal oxide 230. In such a case, the carrier density increases in the region of the metal oxide 230 near the conductor 242, and this region becomes a low-resistance region.

[0286] Here, the region between the conductor 242a and the conductor 242b is formed by superimposing it on the opening of the insulator 280. This allows the conductor 260 to be positioned self-aligned between the conductor 242a and the conductor 242b.

[0287] The insulator 250 functions as a gate insulator. It is preferable that the insulator 250 be placed in contact with the upper surface of the metal oxide 230c. The insulator 250 can be silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or silicon oxide with vacancies. In particular, silicon oxide and silicon oxide nitride are preferred because they are stable with respect to heat.

[0288] Similar to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 250 is reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0289] A metal oxide may be provided between the insulator 250 and the conductor 260. It is preferable that the metal oxide suppresses oxygen diffusion from the insulator 250 to the conductor 260. This suppresses the oxidation of the conductor 260 by oxygen from the insulator 250.

[0290] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, etc. are used for the insulator 250, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By making the gate insulator a laminated structure of insulator 250 and the metal oxide, a laminated structure that is stable against heat and has a high dielectric constant can be made. Therefore, it becomes possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it becomes possible to thin the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator.

[0291] Specifically, metal oxides containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used. In particular, it is preferable to use insulators containing oxides of aluminum, hafnium, or both, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0292] Although the conductor 260 is shown as a two-layer structure in Figure 20B, etc., it may also be a single-layer structure or a laminated structure of three or more layers.

[0293] It is preferable to use a conductor 260a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0294] The conductor 260a has the function of suppressing oxygen diffusion, thereby preventing the conductor 260b from oxidizing due to oxygen contained in the insulator 250 and reducing its conductivity. It is preferable to use a conductive material that has the function of suppressing oxygen diffusion, such as tantalum, tantalum nitride, ruthenium, or ruthenium oxide.

[0295] The conductor 260b is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, since the conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. The conductor 260b may also have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0296] As shown in Figures 20A and 20C, in the region of the metal oxide 230b that does not overlap with the conductor 242, in other words, in the channel-forming region of the metal oxide 230, the side surface of the metal oxide 230 is covered by the conductor 260. This makes it easier to apply the electric field of the conductor 260, which functions as the first gate electrode, to the side surface of the metal oxide 230. Therefore, the on-current of transistor 200A can be increased and the frequency characteristics can be improved.

[0297] The insulator 254, like the insulator 214, preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 200A from the insulator 280 side. For example, it is preferable that the insulator 254 has lower hydrogen permeability than the insulator 224. Furthermore, as shown in Figures 20B and 20C, it is preferable that the insulator 254 is in contact with the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and metal oxide 230b, and the top surface of the insulator 224. With this configuration, it is possible to suppress the ingress of hydrogen contained in the insulator 280 into the metal oxide 230 from the top or side surfaces of the conductor 242a, conductor 242b, metal oxide 230a, metal oxide 230b, and the insulator 224.

[0298] Furthermore, it is preferable that the insulator 254 has the function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule) (i.e., it is difficult for the above-mentioned oxygen to permeate through it). For example, it is preferable that the insulator 254 has lower oxygen permeability than the insulator 280 or the insulator 224.

[0299] The insulator 254 is preferably deposited using a sputtering method. By depositing the insulator 254 using a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the vicinity of the region of the insulator 224 that is in contact with the insulator 254. This allows oxygen to be supplied from this region to the metal oxide 230 via the insulator 224. Here, the insulator 254 has a function to suppress upward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 230 to the insulator 280. In addition, the insulator 222 has a function to suppress downward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 230 to the substrate side. In this way, oxygen is supplied to the channel formation region of the metal oxide 230. This reduces oxygen deficiency in the metal oxide 230 and suppresses normally-on formation of the transistor.

[0300] As the insulator 254, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as a film. It is preferable to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) as the insulator containing an oxide of one or both of aluminum and hafnium.

[0301] The insulator 224, insulator 250, and metal oxide 230 are covered by the hydrogen barrier insulator 254, so the insulator 280 is separated from the insulator 224, metal oxide 230, and insulator 250 by the insulator 254. This prevents impurities such as hydrogen from entering the transistor 200A from the outside, thus providing the transistor 200A with good electrical characteristics and reliability.

[0302] The insulator 280 is provided on the insulator 224, the metal oxide 230, and the conductor 242 via the insulator 254. For example, the insulator 280 is preferably silicon oxide, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are particularly preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0303] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. Furthermore, the upper surface of the insulator 280 may be flattened.

[0304] The insulator 274 preferably functions as a barrier insulating film that suppresses the incorporation of impurities such as water or hydrogen into the insulator 280 from above, similar to the insulator 214. For example, the insulator 274 can be an insulator that can be used for the insulator 214, insulator 254, etc.

[0305] It is preferable to provide an insulator 281, which functions as an interlayer film, on top of the insulator 274. It is preferable that the insulator 281, like the insulator 224, has a reduced concentration of impurities such as water or hydrogen in the film.

[0306] Conductors 240a and 240b are placed in the openings formed in insulators 281, 274, 280, and 254. Conductors 240a and 240b are provided facing each other with conductor 260 in between. The height of the upper surfaces of conductors 240a and 240b may be on the same plane as the upper surface of insulator 281.

[0307] Furthermore, an insulator 241a is provided in contact with the inner wall of the opening of insulators 281, 274, 280, and 254, and a first conductive portion of conductor 240a is formed in contact with its side surface. Conductor 242a is located in at least a portion of the bottom of the opening, and conductor 240a is in contact with conductor 242a. Similarly, an insulator 241b is provided in contact with the inner wall of the opening of insulators 281, 274, 280, and 254, and a first conductive portion of conductor 240b is formed in contact with its side surface. Conductor 242b is located in at least a portion of the bottom of the opening, and conductor 240b is in contact with conductor 242b.

[0308] It is preferable that the conductors 240a and 240b are made of conductive materials mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors 240a and 240b may be arranged in a laminated structure.

[0309] When the conductor 240 has a laminated structure, it is preferable to use a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen, as described above, for the conductors that come into contact with the metal oxide 230a, metal oxide 230b, conductor 242, insulator 254, insulator 280, insulator 274, and insulator 281. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a laminate. By using this conductive material, it is possible to suppress the absorption of oxygen added to the insulator 280 by the conductors 240a and 240b. In addition, it is possible to suppress the mixing of impurities such as water or hydrogen from the layer above the insulator 281 into the metal oxide 230 through the conductors 240a and 240b.

[0310] For insulators 241a and 241b, any insulator that can be used for insulator 254, for example, may be used. Since insulators 241a and 241b are provided in contact with insulator 254, it is possible to suppress the mixing of impurities such as water or hydrogen from insulator 280, etc., into the metal oxide 230 through conductors 240a and 240b. Furthermore, it is possible to suppress the absorption of oxygen contained in insulator 280 into conductors 240a and 240b.

[0311] Although not shown in the figures, conductors that function as wiring may be placed in contact with the upper surfaces of conductor 240a and conductor 240b. It is preferable that the conductors functioning as wiring are made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors may have a laminated structure; for example, they may be laminates of titanium or titanium nitride with the conductive material. The conductors may also be formed to be embedded in openings provided in the insulator.

[0312] <Materials used in transistors> This section describes the constituent materials that can be used in transistors.

[0313] [substrate] As the substrate for forming transistor 200A, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include silicon, germanium, and other semiconductor substrates, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Furthermore, there are semiconductor substrates having insulating regions within the aforementioned semiconductor substrates, such as SOI (Silicon On Insulator) substrates. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Alternatively, there are substrates having metal nitrides, substrates having metal oxides, etc. Furthermore, there are substrates on which a conductor or semiconductor is provided on an insulating substrate, substrates on which a conductor or insulator is provided on a semiconductor substrate, and substrates on which a semiconductor or insulator is provided on a conductive substrate. Alternatively, substrates on which elements are provided may be used. Elements provided on a substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, and memory elements.

[0314] [Insulator] Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, metal oxides, metal oxidized nitrides, and metal nitride oxides.

[0315] For example, as transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material for the insulator that functions as the gate insulator, it is possible to lower the voltage during transistor operation while maintaining the physical film thickness. On the other hand, by using a material with a low dielectric constant for the insulator that functions as the interlayer film, parasitic capacitance between wiring can be reduced. Therefore, it is best to select the material according to the function of the insulator.

[0316] Examples of insulators with high dielectric constants include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxide nitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxide nitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0317] Examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with voids, or resins.

[0318] Transistors using oxide semiconductors can have their electrical characteristics stabilized by surrounding them with an insulator (insulator 214, insulator 222, insulator 254, and insulator 274, etc.) that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a multilayer structure. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, metal nitrides such as aluminum nitride, titanium aluminum nitride, titanium nitride, silicon oxide nitride, or silicon nitride can be used.

[0319] The insulator that functions as a gate insulator is preferably an insulator having a region containing oxygen that is desorbed by heating. For example, by having a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is desorbed by heating is in contact with the metal oxide 230, the oxygen deficiency of the metal oxide 230 can be compensated for.

[0320] [conductor] It is preferable to use a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metallic elements, or an alloy combining the above metallic elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Alternatively, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like phosphorus, or silicides such as nickel silicide may be used.

[0321] Multiple conductors formed from the above materials may be used in a laminated structure. For example, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing oxygen. Alternatively, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing nitrogen. Furthermore, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing oxygen and a conductive material containing nitrogen.

[0322] Furthermore, when using a metal oxide for the channel formation region of a transistor, it is preferable to use a laminated structure for the conductor functioning as the gate electrode, which combines a material containing the aforementioned metal element with a conductive material containing oxygen. In this case, it is preferable to place the conductive material containing oxygen on the channel formation region side. By placing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is more easily supplied to the channel formation region.

[0323] In particular, it is preferable to use a conductive material containing metal elements and oxygen contained in the metal oxide in which the channel is formed as the conductor that functions as the gate electrode. Alternatively, conductive materials containing the aforementioned metal elements and nitrogen may be used. For example, conductive materials containing nitrogen such as titanium nitride and tantalum nitride may be used. In addition, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon-added indium tin oxide may be used. In addition, indium gallium zinc oxide containing nitrogen may be used. By using such materials, it may be possible to capture hydrogen contained in the metal oxide in which the channel is formed. Alternatively, it may be possible to capture hydrogen that is mixed in from an external insulator or the like.

[0324] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0325] (Embodiment 6) This embodiment describes metal oxides (hereinafter also referred to as oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0326] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 21A. Figure 21A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0327] As shown in Figure 21A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous semiconductors. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite). Note that single crystal, polycrystal, and completely amorphous semiconductors are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal semiconductors.

[0328] The structure within the thick frame shown in Figure 21A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as being completely different from the energetically unstable "Amorphous" and "Crystal" states.

[0329] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 21B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 21B will simply be referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 21B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 21B is 500 nm.

[0330] As shown in Figure 21B, the XRD spectrum of the CAAC-IGZO film shows a peak indicating clear crystallinity. In Figure 21B, the horizontal axis represents 2θ [deg.] and the vertical axis represents intensity [au]. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected near 2θ = 31°. As shown in Figure 21B, the peak near 2θ = 31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0331] The crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed using nano-beam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 21C. Figure 21C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 21C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. Furthermore, in nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0332] As shown in Figure 21C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0333] [Structure of oxide semiconductors] Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in Figure 21A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductors), amorphous oxide semiconductors, etc.

[0334] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0335] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0336] Each of the above-mentioned crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of that crystalline region will be less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0337] In In-M-Zn oxide (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. The In layer may also contain element M. The In layer may also contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM images.

[0338] When structural analysis of a CAAC-OS film is performed using, for example, an XRD instrument, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0339] For example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0340] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to the sparse arrangement of oxygen atoms in the ab-plane direction, or because the bond distance between atoms changes due to the substitution of metal atoms.

[0341] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more effectively than In oxide.

[0342] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0343] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0344] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0345] [Oxide semiconductor configuration] Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0346] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing the metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0347] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0348] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0349] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0350] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0351] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0352] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material, insulating function in part of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I) can be achieved. on This enables high field-effect mobility (μ) and good switching operation.

[0353] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0354] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0355] By using the above-mentioned oxide semiconductor in transistors, it is possible to realize transistors with high field-effect mobility. Furthermore, it is possible to realize highly reliable transistors.

[0356] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0357] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have a low defect level density, which may result in a low trap level density.

[0358] Charges trapped in the trap levels of oxide semiconductors can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high density of trap levels may exhibit unstable electrical properties.

[0359] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0360] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0361] In oxide semiconductors, the presence of silicon or carbon, which are elements of Group 14, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by SIMS) are calculated as 2 × 10⁻¹⁰. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0362] When alkali metals or alkaline earth metals are present in oxide semiconductors, they can form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0363] In oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. As a result, the electrical properties of the transistor may become unstable. For this reason, the nitrogen concentration in oxide semiconductors obtained by SIMS should be set to 5 × 10⁻¹⁰. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3Do the following:

[0364] Hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. When hydrogen fills these vacancies, electrons, which act as carriers, can be generated. Furthermore, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, in oxide semiconductors, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0365] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0366] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0367] (Embodiment 7) This embodiment describes an electronic device comprising a display device and a display system, which are aspects of the present invention.

[0368] Figure 22A shows the external appearance of the head-mounted display 8200.

[0369] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, a cable 8205, etc. The mounting section 8201 also has a built-in battery 8206.

[0370] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 8203 is equipped with a wireless receiver and can display images corresponding to received image data on display unit 8204. In addition, a camera provided on main unit 8203 captures the movement of the user's eyeballs or eyelids, and by calculating the coordinates of the user's gaze based on that information, the user's gaze can be used as an input means.

[0371] The attachment part 8201 may have multiple electrodes positioned to come into contact with the user. The main unit 8203 may have a function to recognize the user's gaze by detecting the current flowing through the electrodes in accordance with the user's eye movements. It may also have a function to monitor the user's pulse by detecting the current flowing through the electrodes. Furthermore, the attachment part 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function to display the user's biometric information on the display unit 8204. It may also detect the user's head movements and change the image displayed on the display unit 8204 in accordance with those movements.

[0372] A display device according to one embodiment of the present invention can be applied to the display unit 8204. This reduces the power consumption of the head-mounted display 8200, allowing it to be used continuously for a long period of time. Furthermore, by reducing the power consumption of the head-mounted display 8200, the battery 8206 can be made smaller and lighter, thus making the head-mounted display 8200 smaller and lighter. This reduces the burden on the user of the head-mounted display 8200, making it less likely for the user to experience fatigue.

[0373] Figures 22B, 22C, and 22D show the external appearance of the head-mounted display 8300. The head-mounted display 8300 comprises a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305. The housing 8301 also has a built-in battery 8306, which can supply power to the display unit 8302 and other components.

[0374] The user can view the display on the display unit 8302 through the lens 8305. It is preferable to position the display unit 8302 in a curved shape. By positioning the display unit 8302 in a curved shape, the user can experience a high degree of realism. In this embodiment, a configuration with one display unit 8302 has been illustrated, but the system is not limited to this, and for example, a configuration with two display units 8302 may be used. In this case, if one display unit is positioned for each eye of the user, it becomes possible to perform 3D display using parallax, etc.

[0375] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. This reduces the power consumption of the head-mounted display 8300, allowing it to be used continuously for a long period of time. In addition, by reducing the power consumption of the head-mounted display 8300, the battery 8306 can be made smaller and lighter, thus making the head-mounted display 8300 smaller and lighter. This reduces the burden on the user of the head-mounted display 8300, making it less likely for the user to feel fatigued.

[0376] Next, Figures 23A and 23B show the electronic equipment shown in Figures 22A to 22D, as well as an example of a different electronic equipment.

[0377] The electronic device shown in Figures 23A and 23B includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or operation switch), connection terminals 9006, sensors 9007 (including functions for measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation), and a battery 9009, etc.

[0378] The electronic devices shown in Figures 23A and 23B have various functions. For example, they may have functions to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing by various software (programs), a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to transmit or receive various data using the wireless communication function, a function to read programs or data recorded on a recording medium and display them on a display unit, etc. However, the functions that the electronic devices shown in Figures 23A and 23B may have are not limited to these, and they may have various functions. In addition, although not shown in Figures 23A and 23B, the electronic devices may have a configuration with multiple display units. Furthermore, the electronic devices may be equipped with a camera, etc., and have functions to capture still images, capture videos, save captured images to a recording medium (external or built into the camera), display captured images on a display unit, etc.

[0379] The details of the electronic equipment shown in Figures 23A and 23B will be explained below.

[0380] Figure 23A is a perspective view showing a personal digital information terminal (PDI) 9101. The PDI 9101 has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Specifically, it can be used as a smartphone. The PDI 9101 can also display text or images on multiple surfaces. For example, five operation buttons 9050 (also called operation icons or simply icons) can be displayed on one surface of the display unit 9001. Information 9051 can also be displayed on other surfaces of the display unit 9001. Examples of information 9051 include notifications of incoming emails, SNS (Social Networking Service) messages, or phone calls, the title of emails or SNS messages, the sender's name of emails or SNS messages, the date and time, the battery level, and the antenna signal strength. Alternatively, operation buttons 9050 or the like may be displayed in place of information 9051.

[0381] A display device according to one aspect of the present invention can be applied to the personal information terminal 9101. This reduces the power consumption of the personal information terminal 9101, allowing it to be used continuously for a long period of time. Furthermore, by reducing the power consumption of the personal information terminal 9101, the battery 9009 can be made smaller and lighter, thus making the personal information terminal 9101 smaller and lighter. This improves the portability of the personal information terminal 9101.

[0382] Figure 23B is a perspective view showing a wristwatch-type personal information terminal 9200. The personal information terminal 9200 can run various applications such as mobile phone calls, email, document viewing and creation, music playback, internet communication, and computer games. The display unit 9001 has a curved display surface, allowing it to display information along the curved surface. Figure 23B shows an example where the time 9251, operation buttons 9252 (also called operation icons or simply icons), and content 9253 are displayed on the display unit 9001. The content 9253 can be, for example, a video.

[0383] Furthermore, the personal information terminal 9200 is capable of performing standardized short-range wireless communication. For example, it can communicate with a wireless communication-enabled headset to make hands-free calls. The personal information terminal 9200 also has a connection terminal 9006, which allows it to directly exchange data with other information terminals via a connector. It can also be charged via the connection terminal 9006. However, charging may be performed by wireless power supply without using the connection terminal 9006.

[0384] A display device according to one aspect of the present invention can be applied to the personal information terminal 9200. This reduces the power consumption of the personal information terminal 9200, allowing it to be used continuously for a long period of time. Furthermore, by reducing the power consumption of the personal information terminal 9200, the battery 9009 can be made smaller and lighter, thus making the personal information terminal 9200 smaller and lighter. This improves the portability of the personal information terminal 9200.

[0385] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0386] <Notes regarding the description in this specification, etc.> The above embodiments and a description of each component in those embodiments are provided below.

[0387] The configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Furthermore, if multiple configuration examples are shown within a single embodiment, these configuration examples can be appropriately combined.

[0388] Furthermore, the content described in one embodiment (even if only a part of it) can be applied to, combined with, or substituted for other content described in the same embodiment (even if only a part of it), and / or content described in one or more other embodiments (even if only a part of it).

[0389] The content described in the embodiments refers to the content described using various figures or the content described using text in the specification in each embodiment.

[0390] Furthermore, a diagram (even a part of it) described in one embodiment can be combined with another part of that diagram, another diagram (even a part of it) described in that embodiment, and / or a diagram (even a part of it) described in one or more other embodiments to form even more diagrams.

[0391] Furthermore, in this specification, block diagrams classify components by function and show them as independent blocks. However, in actual circuits, it is difficult to separate components by function, and there may be cases where multiple functions are involved in a single circuit, or where a single function is involved across multiple circuits. Therefore, the blocks in the block diagrams are not limited to the components described in the specification, and can be appropriately rephrased depending on the situation.

[0392] Furthermore, in the drawings, the size, layer thickness, or area are shown at arbitrary sizes for the sake of explanation. Therefore, they are not necessarily limited to that scale. Also, the drawings are schematic for clarity and are not limited to the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0393] In this specification and other documents, when describing the connections of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. This is because the source and drain of a transistor vary depending on the transistor's structure or operating conditions. The terms source and drain of a transistor can be appropriately rephrased as source (drain) terminal or source (drain) electrode, depending on the context.

[0394] Furthermore, in this specification, terms such as "electrode" and "wiring" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, terms such as "electrode" and "wiring" also include cases where multiple "electrodes" and "wiring" are formed as a single unit.

[0395] Furthermore, in this specification, voltage and potential may be used interchangeably as appropriate. Voltage is the potential difference from a reference potential; for example, if the reference potential is the ground voltage (earth voltage), then voltage can be replaced with potential. Ground potential does not necessarily mean 0V. Note that potential is relative, and depending on the reference potential, it may change the potential applied to wiring, etc.

[0396] In this specification, terms such as "film" and "layer" may be interchanged depending on the context or situation. For example, the term "conductive layer" may be changed to "conductive film." Or, for example, the term "insulating film" may be changed to "insulating layer."

[0397] In this specification, a switch refers to a device that has the function of controlling whether or not to allow current to flow by being in a conductive state (on state) or a non-conductive state (off state). Alternatively, a switch refers to a device that has the function of selecting and switching the path through which current flows.

[0398] In this specification, channel length refers, for example, to the distance between the source and drain in the region where the semiconductor (or the part of the semiconductor through which current flows when the transistor is ON) and the gate overlap in a top view of a transistor, or in the region where the channel is formed.

[0399] In this specification, channel width refers to, for example, the length of the region where the semiconductor (or the part of the semiconductor through which current flows when the transistor is ON) and the gate electrode overlap, or the length of the portion where the source and drain face each other in the region where the channel is formed.

[0400] In this specification, "A and B are connected" includes not only those that are directly connected, but also those that are electrically connected. Here, "electrically connected" means that when there is an object between A and B that has some kind of electrical effect, it enables the exchange of electrical signals between A and B. [Explanation of Symbols]

[0401] 100: Display device, 100A: Display device, 100B: Display device, 102: Display device, 102A: Display device, 110: Display unit, 111: Housing, 112: Communication unit, 113: Band, 114: Control unit, 115: Camera unit, 116: Power supply unit, 118: Sensor unit, 119: Communication unit, 120: Display unit, 121: Housing, 122: Communication unit, 123: Mounting unit, 124: Control unit, 125: Camera unit, 126: Power supply unit, 128: Sensor unit, 129: Headphone unit, 130: User, 130L: Left hand, 130R: Right hand, 140: Image, 141: Image information

Claims

[Claim 1] A transistor having an oxide semiconductor in the channel formation region, The oxide semiconductor comprises In, Ga, and Zn. The oxide semiconductor has a plurality of crystalline regions, and the c-axis of the plurality of crystalline regions is oriented in a specific direction. The carrier concentration of the aforementioned oxide semiconductor is 1 × 10¹⁰ cm⁻¹. －３ It is less than 1 × 10⁻⁹ cm －３ That's all. The concentration of silicon or carbon in the oxide semiconductor is 2 × 10 １７ atoms / cm ３ The following: The concentration of alkali metal or alkaline earth metal in the oxide semiconductor is 2 × 10 １６ atoms / cm ３ The following: The nitrogen concentration in the oxide semiconductor is 5 × 10⁻⁶ １７ atoms / cm ３ The following: The hydrogen concentration in the oxide semiconductor is 1 × 10 １８ atoms / cm ３ or less, a transistor.

Images