Managing combinations and limitations of coding tools

Abstract

The present invention provides a method or apparatus for encoding or decoding, compressing or decompressing video. [Solution] A video coding tool that is controlled by including syntax in the video bitstream, thereby making more effective use of video decoding resources, wherein the encoder inserts syntax into the video bitstream, allowing the decoder to easily control which combinations of tools to enable, which combinations to deny, and which tools to activate for various components in a multi-component bitstream, resulting in potential parallelization of bitstream decoding.

Description

Technical Field

[0001] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding, compression or decompression.

Background Art

[0002] To achieve high compression efficiency, video and image coding schemes typically employ prediction, including motion vector prediction, and transform to exploit the spatial and temporal redundancy of video content. Generally, intra or inter prediction is used to exploit the correlation of intra frames or inter frames, and then the difference between the original image and the predicted image, often called the prediction error or prediction residue, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by inverse processes corresponding to entropy coding, quantization, transform, and prediction.

Summary of the Invention

[0003] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding, and more particularly to a method or apparatus for simplifying coding modes based on an adjacent sample-dependent parametric model.

[0004] According to a first aspect, a method is provided. The method includes inserting into a video bitstream a high-level syntax associated with at least one video coding tool, conditionally inserting into the bitstream one or more low-level controls for one or more video coding tools based on the high-level syntax, activating one or more video coding tools corresponding to one or more video components based on the low-level controls, and encoding the video bitstream using the activated video coding tools.

[0005] A method is provided according to a second aspect of the method, which includes the steps of: parsing a video bitstream of high-level syntax associated with at least one video coding tool; determining one or more low-level controls for one or more video coding tools based on the high-level syntax; activating one or more video coding tools corresponding to one or more video components based on this determination; and decoding the video bitstream using the activated video coding tools.

[0006] In another embodiment, an apparatus is provided, which includes a processor. This processor can be configured to encode blocks of video or decode a bitstream by performing one of the methods described above.

[0007] According to another general aspect of at least one embodiment, a device is provided comprising: an apparatus according to any of the decoding embodiments; and at least one of the following: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a frequency band including the video block; or (iii) a display configured to display an output representing the video block.

[0008] According to another general aspect of at least one embodiment, a non-temporary computer-readable medium is provided which contains data content generated according to any of the described embodiments or variations of encoding.

[0009] According to another general aspect of at least one embodiment, a signal is provided that includes video data generated according to any of the described encoding embodiments or variations.

[0010] According to another general aspect of at least one embodiment, the bitstream is formatted to include data content generated according to any of the described encoding embodiments or variations.

[0011] According to another general aspect of at least one embodiment, when the program is executed by a computer, a computer program product is provided which includes instructions causing the computer to perform any of the described embodiments or variations of decoding.

[0012] The advantages of these and other embodiments, features, and general embodiments will become apparent from the following detailed description of exemplary embodiments, which will be read in conjunction with the accompanying drawings. [Brief explanation of the drawing]

[0013] [Figure 1] This shows standard, common video compression methods. [Figure 2] This shows a standard, common method for decompressing video files. [Figure 3] This shows a general decryption process according to one embodiment. [Figure 4] This shows a typical decryption process for Case 1. [Figure 5] The first proposed general decoding process for Case 2 is shown. [Figure 6] The second proposed general decoding process for Case 2 is shown. [Figure 7] The general decryption process for Case 3 is shown. [Figure 8] This illustrates an exemplary decoding process based on picture segmentation limiting signal notification. [Figure 9] This demonstrates an alternative decoding process based on picture segmentation limitation signal notification. [Figure 10] This illustrates an exemplary decoding process based on multi-hypothesis prediction that enables flag signal notification. [Figure 11] This illustrates an exemplary decoding process based on MTS (Multiple Transformation Set) that enables flag signal notification. [Figure 12] An exemplary alternative decoding process based on MTS that enables flag signaling is shown. [Figure 13] An exemplary decoding process of dependent quantization and coded data hiding that enables flag signaling is shown. [Figure 14] Coded tree units and coded tree concepts representing compressed HEVC pictures are shown. [Figure 15] Examples of splitting coded tree units into coding units, prediction units, and transform units are shown. [Figure 16] An exemplary quadtree plus binary tree (QTBT) CTU representation is shown. [Figure 17] A processor-based system for encoding / decoding under the general aspects described is shown. [Figure 18] A simplified block diagram of a decoding process according to a first embodiment is shown. [Figure 19] An embodiment of a method under the general aspects described is shown. [Figure 20] Another embodiment of a method under the general aspects described is shown. [Figure 21] An exemplary apparatus under the aspects described is shown. **MODE FOR CARRYING OUT THE INVENTION**

[0014] The embodiments described herein are in the field of video compression and generally relate to video compression as well as video encoding and decoding. The general aspects described are aimed at providing a mechanism that manipulates the restrictions in high-level video coding syntax or video coding semantics to constrain a set of possible combinations of tools.

[0015] To achieve high compression efficiency, image and video coding schemes typically employ prediction including motion vector prediction, and transform to exploit the spatial and temporal redundancy of video content. Generally, intra or inter prediction is used to exploit the correlation of intra frames or inter frames, and then the difference between the original image and the predicted image, often called the prediction error or prediction residue, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by inverse processes corresponding to entropy coding, quantization, transform, and prediction.

[0016] In the HEVC (High Efficiency Video Coding, ISO / IEC 23008-2, ITU-T H.265) video compression standard, motion compensated temporal prediction is employed to exploit the redundancy existing between consecutive pictures of the video.

[0017] To do so, motion vectors are associated with each prediction unit (PU). Each coding tree unit (CTU) is represented by a coding tree in the compression domain. This is a quadtree partitioning of the CTU, and each leaf is called a coding unit (CU).

[0018] Next, each CU is given some intra or inter prediction parameters (prediction information). To do so, it is spatially divided into one or more prediction units (PU), and some prediction information is assigned to each PU. The intra or inter coding mode is assigned at the CU level.

[0019] A new video compression standard known as the Joint Exploration Model (JEM), proposed by JVET (Joint Video Exploration Team), proposes accepting a quadtree-binary tree (QTBT) block partitioning structure due to its high compression performance. A binary tree (BT) block can be divided into two sub-blocks of the same size by splitting horizontally or vertically in the middle. As a result, BT blocks can have a rectangular shape with unequal width and height, unlike QT blocks where the block is always a square with the same height and width. In HEVC, the angular intra-prediction direction is defined from 45 degrees to -135 degrees over 180 degrees and is maintained within the JEM, allowing for the definition of the angular direction to be independent of the shape of the target block.

[0020] To encode these blocks, intra-prediction is used to provide an estimated version of the block using previously reconstructed neighboring samples. Then, the difference between the source block and the prediction is encoded. In the conventional codec described above, one row of reference samples is used to the left and top of the current block.

[0021] In HEVC (High Efficiency Video Coding, H.265), the encoding of frames in a video sequence is based on a quadtree (QT) block partitioning structure. Frames are divided into square coding tree units (CTUs), all of which are further divided into multiple coding units (CUs) on a quadtree basis based on rate distortion (RD) criteria. Each CU is either intra-predicted, i.e., spatially predicted from its causative neighboring CUs, or inter-predicted, i.e., temporally predicted from already decoded reference frames. In I-slices, all CUs are intra-predicted, while in P-slices and B-slices, CUs can be both intra-predicted and inter-predicted. For intra-prediction, HEVC defines 35 prediction modes, including one planar mode (indexed as mode 0), one DC mode (indexed as mode 1), and 33 angular modes (indexed as modes 2-34). The angular modes are associated with prediction directions ranging from 45 degrees to -135 degrees clockwise. Because HEVC supports a quadtree (QT) block partitioning structure, all prediction units (PUs) are square. Therefore, the definition of prediction angles from 45 degrees to -135 degrees is justified in terms of PU (prediction unit) shape. For a target prediction unit of size NxN pixels, the top and left reference arrays are each 2N+1 samples, necessary to cover the aforementioned angle range for all target pixels. Given that the height and width of the PU are the same length, it also makes sense that the two reference arrays are equal in length.

[0022] This invention relates to the field of video compression. It aims to improve the dual prediction of intercoded blocks compared to existing video compression systems. The invention also proposes separating the luma and chromacoded trees of interslices.

[0023] In the HEVC video compression standard, a picture is divided into so-called coded tree units (CTUs), typically with sizes of 64x64, 128x128, or 256x256 pixels. Each CTU is represented by a coded tree of the compression domain. This is a quadtree division of the CTU, where each leaf is called a coded unit (CU); see Figure 14.

[0024] Next, each CU is given several intra or inter-prediction parameters (prediction information). For this purpose, it is spatially divided into one or more prediction units (PUs), and each PU is assigned several pieces of prediction information. The intra-coding mode or inter-coding mode is assigned at the CU level; see Figure 15.

[0025] Newly emerging video compression tools are proposed to include coded tree unit representations in the compression domain to represent picture data in a more flexible way within the compression domain. The advantage of this more flexible coded tree representation is that it provides increased compression efficiency compared to the CU / PU / TU arrangement of the HEVC standard.

[0026] The quadtree-plus-binary-tree (QTBT) coding tool offers this increased flexibility. It consists of coding trees that can divide coding units in both quadtree and binary ways. Such a coding tree representation of a coding tree unit is shown in Figure 16.

[0027] The coding unit division is determined on the encoder side by a rate-distortion optimization procedure, which involves determining the QTBT representation of the CTU with the minimum rate-distortion cost.

[0028] In QTBT technology, the shape of the CU is either square or rectangular. The size of the coded unit is always a power of 2, typically between 4 and 128.

[0029] In addition to the various rectangular shapes of the coded units, this new CTU representation has the following different characteristics compared to HEVC.

[0030] The QTBT decomposition of CTU consists of two stages: first, the CTU is split in a quadtree manner, and then each leaf of the quadtree can be further split in a binary tree manner. This is shown on the right side of Figure 16, where the solid line represents the quadtree decomposition phase and the dashed line represents the binary decomposition spatially embedded in the leaves of the quadtree.

[0031] The general aspects described herein are in the field of video compression. A video codec consists of a combination of multiple encoding tools. A common approach is to standardize the decoder side (syntax and decoding process).

[0032] Contributions JVET-L0044 "AHG15: Proposed interoperability point syntax" and JVET-L0696 "Proposed starting point for interoperability point syntax" specify several high-level syntactic elements (within the SPS or profile_tier_level section) aimed at controlling the activation of coding tools in VVC decoders. The goal of this signaling mechanism is to enable bitstream interoperability points defined by parties other than MPEG or ITU, such as DVB, ATSC, and 3GPP. An example of the syntax is proposed in Table 1 and is inserted at the beginning of the SPS to indicate characteristics that must not be violated throughout the bitstream. JVET plans to extend this table for most coding tools added to the VVC specification. In principle, it is not JVET's responsibility to specify a profile or subprofile based on these flags. JVET only defines the tools and the relationship between constraint flags / parameters and the tools. [Table 1]

[0033] If the constraint flag is set in the SPS (or similar) syntactic structure, the decoder can safely assume that the tool will not be used in the bitstream. If the constraint flag is set to 1, the tool may be activated within the associated bitstream.

[0034] Several contributions have also been proposed to specify similar signal notification mechanisms, including JVET-K0311, which provides an early concept of high-level tool signal notification; JVET-L0042, which groups tools by category; and JVET-L0043, which proposes hierarchical signal notification (which JVET considers to be too complex to analyze).

[0035] Because codecs include many coding tools, this results in a vast number of possible tool combinations, and current designs do not consider the impact of tool interactions. Furthermore, in some cases, simply deactivating a tool is insufficient; some tools require a fallback mode. This invention aims to address this problem by inserting a process that restricts possible tool activation / deactivation at either the syntactic or semantic level.

[0036] As described above, the approach JVET employs to control coding tools at a high level of fine detail results in a vast number of tool combinations, some of which are impractical in terms of coding efficiency or implementability.

[0037] Currently, the proposed syntax does not impose any high-level limitations on tool combinations. The main solutions offered by prior art are discussed in the previous paragraph (contributed articles JVET-L0042 and JVET-L0043), but have not yet been considered by JVET.

[0038] The described embodiment proposes specifying tool combination restrictions by inserting syntax or semantic changes, taking into account potential interaction problems that may arise when some tools are combined while others are deactivated.

[0039] Table 2 lists the tools included in VTM3 and several additional tools under investigation, which may be added to VTM later. These are categorized. Approximate PSNR-YBD rate performance for each tool is provided. Negative numbers (-x) indicate an average bitrate saving of x%. Interdependencies with other tools are also shown.

[0040] Several SPSs can be signaled via a bitstream. These may include flags for controlling the tool at a sequence or scalability level.

[0041] In addition to SPS, a lower-level set of additional syntax parameters (such as PPS, slice header, tile group header, and tile header) can be specified. These may include additional flags for controlling the tool at a lower level than the sequence level. Below, syntactic elements defined at the highest level (SPS) will use the prefix "hl_". If the prefix "ll_" is used, it indicates that the syntactic element is at a lower level than SPS, in order to give the tool more local control. [Table 2-1] [Table 2-2]

[0042] Analysis of the tool reveals the following characteristics: -Case 1- Several tools are based on the same conceptual design, which leads to controlling them together. -Case 2- Some tools are conditioned on other tools, either in terms of performance or technical dependencies, which leads to controlling them based on the control of the conditioned tool. -Case 3- Some are mutually exclusive and cannot be activated together. The following definitions will be used in the remainder of this document. -Tools under consideration- This relates to the set of tools controlled by the proposed process. -Main Tools and Dependent Tools- If the tools under consideration fall into the Case 2 category, they are divided into two sets: main tools and dependent tools, and the activation / deactivation of dependent tools depends on the activation / deactivation of the main tools. -Exclusive Tools- If the tools under consideration are mutually exclusive (Case 3), they are grouped into "Exclusive Toolset 1" and "Exclusive Toolset 2". When a tool in Set 1 is activated, a tool in Set 2 is deactivated, and vice versa. A general block diagram of the decryption process covering these three cases is provided in Figure 3. For simplicity, we assume that two tools are being considered. This concept can be extended to three or more tools. The block diagram consists of three branches, depending on the type of tool being considered, which are checked in steps 901 and 902.

[0043] The branch corresponding to Case 1 consists of two main steps. - In step 903, at least one high-level syntactic element HL_SE is decoded from the bitstream. -In step 904, depending on the value of HL_SE, the low-level syntactic elements that control the tool under consideration are: Based on the given values, typically all of the tools under consideration are deactivated (or activated alternatively), Alternatively, it can be decoded from the bitstream (allowing independent control of each tool under consideration).

[0044] The branch corresponding to Case 3 consists of four main steps. - In step 905, at least two high-level syntactic elements HL_SE1 and HL_SE2 related to the control of exclusive tools 1 and 2 are decoded from the bitstream. -In step 906, depending on the value of HL_SE1, at least one low-level syntactic element LL_SE1 that controls exclusive tool 1 is, ○Decrypted from the bitstream, ○ Alternatively, it is inferred to a given value, and exclusive tool 1 is usually deactivated. -In step 907, depending on the values ​​of HL_SE2 and LL_SE1, at least one low-level syntactic element LL_SE2 that controls exclusive tool 2 is, ○Decrypted from the bitstream, ○ Alternatively, it is inferred to a given value, and exclusive tool 2 is usually deactivated.

[0045] Step 907 is as follows: 1) When exclusive tool 1 is enabled (from LL_SE1), the LL_SE2 value will disable exclusive tool 2. 2) When exclusive tool 1 is disabled (from LL_SE1), exclusive tool 2 can be enabled.

[0046] The branch corresponding to Case 2 consists of four main steps. - In step 908, at least one high-level syntactic element HL_SE_main is decoded from the bitstream. -In step 909, depending on the value of HL_SE_main, at least one high-level syntactic element HL_SE_dependent that controls the dependent tool is, ○Decrypted from the bitstream, ○ Alternatively, it is inferred to a given value, and the dependent tool is usually deactivated.

[0047] In step 909, if the HL_SE_main value results in disabling the main tool, then the HL_SE_dependent value results in disabling the dependent tool. -In step 910, depending on the value of HL_SE_main, at least one low-level syntactic element LL_SE_main that controls the main tool is, ○Decrypted from the bitstream, ○ Alternatively, it is inferred to a given value, and the main tool is usually deactivated. -In step 911, depending on the values ​​of HL_SE_dependent and LL_SE_main, at least one low-level syntactic element LL_SE_dependent controls the dependent tool, ○Decrypted from the bitstream, ○ Alternatively, it is inferred to a given value, and the dependent tool is usually deactivated.

[0048] In step 911, if HL_SE_dependent results in disabling the dependent tool, or if LL_SE_main results in disabling the main tool, then LL_SE_dependent results in disabling the dependent tool.

[0049] The final step, 912, corresponds to the application of the decoder process, which involves activating / deactivating tools controlled by the low-level syntactic elements derived from the previous step.

[0050] The following sections address various implementations of the tool under consideration.

[0051] A typical solution for Case 1 (a tool based on the same conceptual design) The solution for Case 1 involves defining high-level syntactic elements that control several tools. Additional low-level syntactic elements related to the activation / deactivation of these tools are also defined. Depending on the values ​​of the high-level syntactic elements, the additional low-level syntactic elements are either set to a given predefined value or read from the bitstream. A decoding process is then performed, involving the activation or deactivation of these tools depending on the values ​​of the corresponding low-level syntactic elements.

[0052] This process can be summarized as follows (also shown in Figure 4). -Decode one high-level syntactic element high_level_SE from the bitstream (1001). -If high_level_SE is equal to the given value V1, then (1002), Based on the value of high_level_SE, the low-level syntactic elements (low_level_SE) related to the activation / deactivation of the tool are inferred (1003), -Otherwise (1002), Decode from bitstream low_level_SE (1004). -Apply a decryption process, including activating / deactivating the tool, depending on the value of the low-level syntactic element low_level_SE (1005).

[0053] A common solution for Case 2 (a tool that relies on other tools) The solution in Case 2 involves the activation of some tools (which we'll call dependent tools) being conditional on the activation of other tools (which we'll call main tools).

[0054] Similar to Case 1, the tool can be controlled by a single high-level flag that controls the activation of both the main tool and its dependent tools. The low-level syntactic elements of the dependent tools are then conditioned by the value of the low-level syntactic elements that control the main tool.

[0055] This process can be summarized as follows (also shown in Figure 5). -Decode one high-level syntactic element high_level_SE from the bitstream (1101). -If high_level_SE is equal to the given value V1, then (1102), Depending on the value of high_level_SE, low-level syntactic elements (low_level_main_SE and low_level_dependent_SE) related to the activation / deactivation of the main tool and dependent tools are inferred (1103). -Otherwise (1102), Decoded from the low-level syntax element (low_level_main_SE) of the bitstream related to the activation / deactivation of the main tool (1104), If low_level_main_SE is equal to the given value V2, then (1105), ●If the low-level syntactic element low_level_main_SE is related to the activation / deactivation of the main tool, then, depending on the value, the low-level syntactic element (low_level_dependent_SE) related to the activation / deactivation of the dependent tool is inferred (1106), 〇Otherwise (1105), ●Decrypt from the low-level syntactic elements (low_level_dependent_SE) of the bitstream related to the activation / deactivation of dependent tools (1107). -Applies a decryption process, including activating / deactivating the tool, depending on the values ​​of the low-level syntactic elements (low_level_main_SE and low_level_dependent_SE) (1108).

[0056] Alternatively, at least two high-level flags are used, one to control the activation of the main tool and the other to control the activation of dependent tools, the second of which is conditioned by the value of the first flag.

[0057] This process can be summarized as follows (also shown in Figure 6). -Decode one high-level syntactic element (1201) from the bitstream related to the activation / deactivation of the main tool. -If the high-level syntactic element related to activating / deactivating the main tool has a given value V1 (1202), Based on the value of the high-level syntactic element related to the activation / deactivation of the main tool, the high-level syntactic element related to the activation / deactivation of the dependent tool is inferred (1203). -Otherwise (1202), ○ Decode high-level syntactic elements related to the activation / deactivation of dependent tools from the bitstream (1204). - For the main tool or dependent tools (1205), apply the following: If a high-level syntactic element has a given value V3 (which may differ between the main tool and dependent tools) (1206), ●Inferring low-level syntactic elements related to tool activation / deactivation based on the values ​​of high-level syntactic elements (1207), 〇Otherwise (1206), ●Decode low-level syntactic elements related to tool activation / deactivation from the bitstream (1208). -Applies a decoding process, including activating / deactivating the tool depending on the value of the low-level syntactic element (1209).

[0058] A typical solution for Case 3 (mutually exclusive tools) The solution for Case 3 is to define at least one high-level syntactic element that controls one first tool or one first toolset, and parameters that control one second tool or one second toolset that are mutually exclusive with the first tool or first toolset. This process can be summarized as follows (also shown in Figure 7). -Decode two high-level syntax elements, high_level_SE1 and high_level_SE2, from the bitstream, which are associated with one first toolset and one second toolset (1301). -If high_level_SE1 is equal to the given value V1 (1302), Based on the value of high_level_SE1, the low-level syntactic elements (low_level_SE1) associated with the first set of tool activation / deactivation are inferred (1303). -Otherwise (1302), Decode low_level_SE1 from the bitstream (1304). -If high_level_SE2 is equal to the given value V2 and low_level_SE1 is equal to the given value V3, then (1305), Based on the value of highLevelParam2, the low-level syntactic elements (low_level_SE2) associated with the second set of tool activation / deactivation are inferred (1306). -Otherwise (1305), Decode low_level_SE2s from the bitstream (1307). -Apply a decryption process, including activating / deactivating the tool, depending on the values ​​of the low-level syntax elements low_level_SE1 and low_level_SE2 (1308).

[0059] Advantageously, the present invention makes it possible to reduce the complexity of encoders and decoders by limiting the number of possible tool combinations. It also makes it possible to reduce the risk of implementation problems due to the need to support tool combinations, which involves additional complexity issues and cases of tool incompatibility. Ultimately, interoperability issues are reduced, which can arise due to too many possible tool combinations.

[0060] For these various cases, embodiments specific to the tools listed in Table 2 are provided (the cases are indicated in parentheses in the title of the embodiment).

[0061] Embodiment 1 - Coordinated control of partitioning limits (Case 1) Main Embodiments In one embodiment, multiple partitioning restrictions related to partitions (or coded structures) of a CTU or CU having at least one vertical or horizontal dimension greater than a given limit (typically 64) are controlled by a single high-level syntactic element (e.g., hl_picture_partitioning_retrictions_flag) inserted into a high-level parameter set (e.g., SPS). [Table 3]

[0062] Furthermore, lower-level parameter sets (e.g., PPS, slice headers, tile group headers, tile headers) have syntactic elements inserted that are related to specific partitioning constraints.

[0063] As one example, specific splitting restrictions may be the following tools listed in Table 2. C_TT64, C_QT128, and C_BT are controlled by the following low-level flags, ll_split_tt128_restriction_flag, ll_split_qt128_restriction_flag, and ll_split_bt128_restriction_flag, respectively.

[0064] As one example, the following specific syntax elements are inserted into the tile group header. [Table 4]

[0065] A simplified block diagram of the decryption process is shown in Figure 8. In step 301, the high-level partitioning restriction flag hl_picture_partitioning_retrictions_flag is decrypted from the bitstream. Its value is checked in step 302. If hl_picture_partitioning_retrictions_flag is true, a specific low-level syntax element associated with a particular partitioning restriction is set to true (step 303). If the flag is false, a specific low-level syntax element associated with a particular partitioning restriction is decrypted in step 304. In step 305, the CTU or CU decryption process is applied using the specific partitioning restriction controlled by the low-level syntax element set in step 303 or decrypted in step 304.

[0066] One example of corresponding semantics is as follows: If hl_picture_partitioning_retrictions_flag is 1, it specifies that the syntax elements ll_split_tt128_restriction_flag, ll_split_qt128_restriction_flag, and ll_split_bt128_restriction_flag do not exist in the CVS picture tile group header. If hl_picture_partitioning_retrictions_flag is 0, it specifies that the syntax elements ll_split_tt128_restriction_flag, ll_split_qt128_restriction_flag, and ll_split_bt128_restriction_flag exist in the CVS picture tile group header.

[0067] If ll_split_tt128_restriction_flag is 1, it specifies that ternary tree splitting is disabled when the CU size is greater than 64x64. If ll_split_tt128_restriction_flag is 0, it specifies that ternary tree splitting is enabled when the CU size is greater than 64x64. If ll_split_tt128_restriction_flag does not exist, it is set to 1.

[0068] If ll_split_qt128_restriction_flag is set to 1, it specifies that a 128x128 CU will be forcibly split into four 64x64 CUs. If ll_split_qt128_restriction_flag is set to 0, it specifies that a 128x128 CU will not be forcibly split into four 64x64 CUs. If ll_split_qt128_restriction_flag does not exist, it is set to 1.

[0069] If ll_split_bt128_restriction_flag is set to 1, it specifies that a 64x128 CU will be forced to split into two 64x64 CUs. If ll_split_bt128_restriction_flag is set to 0, it specifies that a 64x128 CU will not be forced to split into two 64x64 CUs. If ll_split_bt128_restriction_flag does not exist, it is set to 1.

[0070] Alternative 1 In the above solution, if hl_picture_partitioning_retrictions_flag is true, certain partitioning limit flags are also set to true, so high-level control of partitioning limits is advantageous for activating limits.

[0071] In the following embodiment, the approach is reversed. If hl_picture_partitioning_retrictions_flag is false, then the specific partitioning restriction flags are also set to false. Otherwise, these specific partitioning restriction flags are read from the bitstream. This is shown in Figure 9, where the conditions regarding the value of the global flag hl_picture_partitioning_retrictions_flag are reversed compared to the embodiment above. In step 302a, it is checked whether hl_picture_partitioning_restristiong_flag is false. If this condition is true, then in step 303a, certain low-level syntactic elements related to the specific partitioning restriction are set to false. The other steps are the same as in the previous embodiment.

[0072] Embodiment 2 In one embodiment, as described below, multiple high-level partitioning restriction flags (N) exist in the syntax, and the semantics allow them to be controlled sequentially. In this embodiment, the flags are collectively referred to as "hl_picture_partitioning_restrictionk_flag", where k is an integer value. Additionally, low-level flags are inserted at lower levels of the syntax, for example, into a tile group header named "ll_picture_partitioning_restrictionk_kk_flag", where kk is an integer value. For a given restriction k, the high-level flag "hl_picture_partitioning_restrictionk_flag" controls Mk low-level restrictions controlled by the flag "ll_picture_partitioning_restrictionk_kk_flag", where kk is between 1 and Mk. [Table 5]

[0073] One example of the corresponding semantics is as follows: If hl_picture_partitioning_restrictionk_flag is 1, it specifies that the syntax elements ll_picture_partitioning_restrictionka_flag and ll_piCTUre_partitioning_restrictionkb_flag do not exist in the CVS picture tile group header. If hl_picture_partitioning_restriction1_flag is 0, it specifies that the syntax elements ll_picture_partitioning_restriction1a_flag and ll_picture_partitioning_restriction1b_flag exist in the CVS picture tile group header.

[0074] In this embodiment, the same semantics apply to hl_picture_partitioning_restrictionk_flag for any k from 1 to N.

[0075] If ll_picture_partitioning_restrictionkx_flag is 1, it specifies that picture partitioning restriction kx is enabled. If ll_picture_partitioning_restrictionkx_flag is 0, it specifies that picture partitioning restriction kx is disabled. If ll_picture_partitioning_restrictionkx_flag does not exist, it is set to 1.

[0076] In this embodiment, the same semantics are applied to any kk from 1 to Mk in ll_picture_partitioning_restrictionkx_flag.

[0077] This may relate more specifically to the partitioning restrictions identified as C_TT64, C_QT128, and C_BT in Table 2.

[0078] Embodiment 3 - Coordination control of other tools related to splitting (Case 1) The same approach can be applied to the following partitioning tools listed in Table 2, as well as to C_PR and C_FBP.

[0079] Detailed syntax and semantics can be done as described above.

[0080] Embodiment 4 - Control of a multi-hypothesis prediction tool (Case 1) Main Embodiments In one embodiment, an interpretation tool based on multi-hypothesis prediction is controlled by a single high-level single syntactic element (e.g., hl_multi_hypothesis_enable_flag) inserted into a high-level parameter set (e.g., SPS). In this paper, the multi-hypothesis prediction tool involves weighting and mixing samples obtained from several predictions with spatially varying weights. [Table 6]

[0081] Furthermore, lower-level parameter sets (e.g., PPS, slice headers, tile group headers, tile headers) have syntactic elements related to specific multi-hypothesis prediction tools inserted.

[0082] As one example, specific multi-hypothesis prediction tools could be the following tools listed in Table 2: R_GBI, R_TRI, and R_MH, controlled by the following low-level flags: ll_generalized_bipred_enable_flag, ll_triangular_partition_enable_flag, and ll_multi_hypothesis_intra_inter_enable_flag, respectively. Furthermore, R_OBMC may also be included in this set of tools and may be controlled by a specific flag, for example, ll_obmc_enable_flag.

[0083] As one example, the following specific syntax elements can be inserted into the tile group header. [Table 7]

[0084] A simplified block diagram of the decoding process is shown in Figure 10. In step 401, the flag hl_multi_hypothesis_enable_flag is decoded from the bitstream. Its value is checked in step 402. If the flag is true, a specific syntactic element associated with a particular multi-hypothesis prediction tool is set to true (step 403). If hl_multi_hypothesis_enable_flag is true, a specific low-level syntactic element associated with a particular multi-hypothesis prediction tool is decoded in step 404. In step 405, the CTU or CU decoding process is applied using a particular multi-hypothesis prediction tool controlled by the low-level syntactic element set in step 403 or decoded in step 404.

[0085] One example of the corresponding semantics is as follows: If hl_multi_hypothesis_enable_flag is 1, it specifies that the syntax elements ll_generalized_bipred_enable_flag, ll_triangular_partition_enable_flag, ll_multi_hypothesis_intra_inter_enable_flag, and ll_obmc_enable_flag exist in the CVS picture tile group header. If hl_multi_hypothesis_enable_flag is 0, it specifies that the syntax elements ll_generalized_bipred_enable_flag, ll_triangular_partition_enable_flag, ll_multi_hypothesis_intra_inter_enable_flag, and ll_obmc_enable_flag do not exist in the CVS picture tile group header.

[0086] If ll_generalized_bipred_enable_flag is 1, it indicates that the generalized bipred mode is enabled. If ll_generalized_bipred_enable_flag is 0, it indicates that the generalized bipred mode is disabled. If ll_generalized_bipred_enable_flag does not exist, it is set to 0. Equivalent semantics apply to the syntactic elements ll_triangular_partition_enable_flag, ll_multi_hypothesis_intra_inter_enable_flag, and ll_obmc_enable_flag.

[0087] alternative Similar to the previous section, the alternative solution has a syntax flag that enables multiple high-level multi-hypothesis predictions, and the semantics allow them to be controlled together. Detailed syntax and semantics can be explained in the same way as in the previous section.

[0088] Embodiment 5 - Control of Intra and Internet Systems in MTS (Case 2) In one embodiment, one or two flags are inserted at a high level to control the activation of the MTS (Multiple Transition Set). This relates to the following tools listed in Table 2, T_MTS_intra and T_MTS_inter. In some cases, T_ST may also be controlled by the same mechanism.

[0089] Solution 1 In the first embodiment, a single high-level flag, hl_mts_enable_flag, is added, as shown in the table below. [Table 8]

[0090] Depending on the value of the flag hl_mts_enable_flag, one or two additional flags are inserted at a low level to control the activation of MTS in intra- or inter-regions such as slices, tile groups, and tiles, as shown in the table below. [Table 9]

[0091] The decoding process is conceptually similar to the process described for controlling the multi-hypothesis prediction tool.

[0092] A corresponding semantics is proposed.

[0093] If hl_mts_enable_flag is 1, it specifies that the syntax elements ll_mts_intra_enable_flag and ll_mts_inter_enable_flag are present in the CVS picture tile group header. If hl_mts_enable_flag is 0, it specifies that the syntax elements ll_mts_intra_enable_flag and ll_mts_inter_enable_flag are not present in the CVS picture tile group header.

[0094] If ll_mts_intra_enable_flag is 1, it specifies that multiple translation set mode is enabled for CUs coded in intra mode. If ll_mts_intra_enable_flag is 0, it specifies that multiple translation set mode is disabled for CUs coded in intra mode. If ll_mts_intra_enable_flag does not exist, it is set to 0.

[0095] If ll_mts_inter_enable_flag is 1, it specifies that multiple translation set mode is enabled for CUs coded in inter-mode. If ll_mts_inter_enable_flag is 0, it specifies that multiple translation set mode is disabled for CUs coded in inter-mode. If ll_mts_inter_enable_flag does not exist, it is set to 0.

[0096] Solution 2 The second embodiment is based on the first embodiment. Furthermore, a low-level flag controlling the activation of the inter-MTS is conditional on the activation of the intra-MTS. This can be expressed as follows: [Table 10]

[0097] Alternatively, similar behavior can be achieved using two high-level flags, as shown in the table below. [Table 11]

[0098] One example of the corresponding semantics is as follows:

[0099] If hl_mts_intra_enable_flag is 1, it specifies that the syntax element ll_mts_intra_enable_flag exists in the tile group header of the CVS picture. If hl_mts_intra_enable_flag is 0, it specifies that the syntax element ll_mts_intra_enable_flag does not exist in the tile group header of the CVS picture.

[0100] If hl_mts_inter_enable_flag is 1, it specifies that the syntax element ll_mts_inter_enable_flag exists in the tile group header of the CVS image. If hl_mts_inter_enable_flag is 0, it specifies that the syntax element ll_mts_inter_enable_flag does not exist in the tile group header of the CVS image. If hl_mts_inter_enable_flag does not exist, it is set to 0.

[0101] If ll_mts_intra_enable_flag is 1, it specifies that multiple translation set mode is enabled for CUs coded in intra mode. If ll_mts_intra_enable_flag is 0, it specifies that multiple translation set mode is disabled for CUs coded in intra mode. If ll_mts_intra_enable_flag does not exist, it is set to 0.

[0102] If ll_mts_inter_enable_flag is 1, it specifies that multiple translation set mode is enabled for CUs coded in inter-mode. If ll_mts_inter_enable_flag is 0, it specifies that multiple translation set mode is disabled for CUs coded in inter-mode. If ll_mts_inter_enable_flag does not exist, it is set to 0.

[0103] A block diagram of the corresponding decoding process is shown in Figure 12.

[0104] Secondary conversion activation dependent on MTS activation In one embodiment, the activation of the secondary conversion mode (T_ST) is conditional on the activation of the MTS mode. This can be expressed as follows: [Table 12]

[0105] Similarly, the activation of the recursive transformation tree mode (T_RTT) is conditioned by the activation of the MTS mode.

[0106] Embodiment 6 - Control of A_MDLM based on A_CCLM activation (Case 2) In one embodiment, the mechanism described for the MTS case applies to the cases of tools A_CCLM and A_MDLM listed in Table 2, where the activation / deactivation of A_MDLM is conditional on the activation / deactivation of A_CCLM. Detailed syntax and semantics can be done as described above.

[0107] Embodiment 7 - Control of ATMVP based on ATMVP activation (Case 2) In one embodiment, the mechanism described for the MTS case applies to the cases of the tools R_TMVP and R_ATMVP listed in Table 2, where the activation / deactivation of R_ATMVP is conditional on the activation / deactivation of R_TMVP. The detailed syntax and semantics can be as described above.

[0108] Embodiment 8 - Intertool control based on high-precision MV coding activation (Case 2) In one embodiment, the activation / deactivation of R_AFF is conditional on the activation / deactivation of R_HPMV, and the implementation is the same as that described for the MTS case.

[0109] Detailed syntax and semantics can be done as described above.

[0110] In another embodiment, the activation / deactivation of R_MMVD and R_DMVR is conditional on the activation / deactivation of R_HPMV, and the implementation is similar to that described for the MTS case.

[0111] Detailed syntax and semantics can be done as described above.

[0112] In another embodiment, the activation / deactivation of R_PAMC is conditional on the activation / deactivation of R_HPMV, and the implementation is similar to that described for the MTS case. The detailed syntax and semantics can be as described above.

[0113] Embodiment 9 - Dependence of Palette Mode and Current Picture Reference on Activation of Separate Luma / Chroma Trees (Case 2) Palette mode has been shown to offer significant advantages by activating the use of separate luma / chroma trees.

[0114] In one embodiment, the activation / deactivation of A_PM and A_CPR is conditional on the activation / deactivation of C_CST, and the implementation is similar to that described for the MTS case. The detailed syntax and semantics can be as described above.

[0115] Embodiment 10 - Interoperability of Dependent Quantization and Encoded Data Concealment Tools (Case 3) It has been found that it is difficult to make tool-dependent quantization (Q_DQ) and coded data hiding (C_SDH) work together.

[0116] In one embodiment, the high-level syntax control of Q_DQ and C_SDH is designed to avoid the mutual use of these two tools.

[0117] As shown in the table below, two high-level flags, hl_dependent_quant_enable_flag and hl_sign_data_hiding_flag, are added. [Table 13]

[0118] Next, low-level activation syntax elements related to the two tools are set based on the values ​​of hl_dependent_quant_enable_flag and hl_sign_data_hiding_flag. However, one of the flags controlling one given tool is read only if the other flag indicates that the other tool is deactivated. This is shown in the table below. [Table 14]

[0119] One example of corresponding semantics is as follows:

[0120] If hl_dependent_quant_enable_flag is 1, it specifies that the syntax element ll_dependent_quant_enable_flag exists in the tile group header of the CVS picture. If hl_dependent_quant_enable_flag is 0, it specifies that the syntax element ll_dependent_quant_enable_flag does not exist in the tile group header of the CVS picture.

[0121] Similar semantics are used for hl_sign_data_hiding_flag.

[0122] If ll_dependent_quant_enable_flag is 1, it specifies that dependent quantization mode is enabled. If ll_dependent_quant_enable_flag is 0, it specifies that dependent quantization mode is disabled. If ll_dependent_quant_enable_flag does not exist, it is set to 0.

[0123] If ll_sign_data_hiding_enable_flag is 1, it specifies that the sign data hiding mode is enabled. If ll_sign_data_hiding_enable_flag is 0, it specifies that the sign data hiding mode is disabled. If ll_sign_data_hiding_enable_flag does not exist, it is set to 0.

[0124] A simplified block diagram of the decryption process is shown in Figure 13.

[0125] Embodiment 11 - Intercontrol of separate Luma / Chroma trees and cross-component linear models / multidirectional LM tools (Case 3) In one embodiment, the high-level syntactic control of C_CST, A_CCLM, and A_DMLM is such that activating C_CST requires deactivating A_CCLM and A_DMLM, and conversely, deactivating C_CST requires activating A_CCLM and A_DMLM. A design similar to that described in the subsection above can be used. Detailed syntax and semantics can be done as described above.

[0126] Summary of tool classification This section summarizes the tool classifications among the three cases under consideration. ●Case 1 〇 C_TT64, C_QT128, and C_BT can be grouped into a single flag related to the partition constraint in order to correspond to partitioned VPDUs. C_PR and C_FBP can be grouped together as tools related to partition control. R_GBI, R_TRI, and R_MH can be grouped together as tools based on the same multi-hypothesis concept, by weighting samples obtained from two predictions, and logically, they should be activated / deactivated together. R_OBMC can also be conceptually considered to be in the same set as the multi-hypothesis by weighting samples. ●Case 2 Deactivating A_CCLM means that A_MDLM will also be deactivated. Deactivating R_TMVP means that R_ATMVP will also be deactivated. Deactivating T_MTS_intra means that T_MTS_inter will also be deactivated. Since the performance of T_RTT may depend on T_MTS, deactivating T_MTS means that T_RTT will be deactivated. Disabling R_HPMV may affect the coding efficiency of R_AFF, R_MMVD, R_DMVR, and R_PAMC. Therefore, deactivating it means that some or all of the tools for R_AFF, R_MMVD, R_DMVR, and R_PAMC will also be deactivated. 〇 C_CST can have a strong impact on A_PM of screen content because the palette mode helps with the use of many separate luma / chroma trees, so deactivating it means that A_PM will also be deactivated. Deactivating C_CST means that A_CPR will also be deactivated. 〇 ●Case 3 If C_SDH is activated, Q_DQ should be deactivated, and vice versa. If A_CCLM and A_MDLM are activated, C_CST should be deactivated, and vice versa.

[0127] The described embodiments and models can provide coding gain, i.e., increased quality for the same bitrate, or reduced bitrate for the same quality. Furthermore, by limiting the possible combinations of tools, codec implementation can be significantly simplified. This is a crucial point for interoperability.

[0128] Another aspect of tool combinations relates to the syntax of multi-component video. One problem that arises with newer tools in VVC is that some of these tools may interact in a way that negatively impacts performance, or simply are not properly designed to work together when applied to individual components of a multi-component picture. A common example is how chroma-separated trees are handled. In a common approach, the picture being coded may contain a luma component (e.g., Y') and two chroma components (typically Cb, Cr) or three components (e.g., R, G, B). In the case of separate CU trees, the luma component and the two chroma components are coded independently. When dealing with multiple components coded in this way, the possible relationships between the components are undefined. [Table 15]

[0129] The advantage of encoding independent (separate) components within the same bitstream is that the GOP structure of all components is identical, i.e., the reference frame, IDR frame, etc., are identical. Another advantage is parallelization (component-level encoding and decoding pipes).

[0130] The following general configuration aims to configure tool interactions between components in a multi-channel format.

[0131] The syntax and behavior between coded components must be created for the proposed candidate tools in VVC that introduce dependencies between components.

[0132] If a multi-channel format is used, JVET has not yet addressed this issue. Please note that even without using a multi-channel format, the same issue must be addressed with RGB format or other image formats (such as image + depth or auxiliary picture).

[0133] The following general embodiments propose providing a process for specifying tool interactions between channels. This can be achieved through the insertion of syntax changes and / or semantic changes. The present invention describes several variations according to the relationships between components.

[0134] List of tools under consideration Table 2 lists the tools included in VTM3 and several additional tools under investigation, which can be added to VTM later. These are categorized accordingly. [Table 16-1] [Table 16-2]

[0135] Several SPSs may be signaled within the bitstream. These may include flags for controlling tools at the sequence level.

[0136] In addition to SPS, a set of lower-level additional parameters (such as PPS, slice header, tile group header, and tile header) can be specified within the syntax. These may include additional flags for controlling the tool at a level lower than the sequence level.

[0137] The following are some terms and concepts that will be helpful in understanding this invention. Components: Same definition as those defined in the H.26x standard (e.g., Section 3.37 of HEVC, February 2018 version). Primary component: A component on which secondary components depend. Typically, primary components do not depend on other components during the decryption process.

[0138] Note 1: Primary components may have dependencies with respect to entropy coding (e.g., CABAC). Note 2: Typically, the primary component is the luminous component of a video signal, which consists of a luminous channel and two chroma channels. Secondary components: Components that depend on primary components during the decoding process.

[0139] Note 3: Typically, secondary components are the chroma and the chroma channels of two chroma-channel video signals.

[0140] (Non-)separate components: Components that have (non-)dependencies during the decryption process.

[0141] Component set: A group of non-individual components.

[0142] Note 4: Component sets typically include non-separate primary and secondary components.

[0143] Note 5: One example of the two component sets is a first component set including Y' (primary component), Cb (secondary component), and Cr (secondary component) components, and a second component set including a mask (primary component) channel and a depth (secondary component) channel.

[0144] Note 6: Components are sometimes referred to as "color planes".

[0145] Embodiment 12: Signaling and Logic in the Case of Separate Components In one embodiment, components are signaled as separate or non-separate components. Thanks to the parsing of the structure sps_active_tools_set, a method is applied to describe the state of the activation tools related to the coding of separate or non-separate components.

[0146] One advantage of the method described is that some coding tools can be deactivated if they are found to be inefficient for a given component type (for example, this may be limited to profiling). An example of the syntax is provided in the following table, where changes in syntax are highlighted in gray. [Table 17]

[0147] By design, if a non-primary component is not marked as distinct, it is a secondary component (e.g., Y). The toolset activated for primary and secondary components is indicated by the first occurrence of sps_active_tools_set() as shown above. A common example is a "Y'CbCr+depth" video signal, where the Y', Cb, and Cr components are non-distinct, but the depth component is distinct.

[0148] A simplified block diagram of the decryption process according to this embodiment is shown in Figure 18. In step 1001, syntactic elements related to tool activation are decrypted. These are applied to at least the primary component. In step 1002, a loop is performed for the remaining components (indexed by i, greater than 1, i=0 corresponding to the primary component). In step 1003, the flag separate_cmp_flag[i] is decrypted. The value of the flag is checked in step 1004. If the flag is true, step 1005 is applied. In step 1005, the syntactic elements related to tool activation of component i are decrypted. If the flag is false, the syntactic elements related to tool activation decrypted in step 1001 are applied to component i. The final step 1006 corresponds to the decryption process, which involves activating or deactivating the tool based on the decrypted syntactic elements, and possibly additional low-level syntactic elements controlling the tool at a level lower than the sequence level. [Table 18]

[0149] Note that the syntactic elements shown in the table above can be indexed by a component index.

[0150] There are certain tools that involve intercomponent dependencies, meaning that the decoding process of at least one component involves access to samples from other components. One example is the cross-component linear model (CCLM) tool used to predict chroma samples from luma samples.

[0151] Embodiment 13: Signal notification and logic for related components If some components are not distinct, the corresponding high-level syntax elements for controlling the activation / deactivation of the tools (e.g., those present in SPS, PPS, etc.) may only be grouped into a single set.

[0152] Primary and secondary components have dependencies during the decryption process. For example, - In the case of inter-slice or inter-CTU, all components are treated as non-separate (for example, motion compensation is signaled and performed for all components during the same stage).

[0153] - In the case of intra-slice, if C_CST (chroma-isolated tree) or any other intercomponent tool is disabled, the components are considered non-separate; or, if C_CST or any other intercomponent tool is enabled (still involving some relationship from the Y component to the UV component), the components are considered separate. This is especially true for tools that use predictions of chroma data obtained from chroma data placed in the same location.

[0154] To explain these relationships, the following syntax has been proposed: [Table 19]

[0155] If the value primary_cmp_id_plus1[i] is 0, the component at index i is considered the primary component. By default, the first component (index 0) is the primary component. If the value is not 0, it indicates the primary component used by this secondary component. Syntactic elements that signal the activation status of the component coding tools are stored in sps_active_tools_set(). Tools related to the relationships between components are parsed using decode_inter_components_tools_flags(i) as needed.

[0156] A common implementation is the YUV format, in which Y is the primary component and UV is the secondary component.

[0157] `number_of_components_group_minus[i]` specifies the number of components in the component set to which primary component i belongs. If the related component group has two or more components, the Intercomponent Tool related flag is decoded.

[0158] For example, in the case of 4:2:0 (non-separate) YUV format, the following values ​​are obtained for the syntax element under consideration. [Table 20]

[0159] Another example of a multi-channel bitstream value including YUV+Depth is shown below. [Table 21]

[0160] One example of the decode_inter_components_tools_flags syntax is shown in the following table. [Table 22]

[0161] The `decode_inter_components_tools_flags` flags enable or disable the mode that utilizes data from primary components.

[0162] For example, lm_chroma_mode allows the CCLM tool to predict components from primary components. The flag separate_chrome_tree allows having a separate tree in the intra slice to encode the current component. If the flag separate_chrome_tree is true, all components other than the main component are considered grouped together (i.e., sharing the same tree). Otherwise, secondary components use the same signaling as primary components.

[0163] Additional secondary component syntax [Table 23]

[0164] In the modified example, the syntax listed in Table 4 is added to the syntax.

[0165] The first flag, CABAC_dependency, signals if the primary and secondary components share some dependencies during the CABAC entropy decoding process. Otherwise, it means the entire primary component can be analyzed independently of the secondary component.

[0166] The flag chroma_separate_tree_inter is signaled when an interslice / CTU uses a separate tree similar to the chroma_separate_tree currently used by an intraslice / CTU. If this flag is true, the additional flag inter_direct_mode indicates whether the secondary component can derive any interdata (usually juxtaposed motion information) from the primary component.

[0167] The flag `reduce_tools_set_chrome` indicates whether secondary components use a reduced toolset. Examples of reduced toolsets in the current version include: - Fewer intra-directions - Fewer possible conversion types (MTS) -etc.

[0168] Embodiment 14: More precise control of secondary component tools Within a component set, the relationship between component and tool states may need to be described more precisely and / or may depend on the component. In this case, an additional flag, separate_tools_flag, assigned to each secondary component is read. This flag indicates whether a particular tool control syntax element is inserted into this secondary component. If the flag is true, the tool enable / disable flags are parsed for this secondary component (using a call to decode_tools_flags()).

[0169] The relevant syntax is shown below. [Table 24] In this case, secondary components are grouped and share the same flag in the InterComponent tool.

[0170] Relationship of secondary components A more common approach is to fully describe the intercomponent relationships of the tools. The advantage of this is that it allows for a non-distinct group of components, where the states (activation / deactivation) of both regular (non-intercomponent) and intercomponent tools are customized on a per-component basis. An example of the relevant syntax is shown below. [Table 25]

[0171] In this modified example, the decoding of the component 0 parameter is placed inside the component's loop for simplicity.

[0172] For a given component, if `separate_tools_flag` is true, the component's specific intercomponents tool syntax elements are decoded (by calling `decode_inter_components_tools_flags_2(i)`). Furthermore, if the flag `custom_decode_flag` is true, it is possible to have specific syntax elements that control the non-intercomponents tools of this component.

[0173] The decode_inter_components_tools_flags_2 flag is executed as follows: [Table 26]

[0174] In the case of separate components, when an intertool component is activated, the component from which it inherits is read in the bitstream (syntax element component_to_inherit_from). Component inheritance means the following: If -chroma_separate_tree is false, the component tree is shared with the component specified by component_to_inherit_from. - For other tools (CPR, LM, etc.), if the flag associated with the mode is true, the data (motion vector predictor, pixel samples, etc.) will be inherited from the component specified by component_to_inherit_from.

[0175] Intercomponent tools are set to true when separate_tools_flag is false, unless a separate chroma_separate_tree is set to false.

[0176] To determine if a component can customize each tool individually, an additional flag for customizing non-intercomponent tools is read. If the flag is false, the flag of the associated main component is used.

[0177] The present invention enables accurate description of the relationships between components of data at the same time, thereby providing coded gain, i.e., increased quality for the same bitrate, or reduced bitrate for the same quality.

[0178] One embodiment of Method 1900 under the general aspects described herein is shown in Figure 19. This method begins in intro block 1901, and control proceeds to block 1910, where it inserts syntax associated with at least one coding tool into the video bitstream. Control proceeds from block 1910 to block 1920, where it conditionally inserts one or more controls for coding tools into the bitstream based on the high-level syntax inserted into the bitstream. Control proceeds from block 1920 to block 1930, where it activates one or more coding tools corresponding to video components based on one or more controls. Control proceeds from block 1930 to block 1940, where it encodes the video bitstream using the activated coding tools.

[0179] One embodiment of Method 2000 under the general aspects described herein is shown in Figure 20. This method begins in Start Block 2001, and Control proceeds to Block 2010, where it parses the video bitstream for syntax associated with at least one video coding tool. Control proceeds from Block 2010 to Block 2020, where it determines one or more coding tools based on the video bitstream syntax. Control proceeds from Block 2020 to Block 2030, where it activates one or more coding tools corresponding to video components based on the control's determination. Control proceeds from Block 2030 to Block 2040, where it decodes the video bitstream using the activated coding tools.

[0180] Figure 21 shows one embodiment of a device 2100 for encoding, decoding, compressing, or decompressing video data using a simplified coding mode based on a dependent parametric model of adjacent samples. The device comprises a processor 2110 which can be interconnected to a memory 2120 via at least one port. Both the processor 2110 and the memory 2120 may have one or more additional interconnections to external connections.

[0181] The processor 2110 is configured to insert or receive information into a bitstream and compress, encode, or decode it using any of the described embodiments.

[0182] This application describes various embodiments, including tools, features, embodiments, models, and approaches. Many of these embodiments are described to highlight specificities and at least individual characteristics, and are often described in a way that may sound restrictive. However, this is for clarity and not to limit the application or scope of these embodiments. In fact, all of the various embodiments can be combined or substituted to provide further embodiments. Furthermore, these embodiments can also be combined or substituted with embodiments described in previous applications.

[0183] The embodiments described and contemplated in this application can be implemented in many different forms. Figures 1, 2, and 17 provide several embodiments, but other embodiments are contemplated, and the considerations in Figures 1, 2, and 17 do not limit the scope of implementation forms. At least one of these embodiments generally relates to video encoding and decoding, and at least one other embodiment generally relates to transmitting a generated or encoded bitstream. These and other embodiments can be implemented as a computer-readable storage medium storing instructions for encoding or decoding video data according to any of the described methods, apparatus, and / or a computer-readable storage medium storing a bitstream generated according to any of the described methods.

[0184] In this application, the terms “reconstructed” and “decoded” may be used interchangeably, the terms “pixel” and “sample” may be used interchangeably, and the terms “image,” “picture,” and “frame” may be used interchangeably. Although not required, the term “reconstructed” is typically used on the encoder side, while “decoded” is typically used on the decoder side.

[0185] Various methods are described herein, each of which includes one or more steps or actions to achieve the described method. Unless a particular order of steps or actions is required for the correct operation of the method, the order and / or use of any particular steps and / or actions may be changed or combined.

[0186] Using the various methods and other embodiments described herein, the modules of the video encoder 100 and decoder 200, for example, the intra-prediction, entropy coding, and / or decoding modules (160, 360, 145, 330), can be modified as shown in Figures 1 and 2. Furthermore, these embodiments are not limited to VVC or HEVC and can be applied, for example, to other standards and recommendations, whether existing or to be developed in the future, as well as extensions of any such standards and recommendations (including VVC and HEVC). Unless otherwise specifically indicated or technically excluded, the embodiments described herein can be used individually or in combination.

[0187] Various numerical values ​​are used in this application. Certain values ​​are for illustrative purposes only, and the embodiments described are not limited to these specific values.

[0188] Figure 1 shows encoder 100. While variations of encoder 100 are considered, encoder 100 is described below without explaining all expected variations for clarity.

[0189] Before encoding, the video sequence may undergo pre-encoding (101), for example, applying a color conversion to the input color picture (e.g., from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be attached to the bitstream in association with the pre-processing.

[0190] In encoder 100, the picture is encoded by encoder elements as described below. The picture to be encoded is divided (102) and processed in units of, for example, CUs. Each unit is encoded using, for example, intra-mode or inter-mode. When a unit is encoded in intra-mode, intra-prediction is performed (160). In inter-mode, motion estimation (175) and motion compensation (170) are performed. The encoder determines whether to use intra-mode or inter-mode for encoding the unit (105), and indicates the intra / inter decision, for example, by a prediction mode flag. The prediction residual is calculated, for example, by subtracting the predicted blocks from the original image blocks (110).

[0191] Next, the predicted residuals are transformed (125) and quantized (130). In addition to the quantized transformed coefficients, the motion vector and other syntactic elements are entropy coded to output a bitstream (145). The encoder may skip the transformation and apply quantization directly to the untransformed residual signal. The encoder may bypass both the transformation and quantization, i.e., the residuals are coded directly without applying any transformation or quantization process.

[0192] The encoder decodes the encoded block and provides a reference for further prediction. The quantized transform coefficients are dequantized (140), inverse-transformed (150), and the prediction residual is decoded. The decoded prediction residual and the predicted block are combined (155) to reconstruct the image block. The in-loop filter (165) is applied to the reconstructed picture, for example, performing deblocking / SAO (sample adaptive offset) filtering to reduce encoding artifacts. The filtered image is stored in the reference picture buffer (180).

[0193] FIG. 2 shows a block diagram of video decoder 200. In decoder 200, as described below, the bitstream is decoded by decoder elements. Video decoder 200 generally performs a decoding path that is inverse to the encoding path as depicted in FIG. 1. Encoder 100 also generally performs video decoding as part of the encoding of video data.

[0194] Specifically, the input to the decoder includes a video bitstream that may be generated by video encoder 100. First, the bitstream is entropy decoded (230) to obtain transform coefficients, motion vectors, and other encoded information. The picture partitioning information indicates how the picture is partitioned. Thus, the decoder can partition the picture according to the decoded picture partitioning information (235). The transform coefficients are dequantized (240), inverse-transformed (250), and the prediction residual is decoded. The decoded prediction residual and the predicted block are combined (255) to reconstruct the image block. The predicted block can be obtained from intra prediction (260) or motion compensation prediction (i.e., inter prediction) (275) (270). The in-loop filter (265) is applied to the reconstructed image. The filtered image is stored in the reference picture buffer (280).

[0195] The decoded picture may undergo further post-decoded processing (285), such as reverse color conversion (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4), or reverse remapping, which is the reverse of the remapping process performed in pre-encoded processing (101). The post-decoded processing may use metadata derived in pre-encoded processing and signaled in the bitstream.

[0196] Figure 17 shows a block diagram of one embodiment of a system in which various aspects and embodiments are implemented. System 1000 can be embodied as a device comprising various components described below and configured to perform one or more of the aspects described in this document. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected consumer electronics, and servers. The elements of System 1000 can be embodied individually or in combination as a single integrated circuit, multiple ICs, and / or individual components. For example, in at least one embodiment, the processing and encoder / decoder elements of System 1000 are distributed across multiple ICs and / or individual components. In various embodiments, System 1000 is communicably coupled to one or more other systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. In various embodiments, System 1000 is configured to implement one or more of the aspects described in this document.

[0197] System 1000 includes, for example, at least one processor 1010 configured to execute loaded instructions in order to implement various embodiments described in this document. The processor 1010 may include embedded memory, input / output interfaces, and various other circuits, as is well known in the Art. System 1000 includes at least one memory 1020 (e.g., a volatile memory device and / or a non-volatile memory device). System 1000 includes, but is not limited to, a storage device 1040 which may include non-volatile memory and / or volatile memory, including, but is not limited to, electrically erasable programmable read-only memory (EEPROM), read-only memory (ROM), programmable read-only memory (PROM), random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), flash memory, magnetic disk drives, and / or optical disk drives. Storage device 1040 may, in non-limiting examples, include internal storage devices, accessory storage devices (including removable and non-removable storage devices), and / or network-accessible storage devices.

[0198] System 1000 includes, for example, an encoder / decoder module 1030 configured to process data to provide encoded or decoded video, the encoder / decoder module 1030 may include its own processor and memory. The encoder / decoder module 1030 represents a module(s) that may be included in a device that performs encoding and / or decoding functions. As is well known, the device may include one or both encoding and decoding modules. Furthermore, the encoder / decoder module 1030 may be implemented as a separate element of System 1000, or it may be incorporated into the processor 1010 as a combination of hardware and software, as is well known to those skilled in the art.

[0199] Program code loaded into the processor 1010 or encoder / decoder 1030 to perform various embodiments described in this document may be stored in the storage device 1040 and subsequently loaded into memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, memory 1020, storage device 1040, and encoder / decoder module 1030 may store one or more of various items during the execution of the processes described in this document. Such stored items may include, but are not limited to, input video, decoded video or a portion of decoded video, bitstreams, matrices, variables, and intermediate or final results from the processing of equations, expressions, operations, and arithmetic logic.

[0200] In some embodiments, the internal memory of the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory outside the processing device (for example, the processing device may be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory may be memory 1020 and / or storage device 1040, for example, dynamic volatile memory and / or non-volatile flash memory. In some embodiments, for example, external non-volatile flash memory is used to store the television's operating system. In at least one embodiment, high-speed external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations such as MPEG-2 (MPEG stands for Moving Picture Experts Group, also known as ISO / IEC 13818, 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC stands for High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard developed by JVET, i.e., Joint Video Experts Team).

[0201] Inputs to the elements of system 1000 may be provided through various input devices, as shown in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion for receiving RF signals transmitted wirelessly by, for example, a broadcasting station; (ii) a component (COMP) input terminal (or set of COMP input terminals); (iii) a universal serial bus (USB) input terminal; and / or (iv) a high-definition multimedia interface (HDMI) input terminal. Other embodiments not shown in Figure 17 include composite video.

[0202] In various embodiments, the input devices of block 1130 have respective relevant input processing elements as are well known in the Art. For example, the RF section may be associated with an element suitable for (i) selecting a desired frequency (also referred to as selecting a signal or band-limiting a signal to a certain frequency band), (ii) down-converting the selected signal, (iii) again band-limiting to a narrower frequency band in order to select a signal frequency band which may be referred to as a channel in a particular embodiment, (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired data packet stream. The RF section of various embodiments may include one or more elements that perform these functions, e.g., frequency selectors, signal selectors, band limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF section may include a tuner that performs various of these functions, e.g., down-converting a received signal to a lower frequency (e.g., an intermediate frequency or a frequency close to the baseband) or to the baseband. In one embodiment of a set-top box, the RF unit and its associated input processing elements perform frequency selection by receiving, filtering, down-converting, and filtering again to a desired frequency band of RF signals transmitted via a wired (e.g., cable) medium. In various embodiments, the order of the above (and other) elements is rearranged, some of these elements are removed, and / or other elements performing similar or different functions are added. Adding elements may include inserting elements between existing elements, for example, an amplifier and an analog-to-digital converter. In various embodiments, the RF unit includes an antenna.

[0203] Furthermore, the USB and / or HDMI terminals may include their respective interface processors for connecting the system 1000 to other electronic devices over USB and / or HDMI connections. It should be understood that various aspects of input processing, such as Reed-Solomon error correction, may be implemented, for example, in a separate input processing IC or within the processor 1010, as needed. Similarly, aspects of USB or HDMI interface processing may be implemented, for example, in a separate interface IC or within the processor 1010, as needed. The demodulated, error-corrected, and demultiplexed stream is provided to various processing elements, for example, the processor 1010 and an encoder / decoder 1030, which operates in conjunction with memory and storage elements to process the data stream for display on an output device, as needed.

[0204] Various elements of system 1000 may be provided within an integrated housing, where the various elements are interconnected and can transmit data between them using an internal bus, such as an Inter-IC (I2C) bus, wiring, and printed circuit board, which is well known in the art and may include a suitable connection configuration.

[0205] System 1000 includes a communication interface 1050 that enables communication with other devices via a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to send and receive data via the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, in a wired and / or wireless medium.

[0206] In various embodiments, data is streamed to system 1000 or otherwise provided using a wireless network such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). In these embodiments, the Wi-Fi signal is received via a communication channel 1060 and a communication interface 1050 adapted for Wi-Fi communication. In these embodiments, communication channel 1060 is typically connected to an access point or router that provides access to an external network, including the Internet, enabling streaming applications and other over-the-top communications. Other embodiments provide the streamed data to system 1000 using a set-top box that distributes data via an HDMI connection on input block 1130. Yet another embodiment provides the streamed data to system 1000 using an RF connection on input block 1130. As described above, various embodiments provide data in non-streaming manners. Furthermore, various embodiments use wireless networks other than Wi-Fi, e.g., cellular networks or Bluetooth networks.

[0207] System 1000 can provide output signals to various output devices, including a display 1100, a speaker 1110, and other peripheral devices 1120. In various embodiments, the display 1100 includes, for example, one or more of a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 may be for a television, tablet, laptop, mobile phone, or other device. The display 1100 may also be integrated with other components (e.g., a smartphone) or separate (e.g., an external monitor for a laptop). In various examples of embodiments, the other peripheral devices 1120 include one or more of a standalone digital video disc (or digital multi-purpose disc) (both terms DVR), a disc player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide functions based on the output of System 1000. For example, a disc player performs the function of playing back the output of System 1000.

[0208] In various embodiments, control signals are communicated between the system 1000 and the display 1100, speaker 1110, or other peripheral devices 1120 using signal notification such as AV.Link, Consumer Electronics Control (CEC), or other communication protocols that enable inter-device control with or without user intervention. Output devices may be coupled to the system 1000 via dedicated connections through their respective interfaces 1070, 1080, and 1090. Alternatively, output devices may be connected to the system 1000 using communication channel 1060 via communication interface 1050. The display 1100 and speaker 1110 may be integrated into a single unit with other components of the system 1000 in an electronic device such as a television. In various embodiments, the display interface 1070 includes a display driver, such as a timing controller (TCon) chip.

[0209] Alternatively, the display 1100 and speaker 1110 may be separate from one or more of the other components, for example, if the RF section of input 1130 is part of a separate set-top box. In various embodiments where the display 1100 and speaker 1110 are external components, the output signal may be provided via a dedicated output connection, for example, an HDMI port, a USB port, or a COMP output section.

[0210] The embodiments may be implemented by the processor 1010, by computer software implemented by hardware, or by a combination of hardware and software. In a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory 1020 may be any type appropriate for the technical environment and, in a non-limiting example, may be implemented using any appropriate data storage technology such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor 1010 may be any type appropriate for the technical environment and, in a non-limiting example, may include one or more of a microprocessor, a general-purpose computer, a dedicated computer, and a processor based on a multi-core architecture.

[0211] Various implementations involve decoding. As used in this application, “decoding” can encompass all or part of the processes performed on a received encoded sequence to produce, for example, a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processes also, or alternatively, include processes performed by the decoders of the various implementations described in this application.

[0212] As a further example, in one embodiment, "decoding" refers only to entropy decoding, in another embodiment, "decoding" refers only to differential decoding, and in another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to specifically refer to a subset of operations or generally to a broader decoding process will become clear based on the context of the particular description and is considered to be fully understood by those skilled in the art.

[0213] Various implementations involve encoding. In a similar manner to the above considerations regarding "decoding", "encoding" as used in this application can include, for example, all or part of the process executed on an input video sequence to generate an encoded bitstream. In various embodiments, such a process typically includes one or more processes executed by an encoder, such as splitting, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such a process can also, or alternatively, include the processes executed by the encoders of the various implementations described in this application.

[0214] As a further example, in one embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in another embodiment, "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" is intended to specifically refer to a subset of operations or generally to a broader encoding process will become clear based on the context of the particular description and is considered to be fully understood by those skilled in the art.

[0215] Note that the syntactic elements used in this specification are for illustrative purposes. Therefore, they do not preclude the use of other syntactic element names.

[0216] Please understand that when a diagram is presented as a flow chart, it also provides a block diagram of the corresponding device. Similarly, please understand that when a diagram is presented as a block diagram, it also provides a flow chart of the corresponding method / process.

[0217] Various embodiments may refer to parametric models or rate-distortion optimization. In particular, during the coding process, often considering computational complexity constraints, a balance or trade-off between rate and distortion is usually considered. This can be measured through rate-distortion optimization (RDO) metrics, or through least mean squares (LMS), mean absolute error (MAE), or other such measurements. Rate-distortion optimization is usually formulated as minimizing a rate-distortion function, which is a weighted sum of rate and distortion. There are various approaches to solving rate-distortion optimization problems. For example, an approach based on extensive testing of all coding options, including all mode or coding parameter values ​​considered, can fully evaluate the coding cost and associated distortion of the reconstructed signal after coding and decoding. Faster approaches can also be used to reduce coding complexity, particularly by calculating approximate distortion based on the predicted or predicted residual signal rather than the reconstructed signal. These two approaches can also be combined, for example, by using approximate distortion for only some of the possible coding options and full distortion for others. Other approaches evaluate only a subset of the possible coding options. More generally, many approaches employ one of several techniques to perform optimization, but optimization is not necessarily a complete evaluation of both the coding cost and the associated distortions.

[0218] The implementation forms and embodiments described herein may be implemented, for example, in methods or processes, apparatus, software programs, data streams, or signals. Even if considered only in the context of a single implementation form (e.g., considered only as a method), the implementation forms of the considered features may also be implemented in other forms (e.g., apparatus or programs). Apparatus may be implemented, for example, in appropriate hardware, software, and firmware. Those methods may be implemented, for example, within a processor, which refers to processing devices in general, including, for example, computers, microprocessors, integrated circuits, or programmable logic devices. Processors also include communication devices, such as computers, mobile phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate the communication of information between end users.

[0219] References to “one embodiment” or “one implementation” or “one implementation,” as well as other variations thereof, mean that certain features, structures, characteristics, etc., described in relation to the embodiments are included in at least one embodiment. Therefore, the appearance of phrases such as “in one embodiment” or “in one embodiment” or “in one implementation,” as well as any other variations, found in various places throughout this application, do not necessarily all refer to the same embodiment.

[0220] Furthermore, this application may refer to "determining" various parts of information. Determining information may include, for example, one or more of the following: evaluating information, calculating information, predicting information, or retrieving information from memory.

[0221] Furthermore, this application may refer to "accessing" various parts of information. Accessing information may include, for example, one or more of the following: receiving information, retrieving information (e.g., from memory), storing information, moving information, copying information, calculating information, judging information, predicting information, or evaluating information.

[0222] Furthermore, this application may refer to "receiving" various parts of information. Receiving is intended to be a broad term, as is "accessing." Receiving information may include, for example, one or more of the following: accessing information, or retrieving information (for example, from memory). Moreover, "receiving" is typically associated in some way with operations such as storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, judging information, predicting information, or evaluating information.

[0223] For example, in the cases of "A / B," "A and / or B," and "at least one of A and B," it should be clear that the use of any of the following " / ," "and / or," and "at least one of" is intended to cover the selection of only the first option (A), or only the second option (B), or both options (A and B). As further examples, in the cases of "A, B, and / or C" and "at least one of A, B, and C," such phrasing is intended to cover the selection of only the first option (A), or only the second option (B), or only the third option (C), or only the first and second options (A and B), or only the first and third options (A and C), or only the second and third options (B and C), or all three options (A, B, and C). This can be extended as many times as there are items listed, as will be obvious to a person skilled in the art.

[0224] Furthermore, as used herein, the word “signal notify” refers, among other things, to instruct the corresponding decoder to do something. For example, in certain embodiments, the encoder signals to one particular of several transformations, coding modes, or flags. Thus, in one embodiment, the same transformation, parameter, or mode is used on both the encoder and decoder sides. For example, the encoder can send a particular parameter to the decoder (explicit signal notification), and as a result, the decoder can use the same particular parameter. Conversely, if the decoder already has a particular parameter as well as other parameters, signal notification can be used without transmission (implicit signal notification), allowing the decoder to easily recognize and select the particular parameter. Bit savings are achieved in various embodiments by avoiding the transmission of any actual function. It should be seen that signal notification can be achieved in various ways. For example, one or more syntactic elements, flags, etc., are used in various embodiments to signal information to the corresponding decoder. The above concerns the verb form of the word “signal notify,” but the word “signal notify” can also be used as a noun herein.

[0225] As will be apparent to those skilled in the art, implementations can generate various signals, for example, that are formatted to carry information that can be stored or transmitted. The information may include, for example, instructions for performing a method, or data generated by one of the implementations described. For example, a signal may be formatted to carry a bitstream of the embodiment described. Such a signal may be formatted, for example, as an electromagnetic wave (e.g., using the radio frequency portion of the spectrum) or as a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier wave with the encoded data stream. The information carried by the signal may be, for example, analog or digital information. The signal may be transmitted over various different wired or wireless links, as is well known. The signal may be stored on a processor-readable medium.

[0226] Several embodiments spanning various claim categories and types are described below. Features of these embodiments can be provided individually or in any combination. Furthermore, embodiments may include, individually or in any combination, one or more of the following features, devices, or aspects across various claim categories and types. ● A process or device that restricts the activation or deactivation of a tool in an encoder or decoder. ● A process or device that manipulates high-level syntax or semantic constraints that restrict the set of possible tool combinations in an encoder or decoder. ● A process or device that includes syntax or semantics that specify limitations on the combination of tools. ● Use of syntax in an encoder or decoder to control the splitting process or insertion into a bitstream. ● Use of syntax for controlling splitting-related processes in an encoder or decoder, or insertion into a bitstream. ● Use of syntax or insertion into a bitstream to control multi-hypothesis prediction tools in an encoder or decoder. ● Use of syntax for controlling the MTS (Multi-Core Transmutation) process in an encoder or decoder, or insertion into a bitstream. ● Use of syntax for controlling the secondary conversion mode in an encoder or decoder, or insertion into a bitstream. ● Use of syntax for controlling recursive transformation tree modes in encoders or decoders, or insertion into bitstreams. ● Use of syntax or insertion into a bitstream to control cross-component linear model or multi-directional linear model modes in an encoder or decoder. ● Use of syntax or insertion into a bitstream to control ATMVP (Alternative Temporal Motion Vector Prediction) mode in an encoder or decoder. ● Use of syntax for controlling high-precision motion vector coding tools in encoders or decoders, or for insertion into bitstreams. ● Use of syntax in an encoder or decoder to control palette mode, current picture reference, or separate luma / chroma trees, or insertion into a bitstream. ● Use of syntax or insertion into a bitstream to control dependent quantization or coded data hiding tools in an encoder or decoder. ● Use of syntax for controlling separate luma / chroma trees and cross-component linear / multidirectional linear models in an encoder or decoder, or for inserting them into a bitstream. ● A bitstream or signal containing one or more of the described syntactic elements, or variations thereof. ● A bitstream or signal containing syntax for transmitting information generated according to any of the embodiments described. ● Creation and / or transmission and / or reception and / or decoding by any of the embodiments described. ●A method, process, apparatus, media storage instruction, media storage data, or signal according to any of the embodiments described. ● Insertion of signal notification syntax elements that allow the decoder to identify the tool in a way that corresponds to how the encoder uses it. ● Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that contains one or more of the described syntactic elements or variations thereof. ● A television, set-top box, mobile phone, tablet, or other electronic device that performs one or more conversion methods according to the embodiments described. A television, set-top box, mobile phone, tablet, or other electronic device that performs a determination of one or more conversion methods according to one of the embodiments described and displays the resulting image (for example, using a monitor, screen, or other type of display). A television, set-top box, mobile phone, tablet, or other electronic device that selects a channel to receive a signal containing an encoded image, limits its bandwidth, or adjusts it (for example, using a tuner), and performs one or more conversion methods according to any of the embodiments described. ● A television, set-top box, mobile phone, tablet, or other electronic device that wirelessly receives a signal containing encoded images (for example, using an antenna) and performs a conversion method(s).

Claims

1. Inserting high-level syntax associated with at least one video encoding tool into the video bitstream, The bitstream is to be conditionally injected with one or more low-level controls for one or more video encoding tools based on the high-level syntax, Based on the aforementioned low-level control, activate one or more video encoding tools corresponding to one or more video components, A method comprising encoding the video bitstream using the activated video encoding tool.

2. It is a processor, Insert high-level syntax associated with at least one video encoding tool into the video bitstream. Conditionally insert one or more low-level controls for one or more video encoding tools into the bitstream based on the high-level syntax, Based on the aforementioned low-level control, activate one or more video coding tools corresponding to one or more video components, A device comprising a processor configured to encode the video bitstream using the activated video encoding tool.

3. Parsing a video bitstream for a high-level syntax associated with at least one video encoding tool, Based on the aforementioned high-level syntax, one or more low-level controls are determined for one or more video encoding tools, Based on the above decision, activate one or more video coding tools corresponding to one or more video components, A method comprising decoding the video bitstream using the activated video encoding tool.

4. It is a processor, For a high-level syntax associated with at least one video encoding tool, parse the video bitstream. Based on the aforementioned high-level syntax, one or more low-level controls are determined for one or more video encoding tools. Based on the above decision, activate one or more video coding tools corresponding to one or more video components, A device comprising a processor configured to decode the video bitstream using the activated video encoding tool.

5. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein the syntax indicates information about an activated video coding tool associated with separate or non-separate components of a multi-component video bitstream.

6. The method or apparatus according to claim 5, wherein an index is used to indicate which component the video coding tool is applied to.

7. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein high-level syntax for non-separate components within a multi-component video bitstream is grouped into a single syntax set.

8. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein the syntax for multiple component video bitstreams indicates whether a particular video encoding tool control has been inserted into the bitstream component.

9. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein multiple partitioning limits are controlled by high-level syntactic elements inserted into a high-level parameter set.

10. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein multiple high-level partition limit flags are controlled sequentially, and at least one high-level limit flag controls a low-level limit.

11. The method according to claim 1 or 3, or the apparatus according to claim 2 or 4, wherein an interpretation tool based on multi-hypothesis prediction is controlled by high-level syntactic elements.

12. The apparatus according to any one of claims 4 to 11, A device comprising: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to restrict the received signal to a frequency band including the video block; and (iii) a display configured to display an output representing the video block.

13. A non-temporary computer-readable medium for playback using a processor, comprising data content generated according to the method of any one of claims 1 and 5 to 11, or by the apparatus described in any one of claims 2 and 5 to 11.

14. A signal for playback using a processor, comprising video data generated according to the method of any one of claims 1 and 5 to 11, or by the apparatus described in any one of claims 2 and 5 to 11.

15. A computer program product comprising instructions, wherein, when the program is executed by a computer, the instructions cause the computer to perform the method according to any one of claims 1, 3, and 5 to 11.

Images