Hot-swap controller circuit, circuit system

Abstract

To reduce the cost of systems equipped with hot-swap controller circuits. [Solution] The hot-swap controller IC200 controls multiple transistors connected in parallel. The first gate terminal GATE1 is connected to the gate of the first transistor M1, which is the one with the widest safe operating area among the multiple transistors. The second gate terminal GATE2 is connected to the gate of the second transistor M2, which is a transistor other than the first transistor M1 among the multiple transistors. The gate controller 210 controls the voltage Vg1 of the first gate terminal GATE1 and the voltage Vg2 of the second gate terminal GATE2. When turning on the multiple transistors, the gate controller 210 raises the voltage Vg2 of the second gate terminal GATE2 with a delay compared to the voltage Vg1 of the first gate terminal GATE1.

Description

Technical Field

[0001] The present disclosure relates to a hot swap controller circuit.

Background Art

[0002] In a system such as a server, when it becomes necessary to replace a module or a board, a hot swap controller circuit (IC) is used for hot swapping, which means detaching the module that needs to be replaced without turning off the power of the system and stopping the system.

[0003] In recent years, due to the higher performance of servers, the power consumption of modules and boards has increased. Therefore, a configuration is adopted in which a plurality of discrete component transistors (switches) used together with the hot swap controller circuit are connected in parallel to reduce the on-resistance.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

[0005] [Summary] The present disclosure has been made in such a situation, and an exemplary object of one aspect thereof is to reduce the cost of a system including a hot swap controller circuit.

[0006] A part of this disclosure relates to a hot-swap controller circuit for controlling a plurality of transistors connected in parallel. The hot-swap controller circuit includes a first gate terminal to be connected to the gate of a first transistor, which is one of the plurality of transistors and has the widest safe operating area; a second gate terminal to be connected to the gate of a second transistor, which is one of the plurality of transistors and not the first transistor; and a gate controller for controlling the voltage of the first gate terminal and the voltage of the second gate terminal. The gate controller controls the voltage of the first gate terminal and the voltage of the second gate terminal so that when the plurality of transistors are turned on, the first transistor turns on before the second transistor.

[0007] Another aspect of the present disclosure relates to a circuit system. The circuit system comprises a first transistor connected between an input terminal and an output terminal and having a first safe operating region; at least one second transistor connected in parallel with the first transistor and between the input terminal and the output terminal and having a second safe operating region narrower than the first safe operating region; and a hot-swap controller circuit that controls the first transistor and the at least one second transistor. The hot-swap controller circuit turns on at least one second transistor later than the first transistor.

[0008] Furthermore, any combination of the above components, or any substitution of components or expressions between methods, apparatus, systems, etc., are also valid as embodiments of the present invention or this disclosure. Moreover, the description in this section (means for solving the problem) does not describe all the indispensable features of the present invention, and therefore, subcombinations of these described features may also constitute the present invention. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a circuit diagram of a circuit system comprising a hot-swap controller IC according to an embodiment. [Figure 2]Figure 2 illustrates the operation of the hot-swap controller IC shown in Figure 1. [Figure 3] Figure 3 is a circuit diagram of a circuit system equipped with a hot-swap controller IC related to the comparative technology. [Figure 4] Figure 4 is a diagram illustrating the operation of the hot-swap controller IC shown in Figure 3. [Figure 5] Figure 5 is a circuit diagram of a circuit system equipped with a hot-swap controller IC according to an embodiment. [Figure 6] Figure 6 is a waveform diagram illustrating the operation of the hot-swap controller IC shown in Figure 5.

[0010] [Detailed explanation] (Summary of the embodiment) This section outlines some exemplary embodiments of the present disclosure. This outline is intended to provide a basic understanding of the embodiments and to simplify some concepts of one or more embodiments, serving as a prelude to the more detailed descriptions that follow. It is not intended to limit the scope of the invention or disclosure. This outline is not a comprehensive overview of all possible embodiments, nor is it intended to identify essential elements of all embodiments or to delineate the scope of some or all aspects. For convenience, “one embodiment” may be used to refer to one or more embodiments (examples or variations) disclosed herein.

[0011] A hot-swap controller circuit according to one embodiment controls a plurality of transistors connected in parallel. The hot-swap controller circuit includes a first gate terminal to be connected to the gate of a first transistor, which is the one with the largest safe operation area (SOA) among the plurality of transistors; a second gate terminal to be connected to the gate of a second transistor, which is a transistor other than the first transistor among the plurality of transistors; and a gate controller that controls the voltage of the first gate terminal and the voltage of the second gate terminal. When the plurality of transistors are turned on, the gate controller controls the voltage of the first gate terminal and the voltage of the second gate terminal so that the first transistor turns on before the second transistor. In other words, the gate controller increases the voltage of the second gate terminal with a lag relative to the voltage of the first gate terminal. In other words, when the plurality of transistors are turned on, the gate controller increases the voltage of the second gate terminal while keeping it lower than the voltage of the first gate terminal.

[0012] In this configuration, the voltage at the first gate terminal rises before the voltage at the second gate terminal. As a result, the gate-source voltage of the first transistor is higher than that of the second transistor. Therefore, current concentrates in the first transistor, allowing for the selection of a component with a wide SOA for the first transistor, while inexpensive components with a narrow SOA can be selected for the remaining second transistors. This reduces the cost of the system.

[0013] In one embodiment, the gate controller may increase the voltage at the first gate terminal and the voltage at the second gate terminal while keeping the potential difference between them constant.

[0014] In one embodiment, the gate controller may include a control circuit that generates a control signal, a gate driver that generates a first gate voltage at the first gate terminal in response to the control signal, and a constant voltage circuit connected between the first gate terminal and the second gate terminal. As a result, the voltage at the second gate terminal rises with a lag behind the voltage at the first gate terminal. Since a gate driver to generate the second gate voltage is not required, the circuit area is reduced.

[0015] In one embodiment, the constant voltage circuit may include one or more diodes connected in series. The potential difference between the first gate terminal and the second gate terminal can be set according to the number of diodes.

[0016] In one embodiment, the control circuit may generate control signals such that the current flowing through multiple transistors becomes a target amount.

[0017] In one embodiment, the control circuit may generate control signals such that the power consumption of multiple transistors reaches a target amount.

[0018] In one embodiment, the control circuit may generate a control signal such that the first gate voltage changes according to a predetermined waveform.

[0019] In one embodiment, the gate controller may include a voltage detection circuit that asserts a gate detection signal when the gate-source voltage of the first transistor exceeds a predetermined threshold voltage, and a switch connected between the first gate terminal and the second gate terminal. The control circuit may turn on the switch when the gate detection signal is asserted.

[0020] In one embodiment, the hot swap controller circuit may be integrated on a single semiconductor substrate. "Integrated as a single unit" includes cases where all components of the circuit are formed on a semiconductor substrate, or cases where the main components of the circuit are integrated as a single unit. Some resistors, capacitors, etc. may be provided outside the semiconductor substrate for adjusting circuit constants. By integrating the circuit on a single chip, the circuit area can be reduced, and the characteristics of circuit elements can be kept uniform.

[0021] A circuit system according to one embodiment may include a plurality of transistors connected in parallel and any of the above-described hot swap controller circuits for controlling the plurality of transistors.

[0022] A circuit system according to one embodiment includes a first transistor connected between an input terminal and an output terminal and having a first safe operating area, and at least one second transistor connected in parallel with the first transistor between the input terminal and the output terminal and having a second safe operating area narrower than the first safe operating area, and a hot swap controller circuit for controlling the first transistor and the at least one second transistor. The hot swap controller circuit turns on the at least one second transistor later than the first transistor.

[0023] (Embodiment) Hereinafter, preferred embodiments will be described with reference to the drawings. The same or equivalent components, members, and processes shown in each drawing are denoted by the same reference numerals, and redundant descriptions will be omitted as appropriate. Also, the embodiments are illustrative and not restrictive of the disclosure and the invention, and not all features and combinations thereof described in the embodiments are necessarily essential to the disclosure and the invention.

[0024] In this specification, "member A connected to member B" includes not only cases where member A and member B are directly connected physically, but also cases where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection or impair the functions or effects produced by their combination.

[0025] Similarly, "the state in which member C is connected (provided) between member A and member B" includes not only cases where member A and member C, or member B and member C, are directly connected, but also cases where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the function or effect produced by their combination.

[0026] Figure 1 is a circuit diagram of a circuit system 100 comprising a hot-swap controller IC 200 according to an embodiment. The circuit system 100 comprises a switch SW1, a sense resistor R1, and a hot-swap controller IC (Integrated Circuit) 200.

[0027] The sense resistor R1 and switch SW1 are connected in series between the input node IN and the output node OUT. The input node IN is supplied with the input voltage Vin. Switch SW1 includes the first transistor M1 and the second transistors M2_1 to M2_3 connected in parallel. These transistors M1, M2_1 to M2_3 are discrete components. The first transistor M1 has the widest SOA (Safe Operating Area), while the remaining second transistors M2_1 to M2_3 have a narrower SOA than the first transistor M1.

[0028] A voltage drop Vr1 proportional to the current I flowing through switch SW1 is generated across sense resistor R1.

[0029] The hot-swap controller IC200 is the IC that controls switch SW1.

[0030] The hot-swap controller IC200 includes a first gate terminal GATE1, a second gate terminal GATE2, an output terminal OUT, current sensing terminals CS1 and CS2, a gate controller 210, and a current sense amplifier 220. The first gate terminal GATE1 is connected to the gate of the first transistor M1, which has the widest safe operating area among the multiple transistors M1, M2_1 to M2_3 that make up the switch SW1. The second gate terminal GATE2 is connected to the gates of the remaining second transistors M2_1 to M2_3.

[0031] The gate controller 210 controls the voltage Vg1 of the first gate terminal GATE1 and the voltage Vg2 of the second gate terminal GATE2, thereby controlling the on / off state of switch SW1.

[0032] The gate controller 210 receives an enable signal EN that instructs the switch SW1 to be turned on or off. When the enable signal EN is negated (e.g., low level), the gate controller 210 turns off the switch SW1, and when the enable signal EN is asserted (e.g., high level), it turns on the switch SW1.

[0033] When the enable signal EN is asserted, the gate controller 210 raises the voltage at the second gate terminal GATE2 (referred to as the second gate voltage) Vg2 with a delay compared to the voltage at the first gate terminal GATE1 (referred to as the first gate voltage) Vg1.

[0034] The gate controller 210 may increase the first gate voltage Vg1 and the second gate voltage Vg2 while keeping their potential difference ΔV constant.

[0035] The gate controller 210 may adjust the second gate voltage Vg2 to the same voltage level as the first gate voltage Vg1 when the gate-source voltage Vgs1 of the first transistor M1, i.e., the potential difference between the first gate voltage Vg1 and the output voltage Vout, reaches a predetermined threshold.

[0036] The current sensing terminals CS1 and CS2 are connected to both ends of the sense resistor R1. The current sense amplifier 220 amplifies the voltage drop Vr1 across the sense resistor R1 and generates a current sensing signal Vcs. The current sensing signal Vcs represents the current I flowing through switch SW1.

[0037] The gate controller 210 may adjust the voltage levels of the gate voltages Vg1 and Vg2 in response to the current detection signal Vcs. For example, the gate controller 210 may perform overcurrent protection or power limiting based on the current detection signal Vcs.

[0038] The above describes the configuration of the hot-swap controller IC200. Next, we will explain its operation.

[0039] Figure 2 illustrates the operation of the hot-swap controller IC200 shown in Figure 1. Before time t0, the enable signal EN is low, switch SW1 is in the off state, and the output voltage Vout is 0V.

[0040] At time t0, when the enable signal EN transitions to high, the gate controller 210 begins to increase the first gate voltage Vg1. Then, at time t1, delayed by time τd, the gate controller 210 begins to increase the second gate voltage Vg2.

[0041] The gate-source voltage Vgs1 of the first transistor M1 is Vg1-Vout, and the gate-source voltage Vgs2 of the second transistors M2_1 to M2_3 is Vg2-Vout.

[0042] At time t2, when the gate-source voltage Vgs1 of the first transistor M1 exceeds the gate threshold voltage Vgs(th) of the first transistor M1, the first transistor M1 turns on, current I1 flows through the first transistor M1, the load on the output node OUT side (e.g., a smoothing capacitor) is charged, and the output voltage Vout begins to rise.

[0043] The second transistors M2_1 to M2_3 also turn on when their respective gate-source voltage Vgs2 exceeds the gate threshold voltage Vgs(th), and currents I2_1 to I2_3 flow through them.

[0044] When the output voltage Vout rises to near the input voltage Vin at time t3, the current flowing through the first transistor M1 and the second transistors M2_1 to M2_3 becomes zero.

[0045] Then, at time t4, the gate voltage Vg1 of the first transistor M1 reaches a high voltage Vh, followed by the gate voltage Vg2 of the second transistor M2 reaching a high voltage Vh.

[0046] The above describes the operation of the circuit system 100 according to the embodiment. In this embodiment, the gate voltage Vg1 of the first transistor M1 rises before the gate voltage Vg2 of the second transistor M2, so the relationship Vgs1 > Vgs2 holds. Therefore, current concentrates in the first transistor M1, and the currents I2_1 to I2_3 of the second transistors M2_1 to M2_3 become relatively smaller than the current I1 of the first transistor M1.

[0047] Therefore, for the first transistor M1, a device with a large SOA can be selected, and for the remaining second transistors M2_1 to M2_3, which turn on later, devices with small SOA can be selected.

[0048] The advantages of the hot-swap controller IC200 become clear when compared with the comparative technology. Therefore, the hot-swap controller IC200R related to the comparative technology will be explained by focusing on the differences from the hot-swap controller IC200 according to the embodiment.

[0049] Figure 3 is a circuit diagram of circuit system 100R, which includes a hot-swap controller IC200R related to the comparative technology. In the comparative technology, switch SW1 includes multiple transistors M1 to M4 with the same SOA. The gates of the multiple transistors M1 to M4 are commonly connected to a single gate terminal GATE2 of the hot-swap controller IC200R.

[0050] The gate controller 210R controls the voltage Vg of the gate terminal GATE, thereby controlling the on / off state of switch SW1. Specifically, when the enable signal EN is asserted, the gate controller 210R increases the gate voltage Vg.

[0051] Figure 4 illustrates the operation of the hot-swap controller IC200R shown in Figure 3. Before time t0, the enable signal EN is low, switch SW1 is off, and the output voltage Vout is 0V.

[0052] When the enable signal EN transitions to high at time t0, the gate controller 210 begins to raise the gate voltage Vg.

[0053] At time t2, the gate-source voltage Vgs of transistors M1-M4 rises to near the threshold voltage Vgs(th), and transistors M1-M4 turn on. In the comparison technique, the gate-source voltage Vgs of all transistors M1-M4 is equal. Multiple transistors M1-M4 are the same device with the same SOA, but the threshold voltage Vgs(th) can take on different values ​​due to manufacturing variations. Therefore, a relatively large current flows through the multiple transistors M1-M4 that have a small threshold voltage Vgs(th), and a relatively small current flows through the transistors that have a high threshold voltage Vgs(th). In the example in Figure 4, the threshold voltage Vgs(th) is smallest for M2, and increases in the order of M1, M3, and M4, and the current flows in the order of M2, M1, M3, and M4.

[0054] The current flowing through transistors M1 to M4 depends on variations in the threshold voltage Vgs(th), making it impossible to predict which transistor will experience high current flow. In other words, any transistor has the potential to experience high current flow. Therefore, in comparative techniques, it is necessary to select transistors with high SOA for all of M1 to M4. This resulted in high costs.

[0055] As described above, in this embodiment, since it is confirmed that the gate-source voltage Vgs1 of the first transistor M1 is greater than the gate-source voltage Vgs2 of the second transistor M2, a transistor with a large SOA can be selected only for the first transistor M1, and transistors with small SOA can be selected for the remaining second transistors M2_1 to M2_3. This allows for a reduction in cost compared to the comparative technology.

[0056] This disclosure extends to various devices and methods as understood in the block diagram and circuit diagram of Figure 1, or derived from the above description, and is not limited to any particular configuration. More specific configuration examples and embodiments are described below, not to narrow the scope of this disclosure, but to aid in understanding and clarifying the essence and operation of this disclosure and the present invention.

[0057] Figure 5 is a circuit diagram of a circuit system 100A equipped with a hot-swap controller IC 200A according to an embodiment. The gate controller 210A includes a gate driver 212, a charge pump circuit 213, a control circuit 214, a constant voltage circuit 216, a voltage detection circuit 217, and a switch 218.

[0058] The charge pump circuit 213 adds a constant voltage Vdd to the output voltage Vout to generate the voltage Vdrv to be applied to the gate of switch SW1. This voltage Vdrv is supplied to the gate driver 212. The output voltage of the gate driver 212, i.e., the voltage level of the first gate voltage Vg1, is controlled by the control signal Sctrl generated by the control circuit 214.

[0059] The control circuit 214 is supplied with a current detection signal Vcs. The control circuit 214 may generate a control signal Scrrl so that the current I flowing through switch SW1 becomes a target quantity Iref. When switch SW1 is turned on, the target quantity Iref may be increased over time at a constant slope or based on an arbitrary waveform.

[0060] Alternatively, the control circuit 214 may generate a control signal Sctrl such that the power consumption P = I × Vds of switch SW1 becomes the target quantity Pref. When switch SW1 is turned on, the target quantity Pref may be increased over time at a constant slope or based on an arbitrary waveform.

[0061] Alternatively, the control circuit 214 may generate a control signal Scrl such that the first gate voltage Vg1 rises according to a constant slope or an arbitrary waveform.

[0062] The constant voltage circuit 216 is provided between the first gate terminal GATE1 and the second gate terminal GATE2, and maintains a constant potential difference ΔV between them. Therefore, the second gate voltage Vg2 generated at the second gate terminal GATE2 is expressed by the following equation, and the second gate voltage Vg2 rises with a delay while maintaining a constant potential difference with the first gate voltage Vg1. Vg2 = Vg1 - ΔV

[0063] For example, the constant voltage circuit 216 may include one or more diodes connected in series.

[0064] A switch 218 is provided between the first gate terminal GATE1 and the second gate terminal GATE2. The voltage detection circuit 217 compares the gate-source voltage Vgs1 = Vg1 - Vout of the first transistor M1 with a predetermined threshold voltage Vth. When Vgs1 > Vth, the voltage detection circuit 217 asserts the gate detection signal GATEDET1.

[0065] In response to the assertion of the gate detection signal GATEDET1, the control circuit 214 changes the control signal SWCTRL to the ON level, thereby turning on the switch 218.

[0066] The above describes the configuration of the hot-swap controller IC200A.

[0067] Figure 6 is a waveform diagram illustrating the operation of the hot-swap controller IC200A shown in Figure 5. When the enable signal EN is asserted at time t0, the control circuit 214 generates a control signal Sctrl to gradually turn on the switch SW1, thereby increasing the first gate voltage Vg1. The second gate voltage Vg2 increases while maintaining a constant potential difference ΔV with respect to the first gate voltage Vg1.

[0068] At time t1, when the gate-source voltage Vgs1 of the first transistor M1 reaches the threshold voltage Vth, the voltage detection circuit 217 asserts the gate detection signal GATEDET1. In response to the assertion of the gate detection signal GATEDET1, at time t2, the control circuit 214 changes the control signal SWCTRL to the ON level. This turns on the switch 218, bypasses the constant voltage circuit 216, and raises the second gate voltage Vg2 to a voltage level equal to the first gate voltage Vg1.

[0069] Next, we will describe a modified version of the circuit system 100.

[0070] In the hot-swap controller IC200A shown in Figure 5, two gate voltages Vg1 and Vg2 are generated by a combination of a single gate driver 212 and a constant voltage circuit 216, but the disclosure is not limited thereto. For example, two gate drivers may be provided, and two gate voltages Vg1 and Vg2 may be generated by inputting different control signals from the control circuit 214 to each gate driver.

[0071] While the embodiments described herein have been explained using specific terminology, this explanation is merely illustrative to aid understanding and does not limit the scope of this disclosure or the claims. The scope of the present invention is defined by the claims. Furthermore, not only the embodiments described herein, but also embodiments, examples, and modifications not described herein are included in the scope of the present invention.

[0072] (Note) This disclosure includes the following technologies:

[0073] (Item 1) A hot-swap controller circuit that controls multiple transistors connected in parallel, The first gate terminal to be connected to the gate of the first transistor, which is the one with the widest safe operating area among the plurality of transistors, A second gate terminal which should be connected to the gate of a second transistor other than the first transistor among the plurality of transistors, A gate controller that controls the voltage at the first gate terminal and the voltage at the second gate terminal, Equipped with, The gate controller is a hot-swap controller circuit that, when turning on the plurality of transistors, increases the voltage at the second gate terminal with a delay relative to the voltage at the first gate terminal.

[0074] (Item 2) The gate controller is a hot-swap controller circuit as described in item 1, which increases the voltage at the first gate terminal and the voltage at the second gate terminal while keeping their potential difference constant.

[0075] (Item 3) The aforementioned gate controller is A control circuit that generates control signals, A gate driver that generates a first gate voltage at the first gate terminal in response to the aforementioned control signal, A constant voltage circuit connected between the first gate terminal and the second gate terminal, The hot-swap controller circuit described in item 2, including the one shown.

[0076] (Item 4) The constant voltage circuit is a hot-swap controller circuit as described in item 3, comprising one or more diodes connected in series.

[0077] (Item 5) The control circuit is a hot-swap controller circuit according to item 3 or 4, which generates the control signal so that the current flowing through the plurality of transistors becomes a target amount.

[0078] (Item 6) The control circuit is a hot-swap controller circuit according to item 3 or 4, which generates the control signal so that the power consumption of the plurality of transistors becomes a target amount.

[0079] (Item 7) The control circuit is a hot-swap controller circuit according to item 3 or 4, which generates the control signal such that the first gate voltage changes according to a predetermined waveform.

[0080] (Item 8) The aforementioned gate controller is A voltage detection circuit asserts a gate detection signal when the gate-source voltage of the first transistor exceeds a predetermined threshold voltage. A switch connected between the first gate terminal and the second gate terminal, Includes, The control circuit is a hot-swap controller circuit according to any one of items 1 to 7, which turns on the switch when the gate detection signal is asserted.

[0081] (Item 9) A hot-swap controller circuit described in any of items 1 to 8, integrated onto a single semiconductor substrate.

[0082] (Item 10) Multiple transistors connected in parallel, A hot-swap controller circuit according to any one of items 1 to 6 for controlling the plurality of transistors, A circuit system equipped with the following features.

[0083] (Item 11) A first transistor is connected between the input terminal and the output terminal and has a first safe operating region, Between the input terminal and the output terminal, at least one second transistor is connected in parallel with the first transistor and has a second safe operating region narrower than the first safe operating region. A hot-swap controller circuit that controls the first transistor and the at least one second transistor, Equipped with, The hot-swap controller circuit is a circuit system that turns on at least one second transistor later than the first transistor. [Explanation of symbols]

[0084] 100 Circuit System SW1 Switch M1 First Transistor M2 Second Transistor R1 Sense Resistor 200 Hot-Swap Controller ICs GATE1 First Gate Terminal GATE2 Second Gate Terminal Vg1 First gate voltage Vg2 Second gate voltage 210 Gate Controller 212 Gate Driver 213 Charge pump circuit 214 Control circuits 216 Constant Voltage Circuit 217 Voltage detection circuit 218 switches 220 Current Sense Amplifier

Claims

1. A hot-swap controller circuit that controls multiple transistors connected in parallel, The first gate terminal to be connected to the gate of the first transistor, which is the one with the widest safe operating area among the plurality of transistors, A second gate terminal which is to be connected to the gate of a second transistor other than the first transistor among the plurality of transistors, A gate controller that controls the voltage at the first gate terminal and the voltage at the second gate terminal, Equipped with, A hot-swap controller circuit that controls the voltage at the first gate terminal and the voltage at the second gate terminal so that when the plurality of transistors are turned on, the first transistor turns on before the second transistor.

2. The hot-swap controller circuit according to claim 1, wherein the gate controller increases the voltage at the first gate terminal and the voltage at the second gate terminal while keeping the potential difference between them constant.

3. The aforementioned gate controller is A control circuit that generates control signals, A gate driver that generates a first gate voltage at the first gate terminal in response to the aforementioned control signal, A constant voltage circuit connected between the first gate terminal and the second gate terminal, The hot-swap controller circuit according to claim 2, including the above.

4. The hot-swap controller circuit according to claim 3, wherein the constant voltage circuit includes one or a plurality of diodes connected in series.

5. The hot-swap controller circuit according to claim 3 or 4, wherein the control circuit generates the control signal so that the current flowing through the plurality of transistors becomes a target amount.

6. The hot-swap controller circuit according to claim 3 or 4, wherein the control circuit generates the control signal so that the power consumption of the plurality of transistors becomes a target amount.

7. The hot-swap controller circuit according to claim 3 or 4, wherein the control circuit generates the control signal such that the first gate voltage changes according to a predetermined waveform.

8. The aforementioned gate controller is A voltage detection circuit asserts a gate detection signal when the gate-source voltage of the first transistor exceeds a predetermined threshold voltage, A switch connected between the first gate terminal and the second gate terminal, Includes, The hot-swap controller circuit according to any one of claims 1 to 4, wherein the control circuit turns on the switch when the gate detection signal is asserted.

9. A hot-swap controller circuit according to any one of claims 1 to 4, which is integrated on a single semiconductor substrate.

10. Multiple transistors connected in parallel, A hot-swap controller circuit according to any one of claims 1 to 4 for controlling the plurality of transistors, A circuit system equipped with the following features.

11. A first transistor is connected between the input terminal and the output terminal and has a first safe operating region, Between the input terminal and the output terminal, at least one second transistor is connected in parallel with the first transistor and has a second safe operating region narrower than the first safe operating region. A hot-swap controller circuit that controls the first transistor and the at least one second transistor, Equipped with, The hot-swap controller circuit is a circuit system that turns on at least one second transistor later than the first transistor.

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