Battery control system

Abstract

To provide a battery control system in which the control circuit that controls the FETs for controlling the charging of the secondary battery and the FET for controlling the discharging of the secondary battery can operate even when both of these FETs are turned off. [Solution] The anode of the parasitic diode of the charging FET 30 of the secondary battery 2 is electrically connected to the positive electrode of the secondary battery 2. The cathode of the parasitic diode of the discharging FET 40 of the secondary battery 2 is electrically connected to the cathode of the parasitic diode of the charging FET 30. The power supply path 60f that supplies power to the control circuit 10 is electrically connected to the cathode of the parasitic diode of the charging FET 30 and the cathode of the parasitic diode of the discharging FET 40, and to the control circuit 10 that controls the on and off of the charging FET 30 and the discharging FET 40. Current from the secondary battery 2 is supplied to the control circuit 10 via the parasitic diode 31 of the charging FET 30 and the power supply path 60f.

Description

Technical Field

[0001] The present disclosure relates to a battery control system for controlling charging and discharging of a secondary battery.

Background Art

[0002] Conventionally, various techniques for controlling charging and discharging of secondary batteries have been proposed. As an example of such a technique, Patent Document 1 discloses a secondary battery pack including a field effect transistor (FET) for charging, a field effect transistor for discharging, and a control circuit for detecting an overcurrent of the secondary battery and controlling these field effect transistors.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the secondary battery pack disclosed in Patent Document 1, there is a problem that when both the field effect transistor for charging and the field effect transistor for discharging are off, no current is supplied from the secondary battery to the control circuit, and the control circuit cannot operate.

[0005] The present disclosure solves such a problem, and an object thereof is to provide a battery control system in which a control circuit for controlling these field effect transistors can operate even when both the field effect transistor used for charging control of the secondary battery and the field effect transistor used for discharging control of the secondary battery are off.

Means for Solving the Problems

[0006] The battery control system according to the present disclosure is A charging field-effect transistor, which is a field-effect transistor used for controlling the charging of secondary batteries, A discharge field-effect transistor, which is a field-effect transistor used for controlling the discharge of secondary batteries, A control circuit for controlling the on and off states of a charging field-effect transistor and a discharging field-effect transistor, Includes a power supply path that supplies power to the control circuit, The anode of the parasitic diode of the charging field-effect transistor is electrically connected to the positive electrode of the secondary battery. The cathode of the parasitic diode of the discharge field-effect transistor is electrically connected to the cathode of the parasitic diode of the charging field-effect transistor. The power supply path is electrically connected to the cathode of the parasitic diode of the charging field-effect transistor and the cathode of the parasitic diode of the discharging field-effect transistor, and to the control circuit. When the charging field-effect transistor is off, current from the secondary battery is supplied to the control circuit via the parasitic diode and power supply path of the charging field-effect transistor.

[0007] Furthermore, the anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the positive terminal of the charger. When the discharge field-effect transistor is off, current from the charger is supplied to the control circuit via the parasitic diode and power supply path of the discharge field-effect transistor.

[0008] Furthermore, the anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the load. The control circuit turns off the discharge field-effect transistor when the measured voltage of the secondary battery is below a predetermined over-discharge prevention voltage, thereby prohibiting the supply of current from the secondary battery to the load.

[0009] Furthermore, the control circuit turns off the charging field-effect transistor to prevent charging of the secondary battery when the measured voltage of the secondary battery is above a predetermined overcharge prevention voltage.

[0010] Furthermore, the anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the load. The control circuit, when the measured temperature of the secondary battery is above a predetermined charge / discharge prohibition temperature, turns off the charging field-effect transistor and the discharging field-effect transistor, thereby prohibiting charging of the secondary battery and supplying current from the secondary battery to the load.

[0011] Furthermore, the control circuit turns off the charging field-effect transistor when the measured temperature of the secondary battery is below a predetermined charging prohibition temperature, thereby prohibiting the charging of the secondary battery. [Effects of the Invention]

[0012] This disclosure provides a battery control system in which the control circuit for controlling field-effect transistors can operate even when both the field-effect transistors used for charging the secondary battery and the field-effect transistors used for discharging the secondary battery are turned off. [Brief explanation of the drawing]

[0013] [Figure 1] This figure shows an example of a battery control system related to this disclosure. [Figure 2] This figure shows an example of the functions of the FET control circuit related to this disclosure. [Figure 3] This flowchart shows an example of a discharge control process for a secondary battery based on the measured voltage. [Figure 4] This flowchart shows an example of a secondary battery charging control process based on measured voltage. [Figure 5] This figure shows an example of how the voltage of a secondary battery changes over time. [Figure 6] This flowchart shows an example of a discharge control process for a secondary battery based on measured temperature. [Figure 7] This flowchart shows an example of a secondary battery charging control process based on measured temperature. [Figure 8] This figure shows another example of the change in voltage of a secondary battery over time.

Best Mode for Carrying Out the Invention

[0014] FIG. 1 is a diagram showing an example of a battery control system 1 according to the present disclosure. The battery control system 1 is a system that controls one or more secondary batteries 2. In the example shown in FIG. 1, a battery pack composed of a plurality of secondary batteries 2 is shown, but the battery control system 1 can also control a single secondary battery 2.

[0015] The battery control system 1 is electrically connected to a charger 4 when the secondary battery 2 is being charged. FIG. 1 shows a state where the charger 4 is connected to the battery control system 1. The charger 4 can be electrically connected to the secondary battery 2 via connection means (not shown) such as connection terminals and cables. The charger 4 may charge the secondary battery 2 by wireless charging.

[0016] The secondary battery 2 is electrically connected to the charger 4 via the battery control system 1 and is charged by the electricity supplied by the charger 4. Also, the secondary battery 2 is electrically connected to the battery control system 1 and supplies current to the load 3 via the battery control system 1.

[0017] The load 3 is a device to which the secondary battery 2 supplies current, and is, for example, various devices such as a motor, a smartphone, and a streetlight. The load 3 is electrically connected to the battery control system 1 via electric wires 70a and 70b.

[0018] The battery control system 1 includes a control circuit 10, a temperature sensor 20, a charging FET 30, a discharging FET 40, and a capacitor 50. These components are electrically connected via electric wires 60a to 60j.

[0019] The control circuit 10 is a circuit for controlling the switching between on and off of the charging FET 30 and the discharging FET 40 based on the measured voltage and measured temperature of the secondary battery 2. The control circuit 10 can control the charging FET 30 and the discharging FET 40 while power is being supplied.

[0020] The control circuit 10 comprises a voltage detection circuit 11, a temperature detection circuit 12, and an FET control circuit 13. These circuits can be implemented using integrated circuits such as FPGAs (Field-Programmable Gate Arrays) or ASICs (Application Specific Integrated Circuits).

[0021] The voltage detection circuit 11 is a circuit that detects the voltage of the secondary battery 2. In the example shown in Figure 1, the voltage detection circuit 11 detects the voltage of each of the multiple secondary batteries 2, but alternatively, it may detect the total voltage of the secondary battery 2. The voltage detection circuit 11 transmits an electrical signal indicating the measured voltage, which is the detected voltage, to the FET control circuit 13.

[0022] The temperature detection circuit 12 is a circuit that transmits an electrical signal indicating the measured temperature, which is the temperature of the secondary battery 2 detected by the temperature sensor 20, to the FET control circuit 13. In the example shown in Figure 1, the voltage detection circuit 11 and the temperature detection circuit 12 are configured as separate circuits, but the voltage detection circuit 11 and the temperature detection circuit 12 can be configured as a single circuit.

[0023] The FET control circuit 13 is a circuit that controls the on / off state of the charging FET 30 and the discharging FET 40 based on the measured voltage and temperature of the secondary battery 2. Details of the functions of the FET control circuit 13 will be described later.

[0024] The temperature sensor 20 is a sensor that detects the temperature of the secondary battery 2. The temperature sensor 20 transmits an electrical signal indicating the measured temperature of the secondary battery 2 to the control circuit 10 via the electrical wire 60e.

[0025] The charging FET 30 is an FET used for controlling the charging of the secondary battery 2. Specific examples of the charging FET 30 include metal-oxide-semiconductor field-effect transistors (MOSFETs). In this invention, P-channel MOSFETs and N-channel MOSFETs can be used as the charging FET 30. Figure 1 shows a circuit diagram when a P-channel MOSFET is used as the charging FET 30. The parasitic diode of a P-channel MOSFET allows current to flow from the drain to the source. On the other hand, the parasitic diode of an N-channel MOSFET allows current to flow from the source to the drain. Therefore, in other embodiments where an N-channel MOSFET is used as the charging FET 30, the drain and source of the MOSFET are swapped so that the direction of the parasitic diode of the N-channel MOSFET is the same as the direction of the parasitic diode of the charging FET 30 shown in Figure 1.

[0026] The gate of the charging FET 30 is electrically connected to the control circuit 10 via the electrical wire 60a. The source of the charging FET 30 is electrically connected to the source of the discharging FET 40 via the electrical wire 60b. The drain of the charging FET 30 is electrically connected to the secondary battery 2 via the electrical wire 60c.

[0027] The charging FET 30 is equipped with a parasitic diode 31, which is a reverse current prevention element. The parasitic diode 31 allows the current supplied from the secondary battery 2 via the electrical wire 60c to flow to the electrical wire 60b, while preventing the flow of current in the reverse direction.

[0028] The discharge FET 40 is an FET used for controlling the discharge of the secondary battery 2. Specific examples of the discharge FET 40 include MOSFETs. MOSFETs that can be used as the discharge FET 40 include P-channel MOSFETs and N-channel MOSFETs. In this invention, P-channel MOSFETs and N-channel MOSFETs can be used as the discharge FET 40. Figure 1 shows a circuit diagram when a P-channel MOSFET is used as the discharge FET 40. In an embodiment where an N-channel MOSFET is used as the discharge FET 40, the drain and source of the MOSFET are swapped so that the direction of the parasitic diode of the N-channel MOSFET is the same as the direction of the parasitic diode of the discharge FET 40 shown in Figure 1.

[0029] The gate of the discharge FET 40 is electrically connected to the control circuit 10 via the electrical wire 60d. The source of the discharge FET 40 is electrically connected to the source of the charge FET 30 via the electrical wire 60b. The drain of the discharge FET 40 is electrically connected to the charger 4 via the electrical wire 80a.

[0030] The discharge FET 40 is equipped with a parasitic diode 41, which is a reverse current prevention element. The parasitic diode 41 allows the current supplied from the charger 4 via the electrical wire 60e to flow to the electrical wire 60b, while preventing the flow of current in the reverse direction.

[0031] Therefore, when the charger 4 is not electrically connected to the battery control system 1 and the discharge FET 40 is in the ON state, the current supplied from the secondary battery 2 flows to the load 3 via the electrical wire 60c, the charging FET 30, the electrical wire 60b, the discharge FET 40, the electrical wire 80a, and the electrical wire 70a. On the other hand, when the charger 4 is not electrically connected to the battery control system 1 and the discharge FET 40 is in the OFF state, the current supplied from the secondary battery 2 does not flow to the load 3.

[0032] Furthermore, even when the charging FET 30 is in the off state, the current supplied from the secondary battery 2 is supplied to the control circuit 10 via the electrical wire 60c, the parasitic diode 31 of the charging FET 30, and the power supply path 60f.

[0033] When the charger 4 is electrically connected to the battery control system 1, the current supplied from the charger 4 flows to the control circuit 10 via the electrical wire 80a, the discharge FET 40, the electrical wire 60b, and the electrical wire 60f. When the charger 4 is electrically connected to the battery control system 1 with the discharge FET 40 in the off state, the current supplied from the charger 4 flows to the control circuit 10 via the electrical wire 80a, the parasitic diode 41 of the discharge FET 40, the electrical wire 60b, and the electrical wire 60f. The electrical wire 60f is also referred to as the power supply path of the control circuit 10. The power supply path 60f is electrically connected to the source of the charging FET 30 and the source of the discharge FET 40 and to the control circuit 10.

[0034] When the charging FET 30 is ON, and the charger 4 is electrically connected to the battery control system 1, the current supplied from the charger 4 flows to the secondary battery 2 via the electrical wire 80a, the discharge FET 40, the electrical wire 60b, the charging FET 30, and the electrical wire 60c. On the other hand, when the charging FET 30 is OFF, even if the charger 4 is electrically connected to the battery control system 1, the current supplied from the charger 4 is interrupted by the charging FET 30, so no current flows to the secondary battery 2.

[0035] The capacitor 50 is an energy storage element that stores energy from the secondary battery 2 and the charger 4. One terminal of the capacitor 50 is electrically connected to the positive terminal of the secondary battery 2 via electrical wires 60g, 60b, the charging FET 30, and 60c, while the other terminal is electrically connected to the negative terminal of the secondary battery 2 via electrical wires 60h and 60i. As shown in Figure 1, the one terminal of the capacitor 50 is electrically connected to the source of the charging FET 30 and the source of the discharging FET 40.

[0036] Furthermore, one terminal of the capacitor 50 is electrically connected to the positive terminal of the charger 4 via the electrical wire 60g, the discharge FET 40, and the electrical wire 80a, while the other terminal is electrically connected to the negative terminal of the charger 4 via the electrical wires 60h and 80b.

[0037] Furthermore, one terminal of the capacitor 50 is electrically connected to the control circuit 10 via electrical wires 60g, 60b, and power supply line 60f, and the other terminal is electrically connected to the control circuit 10 via electrical wires 60h, 60i, and 60j.

[0038] When the charger 4 is connected to the battery control system 1, the capacitor 50 stores electricity supplied from the charger 4. On the other hand, when the charger 4 is not connected to the battery control system 1, the capacitor 50 stores electricity supplied from the secondary battery 2. Because the voltage of the secondary battery 2 is applied to the capacitor 50 even when the charging FET 30 is off, the capacitor 50 maintains a voltage equivalent to the voltage of the secondary battery 2 on the electrical wire 60b. This prevents the electrical wire 60b from becoming high impedance and unstable. Therefore, even when the charging FET 30 is off, the charger 4, which has a function to determine the voltage of the secondary battery 2, can continue to determine the voltage of the secondary battery 2.

[0039] Figure 2 shows an example of the functions of the FET control circuit 13. The FET control circuit 13 is composed of integrated circuits such as FPGA (Field-Programmable Gate Array) and ASIC (Application Specific Integrated Circuit). Alternatively, a processor such as a CPU (Central Processing Unit) or MPU (Micro Processing Unit) may execute the processing performed by the FET control circuit 13. Integrated circuits such as processors, MPUs, FPGAs, and ASICs are equivalent to a computer.

[0040] The FET control circuit 13 includes a measurement voltage acquisition unit 130, a measurement temperature acquisition unit 131, a measurement voltage determination unit 132, a measurement temperature determination unit 133, a charging FET state determination unit 134, a discharging FET state determination unit 135, a charging FET control unit 136, and a discharging FET control unit 137.

[0041] The voltage measurement unit 130 acquires the measured voltage of the secondary battery 2 from the voltage detection circuit 11. The temperature measurement unit 131 acquires the measured temperature of the secondary battery 2 from the temperature detection circuit 12.

[0042] The measured voltage determination unit 132 determines the measured voltage by comparing the measured voltage of the secondary battery 2 with a predetermined voltage. The predetermined voltage includes the charge prohibition voltage, charge recovery voltage, discharge recovery voltage, discharge prohibition voltage, and circuit operation stop voltage. The charge prohibition voltage is the largest of these voltages, and the circuit operation stop voltage is the smallest. The relative magnitudes of these voltages are as shown in Figure 5.

[0043] The charging prohibition voltage is a voltage designed to prevent overcharging of the secondary battery 2, and is less than the voltage of the secondary battery 2 when it is overcharged. The charging recovery voltage is a voltage designed to turn on the charging FET 30, which was turned off due to the rise in the voltage of the secondary battery 2.

[0044] The discharge prohibition voltage is a voltage to prevent over-discharge of the secondary battery 2, and is a value greater than the voltage of the secondary battery 2 in an over-discharged state. The discharge recovery voltage is a voltage to turn on the discharge FET 40, which has been turned off due to the drop in the voltage of the secondary battery 2.

[0045] The circuit shutdown voltage is the voltage at which the FET control circuit 13 stops operating. The FET control circuit 13 can operate when the voltage applied to the control circuit 10 is equal to or greater than the circuit shutdown voltage. In other words, the FET control circuit 13 stops operating when the voltage applied to the control circuit 10 falls below the circuit shutdown voltage.

[0046] The temperature measurement determination unit 133 determines the measured temperature by comparing it with a predetermined temperature. The predetermined temperature includes the charge / discharge prohibition temperature, the charge / discharge recovery temperature, the charge recovery temperature, and the charge prohibition temperature. The charge / discharge prohibition temperature is the maximum temperature, and the charge prohibition temperature is the minimum temperature. The relative magnitudes of these temperatures are shown in Figure 8.

[0047] The charge / discharge prohibition temperature is the temperature at which charging and discharging of the secondary battery 2 is prohibited at high temperatures, thereby suppressing further heat generation of the secondary battery 2 at high temperatures. The charge / discharge prohibition temperature can be set to any value depending on the performance of the secondary battery 2. The charge / discharge recovery temperature is the temperature at which the charging FET 30 and discharging FET 40, which were turned off due to the rise in temperature of the secondary battery 2, are turned on.

[0048] The charging prohibition temperature is the temperature at which charging of the secondary battery 2 is prohibited at low temperatures, thereby suppressing heat generation in the secondary battery 2 at low temperatures. The charge / discharge prohibition temperature can be set to any value depending on the performance of the secondary battery 2. The charging recovery temperature is the temperature at which the charging FET 30, which has been turned off due to the decrease in the temperature of the secondary battery 2, is turned on.

[0049] The charging FET state determination unit 134 determines the on and off state of the charging FET 30. The discharging FET state determination unit 135 determines the on and off state of the discharging FET 40.

[0050] The charging FET control unit 136 controls the on and off state of the charging FET 30. The discharging FET control unit 137 controls the on and off state of the discharging FET 40.

[0051] Figure 3 is a flowchart showing an example of discharge control processing for the secondary battery 2 based on the measured voltage. In step S1, the measured voltage acquisition unit 130 of the FET control circuit 13 acquires the measured voltage of the secondary battery 2. In step S2, the discharge FET state determination unit 135 determines the state of the discharge FET 40.

[0052] If it is determined that the discharge FET 40 is ON, in step S3 the measurement voltage determination unit 132 determines whether the measured voltage is below the discharge prohibition voltage. If it is determined that the measured voltage exceeds the discharge prohibition voltage (NO), the process returns to step S1. On the other hand, if it is determined that the measured voltage is below the discharge prohibition voltage (YES), in step S4 the discharge FET control unit 137 turns off the discharge FET and the process returns to step S1.

[0053] If it is determined in step S2 that the discharge FET 40 is in the off state, in step S5 the measurement voltage determination unit 132 determines whether the measured voltage is equal to or greater than the discharge recovery voltage. If it is determined that the measured voltage is less than the discharge recovery voltage (NO), the process returns to step S1. On the other hand, if it is determined that the measured voltage is equal to or greater than the discharge recovery voltage (YES), in step S6 the discharge FET control unit 137 turns on the discharge FET and the process returns to step S1.

[0054] Figure 4 is a flowchart showing an example of a charging control process for the secondary battery 2 based on the measured voltage. In step S10, the measured voltage acquisition unit 130 of the FET control circuit 13 acquires the measured voltage of the secondary battery 2. In step S11, the charging FET state determination unit 134 determines the state of the charging FET 30.

[0055] If it is determined that the charging FET 30 is in the ON state, in step S12 the measurement voltage determination unit 132 determines whether the measured voltage is equal to or greater than the charging prohibition voltage. If it is determined that the measured voltage is less than the charging prohibition voltage (NO), the process returns to step S10. On the other hand, if it is determined that the measured voltage is equal to or greater than the charging prohibition voltage (YES), in step S13 the charging FET control unit 136 turns off the charging FET and the process returns to step S10.

[0056] If it is determined in step S11 that the charging FET 30 is in the off state, in step S14 the measured voltage determination unit 132 determines whether the measured voltage is less than or equal to the charging recovery voltage. If it is determined that the measured voltage exceeds the charging recovery voltage (NO), the process returns to step S10. On the other hand, if it is determined that the measured voltage is less than or equal to the charging recovery voltage (YES), in step S15 the charging FET control unit 136 turns on the charging FET and the process returns to step S10.

[0057] Figure 5 shows an example of the change in voltage of secondary battery 2 over time. The example in Figure 5 starts with the discharge FET 40 and charge FET 30 in the ON state.

[0058] When the discharge FET 40 is ON and discharge begins due to power consumption by load 3, the voltage of the secondary battery 2 gradually decreases. When the voltage of the secondary battery 2 reaches the discharge prohibition voltage, the FET control circuit 13 turns off the discharge FET. As a result, the discharge of the secondary battery 2 stops, and the decrease in the voltage of the secondary battery 2 stops.

[0059] Next, when the charger 4 is connected while the charging FET 30 is ON, charging of the secondary battery 2 begins, and the voltage of the secondary battery 2 gradually increases. When the voltage of the secondary battery 2 reaches the discharge recovery voltage, the FET control circuit 13 turns on the discharge FET. Then, when the voltage of the secondary battery 2 reaches the charging prohibition voltage, the FET control circuit 13 turns off the charging FET. As a result, charging of the secondary battery 2 stops, and the increase in the voltage of the secondary battery 2 stops.

[0060] Next, when discharge begins due to power consumption by load 3, the voltage of secondary battery 2 gradually decreases. When the voltage of secondary battery 2 reaches the discharge prohibition voltage, the FET control circuit 13 turns off the discharge FET. If secondary battery 2 is not charged in this state, as shown in Figure 5, the voltage of secondary battery 2 decreases due to the current consumption of the control circuit 10, etc. Then, when the voltage of secondary battery 2 reaches the circuit operation stop voltage, the control circuit 10 stops.

[0061] Then, when the charger 4 is connected to the battery control system 1 and current is supplied to the control circuit 10, the control circuit 10 starts up, and the FET control circuit 13 performs discharge control processing and charge control processing. In this charge control processing, the FET control circuit 13 determines that the measured voltage of the secondary battery 2 is below the recovery voltage and turns on the charging FET 30. As a result, charging of the secondary battery 2 by the charger 4 begins.

[0062] Figure 6 is a flowchart showing an example of discharge control processing for the secondary battery 2 based on the measured temperature. In step S20, the temperature acquisition unit 131 acquires the measured temperature of the secondary battery 2. In step S21, the discharge FET state determination unit 135 determines the state of the discharge FET 40.

[0063] If it is determined that the discharge FET 40 is in the ON state, in step S22 the measurement temperature determination unit 133 determines whether the measured temperature is above the charge / discharge prohibition temperature. If it is determined that the measured temperature is below the charge / discharge prohibition temperature (NO), the process returns to step S20. On the other hand, if it is determined that the measured temperature is above the charge / discharge prohibition temperature (YES), in step S23 the discharge FET control unit 137 turns off the discharge FET and the process returns to step S20.

[0064] If it is determined in step S21 that the discharge FET 40 is in the off state, in step S24 the measurement temperature determination unit 133 determines whether the measured temperature is below the charge / discharge recovery temperature. If it is determined that the measured temperature exceeds the charge / discharge recovery temperature (NO), the process returns to step S20. On the other hand, if it is determined that the measured temperature is below the charge / discharge recovery temperature (YES), in step S25 the discharge FET control unit 137 turns on the discharge FET and the process returns to step S20.

[0065] Figure 7 is a flowchart showing an example of a charging control process for the secondary battery 2 based on the measured temperature. In step S30, the measured temperature acquisition unit 131 acquires the measured temperature of the secondary battery 2. In step S31, the charging FET state determination unit 134 determines the state of the charging FET 30.

[0066] If it is determined that the charging FET 30 is ON, in step S32 the measured temperature determination unit 133 determines whether the measured temperature is above the charge / discharge prohibited temperature or below the charge prohibited temperature. If it is determined that the measured temperature is not above the charge / discharge prohibited temperature or below the charge prohibited temperature (NO), the process returns to step S30. On the other hand, if it is determined that the measured temperature is above the charge / discharge prohibited temperature or below the charge prohibited temperature (YES), in step S33 the charging FET control unit 136 turns off the charging FET and the process returns to step S30.

[0067] If it is determined in step S31 that the charging FET 30 is in the off state, in step S34 the measured temperature determination unit 133 determines whether the measured temperature is below the charge / discharge recovery temperature or above the charge recovery temperature. If it is determined that the measured temperature is not below the charge / discharge recovery temperature or above the charge recovery temperature (NO), the process returns to step S30. On the other hand, if it is determined that the measured temperature is below the charge / discharge recovery temperature or above the charge recovery temperature (YES), in step S35 the charging FET control unit 136 turns on the charging FET and the process returns to step S30.

[0068] Figure 8 shows another example of the voltage change of the secondary battery 2 over time. In the example in Figure 8, with the discharge FET 40 and the charge FET 30 turned on, the temperature of the secondary battery 2 starts higher than the charge recovery temperature but lower than the charge / discharge recovery temperature.

[0069] As shown in Figure 8, when the temperature of the secondary battery 2 drops and reaches the charging prohibition temperature, the FET control circuit 13 turns off the charging FET 30. As a result, the secondary battery 2 cannot be charged, thus preventing it from being charged at low temperatures.

[0070] Next, when the temperature of the secondary battery 2 rises to the charging recovery temperature, the FET control circuit 13 turns on the discharge FET. This makes the secondary battery 2 ready for charging.

[0071] Furthermore, when the temperature of the secondary battery 2 rises to the charge / discharge prohibited temperature, the FET control circuit 13 turns off the charging FET 30 and the discharging FET. This prevents the secondary battery 2 from being charged or discharged, thus preventing it from being charged or discharged at high temperatures.

[0072] Next, when the temperature of the secondary battery 2 drops below the charge / discharge recovery temperature, the FET control circuit 13 turns on the charging FET 30 and the discharging FET. This makes the secondary battery 2 ready for charging and discharging.

[0073] Furthermore, when the temperature of the secondary battery 2 drops below the charging prohibition temperature, the FET control circuit 13 turns off the charging FET 30. This prevents the secondary battery 2 from being charged.

[0074] As described above, the battery control system 1 includes a charging FET 30, which is a field-effect transistor used for charging control of the secondary battery 2; a discharging FET 40, which is a field-effect transistor used for discharging control of the secondary battery 2; an FET control circuit 13 that controls the on and off states of the charging FET 30 and the discharging FET 40; and a power supply path 60f that supplies power to the FET control circuit 13. The anode of the parasitic diode 31 of the charging FET 30 is electrically connected to the positive terminal of the secondary battery 2. The anode of the parasitic diode 31 is the upstream connection point in the current direction of the parasitic diode 31, or in other words, the connection point on the secondary battery side. Specifically, the anode of the parasitic diode 31 corresponds to the drain of a P-channel MOSFET and also to the source of an N-channel MOSFET.

[0075] The cathode of the parasitic diode 41 of the discharge FET 40 is electrically connected to the cathode of the parasitic diode 31 of the charge FET 30. The cathode of the parasitic diode 41 is the downstream connection point in the current direction of the parasitic diode 41, in other words, the connection point on the secondary battery side. Specifically, the cathode of the parasitic diode 41 corresponds to the source of a P-channel MOSFET and also to the drain of an N-channel MOSFET. The cathode of the parasitic diode 31 is the downstream connection point in the current direction of the parasitic diode 31, in other words, the connection point on the charger side. Specifically, the cathode of the parasitic diode 31 corresponds to the source of a P-channel MOSFET and also to the drain of an N-channel MOSFET.

[0076] The power supply path 60f is electrically connected to the cathode of the parasitic diode 31 of the charging FET 30 and the cathode of the parasitic diode 41 of the discharging FET 40, and to the FET control circuit 13. When the charging FET 30 is off, current from the secondary battery 2 is supplied to the control circuit 10 via the parasitic diode 31 of the charging FET 30 and the power supply path 60f.

[0077] By adopting this configuration, even when the charging FET 30 is off, current is supplied from the secondary battery 2 to the control circuit 10 via the parasitic diode 31 of the charging FET 30 and the power supply path 60f. Furthermore, the current supplied from the secondary battery 2 flows to the control circuit 10 without passing through the discharge FET 40. Therefore, even when the charging FET 30 and the discharge FET 40 are off, the control circuit 10 that controls these FETs can operate.

[0078] Furthermore, in the embodiment described above, the anode of the parasitic diode 41 of the discharge FET 40 is electrically connected to the positive terminal of the charger 4. The anode of the parasitic diode 41 is the upstream connection point in the current direction of the parasitic diode 41, or in other words, the connection point on the charger side. Specifically, the cathode of the parasitic diode 41 corresponds to the drain of a P-channel MOSFET and also to the source of an N-channel MOSFET. When the discharge FET 40 is off, the current from the charger 4 is supplied to the control circuit 10 via the parasitic diode 41 of the discharge FET 40 and the power supply path 60f.

[0079] By adopting this configuration, even when the discharge FET 40 is off, current is supplied from the charger 4 to the control circuit 10 via the parasitic diode 41 of the discharge FET 40 and the power supply path 60f. Furthermore, the current supplied from the charger 4 flows to the control circuit 10 without passing through the charging FET 30. Therefore, the control circuit 10 can operate even when both the charging FET 30 and the discharge FET 40 are off.

[0080] Furthermore, in the embodiment described above, the anode of the parasitic diode 41 of the discharge FET 40 is electrically connected to the load 3. When the measured voltage of the secondary battery 2 is below a predetermined over-discharge prevention voltage, the FET control circuit 13 turns off the discharge FET 40, thereby prohibiting the supply of current from the secondary battery 2 to the load 3. This prevents the secondary battery 2 from entering an over-discharge state.

[0081] Furthermore, in the embodiment described above, the FET control circuit 13 turns off the charging FET 30 and prohibits charging of the secondary battery 2 when the measured voltage of the secondary battery 2 is equal to or greater than a predetermined overcharge prevention voltage. This prevents the secondary battery 2 from entering an overcharged state.

[0082] Furthermore, in the embodiment described above, the anode of the parasitic diode 41 of the discharge FET 40 is electrically connected to the load 3. When the measured temperature of the secondary battery 2 is above a predetermined charge / discharge prohibition temperature, the FET control circuit 13 turns off the charge FET 30 and the discharge FET 40, thereby prohibiting charging of the secondary battery 2 and supplying current from the secondary battery 2 to the load 3. As a result, charging and discharging of the secondary battery 2 is prevented, and the temperature rise of the secondary battery 2 can be suppressed.

[0083] Furthermore, in the embodiment described above, the FET control circuit 13 turns off the charging FET 30 when the measured temperature of the secondary battery 2 is below a predetermined charging prohibition temperature, thereby prohibiting charging of the secondary battery 2. This prevents charging of the secondary battery 2, and thus suppresses failure of the secondary battery 2 due to charging at extremely low temperatures.

[0084] In the above example, the program describing the charge control process and / or discharge control process can be stored and provided to the computer using various types of non-transitory computer-readable medium. Non-transitory computer-readable mediums include various types of tangible storage mediums. Examples of non-transitory computer-readable mediums include magnetic storage media (e.g., flexible disks, magnetic tapes, hard disk drives), magneto-optical storage media (e.g., magneto-optical disks), CD-ROMs, CD-Rs, CD-R / Ws, and semiconductor memory (e.g., mask ROMs, PROMs (Programmable ROMs), EPROMs (Erasable PROMs), flash ROMs, RAMs). Alternatively, the program may be provided to the computer using various types of transient computer-readable mediums. Examples of transient computer-readable mediums include electrical signals, optical signals, and electromagnetic waves. Transitory computer-readable mediums can supply the program to the computer via wired communication channels such as electric wires and optical fibers, or via wireless communication channels.

[0085] This disclosure is not limited to the embodiments described above, and may be modified as appropriate without departing from the spirit of this disclosure. [Explanation of symbols]

[0086] 1: Battery control system 2: Secondary battery 3: Load 4: Charger 10: Control circuit 11: Voltage detection circuit 12: Temperature detection circuit 13: FET control circuit 130: Measurement voltage acquisition unit 131: Measurement and temperature acquisition unit 132: Measurement voltage determination unit 133: Measurement and temperature determination unit 134: Charging FET state determination unit 135: Discharge FET state determination unit 136: FET control unit for charging 137: Discharge FET control unit 20: Temperature sensor 30: Charging FET 31: Parasitic diode 40: Discharge FET 41: Parasitic diode 50: Capacitor, energy storage element 60A~60J: Electric wire 60f: Power supply path 70a, 70b: Electric wires 80a, 80b: Electric wires

Claims

1. A charging field-effect transistor, which is a field-effect transistor used for controlling the charging of secondary batteries, A discharge field-effect transistor, which is a field-effect transistor used for controlling the discharge of the aforementioned secondary battery, A control circuit for controlling the on and off states of the charging field-effect transistor and the discharging field-effect transistor, Includes a power supply path that supplies power to the control circuit, The anode of the parasitic diode of the charging field-effect transistor is electrically connected to the positive electrode of the secondary battery. The cathode of the parasitic diode of the discharge field-effect transistor is electrically connected to the cathode of the parasitic diode of the charging field-effect transistor. The power supply path is electrically connected to the cathode of the parasitic diode of the charging field-effect transistor and the cathode of the parasitic diode of the discharging field-effect transistor and to the control circuit. When the charging field-effect transistor is off, the current from the secondary battery is supplied to the control circuit via the parasitic diode of the charging field-effect transistor and the power supply path. Battery control system.

2. The anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the positive terminal of the charger. The battery control system according to claim 1, wherein when the discharge field-effect transistor is off, the current from the charger is supplied to the control circuit via the parasitic diode of the discharge field-effect transistor and the power supply path.

3. The anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the load. The battery control system according to claim 1 or 2, wherein the control circuit turns off the discharge field-effect transistor when the measured voltage of the secondary battery is below a predetermined over-discharge prohibition voltage, thereby prohibiting the supply of current from the secondary battery to the load.

4. The battery control system according to claim 1 or 2, wherein the control circuit turns off the charging field-effect transistor to prohibit charging of the secondary battery when the measured voltage of the secondary battery is equal to or greater than a predetermined overcharge prohibition voltage.

5. The anode of the parasitic diode of the discharge field-effect transistor is electrically connected to the load. The battery control system according to claim 1 or 2, wherein the control circuit turns off the charging field-effect transistor and the discharging field-effect transistor when the measured temperature of the secondary battery is above a predetermined charge / discharge prohibition temperature, thereby prohibiting charging of the secondary battery and supplying current from the secondary battery to the load.

6. The battery control system according to claim 1 or 2, wherein the control circuit turns off the charging field-effect transistor to prohibit charging of the secondary battery when the measured temperature of the secondary battery is below a predetermined charging prohibition temperature.

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