Method and apparatus for clock synchronization in QKD

Abstract

The present invention relates to a clock synchronization method including a determining step (S101) of determining whether the emitter and receiver are within an acceptable frequency range difference, a calculating step (S102) of calculating a drift difference accumulated over a selected time period and obtaining a time compensation based on the drift difference, an applying step (S103) of applying the compensation to either a clock phase shift or an external frequency generator, and a tracking step (S104) of continuously tracking a change in the frequency difference between the emitter and receiver by repeating the above steps.

Description

[Technical Field]

[0001] The present invention relates to a method and apparatus for clock synchronization in QKD. [Background technology]

[0002] A QKD system is a communication system. More specifically, quantum cryptography or quantum key distribution (QKD) is a method that allows the distribution of a secret key between two distant parties, an emitter and a receiver, with provable absolute security.

[0003] Therefore, for any kind of communication system, it is necessary to synchronize the frequency of the emitter "Alice" and the frequency of the receiver "Bob".

[0004] Phase shift is usually expressed as the angle between two clocks of the same frequency. However, if the phase shift of a clock periodically changes by a certain angle relative to a reference clock, its frequency will change.

[0005] In the prior art, it is typically the data stream that is adjusted to match clock frequency differences. In most serial protocols, inter-packet gaps or skip symbols are periodically transmitted to account for the frequency difference between the two systems (transmitter and receiver).

[0006] In quantum cryptography, two independent communication systems, e.g., an emitter and a receiver, never have exactly the same frequency. Therefore, the clocks of these two systems have a certain deviation, usually expressed in ppm. However, over time, this deviation, or frequency difference, causes drift, which becomes a problem and needs to be addressed in order to keep the two systems synchronized.

[0007] There are many different solutions depending on how much drift is acceptable before the system has to correct itself and resynchronize.

[0008] In time-based synchronization, especially satellite-based synchronization, where drift is allowed, a master source typically periodically transmits a signal beacon to which all other devices resynchronize themselves. Drift is then defined as the difference in accuracy between the master and slave clocks over the period between two consecutive beacons.

[0009] When drift cannot be tolerated, typically when receiving or transmitting high-speed serialized data, a clock is usually transmitted directly or indirectly along with the data itself. This could be done by transmitting a dedicated clock signal in addition to the data itself, or by using a phase-locked loop (PLL) to recover the clock from the data stream. This is done, for example, in all serial transmission protocols such as Ethernet, USB, SATA, etc.

[0010] For QKD systems, the clock is typically shared between the emitter and receiver by clock recovery on a serial data stream, which is either located in a dedicated fiber or multiplexed with other streams such as quantum channels, an example of the latter being a WDM architecture.

[0011] The classical way to synchronize emitters and receivers is to have two or three dedicated fibers: one for the quantum channel that Alice uses to send a single photon to Bob, and two for multiplexable public channels for sharing data and clock recovery to generate the private key.

[0012] To reduce the number of fibers to one, the quantum channel and two public channels must be multiplexed together and separated at the other end.

[0013] In WDM architectures where quantum channels are multiplexed with public channels, there is more noise on the quantum channel after separation, which affects the QBER (Quantum Bit Error Rate). This means that with WDM, distances are shorter and key rates are lower than without WDM.

[0014] Therefore, what is needed is a method that can eliminate the need for a continuous dedicated channel between two systems to share a system clock without having to traverse a WDM architecture.

[0015] In this regard, the main object of the present invention is to solve the above-mentioned problems and, more particularly, to provide an apparatus and method capable of synchronizing two independent systems and maintaining said synchronization so that they have the same time precision standard. Summary of the Invention

[0016] The above problems are solved by the present invention, which is a new method for synchronizing two systems, preferably an emitter and a receiver, without the need to travel through a dedicated medium, such as an additional optical fiber, and perform clock recovery on that dedicated medium. One advantage is that it allows the use of QKD systems that only need to deploy a single quantum channel, without the drawbacks of WDM on this specific fiber.

[0017] The basic principle involves using quantum channel time-detection arrival statistics to readjust the receiver's clock frequency to match the exact frequency of the emitter. The way to keep the receiver at the same frequency as the emitter is to periodically phase-shift the clock output, increasing or decreasing its frequency. This allows the speed drift of the two different clocks to be determined over time and readjusted as necessary.

[0018] The present invention also proposes to vary the clock frequency itself to maintain data synchronization.The main advantage of QKD systems is that they eliminate the need for a continuous dedicated channel between the two systems to share the system clock without the need to go through a WDM architecture.

[0019] The present invention eliminates the need to deal with WDM's performance drawbacks and additional system costs, while allowing QKD deployments to operate like WDM architectures, requiring only a single dedicated fiber.

[0020] A first aspect of the present invention is a clock synchronization method including a determining step of determining whether an emitter and a receiver are within an acceptable frequency range difference; a calculating step of calculating a drift difference accumulated over a selected time period and obtaining a time compensation based on the drift difference; an applying step of applying the compensation to either a clock phase shift or an external frequency generator; and a tracking step of continuously tracking a change in the frequency difference between the emitter and the receiver by repeating the above steps.

[0021] According to a preferred embodiment of the present invention, if the determining step determines that the emitter and receiver are not within an acceptable frequency range difference, the system performs a method for bringing the emitter and receiver within an acceptable frequency range difference prior to the calculating step of calculating the drift difference.

[0022] The method for bringing the emitter and receiver within the acceptable frequency range difference preferably includes at least one of a pre-calibration method, a velocity ramp, and increasing photon emission per second.

[0023] Advantageously, the calculation step is performed on the receiver by using a data storage method.

[0024] According to a preferred embodiment of the present invention, the data accumulation method is performed by using RX oversampling on the receiver.

[0025] Preferably, RX oversampling includes increasing the receiver resolution to use the arrival times of all qubits on the receiver regardless of the sequence transmitted by the emitter, and matching the drift using RX oversampling, such that RX oversampling will not detect anything if the two clocks have the same frequency.

[0026] According to a preferred embodiment of the present invention, the calculating step is performed by histogram analysis or by performing a Fast Fourier Transform (FFT).

[0027] Advantageously, the time compensation is calculated by at least one of the following: the time drift when using clock phase shifting methods, or a direct calculation of the drift in PPM when changing the external clock frequency.

[0028] The time compensation is preferably applied by directly changing the clock frequency of the emitter and / or receiver to a new clock frequency or by applying and changing the clock phase shift rate of the emitter and / or receiver to a compensated value.

[0029] A second aspect of the present invention is a QKD system with a single fiber without WDM, which uses the clock synchronization method of the first aspect for frequency synchronization.

[0030] The particular advantages of this device of the present invention are similar to those of the method of the first aspect of the present invention, and therefore will not be repeated here. [Brief explanation of the drawings]

[0031] Further specific advantages and features of the present invention will become more apparent from the following non-limiting description of at least one embodiment of the invention, which refers to the accompanying drawings. [Figure 1]FIG. 1 is a diagram illustrating the general method of the present invention. [Figure 2] FIG. 2 illustrates an exemplary method for calculating drift. DETAILED DESCRIPTION OF THE INVENTION

[0032] This detailed description is intended to illustrate the invention in a non-limiting manner, since any feature of one embodiment may be advantageously combined with any other feature of a different embodiment.

[0033] FIG. 1 shows a first embodiment of the present invention, which is a clock synchronization method in a quantum key distribution system.

[0034] The method includes a first step S101 of determining whether the emitter and receiver are within an acceptable frequency difference range.

[0035] FIG. 2 shows an example illustrating one exemplary method for calculating and determining drift to determine whether the emitter and receiver are within an acceptable frequency difference range.

[0036] In fact, there are several ways to calculate the drift and peak, especially taking into account the rate at which frequency adjustments are applied before noise filtering.

[0037] In this example, the peak location is calculated for each accumulation period to determine if the tolerance criteria are met.

[0038] For example, if the determined criterion is that 75% of all detections must be achieved within two oversampling times, we can add two more histogram times and see if they regroup at least 75% of all detections.

[0039] The peak position is then calculated and compared to the previous period, and the difference from that period is extracted.

[0040] For clocks that are not within the acceptable drift range, the histogram will appear "flat" with no peaks or with incorrect peak calculations.

[0041] In practice, the frequency difference between the emitter and receiver can vary significantly depending on several factors, such as the speed of the emitter, the selected accumulation time, the distance between the emitter and receiver, and the accuracy of the respective clock frequencies of the emitter and receiver, so a certain range of acceptable frequency difference and drift within which the emitter and receiver can be synchronized is determined. In effect, a threshold can be considered when the frequency difference over a period of time exceeds the time between each qubit.

[0042] In other words, if a QKD system is operating at 500Mhz, this means that a new qubit is transmitted every 2ns.

[0043] The maximum frequency difference is 2ns, then we don't know whether the maximum frequency difference is 2ns or a multiple of 2ns. The frequency difference that is allowed depends on the accumulation time. If the accumulation time is 1 second, then the drift tolerance is 2ns / 1sec = 0.002ppm or 2ppb (parts per billion). If we reduce the accumulation time and now look at the drift over 10ms, then the tolerance becomes 100 times greater, to 0.2ppm.

[0044] If the system is not within this tolerance, it may not be possible to calculate the exact drift or frequency difference, and one or more of the parameters from the list above will need to be adjusted in S107. In such cases, there are several ways to perform a pre-calibration between the emitter and receiver clocks and physically measure, compare, and adjust both frequencies before system deployment. This can be done with any signal or frequency analyzer, such as an oscilloscope.

[0045] Another method may consist of changing and scanning the different frequencies of one of the emitter and receiver to get them close enough to the frequency of the other of the emitter and receiver so that an accurate drift calculation can be made later. This is feasible but is not limited to increasing the rate at which the phase shift of the clock is applied and thus changing the frequency. Depending on the frequency physical source capabilities, the frequency itself may also be changed directly, scanning a certain range in multiple small step increments.

[0046] Another method can also consist of changing the photon emission rate and / or shortening the accumulation time. Both result from having more or faster data to calculate accurate drift differences. When increasing the emission rate, if the accumulation time is based on a certain number of data points rather than a certain accumulation time, an increase in detections per second means that drift calculation can begin sooner. When shortening the accumulation time, this is feasible if the data acquired during this time is sufficient to extract an accurate drift. Otherwise, both the emission rate and the shortened accumulation time can be applied simultaneously.

[0047] Once the first step is achieved, if it is determined that the emitter and receiver are within the acceptable frequency difference range, the method proceeds to the second step S102, which consists in calculating the exact drift or frequency difference between the emitter and receiver.

[0048] To make this calculation, the emitter and receiver build a histogram or any data accumulation method using the RX oversampling rate at the receiver, although RX oversampling is preferred as it can be independent of any TX pattern or sequence.

[0049] By using a sampling rate faster than the emission rate, any sequence of emitting qubits can be used to accumulate the arrival times of the RX side and calculate the peak average arrival time. Using multiple known accumulation periods and comparing the average arrival times, it is possible to calculate the time drift between multiple periods. Knowing the accumulation period allows for the calculation of frequency drift. This frequency drift can be calculated in several forms, such as absolute frequency difference, relative difference, usually expressed in parts per million (PPM), or clock phase shift rate, which indicates how many phase shift steps should be applied to the system clock per second. Extracting frequency drift can also be performed using other mathematical tools, such as analyzing the received frequency using a discrete Fourier transform (DFT), if data and speed permit.

[0050] Once the frequency drift is identified, time compensation is obtained from the frequency drift by conversion in the designed format, step 2 ends and the third step S103 begins.

[0051] The third step S103 is a compensation step in which the frequency of either side of the system, i.e., emitter and receiver, can be compensated to match the other based on the obtained time compensation, either by directly changing the clock frequency to a new clock frequency if physically applicable, or by applying and changing the clock phase shift rate to a new value.

[0052] As the clocks on each side drift from their primary frequency and their absolute frequencies change over time, the drift must be continually tracked by repeating the steps above.

[0053] This also replaced the tracking required for fiber length changes caused by temperature changes.

[0054] The present invention is adapted for use in a QKD system, and in one preferred embodiment, the clock synchronization method of the present invention is implemented in a QKD system using only a single fiber without WDM.

[0055] While the embodiments have been described in conjunction with several embodiments, it is evident that many alternatives, modifications, and variations are contemplated or will be apparent to those skilled in the art. Accordingly, the present disclosure is intended to embrace all such alternatives, modifications, equivalents, and variations that are within the scope of the present disclosure. This is particularly true, for example, with regard to the various devices that may be used.

Claims

1. a determining step (S101) of determining whether the emitter and the receiver are within an acceptable frequency range difference; a calculating step (S102) of calculating a drift difference accumulated over a selected time period and obtaining a time compensation based on said drift difference; an applying step (S103) of applying compensation to either the clock phase shift or the external frequency generator; and a tracking step (S104) of continuously tracking a change in the frequency difference between the emitter and the receiver by repeating the steps above. Clock synchronization method.

2. If the determining step determines that the emitter and the receiver are not within an acceptable frequency range difference, the system performs a method for bringing the emitter and the receiver within an acceptable frequency range difference before the calculating step of calculating the drift difference. The method of claim 1.

3. The method for keeping the emitter and the receiver within an acceptable frequency range difference includes at least one of a pre-calibration method, a velocity ramp, and an increase in photon emission per second. The method of claim 2.

4. The calculating step is performed by using a data storage method on the receiver. The method according to any one of claims 1 to 3.

5. The data accumulation method is performed by using RX oversampling on the receiver. The method of claim 4.

6. The RX oversampling involves increasing the resolution of the receiver to use the arrival times of all qubits on the receiver, regardless of the sequence transmitted by the emitter, and matching the drift using RX oversampling, such that no detection occurs when the frequencies of the two clocks are the same. The method according to any one of claims 1 to 5.

7. The calculating step is performed by histogram analysis or by performing an FFT. The method according to any one of claims 1 to 6.

8. The time compensation is calculated by at least one of the following: time drift when using clock phase shifting methods, or direct calculation of drift in PPM when changing the external clock frequency. The method according to any one of claims 1 to 7.

9. The time compensation is applied by directly changing the clock frequency of at least one of the emitter and the receiver to a new clock frequency or by applying and changing the clock phase shift rate of at least one of the emitter and the receiver to a compensated value. The method according to any one of claims 1 to 8.

10. A QKD system with a single fiber without WDM, which uses the clock synchronization method according to any one of claims 1 to 9 for frequency synchronization.

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