Non-conformal deposition of metal-doped carbon

Abstract

A method and apparatus are provided for forming a non-conformal metal-doped film on a patterned semiconductor substrate to facilitate deeper etching of features. The selective deposition and etch-back of a tungsten-doped carbide film can be tailored to configure a desired shape. Shapes with rounded contours, such as helmet-shaped films, may be placed over a patterned mask layer, providing selectivity benefits.

Description

[Background technology]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS: A PCT application has been filed contemporaneously herewith as a part of the present application. Each application identified in the contemporaneously filed PCT application to which this application claims benefit or priority is incorporated herein by reference in its entirety for all purposes.

[0002] Semiconductor manufacturing processes involve patterning operations that involve the deposition and etching of various materials on semiconductor substrates that contain various types of features, including horizontal and vertical features, negative features with sloped sidewalls, features with re-entrant features, and features formed as negative features in substrates with multi-layer stacks of two or more materials.

[0003] For example, such processes are commonly used in memory applications such as the fabrication of 3D NAND structures. As the semiconductor industry evolves and device dimensions shrink, it becomes increasingly difficult to uniformly etch such features, especially for high aspect ratio (HAR) structures where narrow widths and / or large depths are desired.

[0004] The background description provided herein is intended to generally present the context for the present disclosure. Work by the presently named inventors within the scope of what is described in this Background section, as well as aspects of the description that may not otherwise be considered prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0005] A method and apparatus are provided for forming non-conformal metal-doped films on patterned semiconductor substrates to facilitate deeper etching of features. The metal-doped films have higher selectivity than carbon hard masks. By using process conditions for depositing and etching back a tungsten-doped carbide film on top of the partially etched features, a tungsten-doped carbon film can be deposited on top of the etched features to gain selectivity advantages. These metal-doped films can be grown non-conformally on top of the partially etched features in a configuration that forms a desired shape, such as a helmet-shaped film. The helmet-shaped film is disposed on top of a patterned mask layer, which serves to protect the patterned mask layer from damage and provide selectivity advantages.

[0006] Accordingly, in a first aspect, the present disclosure includes a method for forming a non-conformal metal-doped film on a patterned semiconductor substrate. In some embodiments, the method includes providing a patterned semiconductor substrate to a process chamber. The patterned semiconductor substrate includes a patterned mask layer. The method includes exposing the patterned semiconductor substrate to one or more cycles of (i) plasma-enhanced chemical vapor deposition and (ii) etching. Each cycle includes exposure to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 10 to about 150 seconds to deposit a metal-doped carbon-containing layer on the patterned mask layer, and exposure of the metal-doped carbon-containing layer on the patterned mask layer to an etchant for 1 to about 60 seconds to form a non-conformal metal-doped film on the patterned mask layer.

[0007] In some embodiments, the non-conformal metal-doped film is tungsten-doped carbide, tungsten-doped carbonitride, ruthenium-doped carbonitride, ruthenium-doped carbide, molybdenum-doped carbide, or a combination thereof.

[0008] In some embodiments, the hydrocarbon precursor is methane, ethane, ethylene, propylene, propyne, propane, butane, butylene, butadiene, acetylene, or a combination thereof.

[0009] In some embodiments, the reducing agent is hydrogen, ammonia, hydrazine, silane, disilane, trisilane, germane, digermane, diborane, or a combination thereof.

[0010] In some embodiments, the etchant is hydrogen, ammonia, boron trifluoride, nitrogen trifluoride, sulfur hexafluoride, phosphorus pentafluoride, tungsten hexafluoride, or a combination thereof.

[0011] In some embodiments, the exposure comprises 1 to 20 cycles of plasma enhanced chemical vapor deposition and etching.

[0012] In some embodiments, the exposure comprises one cycle of plasma enhanced chemical vapor deposition and etching.

[0013] In some embodiments, one cycle of plasma enhanced chemical vapor deposition and etching comprises exposure to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 30 seconds to about 95 seconds, and exposure to an etching solution for 10 seconds to about 50 seconds.

[0014] In some embodiments, the process chamber is maintained at a temperature between about 200°C and 650°C.

[0015] In some embodiments, the patterned semiconductor substrate includes features in a patterned mask layer and a dielectric material below the patterned mask layer.

[0016] In some embodiments, the method further includes etching the dielectric material to form trenches in the dielectric material.

[0017] In some embodiments, the patterned mask layer features include patterned mask layer pillars.

[0018] In some embodiments, the non-conformal metal-doped film forms a capping layer on top of the pillars.

[0019] In some embodiments, the dielectric material comprises a layer of silicon oxide and polysilicon, or a layer of silicon oxide and silicon nitride.

[0020] In some embodiments, one or more cycles are performed in one process chamber.

[0021] In some embodiments, the non-conformal metal-doped film on the patterned mask layer has rounded profiles.

[0022] In some embodiments, the non-conformal metal-doped film comprises a helmet-shaped deposit on a patterned mask layer.

[0023] In some embodiments, the non-conformal metal-doped film is a tungsten-doped carbide and the metal-containing precursor is a tungsten-containing precursor.

[0024] In some embodiments, the tungsten-containing precursor is tungsten hexacarbonyl, tungsten pentachloride, tungsten hexachloride, or tungsten hexafluoride.

[0025] In some embodiments, the tungsten-doped carbide comprises about 10 to about 75 weight percent tungsten.

[0026] In a second aspect, the present disclosure includes an apparatus for processing a patterned semiconductor substrate. In some embodiments, the apparatus includes a process chamber and a substrate support for the patterned semiconductor substrate disposed in the process chamber. The patterned semiconductor substrate includes a patterned mask layer. The apparatus includes a plasma generator configured to generate a plasma in the process chamber, one or more gas inlets into the process chamber and associated flow control hardware, and a controller having at least one processor and a memory. The at least one processor and the memory are communicatively coupled to each other. The at least one processor is at least operatively coupled to the associated flow control hardware. The memory stores computer-executable instructions for controlling the at least one processor to position the patterned semiconductor substrate in the process chamber and to expose the patterned semiconductor substrate to one or more cycles of plasma-enhanced chemical vapor deposition and etching. Each cycle includes exposure to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 10 to about 150 seconds to deposit a metal-doped carbon-containing layer on the patterned mask layer, and exposure of the metal-doped carbon-containing layer on the patterned mask layer to an etchant for 1 to about 60 seconds to form a non-conformal metal-doped film on the patterned mask layer.

[0027] These and other aspects are further described below with reference to the drawings. [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 depicts a film stack on a substrate.

[0029] [Figure 2A] FIG. 2A depicts the partially fabricated structure before etching, showing the erosion of the hard mask. [Figure 2B] FIG. 2B depicts the partially fabricated structure after etching, showing erosion of the hard mask.

[0030] [Figure 3] FIG. 3 is a flow chart illustrating a method for etching features for a structure, according to certain disclosed embodiments.

[0031] [Figure 4A] FIG. 4A depicts a structure having a non-conformal metal-doped film, according to certain disclosed embodiments. [Figure 4B] FIG. 4B depicts a structure having a non-conformal metal-doped film, according to certain disclosed embodiments.

[0032] [Figure 5] FIG. 5 is a graph illustrating the higher etch resistance of tungsten-doped carbide (WDC) compared to a pure carbon ashable hardmask (AHM), according to certain disclosed embodiments.

[0033] [Figure 6] FIG. 6 is a graph illustrating how the topography of a non-conformal metal-doped film is affected by the duration of etching, according to certain disclosed embodiments.

[0034] [Figure 7] FIG. 7 is a schematic diagram of an example process chamber and tool for practicing certain disclosed embodiments. [Figure 8] FIG. 8 is a schematic diagram of an example process chamber and tool for practicing certain disclosed embodiments. [Figure 9] FIG. 9 is a schematic diagram of an example process chamber and tool for practicing certain disclosed embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0035] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in connection with specific embodiments, it will be understood that they are not intended to limit the disclosed embodiments. The drawings are not drawn to scale.

[0036] definition As used herein, the term "about" is understood to contemplate small increases and / or decreases beyond the recited value, where the changes do not materially affect the desired function of the parameter beyond the recited value(s). In some instances, "about" encompasses ±10% of any recited value. As used herein, the term modifies any recited value, range of values, or one or more end points of a range.

[0037] As used herein, the terms "top," "bottom," "upper," "lower," "above," and "below" are used to provide relative relationships between structures. The use of these terms does not indicate or require that a particular structure must be located in a particular location within a device.

[0038] As used herein, the phrase "at least one of A, B, and C" should be interpreted in the sense of a non-exclusive logical "or" (A or B or C), and not as "at least one of A, at least one of B, and at least one of C."

[0039] For purposes of this disclosure, "metal" as used in this context means a conductor with a maximum resistivity of 500 micro-ohm-centimeters, and should be understood to include metals and conductive metal salts, particularly conductive metal nitrides, such as TiN.

[0040] In this disclosure, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer at any of many stages of integrated circuit manufacturing. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. The following detailed description assumes the present disclosure is practiced on a wafer. However, the disclosure is not so limited. Workpieces may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that may utilize the present disclosure include various articles such as printed circuit boards. As used herein, the term "semiconductor substrate" or "substrate" refers to a substrate at any stage of semiconductor device manufacturing that includes semiconductor material anywhere within its structure. It is understood that the semiconductor material in a semiconductor substrate need not be exposed. A semiconductor wafer having multiple layers of other materials (e.g., dielectrics) covering the semiconductor material is an example of a semiconductor substrate. The following detailed description assumes practicing the disclosed embodiments on semiconductor wafers, such as 200 mm, 300 mm, or 450 mm semiconductor wafers, although the disclosed embodiments are not so limited. Workpieces may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that may utilize the disclosed embodiments include various articles such as printed circuit boards.

[0041] "Silicon oxide" is used herein to refer to silicon dioxide, including integer values ​​of x and y, as well as non-integer values ​​of x and y. x O y For example, "silicon oxide" refers to a compound of the formula SiOn where 1≦n≦2, and n can be an integer or a non-integer value. "Silicon oxide" includes compounds having the formula SiO 1.8 "Silicon oxide" also includes silicon dioxide (SiO2) and silicon monoxide (SiO). "Silicon oxide" includes both natural and synthetic varieties, and also includes any and all crystalline and molecular structures that include tetrahedral coordination of oxygen atoms surrounding a central silicon atom. "Silicon oxide" also includes amorphous silicon oxides and silicates.

[0042] "Silicon nitride" is used herein to refer to silicon nitride, including integer values ​​of x and y, such as x=3 and y=4, as well as non-integer values ​​of x and y. x N y For example, "silicon nitride" refers to a compound of the formula SiN n where 1≦n≦2, and n can be an integer or non-integer value. "Silicon nitride" includes compounds having the formula: SiN 1.8 "Silicon nitride" can include substoichiometric compounds such as Si3N4, silicon nitride with trace amounts of hydrogen and / or interstitial hydrogen (SiNH), and silicon nitride with trace amounts of oxygen and / or interstitial oxygen (SiON). "Silicon nitride" also includes both natural and synthetic varieties, and further includes any and all lattice, crystalline, and molecular structures, including trigonal α-silicon nitride, hexagonal β-silicon nitride, and cubic γ-silicon nitride. "Silicon nitride" can also include amorphous silicon nitride and can include silicon nitride with trace amounts of impurities.

[0043] "Etchant" means any compound used to remove a material, such as a layer, by-product, or contaminant, from a surface.

[0044] "Shaped" means having a particular shape or contour other than planar or conformal.

[0045] "Rounded profile" means a structural shape including, but not limited to, a cross section that is shaped like a loaf of bread or a helmet, with a rounded top.

[0046] Introduction & Context Recent advances in semiconductor manufacturing technology have made it possible to increase the density of elements, such as memory cells, within a storage device on a substrate. For example, in 3D NAND technology, taller structures are designed to improve device density scaling. The increased size of these structures presents new challenges. As described herein, novel materials and processing techniques have been developed to address these challenges, including large-area gap fill.

[0047] In typical current 3D NAND manufacturing, a "mold stack" containing a stack of 24-64 pairs of oxide and nitride layers (e.g., silicon oxide (SiO2) / silicon nitride (Si3N4) layers) is typically deposited in a plasma-enhanced chemical vapor deposition (PECVD) dielectric deposition tool. The film stack containing alternating oxide and nitride layers is sometimes referred to as an ONON stack.

[0048] FIG. 1 illustrates an ONON stack for a 3D NAND structure 103, depicting alternating oxide (101) and nitride (102) films deposited on a substrate 100. In structure 103, the oxide is depicted first, followed by nitride, oxide, nitride, etc. However, in some embodiments, nitride may be deposited first, followed by oxide, nitride, oxide, etc. Stacks of alternating layers of other materials may also be employed. For example, an OPOP stack (alternating layers of silicon oxide and polysilicon) may also be represented as structure 103, with the alternating films being oxide (101) and polysilicon (102).

[0049] SiO2 and Si3N4 layers are deposited sequentially at each station (also called a pedestal) without moving the wafer until the entire stack or a significant percentage of the stack is deposited. Next, vertical channels are etched downward through the oxide and nitride layers in the mold stack using a high-aspect-ratio etch and filled with metal to form contacts. A thick photoresist layer is then applied and patterned, and one set of oxide / nitride pairs is etched. The photoresist pattern is then shrunk, and the next pair of oxide / nitride layers is etched. This sequence is repeated to form a stair-step structure at the edge of the array. After a thick oxide layer is deposited and planarized, a wordline slot mask is applied, and slots are etched downward through all of the oxide / nitride layer pairs. The nitride layer is then etched away through the wordline slots. A gate stack of silicon dioxide, silicon nitride, aluminum oxide, tungsten, and tantalum nitride is then deposited and etched back, finally filling the slots with oxide and tungsten. Hard mask selectivity is one of the biggest challenges in OPOP (stacked silicon oxide and polysilicon) and ONON (stacked silicon oxide and silicon nitride) memory HAR etching for 3D NAND applications. One technique for etching deeper holes without increasing mask thickness is to increase the selectivity of the etching process. Selectivity is calculated as the ratio of the etch rate of the dielectric material to the etch rate of the mask material. For example, if the dielectric material etches three times faster than the mask material, the etching process has a selectivity of 3:1. The selectivity of the etching process can be increased by increasing the etch rate of the dielectric material relative to the etch rate of the mask layer. Similarly, selectivity can be increased by decreasing the etch rate of the mask layer relative to the etch rate of the dielectric material. Growing a highly selective metal-doped carbon film directly on top of the partially etched features helps increase the selectivity of the process.

[0050] The problems that can be encountered when fabricating 3D NAND structures with deep features are illustrated by Figures 2A and 2B, which illustrate a partially fabricated structure in which a high aspect ratio feature 202 has been etched into a dielectric material layer 204 on a substrate 200. Figure 2A shows the substrate 200 before etching begins, and Figure 2B shows the substrate 200 after etching is completed.

[0051] The substrate 200 includes a patterned mask layer 206 deposited on a dielectric material layer 204. An underlayer 207 is provided below the dielectric material layer 204. In various examples, the patterned mask layer 206 may have a thickness between about 300 and 800 nm, or between about 400 and 600 nm, and the dielectric material layer 204 may have a thickness between about 0.6 and 1.1 μm. The mask material may be polysilicon, amorphous carbon, or another common mask material known in the art. The dielectric material layer 204 typically includes silicon oxide. The underlayer 207 may be, for example, a layer of silicon nitride. In some cases, the dielectric material layer 204 may be a stack of materials including one or more layers of silicon oxide and one or more layers of silicon nitride, as illustrated in FIG. 1 . The silicon nitride layer may be relatively thin compared to the silicon oxide layer.

[0052] In a particular example, the dielectric material layer 204 includes an upper layer of silicon nitride and a lower layer of silicon oxide (the oxide being thicker than the nitride). In a similar example, the dielectric material layer 204 further includes a lower layer of silicon nitride, with the silicon oxide layer sandwiched between the upper and lower silicon nitride layers. The pitch between adjacent features 202 may be about 50 nm or less. The critical dimension (e.g., diameter) of the features 202 may be between about 10-30 nm, and in some cases between about 15-30 nm.

[0053] A substrate 200 is shown in FIG. 2A and is provided to a semiconductor processing apparatus for etching. Suitable apparatus are described further below. After the substrate is introduced into the processing apparatus, a plasma is generated in the processing apparatus. The plasma may interact directly with the substrate to cause etching on the substrate. An underlayer 207 is provided below the dielectric material layer 204. After a period of time, features 202 begin to form in the dielectric material layer 204. The patterned mask layer 206 is initially somewhat resistant to the etching conditions, but over time undergoes some etching / erosion during the process.

[0054] Finally, as shown in FIG. 2B , the patterned mask layer 206 is substantially completely removed as a result of prolonged exposure to the etching conditions. At this point, the feature 202 no longer extends entirely through the dielectric material layer 204. Because the patterned mask layer 206 has been substantially completely removed, the feature 202 cannot be etched any deeper. Further etching would substantially erode the dielectric material layer 204 in an undesirable manner. Thus, FIGS. 2A and 2B illustrate problems frequently encountered when etching high aspect ratio features. Often, various processing considerations limit the thickness of the mask layer that can be used for a particular application, which in turn limits the depth of the features that can be formed using the patterned mask layer.

[0055] Methods for forming non-conformal metal-doped films can be advantageously used to improve etch selectivity. Selectivity can be restored by growing a vertical, highly selective material, such as WDC, on top of a partially etched feature. This vertically grown layer is a HM with a lower etch rate, boosting selectivity. Such methods enable the formation of deeper features without the need to increase the thickness of the mask layer, due to the formation of a substantially vertical protective layer. Similarly, such methods enable the formation of features at a particular etch depth using a relatively thinner mask than previously required. Thus, the techniques described herein are advantageous both in etching deeper features and minimizing the amount of mask material required.

[0056] Method for preparing non-conformal metal-doped films 3 is a flowchart illustrating a method 300 for etching features for a structure, according to certain disclosed embodiments. The method begins at operation 302, where a patterned substrate is provided to a process chamber of a semiconductor processing equipment. Suitable equipment for this process is described further below. The substrate includes a mask layer patterned as described above. The substrate includes features in the patterned mask layer and a dielectric material below the patterned mask layer.

[0057] Operation 304 is a PECVD deposition process that includes exposing the patterned substrate to a metal-containing precursor, a hydrocarbon-containing precursor, and a reducing agent. The hydrocarbon-containing precursor may be delivered in an inert carrier gas, such as argon. A metal-doped carbon-containing layer may be deposited on the hard mask. In certain embodiments, some deposition may occur on the sidewalls, but no deposition occurs at the bottom of the feature.

[0058] In various embodiments, the hydrocarbon precursor is of formula C x H ywhere x is an integer from 2 to 10 and y is an integer from 2 to 24. Examples include methane (CH), acetylene (C2H2), ethylene (C2H4), propylene (C3H6), butane (C4H 10 ), cyclohexane (CH 12 ), benzene (C6H6), and toluene (C7H8). In some embodiments, the hydrocarbon precursor is methane, ethane, ethylene, propylene, propyne, propane, butane, butylene, butadiene, acetylene, or a combination thereof.

[0059] The reducing agent is typically a reducing gas, which may be photoactive, either alone or in combination with other chemical species present in the process chamber. Suitable examples of reducing agents include H, SiH, NH, or NH analogs where H is replaced by deuterium (e.g., NH, D, NHD, or ND), hydrazine (NH), or other photoreactive gases capable of generating H radicals, such as tetramethylsilane, trimethylsilane, amines (methylamine, dimethylamine, trimethylamine, or ethylamine), alkenes such as ethylene or propylene, alkynes such as acetylene, or combinations that may further include an inert gas or a combination of inert gases. The inert gas may be He, N, or Ar.

[0060] In some embodiments, the reducing agent is hydrogen, ammonia, hydrazine, silane, disilane, trisilane, germane, digermane, diborane, or a combination thereof.

[0061] Tungsten doping may be achieved using a variety of volatile precursors. xHalogen-containing tungsten precursors such as tungsten chloride (WCl), tungsten hexachloride (WCl), tungsten tetrachloride (WCl), tungsten dichloride (WCl), and mixtures thereof are used. In some embodiments, tungsten chlorides are used. Examples of tungsten chlorides include tungsten pentachloride (WCl), tungsten hexachloride (WCl), tungsten tetrachloride (WCl), tungsten dichloride (WCl), and mixtures thereof. In other examples, tungsten fluorides such as tungsten hexafluoride (WF) may be used. In some embodiments, the tungsten-containing precursor is tungsten hexacarbonyl (W(CO)), WCl, WCl, or WF.

[0062] In some embodiments, the metal content of the non-conformal metal-doped film is about 10-75%, or about 4-60% of the film.

[0063] Ruthenium doping may be achieved using vaporizable ruthenium precursors such as, for example, bis(ethylcyclopentadienyl)ruthenium(II), bis(pentamethylcyclopentadienyl)ruthenium, ruthenocene, and cyclopentadienylpropylcyclopentadienylruthenium(II).

[0064] Molybdenum doping may be achieved, for example, using molybdenum precursors having 2(MoL2) to 6(MoL6) ligands, where the molybdenum may be in a wide range of oxidation states, ranging from 0 to +6. Suitable molybdenum precursors may also be dimolybdenum compounds having 1) two molybdenum atoms individually or multiply bonded to each other, or 2) two molybdenum atoms linked by a linking group, such as a bidentate ligand. In some embodiments, molybdenum precursors include molybdenum oxyhalide precursors, such as molybdenum hexacarbonyl (Mo(CO)6), molybdenum oxytetrachloride (MoOCl4), or molybdenum dioxide dichloride (MoOCl2), and molybdenum halide precursors, such as molybdenum chloride ([MoCl5]2).

[0065] After introducing the substrate 302 into the process chamber, a plasma-generating gas is provided to the process chamber for deposition 304 in some embodiments. The plasma may be generated in situ (within the deposition chamber, also known as direct plasma) or remotely (outside the deposition chamber in a separate device). In some embodiments, a plasma of reactive species is formed. The plasma species may include electrons, positive ions, neutral species, radicals, and other plasma species. In some embodiments, the plasma is generated from at least one process gas that includes at least one reactant. In addition to the reactant, the process gas may further include a carrier gas. In some embodiments, the carrier gas is a noble gas such as argon, neon, krypton, xenon, or helium. In some cases, the plasma may include other species, such as nitrogen atoms, nitrogen radicals, nitrogen plasma, or combinations thereof.

[0066] The composition of the plasma generating gas may be controlled to achieve a high degree of selectivity during deposition. The flow rate of the metal-containing precursor, such as WF6, is at least about 1 sccm. In these or other cases, the flow rate of WF6 may be about 20 sccm to about 500 sccm, about 50 to about 375 sccm, or about 100 to about 250 sccm. The plasma generating gas may also include one or more inert species.

[0067] In various cases, WF may represent at least about 0.02%, or at least about 0.05%, or at least about 0.1%, or at least about 0.5%, or at least about 1% of the volumetric flow rate of the plasma generating gas. In these or other cases, WF may represent no more than about 10%, or no more than about 5%, or no more than about 1%, or no more than about 0.05% of the volumetric flow rate of the plasma generating gas.

[0068] In various cases, the plasma may be generated using the following conditions: The plasma may be capacitively coupled. The plasma may be generated at an induction frequency of between about 13 and 169 MHz, for example, between about 40 and 100 MHz (e.g., 60 MHz in certain cases), and at a power level of between about 200 and 20,000 Watts per 300 mm substrate. In various cases, the power level used to generate the plasma may be particularly high, for example, at about 4 kW or more per 300 mm substrate, or at about 5 kW or more per 300 mm substrate. For example, to promote a high vertical etch rate, a relatively high bias may be applied to the substrate. The bias may be applied to the substrate at a power level of between about 500 W and 60 kW per 300 mm substrate, or between about 2 and 60 kW per 300 mm substrate, at a frequency of between about 50 kHz and 10 MHz, or between about 200 kHz and 4 MHz (e.g., about 400 kHz in certain cases). In some cases, the power level used to bias the substrate is at least about 13 kW, or at least about 15 kW. In these or other cases, the power level used to bias the substrate may be about 60 kW or less, or about 30 kW or less, or about 20 kW or less, or about 17 kW or less. In certain embodiments, the substrate is biased at 400 kHz at a power level between about 13-17 kW.

[0069] The pressure in the reaction chamber may be at least about 1 Torr. In these or other cases, the pressure in the reaction chamber may be from about 1 Torr to about 10 Torr, or from about 2 to 8 Torr, or from about 3 to 6 Torr.

[0070] The substrate support on which the substrate is provided may be maintained (e.g., by heating and / or cooling) at a temperature between about 200° C. and 650° C., or between about 300° C. and 500° C. In some cases, the substrate support is maintained at a temperature of at least about 500° C., or at least about 450° C., or at least about 400° C., or at least about 350° C., or at least about 300° C. These temperatures may relate to the controlled temperature of the substrate support while the substrate is exposed to the plasma.

[0071] Deposition 304 may occur for a period of about 10 seconds to about 150 seconds in certain embodiments, or in some embodiments, 20 seconds to 100 seconds, or 30 seconds to 95 seconds, In some embodiments, deposition may last for 90 seconds.

[0072] Returning to FIG. 3, operation 306 is an etching step. The plasma generating gas further includes one or more substances conventionally used in etching dielectric materials. Such substances typically include fluorocarbons and hydrofluorocarbons, such as CF4, C3F8, C4F8, C4F6, CH2F2, CH3F, CHF3, C5F8, and C6F6. Such substances may also include oxidants, such as O2, O3, CO, CO2, and COS. The total flow rate of the plasma generating gas may be between about 50 and 500 sccm in various cases. In some cases, one or more fluorocarbon sources may be mixed (either before or after delivery to the reaction chamber) to provide a desired ratio of carbon to fluorine, for example. The metal-doped carbon-containing layer deposited in operation 304 may be etched to form a film with a desired non-conformal shape. The shape may have a rounded profile and, in certain embodiments, may resemble a helmet. Selection of appropriate precursors and process conditions allows etching of the helmet while, in some embodiments, minimizing or completely avoiding etching of the sidewalls or bottom of the trench.

[0073] In some embodiments, the etching solution comprises a tungsten halide, such as tungsten fluoride (WF) or tungsten hexafluoride (WF), or a molybdenum halide, such as molybdenum chloride ([MoCl]), molybdenum tetrafluoride (MoF), molybdenum pentafluoride (MoF), molybdenum hexafluoride (MoF), molybdenum bromide (MoBr), molybdenum dichloride (MoCl), molybdenum tribromide (MoBr), molybdenum trichloride (MoCl), molybdenum triiodide (MoI), molybdenum tetrabromide (MoBr), or molybdenum hexachloride (MoCl).

[0074] In some embodiments, the etchant is chlorine (Cl), oxygen (O), fluorine (F), hydrogen chloride (HCl), hydrogen fluoride (HF), chlorine trifluoride (ClF), nitrogen trifluoride (NF), or a combination thereof. Example combinations include chlorine and oxygen, and fluorine and oxygen. In some embodiments, a single etchant may be sufficiently effective. In some embodiments, a combination comprising multiple etchants may be used. When a combination of etchants is used, they may be flowed together (simultaneously) or sequentially (one after the other) through a delivery channel. In some embodiments, the etchant is hydrogen (H), ammonia (NH), boron trifluoride (BF), sulfur hexafluoride (SF), phosphorus pentafluoride (PF), tungsten hexafluoride (WF), nitrogen trifluoride (NF), or a combination thereof.

[0075] Etching 306 may occur for approximately 1 to 60 seconds in certain embodiments, or in some embodiments, for 10 to 55 seconds or 20 to 45 seconds, hi some embodiments, the length of time for etching may be 15, 30, or 45 seconds.

[0076] Operations 304 and 306 together constitute one cycle. A nonconformal metal-doped film may be prepared by completing one or more cycles. As illustrated by flow path 308, operation 304 may be repeated after operation 306, followed by another etch 306. In some embodiments, 1 to 20 cycles may be used. In some embodiments, 1 to 15 cycles, or 1 to 10 cycles may be used. In other embodiments, 1 to 3 cycles may be sufficient. The number of cycles depends on the material and the desired shape to be formed. Optimizing the deposition / etch cycle results in the growth of a nonconformal tungsten-doped carbon-containing film. The use of cycles can overcome the trade-off between changes in neck CD (critical dimension at the top of the feature) and nonconformal film thickness, allowing for the growth of a hard mask and the recovery of selectivity after the HAR etch.

[0077] One or more cycles of deposition and etching can be performed in a single process chamber as an in-situ process in certain embodiments, which may contribute to lower costs and / or increased throughput for semiconductor manufacturing.

[0078] In some embodiments, deposition 304 lasts for about 1-200 seconds and etching 406 lasts for about 5-55 seconds in one cycle. In some embodiments, deposition 304 lasts for 10-150 seconds and etching 306 lasts for 10-50 seconds. When multiple cycles are used, each cycle may be of the same duration, or the duration of each of deposition 304 and etching 306 may vary between cycles.

[0079] In some embodiments, tungsten-doped carbide is deposited by exposure to WF, H, CH / C H, and argon gas for 10-150 seconds, and then etched using NF and a mixture of helium and argon gas for 10-50 seconds in 1-15 cycles.

[0080] When the desired shape and / or specific height and width are obtained by selecting the appropriate number of cycles, precursors, and durations of the etching and deposition steps, the patterned substrate with the non-conformal metal-doped film is removed from the process chamber in operation 310. Further etching of the resulting patterned substrate with the non-conformal metal-doped film may then be performed. This subsequent etching creates trenches in the dielectric material, and in some embodiments, further etching after deposition of the non-conformal metal-doped film results in deeper trench features than would be obtained without protection.

[0081] The method described in FIG. 3 provides the ability to restore selectivity by growing a vertical, highly selective material, such as tungsten-doped carbide, on top of the partially etched features. The vertically grown layer is a hard mask with a lower etch rate, boosting selectivity. Thus, the deposition and etch-back process of FIG. 3 for forming a hard mask layer in a selective manner may advantageously increase the efficiency of the 3D NAND semiconductor manufacturing process.

[0082] FIG. 4 depicts a non-conformal metal-doped film after a single deposition / etch cycle as described with reference to FIG. 3 above, according to certain disclosed embodiments.

[0083] The substrate 400 may be a silicon wafer, e.g., a 200 mm wafer, a 300 mm wafer, or a 450 mm wafer, including wafers having one or more layers of material, such as dielectric, conductive, or semiconducting materials, deposited thereon. In various embodiments, the substrate is a patterned dielectric material. The dielectric material may be composed of layers of OPOP (stacked silicon oxide and polysilicon) or ONON (stacked silicon oxide and silicon nitride).

[0084] The patterned substrate may have "features" such as pillars, poles, trenches, vias, or contact holes, which may be characterized by one or more of a narrow and / or re-entrant opening, a constriction within the feature, and a high aspect ratio. The feature(s) may be formed in one or more of the layers mentioned above. One example of a feature is a pillar or pole in a semiconductor substrate or a layer above the substrate. Another example is a trench in the substrate or layer. The trench may include a trench bottom and trench sidewalls.

[0085] In some embodiments, the pillars are formed by a patterned hard mask. In some embodiments, the feature(s), such as pillars, may have an aspect ratio of at least about 1:1, at least about 2:1, at least about 4:1, at least about 6:1, at least about 10:1, or greater. Additionally, the dimensions of the feature(s) near the opening, e.g., the opening diameter or linewidth, may be between about 10 nm and 500 nm, e.g., between about 25 nm and about 300 nm. The disclosed methods may be performed on substrates with feature(s) having openings less than about 150 nm. Vias, trenches, or other recessed features may be referred to as unfilled features or features. According to various embodiments, the feature profile may narrow gradually and / or include an overhang at the feature opening. A re-entrant profile is a profile that narrows from the bottom, closed end, or interior of the feature toward the feature opening. A re-entrant profile may be produced by overhangs due to asymmetric etch kinetics during patterning and / or non-conformal film step coverage in a prior film deposition, such as deposition of a diffusion barrier. In various examples, a feature may have an opening at the top of the feature with a smaller width than the width at the bottom of the feature.

[0086] 4A, substrate 400 includes a patterned mask layer 406 stacked on a dielectric material layer 404 and a trench feature 402. An underlayer 407 is provided below dielectric material layer 404. Patterned mask layer 406 is a conformal layer deposited on top of dielectric material layer 404, where conformal layer 406 is in the form of pillars.

[0087] After one deposition / etch cycle as described above, a non-conformal metal-doped film 408 is selectively deposited on the pillars of the patterned mask layer without depositing on the sidewalls or bottom of the trench feature 402. In some embodiments, the film is taller than it is wide. In some embodiments, the film 408 has a substantially rounded profile. Because of its shape or appearance, the non-conformal metal-doped film is referred to as a helmet in some embodiments.

[0088] FIG. 4B illustrates how a helmet grows as additional deposition / etch cycles are performed. Similar to FIG. 4A, substrate 400 includes a patterned mask layer 406 stacked on top of dielectric material layer 404 and feature 402. An underlayer 407 is provided below dielectric material layer 404. Patterned mask layer 406 is a conformal layer selectively deposited on top of the pillars of dielectric material layer 404. As the number of deposition / etch cycles increases, the shape of the non-conformal metal-doped film changes. As shown by 409, in some embodiments, the helmet-like shape of the film may become more pronounced (i.e., greater in height than in width) as the film grows vertically and the edges become more rounded with further etching according to the method described with reference to FIG. 3 above.

[0089] In particular, Figure 4B illustrates that the deposited non-conformal metal-doped film, along with the underlying hard mask, is not damaged or corroded by the further etching required to create deeper features. The non-conformal metal-doped film allows for deeper further etching. In some embodiments, the further etching can result in features with depths of about 0.5-7 um, or about 1-5 um.

[0090] FIG. 5 is a graph illustrating the higher etch resistance of tungsten-doped carbide (WDC, represented by round symbols) compared to pure carbon with approximately 15-50% tungsten doping (AHM, represented by square symbols), according to certain disclosed embodiments. The x-axis is the weight percent of tungsten doping in the carbide film, and the y-axis is selectivity. Thus, when tungsten-doped carbide is deposited vertically on top of a partially etched feature, it offers an advantage of approximately 2-4 times the selectivity of pure carbon.

[0091] FIG. 6 is a graph with illustrations showing how the shape of a non-conformal metal-doped film is affected by etching duration, according to certain disclosed embodiments. Tungsten carbide deposition was performed on an ONON-patterned coupon by PECVD using a WF precursor, H reducing agent, and CH / C H hydrocarbon precursors with an Ar inert carrier gas at a temperature of 400°C. Etching was performed using an Ar / He inert carrier gas mixture with NF as the etchant. Under deposition-only conditions, the non-conformal tungsten-doped carbon-containing film is wider than with various etching durations. The longer the etching time, the smaller the feature width of the overlying protective metal-doped structure.

[0092] In Figure 6, (i) is a cross-sectional view of a non-conformal tungsten-doped carbon-containing film formed by exposure to deposition conditions for 90 seconds, (ii) is a cross-sectional view of a non-conformal tungsten-doped carbon-containing film formed by exposure to deposition conditions for 90 seconds followed by etching for 15 seconds, (iii) is a cross-sectional view of a non-conformal tungsten-doped carbon-containing film formed by exposure to deposition conditions for 90 seconds followed by etching for 30 seconds, and (iv) is a cross-sectional view of a non-conformal tungsten-doped carbon-containing film formed by exposure to deposition conditions for 90 seconds followed by etching for 45 seconds.

[0093] The images illustrate that, depending on the processing conditions, non-conformal films can be shaped into specific desired shapes. For example, helmets or shapes that can be formed by the described methods include, but are not limited to, shapes that have a rounded top edge but are wider near the top than at the bottom, as shown in Figure (i), or shapes that have substantially the same width throughout their height but have a rounded top edge, as shown in Figure (ii). In some embodiments, the helmet height can be about 20 to about 200 nm, about 40 to about 180 nm, or about 75 to 145 nm.

[0094] Device Another aspect relates to an apparatus for processing a semiconductor substrate by depositing a non-conformal metal-doped film on a patterned semiconductor substrate. The apparatus includes a reaction chamber containing the substrate, a plasma source connected to the reaction chamber and configured to generate a plasma outside the reaction chamber, one or more first gas inlets connected to the reaction chamber, a second gas inlet connected to the reaction chamber, and a controller. The controller includes instructions for depositing the non-conformal metal-doped film on the patterned semiconductor substrate disposed within the chamber. The instructions may further include depositing the non-conformal metal-doped film by a chemical vapor deposition (CVD)-based process using carbide or carbon nitride reactants and a metal dopant. The CVD process may be a plasma-enhanced CVD (PECVD) process. The composition and processing conditions of the non-conformal metal-doped film may be adjusted or fine-tuned to cause the film to embody a particular desired non-conformal shape, such as a helmet. The following description provides some details of apparatus, semiconductor chambers, and tools suitable for implementing the methods described herein and fabricating desired devices.

[0095] FIG. 7 depicts a schematic diagram of one embodiment of a deposition process chamber 700 that may be suitable for depositing and processing films as described herein. The chamber may operate as a chemical vapor deposition (CVD) chamber, particularly a plasma-enhanced CVD (PECVD) chamber. The chamber 700 has a process chamber body 702 for maintaining a low-pressure environment. Multiple process stations 700 may be included in a common low-pressure process tool environment. For example, FIG. 8 depicts one embodiment of a multi-station processing tool 800.

[0096] 7 , the process station 700 is in fluid communication with a reactant delivery system 701 for delivering process gases to a distribution showerhead 706. The reactant delivery system 701 includes a mixing vessel 709 for combining and / or conditioning process gases, such as a metal precursor gas or a second reactant gas (e.g., a dopant reactant), for delivery to the showerhead 706. One or more mixing vessel inlet valves 720 may control the introduction of process gases into the mixing vessel 709. A plasma may also be delivered to the showerhead 706 or may be generated in the process station 700. The reactant delivery system 701 may be configured to deliver process gases to deposit a doped oxide film on a substrate provided to the process station 700.

[0097] As an example, the embodiment of FIG. 7 includes a vaporization point 703 for vaporizing a liquid reactant to be delivered to the mixing vessel 709. In some embodiments, the vaporization point 703 may be a heated vaporizer. Saturated reactant vapor produced from such a vaporizer may condense in downstream delivery piping. Exposure of incompatible gases to the condensed reactant may also generate small particles. These small particles may clog piping, interfere with valve operation, and contaminate the substrate. Some approaches to address these issues include purging and / or evacuating the delivery piping to remove residual reactants. However, purging the delivery piping may increase process station cycle time and reduce process station throughput. Therefore, in some embodiments, the delivery piping downstream of the vaporization point 703 may be heat traced. In some examples, the mixing vessel 709 may also be heat traced. In one non-limiting example, the piping downstream of vaporization point 703 has an increasing temperature profile extending from about 100° C. to about 150° C. at mixing vessel 709 .

[0098] In some embodiments, the liquid precursor or liquid reactant may be vaporized in a liquid injector. For example, the liquid injector may inject a pulse of liquid reactant into a carrier gas stream upstream of the mixing vessel. In one embodiment, the liquid injector may vaporize the reactant by rapidly depressurizing the liquid from a higher pressure to a lower pressure. In another example, the liquid injector may atomize the liquid into dispersed microdroplets, which are then vaporized in heated delivery tubing. Smaller droplets may vaporize faster than larger droplets, reducing the delay between injection and complete vaporization of the liquid. Faster vaporization may reduce the length of tubing downstream from the vaporization point 703. In one scenario, the liquid injector may be attached directly to the mixing vessel 709. In another scenario, the liquid injector may be attached directly to the showerhead 706.

[0099] In some embodiments, a liquid flow controller (LFC) may be provided upstream of the vaporization point 703 to control the mass flow rate of the liquid for vaporization and delivery to the process station 700. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC may then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, stabilizing the liquid flow using feedback control may take one second or more, which may extend the time for dosing the liquid reactant. Therefore, in some embodiments, the LFC may be dynamically switched between feedback and direct control modes. In some embodiments, this may be done by disabling the sense tubes of the LFC and the PID controller.

[0100] 7, the substrate 712 is positioned below the showerhead 706 and is shown resting on a pedestal 708. The showerhead 706 may have any suitable shape and any suitable number and arrangement of ports for delivering process gases to the substrate 712.

[0101] In some embodiments, the pedestal 708 may be raised or lowered to expose the substrate 712 to the volume between the substrate 712 and the showerhead 706. It will be appreciated that in some embodiments, the height of the pedestal may be programmatically adjusted by a suitable computer controller 750.

[0102] In another scenario, the height of the pedestal 708 may be adjusted to allow the plasma density to be varied during a plasma activation cycle in processes in which a plasma is ignited. At the end of a process step, the pedestal 708 may be lowered during a separate substrate transfer step to allow removal of the substrate 712 from the pedestal 708.

[0103] In some embodiments, the pedestal 708 may be temperature controlled via a heater 710. In some embodiments, the pedestal 708 may be heated to a temperature of at least about 400° C., or in some embodiments, less than about 300° C., such as about 250° C., during deposition of non-conformal metal-doped films as described in the disclosed embodiments. In some embodiments, the pedestal is set to a temperature between about 400° C. and about 600° C. for non-conformal metal-doped film deposition.

[0104] Additionally, in some embodiments, pressure control of the process station 700 may be provided by a butterfly valve 718. As shown in the embodiment of Figure 7, the butterfly valve 718 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of the process station 700 may also be adjusted by varying the flow rate of one or more gases introduced to the process station 700.

[0105] In some embodiments, the position of the showerhead 706 may be adjusted relative to the pedestal 708 to change the volume between the substrate 712 and the showerhead 706. Furthermore, it will be understood that the vertical position of the pedestal 708 and / or the showerhead 706 may be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 708 may include a rotation axis for rotating the orientation of the substrate 712. It will be understood that in some embodiments, one or more of these adjustments may be performed programmatically by one or more suitable computer controllers 750.

[0106] In some embodiments, which may employ a plasma as described above, the showerhead 706 and pedestal 708 are in electrical communication with a radio frequency (RF) power source 714 and matching network 716 to power the plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 714 and matching network 716 may be operated at any suitable power to form a plasma having a desired composition of radical species. Examples of suitable powers are included above. Similarly, the RF power source 714 may provide RF power at any suitable frequency. In some embodiments, the RF power source 714 may be configured to control high-frequency and low-frequency RF power sources independently of one another. Examples of low-frequency RF frequencies may include, but are not limited to, frequencies between 0 kHz and 500 kHz. Examples of high frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz, or greater than about 13.56 MHz, or greater than 27 MHz, or greater than 180 MHz, or greater than 60 MHz. It will be appreciated that any suitable parameters may be adjusted, either discretely or continuously, to provide plasma energy for surface reactions.

[0107] In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage and current sensors (e.g., VI probes). In another scenario, plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from such in situ plasma monitors. For example, OES sensors may be used in a feedback loop to provide programmatic control of plasma power. It will be appreciated that in some embodiments, other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0108] In some embodiments, one or more hardware parameters of the process station 700, including those discussed in detail below, may be programmatically adjusted by one or more computer controllers 750.

[0109] In some embodiments, instructions to the controller 750 may be controlled via input / output control (IOC) sequencing instructions. In one example, instructions for setting conditions for a process step may be included in a corresponding recipe step of a process recipe. In some cases, process recipe steps may be sequenced sequentially, such that all instructions for a process step are executed simultaneously with that process step. In some embodiments, instructions for setting one or more reactor parameters may be included in a recipe step. It will be understood that these recipe steps may be further subdivided and / or repeated in any suitable manner within the scope of the disclosed embodiments.

[0110] As discussed above, one or more process chambers may be included as stations in a multi-station processing tool. Figure 8 shows a schematic diagram of one embodiment of a multi-station processing tool 800 including a processing chamber 814 having multiple processing stations in a low-pressure environment. The processing chamber 814 may be configured to maintain a low-pressure environment such that substrates may be transferred between the processing stations without breaking vacuum and / or exposure to atmosphere.

[0111] The tool 800 further includes an inbound load lock 802 and an outbound load lock 804, either or both of which may include a remote plasma source. A robot 806 at atmospheric pressure is configured to transfer wafers from a cassette loaded via a pod 808 to the inbound load lock 802 via an atmospheric port 810. The wafer is placed on a pedestal 812 in the inbound load lock 802 by the robot 806, the atmospheric port 810 is closed, and the load lock is pumped down. If the inbound load lock 802 includes a remote plasma source, the wafer may be exposed to a remote plasma treatment within the load lock before being introduced into the processing chamber 814. Additionally, the wafer may also be heated in the inbound load lock 802, for example, to remove moisture and adsorbed gases. A chamber transfer port 816 to the processing chamber 814 is then opened, and another robot (not shown) places the wafer into the reactor and places the wafer on a pedestal in the first station shown within the reactor for processing. Although the embodiment depicted in FIG. 8 includes a load lock, it will be appreciated that in some embodiments, the wafer may enter the process station directly.

[0112] The depicted processing chamber 814 includes four process stations, numbered 1 through 4 in the embodiment shown in FIG. 8. Each processing station may be configured to deposit a non-conformal metal-doped film. Each processing station may be fed by a common mixing vessel (e.g., 709 in FIG. 7) for combining and / or conditioning process gases before delivery to each processing station. Each processing station depicted in FIG. 8 includes a process station substrate holder (shown at 818 for station 1) and a process gas delivery inlet. In some embodiments, one or more of the process station substrate holders 818 may be heated.

[0113] In some embodiments, each process station may have different or multiple purposes. For example, a process station may be switchable between an ultra-smooth PECVD process mode and a conventional PECVD or CVD mode. Additionally or alternatively, in some embodiments, processing chamber 814 may include one or more matched pairs of ultra-smooth PECVD and conventional PECVD stations (e.g., a pair including an ultra-smooth PECVD SiO2 station and a conventional PECVD SiN station). In another example, a process station may be switchable between two or more film types, such that a stack of different film types may be deposited in the same process chamber. While the depicted processing chamber 814 includes four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some embodiments, a processing chamber may have five or more stations, while in other embodiments, a processing chamber may have three or fewer stations.

[0114] 8 also depicts one embodiment of a substrate processing system 890 for transferring substrates within the processing chamber 814. In some embodiments, the substrate processing system 890 may be configured to transfer substrates between various process stations and / or between process stations and load locks. It will be appreciated that any suitable substrate processing system may be employed. Non-limiting examples include a substrate carousel and a substrate handling robot.

[0115] The multi-station processing tool 800 also includes an embodiment of a system controller 850 employed to control the process conditions and hardware states of the processing tool 800. For example, in some embodiments, the system controller 850 may control one or more process parameters during a PECVD film deposition phase to control characteristics of the deposited film, such as the composition and thickness of the deposited film.

[0116] The system controller 850 may include one or more memory devices 856, one or more mass storage devices 854, and one or more processors 852. The processor 852 may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc.

[0117] In some embodiments, the system controller 850 controls all of the activity of the processing tool 800. The system controller 850 executes machine-readable system control software 858 stored on the mass storage device 854, loaded into the memory device 856, and executed on the processor 852. The system control software 858 may include instructions for controlling the timing, mixture of gases, chamber and / or station pressure, chamber and / or station temperature, substrate temperature, target power levels, RF power levels, substrate pedestal, chuck and / or susceptor position, and other parameters of a particular process being performed by the processing tool 800. The system control software 858 may be configured in any suitable manner. For example, subroutines or control objects for various process tool components may be written to control the operation of the process tool components to perform the various process tool processes. The system control software 858 may be coded in any suitable computer-readable programming language.

[0118] In some embodiments, system control software 858 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of a PECVD process may include one or more instructions for execution by system controller 850. Instructions for setting process conditions for a PECVD process stage may be included in a corresponding PECVD recipe step, such as the deposition of a thick doped silicon oxide film as described herein. In some embodiments, PECVD recipe steps may be arranged sequentially, such that all instructions for a PECVD process step are executed simultaneously with that process step.

[0119] Other computer software and / or programs stored on the mass storage device 854 and / or memory device 856 associated with the system controller 850 may also be employed in some embodiments. Examples of programs or sections of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

[0120] The substrate positioning program may include program code for process tool components used to load a substrate onto the process station substrate holder 818 and to control the spacing between the substrate and other parts of the processing tool 800 .

[0121] The process gas control program may include code for controlling gas composition and flow rates, and optionally for flowing gases into one or more process stations prior to deposition to stabilize the pressure in the process stations. The pressure control program may include code for controlling the pressure in the process stations, for example, by adjusting throttle valves in the exhaust systems of the process stations, gas flows into the process stations, etc.

[0122] The heater control program may include code for controlling the current to a heating unit used to heat the substrate, or the heater control program may control the delivery of a heat transfer gas (such as helium) to the substrate.

[0123] The plasma control program may include code for setting RF power levels applied to process electrodes of one or more process stations.

[0124] In some embodiments, there may be a user interface associated with the system controller 850. The user interface may include a display screen, a graphical software display of equipment and / or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, etc.

[0125] In some embodiments, the parameters adjusted by the system controller 850 may relate to process conditions, including, but not limited to, process gas composition and flow rates, temperature, pressure, plasma conditions (such as RF bias power levels), pressure, temperature, etc. These parameters may be provided to a user in the form of a recipe or may be entered using a user interface.

[0126] Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 850 from various process tool sensors. Signals for controlling the process may be output at analog and digital output connections of the processing tool 800. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain process conditions.

[0127] The system controller 850 may provide program instructions for carrying out the deposition processes described above. The program instructions may control various process parameters such as DC power levels, RF bias power levels, pressure, temperature, etc. The instructions may control the parameters to manipulate the in situ deposition of film stacks according to various embodiments described herein.

[0128] In some embodiments, the system controller 850 is part of a system, which may be part of the examples described above. Such a system may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a wafer pedestal, gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of semiconductor wafers or substrates. The electronics, sometimes referred to as a "controller," may control various components or subparts of one or more systems. Depending on the processing conditions and / or the type of system, the system controller 850 may be programmed to control any of the processes disclosed herein, including delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, liquid delivery settings, position and motion settings, wafer transfer into and out of the tool, and wafer transfer into and out of other transport tools and / or load locks connected or interfaced with the particular system.

[0129] Broadly speaking, system controller 850 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to system controller 850 in the form of various individual settings (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the operational parameters may be part of a recipe defined by a process engineer to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0130] In some embodiments, the system controller 850 may be part of or connected to a computer that is integrated into the system, connected to the system, otherwise networked to the system, or a combination thereof. For example, the system controller 850 may be all or part of a “cloud,” i.e., fab host computer system, enabling remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, examine trends or performance criteria from multiple manufacturing operations, modify parameters of a current process, configure processing steps to track a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that allows entry or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the system controller 850 receives instructions in the form of data specifying parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool that system controller 850 is configured to interface with or control. Thus, as described above, system controller 850 may be distributed, such as by including one or more individual controllers networked together and operating toward a common purpose, such as the processes and controls described herein. One example of a distributed controller for such purposes is one or more integrated circuits on the chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that cooperatively control the processes at the chamber.

[0131] Examples of systems may include, but are not limited to, chemical vapor deposition (CVD / PECVD) chambers or modules, plasma etch chambers or modules, track chambers or modules, and any other semiconductor processing systems that may be associated with or used in the fabrication and / or manufacturing of semiconductor wafers. The etching operations described herein, such as for etching nitrides or oxides, may be performed in any suitable process chamber. In some embodiments, substrates may be etched in an adjustable-gap capacitively coupled confined RF plasma reactor, which may be used to perform the etching operations described herein.

[0132] As described above, depending on the process step or steps being performed by the tool, the system controller 850 may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used to transport materials to and from tool locations and / or load ports of wafers within a semiconductor fabrication factory.

[0133] It will be appreciated that in some embodiments, a low-pressure transfer chamber may be included in a multi-station processing tool to facilitate transfer between multiple processing chambers. For example, FIG. 9 schematically illustrates another embodiment of a multi-station processing tool 900. In the embodiment illustrated in FIG. 9, the multi-station processing tool 900 includes multiple processing chambers 914, which include multiple process stations (numbered 1 through 4). The processing chambers 914 interact with a low-pressure transfer chamber 904, which includes a robot 906 configured to transfer substrates between the processing chambers 914 and a load lock 919. An atmospheric substrate transfer module 918, which includes an atmospheric robot 912, is configured to facilitate transfer of substrates between the load lock 919 and a pod 908. Although not illustrated in FIG. 9, it will be appreciated that embodiments of the multi-station processing tool 900 may include a suitable system controller, such as the embodiment of the system controller 850 illustrated in and described with reference to FIG. 8.

[0134] conclusion Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the present embodiments are not to be limited to the details given herein.

Claims

1. 1. A method for forming a non-conformal metal-doped film on a patterned semiconductor substrate, comprising: providing a patterned semiconductor substrate to a process chamber, the patterned semiconductor substrate including a patterned mask layer; exposing the patterned semiconductor substrate to one or more cycles of (i) plasma-enhanced chemical vapor deposition and (ii) etching; each cycle comprising: exposing the patterned mask layer to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 10 to about 150 seconds to deposit a metal-doped carbon-containing layer on the patterned mask layer; exposing the metal-doped carbon-containing layer on the patterned mask layer to an etching solution for 1 to about 60 seconds to form a non-conformal metal-doped film on the patterned mask layer; A method comprising:

2. 10. The method of claim 1, The method, wherein the non-conformal metal-doped film comprises tungsten-doped carbide, tungsten-doped carbonitride, ruthenium-doped carbonitride, ruthenium-doped carbide, molybdenum-doped carbide, or a combination thereof.

3. 10. The method of claim 1, The method, wherein the hydrocarbon precursor comprises methane, ethane, ethylene, propylene, propyne, propane, butane, butylene, butadiene, acetylene, or a combination thereof.

4. 10. The method of claim 1, The method, wherein the reducing agent comprises hydrogen, ammonia, hydrazine, silane, disilane, trisilane, germane, digermane, diborane, or a combination thereof.

5. 10. The method of claim 1, The method, wherein the etchant comprises hydrogen, ammonia, boron trifluoride, nitrogen trifluoride, sulfur hexafluoride, phosphorus pentafluoride, tungsten hexafluoride, or a combination thereof.

6. 10. The method of claim 1, The method wherein the exposing comprises 1 to 20 cycles of plasma enhanced chemical vapor deposition and etching.

7. 10. The method of claim 1, The method wherein the exposing comprises one cycle of plasma enhanced chemical vapor deposition and etching.

8. 8. The method of claim 7, The method, wherein one cycle of plasma enhanced chemical vapor deposition and etching comprises exposure to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 30 seconds to about 95 seconds, and exposure to an etching solution for 10 seconds to about 50 seconds.

9. 10. The method of claim 1, The method wherein the process chamber is maintained at a temperature between about 200°C and 650°C.

10. 10. The method of claim 1, The method, wherein the patterned semiconductor substrate includes features in the patterned mask layer and a dielectric material beneath the patterned mask layer.

11. 11. The method of claim 10, The method further comprising etching the dielectric material to form a trench in the dielectric material.

12. 11. The method of claim 10, The method, wherein the features of the patterned mask layer include pillars constructed from the patterned mask layer.

13. 13. The method of claim 12, The method wherein the non-conformal metal-doped film forms a coating layer on top of the pillars.

14. 11. The method of claim 10, The method, wherein the dielectric material comprises a layer of silicon oxide and polysilicon, or a layer of silicon oxide and silicon nitride.

15. 10. The method of claim 1, The method, wherein the one or more cycles are performed in one process chamber.

16. 10. The method of claim 1, The method, wherein the non-conformal metal-doped film on the patterned mask layer has rounded profiles.

17. 10. The method of claim 1, The method, wherein the non-conformal metal-doped film comprises a helmet-shaped deposit on the patterned mask layer.

18. 10. The method of claim 1, The method, wherein the non-conformal metal-doped film comprises tungsten-doped carbide and the metal-containing precursor comprises a tungsten-containing precursor.

19. 20. The method of claim 18, The method, wherein the tungsten-containing precursor comprises tungsten hexacarbonyl, tungsten pentachloride, tungsten hexachloride, or tungsten hexafluoride.

20. 20. The method of claim 18, The method wherein the tungsten-doped carbide comprises about 10 to about 75 weight percent tungsten.

21. 1. An apparatus for processing a patterned semiconductor substrate, comprising: a process chamber; a substrate support for a patterned semiconductor substrate disposed in the process chamber, the patterned semiconductor substrate including a patterned mask layer; a plasma generator configured to generate a plasma within the process chamber; one or more gas inlets into the process chamber and associated flow control hardware; a controller having at least one processor and a memory; Including, the at least one processor and the memory are communicatively coupled to each other; the at least one processor is at least operatively connected to the associated flow control hardware; and The memory controls the at least one processor to: (i) positioning the patterned semiconductor substrate within the process chamber; and (ii) exposing the patterned semiconductor substrate to one or more cycles of plasma enhanced chemical vapor deposition and etching; and each cycle stores computer-executable instructions for: exposing the patterned mask layer to a metal-containing precursor, a hydrocarbon precursor, and a reducing agent for 10 to about 150 seconds to deposit a metal-doped carbon-containing layer on the patterned mask layer; exposing the metal-doped carbon-containing layer on the patterned mask layer to an etching solution for 1 to about 60 seconds to form a non-conformal metal-doped film on the patterned mask layer; 1. An apparatus comprising:

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