Impedance matching circuit for a plasma processing system and plasma processing system equipped with an impedance matching circuit of this type

Abstract

The impedance matching circuit (1) comprises three impedance matching units (6, 7, 8) connected in series. The second impedance matching unit (7) comprises at least one semiconductor switching element (12), by means of which the transformation ratio can be changed during operation. A signal is applied to the input (10) of the second impedance matching unit (7) and the first impedance matching unit (6) changes the input impedance ( Z 0) to the first intermediate impedance ( Z 1) is given by the target input impedance. a) First intermediate impedance ( Z The conductance of the impedance matching circuit (1) is rated ) and at the maximum allowable voltage of the at least one semiconductor switching element (12), the conductance of the impedance appearing at the input (10) of the second impedance matching unit (7), and b) First intermediate impedance ( Z The resistance of the impedance matching circuit (1) is rated ) and at the maximum allowable current of the at least one semiconductor switching element (12), is selected to be greater than the resistance of the impedance appearing at the input (10) of the second impedance matching unit (7).

Description

[Technical Field]

[0001] The present invention relates to an impedance matching circuit for a plasma processing system for a power of 500 W or more, preferably 2 kW or more, and a frequency in the range of 2 to 100 MHz, in particular in the range of 10 MHz to 50 MHz, and to a plasma processing system having such an impedance matching circuit. [Background technology]

[0002] Surface treatment of workpieces using plasma and gas lasers is an industrial process in which plasma is generated, in particular in a plasma process chamber, using DC signals or high frequency AC signals with operating frequencies ranging from several tens of kHz to GHz, in particular up to 10 GHz.

[0003] The plasma processing chamber is connected to the radio frequency power source through additional electronic components such as coils, capacitors, cables, or transformers, which may be resonant circuits, filters, or impedance matching circuits.

[0004] Hereinafter, "high frequency" will also be abbreviated as "HF", where HF refers to frequencies in the range of 2 MHz to 100 MHz, in particular in the range of 10 MHz to 50 MHz.

[0005] A problem with plasma processes is that the electrical load impedance of the plasma processing chamber, which occurs during the process and is posed by the plasma, considered herein as an electrical load or consumer, can vary widely depending on the conditions within the plasma processing chamber, particularly considering the workpiece, electrode characteristics, and gas conditions.

[0006] HF power sources have a limited operating range relative to the impedance of the connected electrical load, also referred to as the "consumer." If the load impedance falls outside the acceptable range, the HF power source may be damaged or even destroyed.

[0007] For this reason, an impedance matching circuit, usually called a matchbox, is required to transform the impedance of the load to the nominal impedance of the HF power supply output.

[0008] Different impedance matching circuits are known. Impedance matching circuits consist of electrical components, in particular coils and capacitors, which can be fixed and have a predetermined transformation effect, i.e., do not change during operation. This is particularly useful for consistently operating, for example, with gas lasers. Furthermore, impedance matching circuits are known in which at least some of the components of the impedance matching circuit can be changed, in particular by mechanically modifying the components. For example, motor-driven variable capacitors are known, the capacitance value of which can be changed by changing the relative positioning of the capacitor plates with respect to one another.

[0009] Plasmas can be generally classified into three impedance ranges. In an unignited state, a very high impedance exists. In normal operation, i.e., when used as intended with a plasma, a lower impedance exists. In the event of an undesired localized discharge, also known as an "arc," or plasma fluctuation, a very small impedance may occur. In addition to these three identified impedance ranges, other special conditions with other associated impedance values ​​may occur. If the load impedance changes suddenly and the load impedance or transformed load impedance falls outside the acceptable impedance range, damage may occur to the HF power source or the transmission equipment between the HF power source and the plasma process chamber. Undesired steady-state plasmas also exist.

[0010] In order to adapt the usually fixed output impedance of an HF power source to a changing electrical load, an impedance matching circuit is usually provided immediately before the load. Such impedance matching circuits are described in the literature, for example in DE 102009001355 A1.

[0011] Impedance matching circuits that can change their electrical characteristics, such as capacitance, during operation have a motor for changing these electrical characteristics. However, there are also impedance matching circuits that use semiconductor switches to switch capacitors on and off. The problem here is that the current and voltage carrying capacity of the semiconductor switches is insufficient depending on the load conditions. The current and voltage carrying capacity of the actual semiconductor switches determines the maximum power that can be transmitted by such an impedance matching circuit. Neither the impedance in a 50 ohm system nor the impedance in a direct plasma processing chamber is suitable for utilizing both the current and voltage limits of the semiconductor switching elements between two switching positions. In principle, it can be said that the semiconductor switching elements are not switching within their optimal ranges.

[0012] If the current and / or voltage is too low, the semiconductor switching elements may not be fully controlled, or if the current and voltage are too high, the semiconductor switching elements may be damaged. The latter case should be avoided, and therefore semiconductor switches are never fully utilized in the prior art. [Prior art documents] [Patent documents]

[0013] [Patent Document 1] German Patent Application Publication No. 102009001355 (DE102009001355A1) Summary of the Invention [Problem to be solved by the invention]

[0014] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an impedance matching circuit that utilizes components more advantageously than the prior art. [Means for solving the problem]

[0015] This object is achieved by an impedance matching circuit according to independent claim 1 and by a plasma processing system comprising such an impedance matching circuit according to claim 19. Claims 2 to 18 describe advantageous embodiments of the impedance matching circuit, and claim 20 describes an advantageous embodiment of the plasma processing system.

[0016] The impedance matching circuit according to the present invention is particularly useful in plasma processing systems, and is configured for a predetermined rated power. The impedance matching circuit includes an input terminal configured to electrically, in particular galvanically, connect the impedance matching circuit to an HF power source. The impedance matching circuit is particularly configured for a power of 500 W or more, preferably 2 kW or more, and a frequency in the range of 2 MHz to 100 MHz. The impedance matching circuit also includes an output terminal configured to electrically, preferably galvanically connect the impedance matching circuit to a consumer device, in particular in the form of a plasma processing chamber. The impedance matching circuit includes a first impedance matching unit electrically connected to the input terminal and configured to transform the input impedance at the input terminal into a first intermediate impedance, the transformation ratio of which cannot be changed during operation. The input impedance is preferably 50 ohms and is therefore preferably close to the nominal impedance of the HF power source. The expression "the transformation ratio cannot be changed during operation" means that the capacitance and / or inductance values ​​cannot be automatically adjusted during operation, for example by a motor or a semiconductor switch. The impedance matching circuit further includes a second impedance matching unit having at least one semiconductor switching element. The second impedance matching unit has an input and is electrically connected to the output of the first impedance matching unit via the input. The second impedance matching unit is configured to transform a first intermediate impedance at its input into a second intermediate impedance at its output, the transformation ratio being changeable during operation by the at least one semiconductor switching element. The impedance matching circuit further includes a third impedance matching unit electrically connected to the output of the second impedance matching unit. The output of the third impedance matching unit is electrically connected to an output terminal of the impedance matching circuit. The third impedance matching unit is configured to transform the second intermediate impedance into an output impedance provided at the output terminal.Therefore, at least one semiconductor switching element of the impedance matching unit can be operated up to the maximum permissible voltage and maximum permissible current. These values ​​can be obtained, for example, from the corresponding data sheet of the semiconductor switching element used. The first impedance matching unit converts the input impedance to a first intermediate impedance with respect to a predetermined target input impedance. a) the conductance of the first intermediate impedance is greater than the conductance of the impedance appearing at the input of the second impedance matching unit at the rated power of the impedance matching circuit and the maximum allowable voltage of the at least one semiconductor switching element; and b) the resistance of the first intermediate impedance is greater than the resistance of the impedance appearing at the input of the second impedance matching unit at the rated power of the impedance matching circuit and the maximum allowable current of the at least one semiconductor switching element; be selected.

[0017] The dimensioning of the impedance matching circuit according to the present invention, determined through calculations, simulations, circuit design, testing, and investigation, ensures that the at least one semiconductor switching element is fully utilized but not overloaded. This is particularly true for such impedance matching circuits configured for powers of 2 kW or more, since in this power range, the voltages and currents would overload conventional semiconductor switching elements. Therefore, it was determined that the impedance matching unit should meet the above-mentioned criteria for transforming the input impedance into a first intermediate impedance, which is preferably constant and more preferably corresponds to 50 ohms. This, together with the maximum allowable voltage and maximum allowable current of the semiconductor switching elements, allows for accurate calculation of the transformation ratio set by the first impedance matching unit. The at least one semiconductor switching element switches at a current and voltage that is not overloaded but preferably below the maximum allowable values. This means that the at least one semiconductor switching element is fully controlled, which means that the semiconductor switching element does not need to be oversized, resulting in cost savings. The dimensioning rules ensure that no critical situations arise regarding the current and voltage withstand capability of the at least one semiconductor switching element. In the impedance matching circuit according to the present invention, it is possible to omit connecting multiple semiconductor switching elements in parallel and / or series with one another. This is advantageous because the effort required to actually switch multiple semiconductor switching elements simultaneously is very high. If one semiconductor switching element switches slightly later than the other semiconductor switching elements, the impedance matching circuit may be destroyed. However, this is easily avoided by the dimensional design according to the present invention. Therefore, the dimensional design can ensure that no operating state that could destroy at least one semiconductor switching element occurs for the at least one semiconductor switching element, especially due to the defined input impedance specified by the HF power source.The at least one semiconductor switching element only needs to be switched to a current and / or voltage that is less than the maximum allowable voltage and / or current. Therefore, no additional control loop is needed to measure the voltage and / or current and make the switching behavior dependent thereon. As a result, the semiconductor switching element does not need to be significantly larger than in prior art known impedance matching circuits, which makes the impedance matching circuit according to the present invention cheaper to manufacture.

[0018] Complex Impedance Z Regarding the term "conductance" in the above, the conductance is generally taken to be the real part and equal to G, with the following relationship: Z =1 / Y =1 / (G+jB) As a result, the first intermediate impedance Z The conductance of 1 is defined as G1 and is given by: Z 1=1 / Y 1=1 / (G1+jB1)

[0019] In either case, B and B1 are the complex conductances Y , Y is the imaginary part of 1.

[0020] Complex Impedance Z Regarding the term "resistance" in the above, resistance is generally taken to be real and equal to R, with the following relationship: Z =R+jX

[0021] Therefore, the resistance of the first intermediate impedance is R1, given by: Z 1=R1+jX1

[0022] In either case, X and X1 are complex impedances. Z , Z is the imaginary part of 1.

[0023] In an advantageous embodiment of the impedance matching circuit, the first intermediate impedance is G1 = conductance of the first intermediate impedance, P rated = rated power of the impedance matching circuit, U max = maximum voltage across at least one semiconductor switching element, G1>P rated / U max 2 So that and, R1 = resistance of the first intermediate impedance, P rated = rated power of the impedance matching circuit, I max = the maximum current flowing through at least one semiconductor switching element, R1>P rated / I max 2 So that This allows the dimensions to be adjusted even more precisely.

[0024] In one advantageous embodiment of the impedance matching circuit, in one of the two switching states of the at least one semiconductor switching element, a voltage or current is applied to the semiconductor switching element that is 20% less, in particular 10% less, than the maximum permissible value of the voltage or current.

[0025] In an advantageous embodiment of the impedance matching circuit, the input impedance remains substantially constant and equal to a predetermined target input impedance during operation of the impedance matching circuit, which on the one hand presents a constant impedance to the HF power source, and on the other hand the constant transformation ratio of the input impedance to the first intermediate impedance by the first impedance matching unit ensures that the at least one semiconductor switching element always operates within the tolerance range and at the same time with a high level of modulation.

[0026] In an advantageous embodiment of the impedance matching circuit, the first intermediate impedance is closer to the output impedance than the input impedance on the Smith chart. Additionally or alternatively, the second intermediate impedance is closer to the output impedance than the first intermediate impedance on the Smith chart. This ensures that the control of the at least one semiconductor switching element can be maximized.

[0027] In an advantageous embodiment of the impedance matching circuit, at least one semiconductor switching element of the second impedance matching unit is a transistor or a diode, which allows the conversion ratio to be changed particularly quickly during operation.

[0028] The transistors may be configured as metal oxide semiconductor field effect transistors (MOSFETs), and the switching diodes may be configured as, for example, PIN diodes.

[0029] In an advantageous embodiment, the output impedance can be determined by a consumer device, in particular in the form of a plasma process chamber, and can be changed during operation. The output impedance can lie within a specified range on a Smith chart. The at least one semiconductor switching element has different switching states for points of output impedance that lie most far apart within the specified range on the Smith chart. The "specified range" can also be defined as an acceptable range within which the consumer device can be operated. This "specified range" can be predefined.

[0030] In an advantageous embodiment, the transformation ratio of the third impedance matching unit cannot be changed during operation.

[0031] In another advantageous embodiment, the impedance matching unit comprises at least one motor-adjustable capacitor, whereby the transformation ratio of the third impedance matching unit is changeable during operation, which allows for an even more accurate response to changes in the output impedance from the consumer during operation.

[0032] In an advantageous embodiment, the second intermediate impedance to which the second impedance matching unit transforms the first intermediate impedance is: a) the conductance of the second intermediate impedance is greater than the conductance of the impedance appearing at the rated power of the impedance matching circuit and the maximum voltage on the at least one motor adjustable capacitor; and b) the resistance of the second intermediate impedance is greater than the resistance of the impedance appearing at the rated power of the impedance matching circuit and the maximum current in the at least one motor adjustable capacitor; This also ensures that the motor adjustable capacitor of the third impedance matching unit is well controlled and at the same time does not exceed the maximum allowable values ​​of current and voltage, in which case there is no need to enlarge the motor adjustable capacitor, which optimizes the cost of the third impedance matching unit. Second intermediate impedance Z The conductance of 2 is G2, which is given by: Z 2=1 / Y 2=1 / (G2+jB2)

[0033] The resistance of the second intermediate impedance is R2 and is given by: Z 2=R2+jX2

[0034] In an advantageous embodiment of the impedance matching circuit, the second intermediate impedance is G2 = conductance of the second intermediate impedance, Prated = rated power of the impedance matching circuit, U max = maximum voltage of at least one motor adjustable capacitor, G2>P rated / U max 2 So that and, R2 = resistor of the second intermediate impedance, P rated = rated power of the impedance matching circuit, I max = maximum current of at least one motor adjustable capacitor, R2>P rated / I max 2 So that be selected.

[0035] In an advantageous embodiment of the impedance matching circuit, the third impedance matching unit does not include a semiconductor switching element. This offers a particular advantage when the impedance change caused by the consumer device is large. This also applies if the capacitor of the third impedance matching unit is not motor-adjustable. Such a "motor-adjustable capacitor" should be understood in particular as one that does not switch the capacitance stepwise, but simply adjusts the distance between the two plates of the plate capacitor, thereby changing its capacitance.

[0036] In one advantageous embodiment, the first impedance matching unit comprises an output, at least one coil, and at least one first capacitor, each configured as a separate component. The at least one coil connects an input terminal of the impedance matching circuit to a reference ground. The at least one first capacitor connects an input terminal of the impedance matching circuit to an output at which a first intermediate impedance is present. Such a configuration is particularly suitable for frequencies in the range of 2 MHz to 50 MHz, in particular 10 MHz to 30 MHz, and particularly preferably around 13 MHz.

[0037] In an advantageous embodiment, the first impedance matching unit comprises at least one second capacitor, in particular configured as a separate component, which connects the output of the first impedance matching unit to the reference ground, such a configuration being particularly suitable for frequencies in the range of 2 MHz to 50 MHz, in particular 10 MHz to 30 MHz, particularly preferably around 27 MHz.

[0038] In one advantageous embodiment, the second impedance matching unit comprises at least one coil, at least one first capacitor, and at least one further capacitor, each configured as a separate component. A first intermediate impedance is present at the input of the second impedance matching unit. A second intermediate impedance is present at the output of the second impedance matching unit. The at least one coil is disposed in a transmission line connecting the input to the output. The at least one semiconductor switching element is configured to effectively electrically connect the transmission line to a reference ground via the at least one first capacitor and / or to effectively connect the at least one further capacitor in series with the transmission line.

[0039] In one advantageous embodiment, the second impedance matching unit comprises a plurality of semiconductor switching elements and a plurality of capacitors. a) configured to electrically connect the transmission line to a reference ground via each of the capacitors, each semiconductor switching element being arranged in series with a respective capacitor, and each capacitor with its respective semiconductor switching element being arranged in parallel with other capacitors with their respective semiconductor switching elements, thereby allowing a plurality of conversion ratios to be set; and / or b) It is configured to effectively connect at least one capacitor and / or coil to the transmission line, with each semiconductor switching element being arranged in series or parallel with each capacitor or coil, which makes it possible to change the conversion ratio in a very efficient way during operation.

[0040] In one advantageous embodiment, the third impedance matching unit includes at least one coil and at least one capacitor, each configured as a separate component. The third impedance matching unit includes an input, an output terminal, and a transmission line, the transmission line electrically connecting the input to the output terminal. The second intermediate impedance is present at the input. The at least one coil connects the transmission line to a reference ground.

[0041] In one advantageous embodiment, at least one coil of the third impedance matching unit is connected to the input terminal either directly or via at least one capacitor of the third impedance matching unit. Additionally or alternatively, at least one coil of the third impedance matching unit is connected to the output terminal either directly or via at least one capacitor and / or a further coil. Such an arrangement has provided very good results in practice.

[0042] In an advantageous embodiment, the at least one semiconductor switching element can be cooled by a fluid, which can be, for example, water, but also distilled water.

[0043] The plasma processing system according to the present invention comprises an impedance matching circuit as described above. Furthermore, the plasma processing system comprises an HF power source and at least one consumer device, in particular in the form of a plasma processing chamber. The HF power source is connected to an input terminal of the impedance matching circuit. The output terminal of the impedance matching circuit is connected to the at least one consumer device. The input impedance of the impedance matching circuit corresponds to the nominal impedance of the HF power source. Therefore, there is regulation, and no or very little power is reflected back towards the HF power source. Due to the dimensioning rules for the first intermediate impedance described above, the maximum permissible voltage and maximum permissible current of the at least one semiconductor switching element are not exceeded.

[0044] In one advantageous embodiment, the plasma processing system includes a measurement unit disposed between the HF power source and the impedance matching circuit. The measurement unit may include a directional coupler or a sensor pair including a current sensor and a voltage sensor. A control and / or sensing device is also provided and configured to receive measurements, such as power transmitted to the impedance matching circuit, from the measurement unit. Additionally or alternatively, power reflected by the impedance matching circuit may also be received by the measurement unit. These measurements account for input variables present at the input terminals of the impedance matching circuit. The control and / or sensing device is configured to control at least one semiconductor switching element based on the measurements so that a desired plasma is generated in the plasma processing chamber. [Brief explanation of the drawings]

[0045] The invention will now be described, by way of example only, with reference to the drawings in which: [Figure 1] 1 illustrates an exemplary embodiment of a plasma processing system according to the present invention having an impedance matching circuit according to the present invention. [Figure 2A]3A-3C illustrate various exemplary embodiments of how a first impedance matching unit of an impedance matching circuit may be configured. [Figure 2B] 3A-3C illustrate various exemplary embodiments of how a first impedance matching unit of an impedance matching circuit may be configured. [Figure 3A] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 3B] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 3C] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 3D] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 3E] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 3F] 3A-3C show various embodiments of how the second impedance matching unit of the impedance matching circuit can be configured. [Figure 4A] 10A-10C show various embodiments of how the third impedance matching unit of the impedance matching circuit is configured. [Figure 4B] 10A-10C show various embodiments of how the third impedance matching unit of the impedance matching circuit is configured. [Figure 4C] 10A-10C show various embodiments of how the third impedance matching unit of the impedance matching circuit is configured. [Figure 4D]10A-10C show various embodiments of how the third impedance matching unit of the impedance matching circuit is configured. [Figure 4E] 10A-10C show various embodiments of how the third impedance matching unit of the impedance matching circuit is configured. [Figure 5] 1 illustrates an embodiment of a plasma process delivery system. [Figure 6] 1 shows a portion of a measurement unit of a plasma processing system. DETAILED DESCRIPTION OF THE INVENTION

[0046] 1 shows a plasma processing system 100 comprising an impedance matching circuit 1. The plasma processing system 100 further comprises an HF power supply 101 and at least one consumer 102 in the form of a plasma processing chamber. The HF power supply 101 has a rated power P rated The impedance matching circuit 1 is configured to supply an HF signal, in particular in the form of a uniform signal, also called a continuous wave signal or CW signal for short, having a frequency of 10 kHz to 10 kHz. The impedance matching circuit 1 comprises an input terminal 2, to which an HF power supply 101 is connected. The impedance matching circuit 1 further comprises an output terminal 3, which is connected to at least one consumer 102. The HF power supply 101 is preferably connected to the impedance matching circuit 1 via a first cable arrangement 4. The impedance matching circuit 1 is preferably connected to the consumer 102 via a second cable arrangement 5. The first cable arrangement 4 and / or the second cable arrangement 5 may, for example, comprise one or more cables connected in series and / or in parallel. Preferably, coaxial cables are used.

[0047] The consumer 102, i.e. the plasma processing chamber, comprises at least one electrode 103 for generating a plasma 104. The electrode 103 is connected, in particular galvanically, to the output terminal 3 of the impedance matching circuit 1.

[0048] The plasma processing system 100 also includes a control and / or detection device 105, which preferably includes a processor and / or a programmable logic component, particularly an FPGA, and / or a microcontroller, and / or a preconfigured logic component, particularly an ASIC. The control and / or detection device 105 may also include a storage unit. The control and / or detection device 105 is configured to control the HF power supply 101, particularly to activate or deactivate it. Additionally or alternatively, the control and / or detection device 105 is also configured to change the power and / or frequency of the HF signal. Additionally or alternatively, the control and / or detection device 105 is configured to change the waveform of the HF signal, particularly the type of HF signal or the modulation of the HF signal.

[0049] The control and / or sensing device 105 is preferably also configured to control the impedance matching circuit 1. In particular, the control and / or sensing device 105 is configured to change the transformation ratio in the impedance matching circuit 1.

[0050] The plasma processing system 100 also preferably includes a measurement unit 106. The measurement unit 106 is disposed between the HF power source 101 and the impedance matching circuit 1. The measurement unit 106 may include, for example, at least one directional coupler or a combination of a current sensor and a voltage sensor. The measurement unit 106 can measure the power of the HF signal transmitted from the HF power source 101 toward the impedance matching circuit 1 via the at least one directional coupler. Preferably, the measurement unit 106 can also measure the power of the HF signal reflected back by the impedance matching circuit 1 toward the HF power source 101. A combination of a current sensor and a voltage sensor can also be used to determine the power of the HF signal transmitted from the HF power source 101 toward the impedance matching circuit 1. The power of the HF signal reflected by the impedance matching circuit 1 can also be detected by a current sensor and / or a voltage sensor.

[0051] The plasma processing system 100 also preferably includes an operating unit 107. The operating unit 107 preferably has a screen, particularly a touch screen. The operating unit 107 may also include input devices, such as a keyboard and / or a mouse, in addition to the screen. The operating unit 107 may also be a web server for providing data and receiving user input. The control and / or sensing device 105 is configured to display the current settings of the HF power source 101 and / or the impedance matching circuit 1 on the operating unit 107. The control and / or sensing device 105 may also be configured to display measurements received by the measurement unit 106 on the operating unit 107. The control and / or sensing device 105 is preferably configured to receive setpoint specifications, e.g., regarding the power of the HF signal, the frequency of the HF signal, and / or the waveform of the HF signal, from the operating unit 107, generate corresponding operating variables for the HF power source 101, and transmit the operating variables to the HF power source.

[0052] Before describing the impedance matching circuit 1 according to the invention in detail, reference is made to Figures 5 and 6, each of which depicts a measurement unit 106. This may be the same measurement unit in the two different figures. In these exemplary embodiments, the measurement unit 106 is configured to measure voltage and current contactlessly. For this purpose, the measurement unit 106 comprises a current sensor 110 and a voltage sensor 111.

[0053] More preferably, however, the phase relationship between the current and the voltage is determined and / or measured.

[0054] The current sensor 110 of the measurement unit 106 is a coil, in particular in the form of a Rogowski coil.

[0055] The ends of the coil are preferably connected together via a shunt resistor 112. The voltage drop across the shunt resistor 112 can be digitized by a first A / D converter 113.

[0056] The voltage sensor 111 of the measuring unit 106 is preferably configured as a capacitor voltage divider. A first capacitor 114 is formed by a conductive ring 114. A conductive cylinder can also be used. The first cable array 4 is guided through this conductive ring 114. A second capacitor 115 of the voltage sensor 111 configured as a voltage divider is connected to the reference ground. A second A / D converter 116 is connected in parallel with the second capacitor 115 and is configured to detect and digitize the voltage drop across the second capacitor 115.

[0057] In principle, the measurement unit 106 can also be arranged or constructed on a (common) printed circuit board. The first capacitor 114 can be formed by a coating on a first side and an opposite second side of the circuit board. In this case, the coatings on the first and second sides are electrically connected to each other by vias. The first cable arrangement 4 passes through an opening in the circuit board. The second capacitor 115 can be formed by a separate component.

[0058] The current sensor 110 in the form of a coil, in particular a Rogowski coil, is further spaced from the first cable arrangement 4 than the first capacitor 114. The coil can also be formed on the same circuit board by suitable coatings and vias. The coil for measuring the current and the first capacitor for measuring the voltage preferably pass through a common plane.

[0059] The shunt resistor 112 may also be located on this circuit board, as may the first A / D converter 113 and / or the second A / D converter 116. The first A / D converter 113 and / or the second A / D converter 116 are read and / or controlled by the control and / or sensing device 105.

[0060] The control and / or sensing device 105 is preferably configured to control the impedance matching circuit 1 based on the measurements of the measurement unit 106 .

[0061] 1, the structure of the impedance matching circuit 1 will be described in more detail below. The impedance matching circuit 1 includes a first impedance matching unit 6, a second impedance matching unit 7, and a third impedance matching unit 8. The first impedance matching unit 6 is electrically connected to the input terminal 2.

[0062] The first impedance matching unit 6 matches the input impedance present at the input terminal 2 Z 0 to the first intermediate impedance Z 1. The first intermediate impedance Z 1 is present at the output 9 of the first impedance matching unit 6. The transformation ratio cannot be changed during operation. The second impedance matching unit 7 is connected to the first impedance matching unit 6 in the transmission direction of the HF signal from the HF power source 101 to the consumer 102. In particular, the second impedance matching unit 7 has an input 10 which is connected to or is identical with the output 9 of the first impedance matching unit 6. The input 10 therefore has a first intermediate impedance Z 1 is also present. The second impedance matching unit 7 has a first intermediate impedance at its input 10. Z 1 to the second intermediate impedance at its own output 11 Z2, the conversion ratio of which can be changed during operation by at least one semiconductor switching element 12. The third impedance matching unit 8 is connected to the second impedance matching unit 7 in the transmission direction of the HF signal from the HF power source 101 to the consumer 102. In particular, the third impedance matching unit 8 has an input 13 which is connected to or is identical to the output 11 of the second impedance matching unit 7. The input 13 therefore has a second intermediate impedance Z 2 is also present. The third impedance matching unit 8 has a second intermediate impedance at its input 13. Z 2, the output impedance at its own output 14 Z P The conversion ratio may or may not be changeable during operation. The output 14 of the third impedance matching unit 8 is electrically connected to the output terminal 3 of the impedance matching circuit 1. This also includes the possibility that the output 14 of the third impedance matching unit 8 is the same as the output terminal 3 of the impedance matching circuit 1.

[0063] 3A to 3F, and as will be explained in more detail later, the second impedance matching unit 7 has at least one semiconductor switching element 12. The at least one semiconductor switching element 12 of the second impedance matching unit 7 can be operated up to the maximum allowable voltage and maximum allowable current. Z The first intermediate impedance to convert 0 to Z 1 is, for a given target input impedance, a) First intermediate impedance Z The conductance of the impedance matching circuit 1 is rated and at the maximum allowable voltage of the at least one semiconductor switching element 12, the conductance of the impedance appearing at the input 10 of the second impedance matching unit 7 is greater than the conductance of the impedance appearing at the input 10 of the second impedance matching unit 7; b) First intermediate impedance Z 1 resistance is at least one semiconductor switching element 12 rated power P rated and is selected to be greater than the resistance of the impedance appearing at the input 10 of the second impedance matching unit 7 at the maximum allowed current. Rated power P of impedance matching circuit 1 rated is preferably equal to the rated power P of the HF power supply 101. rated is the same as

[0064] A transmission line for transmitting an HF signal extends between an input terminal 2 and an output terminal 3 of the impedance matching circuit 1. A first impedance matching unit 6, a second impedance matching unit 7 and a third impedance matching unit 8 are thereby arranged on the transmission line.

[0065] In the following figures, possible structures of the first impedance matching unit 6, the second impedance matching unit 7 and the third impedance matching unit 8 of the impedance matching circuit 1 are explained in more detail.

[0066] 2A and 2B show possible structures of the first impedance matching unit 6. The first impedance matching unit 6 has a constant and therefore invariable transformation ratio during operation.

[0067] 2A, the first impedance matching unit 6 comprises a coil 15 and a first capacitor 16, which are preferably configured as separate components. The coil 15 connects the input terminal 2 to the reference ground. The first capacitor 16 connects the input terminal 2 to the output 9 of the first impedance matching unit 6. The first intermediate impedance Z 1 is also present in this output.

[0068] In Fig. 2B, the first impedance matching unit 6 also comprises a second capacitor 17. In contrast to Fig. 2A, the second capacitor 17 according to Fig. 2B also connects the output 9 of the first impedance matching unit 6 to the reference ground.

[0069] 3A, 3B, 3C, 3E, 3D and 3F show possible structures of the second impedance matching unit 7. FIG.

[0070] In FIG. 3A, the second impedance matching unit 7 includes a first capacitor 20, a second capacitor 21, a first coil 18, and a semiconductor switching element 12. The first coil 18 connects the input 10 of the second impedance matching unit 7 to the output 11 of the second impedance matching unit 7. The first capacitor 20 and the second capacitor 21 are connected in series, with the first capacitor 20 connected to the input 10 and the second capacitor 21 connected to reference ground. The semiconductor switching element 12 is arranged in parallel with the second capacitor 21. The semiconductor switching element 12 is preferably a transistor. When the semiconductor switching element 12 is conducting, the second capacitor 21 is inactive. The second capacitor 21 is bridged. When the semiconductor switching element 12 is blocking, an electrically effective series circuit consisting of the first capacitor 20 and the second capacitor 21 exists.

[0071] In FIG. 3B, the second impedance matching unit 7 includes a first capacitor 20, a second capacitor 21, and a semiconductor switching element 12. The first capacitor 20 is connected to the output 11 of the second impedance matching unit 7. A parallel circuit consisting of the second capacitor 21 and the semiconductor switching element 12 is arranged in series with the first capacitor 20. This parallel circuit is also connected to the input 10 of the second impedance matching unit 7. When the semiconductor switching element 12 is conducting, only the first capacitor 20 is active between the input 10 and the output 11. The second capacitor 21 is bridged by the semiconductor switching element 12. When the semiconductor switching element 12 is blocking, the second capacitor 21 is electrically active, and a series circuit consisting of the first capacitor 20 and the second capacitor 21 is formed between the input 10 and the output 11.

[0072] Figure 3C shows a combination of the exemplary embodiment according to Figures 3A and 3B. A first capacitor 20, a second capacitor 21, a third capacitor 22 and a fourth capacitor 23 are provided. Furthermore, two semiconductor switching elements 12 and a first coil 18 are provided. The input 10 is connected to the reference ground via a series circuit. The series circuit comprises the following elements: a) a first capacitor 20; b) a parallel circuit consisting of a second capacitor 21 and a semiconductor switching element 12; The input 10 is connected to the output 11 via a further series circuit. The further series connection comprises the following elements: a) a first coil 18; b) a parallel circuit consisting of a fourth capacitor 23 and a semiconductor switching element 12; c) a third capacitor 22; It is equipped with:

[0073] Figure 3D shows a further exemplary embodiment based on the exemplary embodiment of Figure 3A. A first capacitor 20, a second capacitor 21, a third capacitor 22 and a fourth capacitor 23 are provided. Furthermore, three semiconductor switching elements 12 and a first coil 18 are provided. The first coil 18 connects the input 10 to the output 11. The input 10 is also connected to the reference ground via a series circuit. The series circuit includes the following elements: a) a first capacitor 20; b) a parallel circuit comprising three further series circuits, wherein a first further series circuit comprises a second capacitor 21 and a semiconductor switching element 12, a second further series circuit comprises a third capacitor 22 and a semiconductor switching element 12, and a third further series circuit comprises a fourth capacitor 23 and a semiconductor switching element 12; It is equipped with:

[0074] When all three semiconductor switching elements 12 are turned off, the first capacitor 20 is not connected to the reference ground. When each semiconductor switching element 12 is conductive, it connects the first capacitor 20 to the reference ground via the second capacitor 21, the third capacitor 22, or the fourth capacitor 23.

[0075] FIG. 3E shows a further exemplary embodiment based on the exemplary embodiment of FIG. 3D. A first capacitor 20, a second capacitor 21, a third capacitor 22, and a fourth capacitor 23 are provided. Three semiconductor switching elements 12, a first coil 18, and a second coil 19 are also provided. The first coil 18 connects the input 10 to the output 11. A series circuit consisting of the second coil 19 and the semiconductor switching element 12 is arranged in parallel with the first coil 18. When the semiconductor switching element 12 is conducting, the second coil is electrically connected in parallel with the first coil 18. In this case, the input 10 is connected to the output 11 via the parallel circuit consisting of the first coil 18 and the second coil 19. When the semiconductor switching element 12 is turned off, no current flows through the second coil 19. The input 10 is connected only to the output 11 via the first coil 18. The input 10 is also connected to reference ground via the series circuit. A series circuit consists of the following elements: a) a first capacitor 20; b) a parallel circuit comprising three further series circuits, wherein a first further series circuit comprises a second capacitor 21 and a semiconductor switching element 12, a second further series circuit comprises a third capacitor 22 and a semiconductor switching element 12, and a third further series circuit comprises a fourth capacitor 23 and a semiconductor switching element 12; It is equipped with:

[0076] When all three semiconductor switching elements 12 are turned off, the first capacitor 20 is not connected to the reference ground. When each semiconductor switching element 12 is conductive, it connects the first capacitor 20 to the reference ground via the second capacitor 21, the third capacitor 22, or the fourth capacitor 23.

[0077] In Figures 3A, 3B, 3C, 3D, and 3E, the semiconductor switching elements 12 can be configured as transistors. Figure 3F corresponds in structure to the embodiment of Figure 3D. In contrast to Figure 3D, the semiconductor switching elements 12 are configured as diode devices. The cathode side of each diode is connected to the reference ground. A DC voltage can be applied to the anode side of each diode 12 to make the respective diode conductive. A DC voltage can be applied to each of the respective diodes individually, allowing the diodes to be switched separately. The diodes are preferably PIN diodes.

[0078] The semiconductor switching elements 12 of Figures 3A-3F may also comprise a combination of a transistor and a diode.

[0079] The control and / or sensing device 105 makes it possible to generate control signals, in particular DC voltages, for the semiconductor switching elements 12 in the form of transistors and / or diodes.

[0080] 4A, 4B, 4C, 4D and 4E show possible structures of the third impedance matching unit 8. FIG.

[0081] 4A, the third impedance matching unit 8 includes a first capacitor 27 and a first coil 24. The first capacitor 27 and the first coil 24 are arranged in an L-shaped circuit. The first coil 24 connects the input 13 of the third impedance matching unit 8 to the reference ground. The first capacitor 27 connects the input 13 to the output 14. The output 14 of the third impedance matching unit 8 can be directly connected to the output terminal 3 of the impedance matching circuit 1.

[0082] 4B, the third impedance matching unit 8 comprises a first capacitor 27, a second capacitor 28, and a first coil 24. The first capacitor 27, the second capacitor 28, and the coil 24 are arranged in a T-shaped circuit. The input 13 is connected to the output 14 via the first capacitor 27 and the second capacitor 28 connected in series. The first coil 24 is arranged between the first capacitor 27 and the second capacitor 28 and establishes a connection to the reference ground. In this case, the input 13 is connected to the reference ground via the first capacitor 27 and the first coil 24. The output 14 is connected to the reference ground via the second capacitor 28 and the first coil 24.

[0083] 4C, the third impedance matching unit 8 includes a first capacitor 27, a second capacitor 28, and a first coil 24. The first capacitor 27, the second capacitor 28, and the coil 24 are arranged in a π-type circuit. The input 13 is connected to the reference ground via the first coil 24. The input 13 is also connected to the output 14 via the first capacitor 27. The output 14 is connected to the reference ground via the second capacitor 28.

[0084] 4A, 4B and 4C, the transformation ratio of the third impedance matching unit 8 cannot be changed during operation: to change the transformation ratio, the corresponding capacitor 27, 28 or primary coil 24 must be replaced with another capacitor or a different primary coil with a changed value.

[0085] In FIG. 4D, the third impedance matching unit 8 includes a first capacitor 27, a second capacitor 28, a first coil 24, and a second coil 25. The input 13 is connected to the reference ground via a series circuit including the first coil 24 and the first capacitor 27. In this case, the first capacitor 27 is variable, in particular, motorized for height adjustment. The input 13 is also connected to the output 14 via a series circuit including the second coil 25 and the second capacitor 28. In this case, the second capacitor 28 is variable, in particular, motorized for height adjustment. In principle, only one of the two capacitors 27, 28 may be variable.

[0086] In FIG. 4E, the third impedance matching unit 8 includes a first capacitor 27, a second capacitor 28, a first coil 24, and a second coil 25. The input 13 is connected to a reference ground via a series circuit including the first capacitor 27 and the first coil 24. The input 13 is also connected to an output 14 via a series circuit including the first capacitor 27, the second coil 25, and the second capacitor 28. In this case, the first capacitor 27, the second coil 25, and the second capacitor 28 are arranged in the signal transmission path between the input 13 and the output 14. Thus, the output 14 is connected to a reference ground via a series circuit including the second capacitor 28, the second coil 25, and the first coil 24. In this case, the first capacitor 27 is variable, in particular, motorized for height adjustment. In this case, the second capacitor 28 is also variable, in particular, motorized for height adjustment. In principle, only one of the two capacitors 27, 28 can be variable.

[0087] A typical impedance matching circuit 1 is described, for example, in German Patent Application No. 102023104942.9 (DE102023104942.9), entitled "Impedanzanpassungsschaltung, Plasmaprozessversorgungssystem und Plasmaprozesssystem", filed on February 28, 2023, which is incorporated herein by reference in its entirety.

[0088] In particular, the further impedance matching circuit (1) described in the above mentioned application may further develop individual or all of the features of the present impedance matching circuit 1.

[0089] A typical plasma processing system 9 is described, for example, in German Patent Application No. DE102023104948.8, entitled "Impedanzanpassungsschaltung, Plasmaprozessversorgungssystem und Plasmaprozesssystem," filed on February 28, 2023, which is incorporated herein by reference in its entirety. In particular, the second impedance matching units (7, 7a-7f) described in the aforementioned application may be an advantageous embodiment of the second impedance matching unit 7 described herein.

[0090] The above-mentioned features allow the number of components such as semiconductor switching elements or reactances, e.g. coils and / or capacitors and capacitors and / or inductors, to be kept low, and therefore an even more compact design can be achieved.

[0091] The invention is not limited to the exemplary embodiments described: within the scope of the invention, all described and / or depicted features can be combined with one another as desired.

Claims

1. An impedance matching circuit (1) for a plasma processing system (100) for a power of 500 W or more and a frequency in the range of 2 MHz to 100 MHz, said impedance matching circuit (1) having a predetermined rated power (P ｒａｔｅｄ ) and - an input terminal (2) is provided, adapted to electrically connect said impedance matching circuit (1) to an HF power source (101); - there is provided an output terminal (3) adapted to electrically connect said impedance matching circuit (1) to a consumer device (102), in particular in the form of a plasma process chamber; the impedance matching circuit (1) comprises a first impedance matching unit (6) electrically connected to the input terminal (2) and configured to transform an input impedance (Z 0) at the input terminal (2) into a first intermediate impedance (Z 1), the transformation ratio being unchangeable during operation; the impedance matching circuit (1) comprises a second impedance matching unit (7) having at least one semiconductor switching element (12), electrically connected at its input (10) to the first impedance matching unit (6) and configured to transform the first intermediate impedance (Z1) at its input (10) into a second intermediate impedance (Z2) at its output (11), the transformation ratio being changeable during operation by the at least one semiconductor switching element (12); the impedance matching circuit (1) comprises a third impedance matching unit (8) electrically connected to the output (11) of the second impedance matching unit (7) and electrically connected by its output (14) to the output terminal (3), the third impedance matching unit (8) being configured to transform the second intermediate impedance (Z2) at its input (13) into an output impedance (ZP) at the output terminal (3); - the at least one semiconductor switching element (12) of the second impedance matching unit (7) is operable up to a maximum permissible voltage and a maximum permissible current; The first intermediate impedance (Z1) to which the first impedance matching unit (6) transforms the input impedance (Z0) is such that, for a given target input impedance: a) The conductance of the first intermediate impedance (Z1) is set to the rated power (P ｒａｔｅｄ ) and at the maximum allowable voltage of the at least one semiconductor switching element (12), the conductance of the impedance appearing at the input (10) of the second impedance matching unit (7), and b) The resistance of the first intermediate impedance (Z1) is set to the rated power (P ｒａｔｅｄ ) and at the maximum allowable current of the at least one semiconductor switching element (12), the resistance of the impedance appearing at the input (10) of the second impedance matching unit (7), To be selected, An impedance matching circuit (1) characterized by:

2. said first intermediate impedance (Z1) is G １ = the conductance of the first intermediate impedance (Z1), P ｒａｔｅｄ = rated power of the impedance matching circuit (1), U ｍａｘ = the maximum voltage across the at least one semiconductor switching element (12), G １ >P ｒａｔｅｄ / U ｍａｘ ２ So that and, R １ = the resistance of the first intermediate impedance (Z1), P ｒａｔｅｄ = rated power of the impedance matching circuit (1), I ｍａｘ = the maximum current of the at least one semiconductor switching element (12), R １ >P ｒａｔｅｄ / I ｍａｘ ２ So that To be selected, An impedance matching circuit (1) according to claim 1, characterized in that

3. the input impedance (Z 0) is substantially constant during operation of the impedance matching circuit (1) and is equal to the predetermined target input impedance; An impedance matching circuit (1) according to claim 1 or 2, characterized in that it is

4. - the first intermediate impedance (Z1) is closer to the output impedance (ZP) on the Smith chart than to the input impedance (Z0); and / or the second intermediate impedance (Z2) is closer to the output impedance (ZP) on the Smith chart than the first intermediate impedance (Z1); An impedance matching circuit (1) according to any one of claims 1 to 3, characterized in that it comprises:

5. - the at least one semiconductor switching element (12) of the second impedance matching unit (7) is a transistor or a diode; An impedance matching circuit (1) according to any one of claims 1 to 4, characterized in that it is

6. the output impedance (ZP) is determinable by the consumer (102), in particular in the form of a plasma process chamber, and is variable during operation, the output impedance (ZP) can lie within a specified range on the Smith chart, the at least one semiconductor switching element (12) being in different switching states for points of the output impedance (ZP) lying most distantly within the specified range on the Smith chart; An impedance matching circuit (1) according to any one of claims 1 to 5, characterized in that it is

7. - the transformation ratio of said third impedance matching unit (8) cannot be changed during operation; An impedance matching circuit (1) according to any one of claims 1 to 6, characterized in that it is

8. - the third impedance matching unit (8) comprises at least one motor-adjustable capacitor (27, 28), whereby the transformation ratio of the third impedance matching unit (8) is variable during operation; An impedance matching circuit (1) according to any one of claims 1 to 6, characterized in that it is

9. The second impedance matching unit (7) transforms the first intermediate impedance (Z1) into the second intermediate impedance (Z2) such that: a) The conductance of the second intermediate impedance (Z2) is set to the rated power (P) of the impedance matching circuit (1). ｒａｔｅｄ ) and the conductance of the impedance appearing at the maximum voltage on the at least one motor-adjustable capacitor (27, 28), and b) The resistance of the second intermediate impedance (Z2) is set to the rated power (P ｒａｔｅｄ ) and the resistance of the impedance appearing at the maximum current of the at least one motor adjustable capacitor (27, 28), To be selected, An impedance matching circuit (1) according to claim 8, characterized in that

10. said second intermediate impedance (Z2) is G ２ = the conductance of the second intermediate impedance (Z2), P ｒａｔｅｄ = rated power of the impedance matching circuit (1), U ｍａｘ = the maximum voltage of the at least one motor adjustable capacitor (27, 28), G ２ >P ｒａｔｅｄ / U ｍａｘ ２ So that and, R ２ = the resistance of the second intermediate impedance (Z2), P ｒａｔｅｄ = rated power of the impedance matching circuit (1), I ｍａｘ = the maximum current of the at least one motor adjustable capacitor (27, 28), R ２ >P ｒａｔｅｄ / I ｍａｘ ２ So that To be selected, An impedance matching circuit (1) according to claim 9, characterized in that

11. - the third impedance matching unit (8) does not include a semiconductor switching element (12); An impedance matching circuit (1) according to any one of claims 1 to 10, characterized in that it is

12. - said first impedance matching unit (6) comprises at least one output (9), one coil (15) and at least one first capacitor (16), each configured as a separate component; - said at least one coil (15) connects said input terminal (2) to a reference ground; - said at least one first capacitor (16) connecting said input terminal (2) of said impedance matching circuit (1) to said output (9) at which said first intermediate impedance (Z1) is present; An impedance matching circuit (1) according to any one of claims 1 to 11, characterized in that it is

13. - said first impedance matching unit (6) comprises at least one second capacitor (17) configured as a separate component; - said at least one second capacitor (17) connecting said output (9) of said first impedance matching unit (6) to said reference ground; An impedance matching circuit (1) according to claim 11, characterized in that

14. - the second impedance matching unit (7) comprises at least one coil (18), at least one first capacitor (20) and at least one further capacitor (23), each configured as a separate component; - the first intermediate impedance (Z1) is present at the input (10) of the second impedance matching unit (7) and the second intermediate impedance (Z2) is present at the output (11) of the second impedance matching unit (7); - said at least one coil (18) is arranged in a transmission line connecting said input (10) to said output (11); said at least one semiconductor switching element (12) a) configured to effectively electrically connect the transmission line to a reference ground via the at least one first capacitor (20); and / or b) configured to effectively connect the at least one further capacitor (23) in series in the transmission line; An impedance matching circuit (1) according to any one of claims 1 to 13, characterized in that it

15. the second impedance matching unit (7) comprises a plurality of semiconductor switching elements (12) and a plurality of capacitors (21, 22, 23); The plurality of semiconductor switching elements (12) a) the transmission line is electrically connected to a reference ground via each of the capacitors (21, 22, 23), each semiconductor switching element (12) being arranged in series with each capacitor (21, 22, 23), and each capacitor (21, 22, 23) having its respective semiconductor switching element (12) being arranged in parallel with other capacitors (21, 22, 23) having their respective semiconductor switching element (12), thereby allowing a plurality of conversion ratios to be set; and / or b) at least one capacitor (23) and / or one coil (19) are connected to the transmission line, and each semiconductor switching element (12) is arranged in series or parallel with the at least one capacitor (23) or coil (19), thereby making it possible to set a plurality of conversion ratios; An impedance matching circuit (1) according to claim 14, characterized in that

16. - the third impedance matching unit (8) comprises at least one coil (24, 25) and at least one capacitor (27, 28), each configured as a separate component; the third impedance matching unit (8) comprises an input (13), the output terminal (3) and a transmission line, the transmission line electrically connecting the input (13) to the output terminal (3); - said second intermediate impedance (Z2) is present at said input (13); - said at least one coil (24) connects said transmission line to a reference ground; An impedance matching circuit (1) according to any one of the preceding claims, characterized in that it comprises:

17. said at least one coil (24) is connected to said input (13) either directly or via said at least one capacitor (27); and / or - said at least one coil (24) is connected to said output terminal (3) either directly or via said at least one capacitor (28) and / or coil (25); An impedance matching circuit (1) according to claim 16, characterized in that

18. - said at least one semiconductor switching element (12) is coolable by a fluid; An impedance matching circuit (1) according to any one of the preceding claims, characterized in that it is

19. A plasma processing system (100) comprising an impedance matching circuit (1) according to any one of claims 1 to 18, There is provided a -HF power source (101) and at least one consumer (102) in the form of a plasma process chamber, said HF power source (101) having a rated power (P ｒａｔｅｄ ) configured to provide an HF signal, - the HF power source (101) is connected to the input terminal (2) of the impedance matching circuit (1), - the output terminal (3) of the impedance matching circuit (1) is connected to the at least one consumer device (102); A plasma processing system (100) comprising:

20. a measuring unit (106) is provided and is arranged between the HF source (101) and the impedance matching circuit (1), - said measuring unit (106) comprises at least one directional coupler or a combination of a current sensor (110) and a voltage sensor (111); a control and / or sensing device (105) is provided, which is configured to receive from the measurement unit (106) measured values ​​representative of input variables present at the input terminals of the impedance matching circuit (1), for example the power transferred to the impedance matching circuit (1); - the control and / or sensing device (105) is configured to control the at least one semiconductor switching element (12) based on the measurements so as to generate a desired plasma; 20. The plasma processing system (100) of claim 19.

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