Capacitive micromachined ultrasonic transducer and its manufacturing method

Abstract

Systems, devices, methods, and processes related to capacitive micromachined ultrasonic transducers (CMUTs) are provided. A process for fabricating a CMUT includes (a) applying a silicon thermal oxide film to a first silicon wafer, (b) pattern-etching the silicon oxide film, and (c) repeating step (b) one or more times to form a silicon oxide structure on the first silicon wafer. The process may further include (d) applying the thermal oxide after the step is formed, (e) removing the oxide bulge formed during step (a) from one or more of the one or more corners, and (f) attaching a second silicon wafer to the silicon oxide structure to form a CMUT cell having an internal cavity.

Description

[Technical Field]

[0001] Related Applications This application claims the benefit of U.S. Provisional Patent Application No. 63 / 450,490 (Docket No. USD-010-PR1), filed March 7, 2023, entitled "Capacitive Micromachined Ultrasonic Transducer and Manufacturing Methods Thereof," the contents of which are incorporated herein by reference in their entirety for all purposes.

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 556,111 (Docket No. USD-011-PR1), entitled "Ultrasound System," filed February 21, 2024, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0003] This application is related to U.S. Provisional Patent Application No. 62 / 728,616 (Docket No. USD-001-PR), filed September 7, 2018, and entitled "Medical Device with CMUT Array and Solid State Cooling, and Associated Methods and Systems—with Thermal Analysis," the contents of which are incorporated by reference in their entirety for all purposes.

[0004] This application is related to U.S. Application No. 16 / 130,896 (Docket No. USD-001-US), filed September 13, 2018, entitled "Medical Device with CMUT Array and Solid State Cooling, and Associated Methods and Systems," and U.S. Patent No. 11,154,730, issued October 26, 2021, the contents of which are incorporated by reference in their entirety for all purposes.

[0005] This application is related to U.S. Patent Application No. 17 / 479,011 (Docket No. USD-001-US-CON1), filed September 20, 2021, entitled "Medical Device with CMUT Array and Solid State Cooling, And Associated Methods and Systems," and U.S. Patent Application Publication No. 2022 / 0072338, published March 10, 2022, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0006] This application is related to PCT / US2018 / 050943 (Docket No. USD-001-PCT), filed September 13, 2018, entitled "Medical Device with CMUT Array and Solid State Cooling, and Associated Methods and Systems," and WO 2019 / 055699, published March 21, 2019, the contents of which are incorporated by reference in their entirety for all purposes.

[0007] This application is related to U.S. Provisional Patent Application No. 63 / 126,078 (Docket No. USD-003-PR1), entitled "Tissue Interface System," filed December 16, 2020, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0008] This application is related to U.S. Application No. 18 / 039,978 (Docket No. USD-003-US), entitled "Tissue Interface System," filed June 2, 2023, and U.S. Patent Application Publication No. 2023 / 0414299, published December 28, 2023, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0009] This application is related to PCT / US2021 / 063743 (Docket No. USD-003-PCT), entitled "Tissue Interface System," filed December 16, 2021, and International Publication No. WO 2022 / 133954, published June 23, 2022, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0010] This application is related to U.S. Provisional Patent Application No. 63 / 195,292 (Docket No. USD-004-PR1), entitled "Tissue Treatment System," filed June 1, 2021, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0011] This application is related to U.S. Application No. 18 / 564,181 (Docket No. USD-004-US), entitled "Tissue Treatment System," filed November 27, 2023, U.S. Patent No. published on , the contents of which are incorporated herein by reference in their entirety for all purposes.

[0012] This application is related to PCT / US22 / 031746 (Docket No. USD-004-PCT), entitled "Tissue Treatment System," filed June 1, 2022, and International Publication No. WO 2022 / 256388, published December 8, 2022, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0013] This application is related to U.S. Provisional Patent Application No. 63 / 286,161 (Docket No. USD-008-PR1), entitled "Capacitive Micromachined Ultrasonic Transducer," filed December 6, 2021, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0014] This application is related to PCT / US22 / 051937 (Docket No. USD-008-PCT), filed December 6, 2022, entitled "Capacitive Micromachined Ultrasonic Transducer," and WO 2023 / 107433, published June 15, 2023, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0015] Field of inventive concepts The present inventive concepts relate generally to ultrasonic transducers, such as capacitive micromachined ultrasonic transducers (CMUTs). [Background technology]

[0016] Capacitive micromachined ultrasound transducers (CMUTs) are an alternative to piezoelectric ultrasound transducers. CMUTs can be used in a variety of applications, including medical imaging, other imaging, therapy, high intensity focused ultrasound (HIFU), and chemical detection applications. CMUTs can be used to transmit and / or receive ultrasound. CMUTs used to transmit ultrasound energy have a transmit power output. CMUTs used in receiving applications have a receive sensitivity. It is desirable to improve the transmit power output and / or receive sensitivity of CMUTs. [Prior art documents] [Patent documents]

[0017] [Patent Document 1] US Patent Application Publication No. 2008 / 0149988 [Patent Document 2] US Patent Application Publication No. 2017 / 0291192 [Patent Document 3] US Patent Application Publication No. 2012 / 0013218 [Patent Document 4] US Patent Application Publication No. 2021 / 0266679 [Patent Document 5] U.S. Patent Application Publication No. 2021 / 0220873 [Patent Document 6] US Patent Application Publication No. 2019 / 0336104 [Patent Document 7] International Publication No. 2012 / 070926 Summary of the Invention [Means for solving the problem]

[0018] Embodiments of the systems, devices, and methods described herein may be directed to systems, devices, and methods for capacitive micromachined ultrasonic transducers (CMUTs).

[0019] According to one aspect of the inventive concept, a process for fabricating a CMUT includes: (a) applying a silicon thermal oxide film to a first silicon wafer; (b) pattern-etching the silicon oxide film; and (c) repeating step (b) one or more times to form a silicon oxide structure on the first silicon wafer. The silicon oxide structure may include one or more steps.

[0020] In some embodiments, the process further comprises (d) applying a thermal oxide coating after the step is formed.

[0021] According to another aspect of the inventive concept, a process for fabricating a CMUT includes: (a) applying a silicon thermal oxide film to a first silicon wafer; (b) pattern-etching the oxide film; (c) repeating steps (a) and (b) to form a silicon oxide structure on the first silicon wafer, whereby the silicon oxide structure includes one or more steps; and (d) applying thermal oxide after the steps are formed, whereby the repeated etching of step (b) forms exposed portions of the first silicon wafer.

[0022] In some embodiments, the stepped silicon oxide structure comprises a dielectric film of a CMUT.

[0023] In some embodiments, one or more steps include one or more corners, and the process further includes (e) removing the oxide bulge formed during step (a) from one or more of the one or more corners. Step (e) may be performed using pattern etching. Step (e) may be performed before step (d). Step (e) may be performed after step (d). The silicon oxide structure may further include one or more supports, each including one or more corners. Step (e) may include removing the oxide bulge formed during step (a) from one or more corners of the one or more supports.

[0024] In some embodiments, the process further includes (f) attaching a second silicon wafer to the silicon oxide structure to form a CMUT cell having an internal cavity. The process may further include applying an oxide layer to the second silicon wafer before step (f). The oxide layer on the second silicon wafer may have a thickness of at least 10 nm and / or no more than 100 nm. The oxide layer may be disposed on the second silicon wafer toward the interior of the CMUT cavity.

[0025] In some embodiments, the first silicon wafer includes one or more corners, and at least one corner may include a non-sharp shape.

[0026] According to another aspect of the inventive concept, a device includes one or more CMUTs of the inventive concept. The device may include a medical device. The sensor may include two or more sensors in a redundant configuration. The sensor may include a first set of one or more CMUTs and a second set of one or more CMUTs, where the first set and second set may be configured in a redundant configuration. The sensor may include two or more CMUT arrays, where each CMUT array may include at least one of the one or more CMUTs. The two or more CMUT arrays may include a first CMUT array in a first configuration and a second CMUT array in a second configuration different from the first configuration. The first array may include the first CMUTs in the first configuration, and the second array may include the second CMUTs in a second configuration different from the first configuration. The first CMUT may include a first bottom electrode configuration and a first plate configuration, and the second CMUT may include a second bottom electrode configuration and a second plate configuration, where the first plate configuration may be different from the second plate configuration and / or the first bottom electrode configuration may be different from the second bottom electrode configuration. The first array and second array may include different geometries of CMUTs, different types of CMUTs, and / or different numbers of CMUTs.

[0027] The technology described herein, together with its attributes and attendant advantages, will best be appreciated and understood by considering the following detailed description in conjunction with the accompanying drawings, in which representative embodiments are set forth by way of example.

[0028] Incorporation by Reference All publications, patents, and patent applications mentioned within this specification are herein incorporated by reference to the same extent as if each individual publication, patent, or patent application was specifically and individually indicated to be incorporated by reference. The contents of all publications, patents, and patent applications mentioned herein are incorporated by reference in their entirety for all purposes. [Brief explanation of the drawings]

[0029] [Figure 1]1 shows a schematic diagram of a system including a device with at least one capacitive micromachined ultrasonic transducer (CMUT) consistent with the inventive concepts. [Figure 1A] 1A-1C show cross-sectional views of two examples of current (e.g., commercially available) CMUT structures consistent with the inventive concepts. [Figure 1B] 1A-1C show cross-sectional views of two examples of current (e.g., commercially available) CMUT structures consistent with the inventive concepts. [Figure 2] 1 shows a top view of a plate of a CMUT including a sensing electrode consistent with the concepts of the present invention. [Figure 3] 1 illustrates an array of transducers including CMUT components and sensing transducers consistent with the concepts of the present invention. [Figure 4A] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 4B] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 4C] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 4D] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 4E] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 5A] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 5B] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 5C] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 5D] 1A-1C illustrate various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the inventive concept. [Figure 6A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6C] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6D] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6E] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6F] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6G] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6H] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 6I] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 7A] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 7B] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 7C] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 7D] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 7E] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 8A]1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 8B] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 8C] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 8D] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 9A] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 9B] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 9C] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 9D] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 9E] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 10A] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 10B] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 10C] 1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 10D]1A-1C illustrate various cross-sectional views of piston-based CMUT components including shaped plates and / or shaped bottom electrodes consistent with the inventive concepts. [Figure 11A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 11B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 11C] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 11D] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 12] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 13] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 14A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 14B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 15A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 15B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 16A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 16B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 17A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 17B]10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 18A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 18B] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 18C] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 19] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 20] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 21A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 21B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 21C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 21D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 21E] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 22A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 22B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 22C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 22D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 23A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 23B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 23C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 23D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 23E] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 24A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 24B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 24C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 24D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 25A]1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 25B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 25C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 25D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 25E] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 26A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 26B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 26C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 26D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 27A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 27B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 27C]1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 27D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 27E] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 28A] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 28B] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 28C] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 28D] 1A-1C illustrate various cross-sectional views of a CMUT component configured for airborne applications and including a shaped plate and / or a shaped bottom electrode consistent with the concepts of the present invention. [Figure 29A] 1A-1C illustrate top views of a portion of a CMUT component including various patterns of fluidic trenches consistent with the concepts of the present invention. [Figure 29B] 1A-1C show top views of a portion of a CMUT component including various patterns of fluidic trenches consistent with the concepts of the present invention. [Figure 29C] 1A-1C show top views of a portion of a CMUT component including various patterns of fluidic trenches consistent with the concepts of the present invention. [Figure 29D] 1A-1C show top views of a portion of a CMUT component including various patterns of fluidic trenches consistent with the concepts of the present invention. [Figure 30A] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30B]10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30C] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30D] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30E] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30F] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30G] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30H] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30I] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30J] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30K] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30L] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30M] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30N] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30O] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30P]10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30Q] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30R] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30S] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30T] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30U] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30V] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30W] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30X] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 30Y] 10 shows various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts. [Figure 31] 1 illustrates a cross-sectional view of an embodiment of a CMUT with a shaped dielectric consistent with the concepts of the present invention. [Figure 31A] 1 shows a schematic diagram illustrating the capacitance of a CMUT consistent with the concepts of the present invention. [Figure 31B] 1A-1C show cross-sectional views of various CMUT components including shaped dielectric films consistent with the concepts of the present invention. [Figure 31C] 1A-1C show cross-sectional views of various CMUT components including shaped dielectric films consistent with the concepts of the present invention. [Figure 32] 1 shows a cross-sectional view of a CMUT including a multi-layer dielectric consistent with the concepts of the present invention. [Figure 33]1 illustrates a sequence of steps for a method of fabricating a CMUT with a stepped profile dielectric film consistent with the concepts of the present invention. [Figure 34] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a stepped profile bottom electrode and a stepped profile dielectric film consistent with the concepts of the present invention. [Figure 35A] 1 shows a cross-sectional view of an analyzed CMUT configuration, consistent with the inventive concepts, and graphs of transmit and receive sensitivity for the illustrated CMUT configuration. [Figure 35B] 1 shows a cross-sectional view of an analyzed CMUT configuration, consistent with the inventive concepts, and graphs of transmit and receive sensitivity for the illustrated CMUT configuration. [Figure 35C] 1 shows a cross-sectional view of an analyzed CMUT configuration, consistent with the inventive concepts, and graphs of transmit and receive sensitivity for the illustrated CMUT configuration. [Figure 35D] 1 shows a cross-sectional view of an analyzed CMUT configuration, consistent with the inventive concepts, and graphs of transmit and receive sensitivity for the illustrated CMUT configuration. [Figure 36] 1 illustrates a sequence of steps for a method of fabricating a CMUT including a shaped bottom electrode consistent with the concepts of the present invention. [Figure 37] 1 illustrates a sequence of steps for forming a graded silicon layer consistent with the concepts of the present invention. [Figure 38] 1 illustrates a sequence of steps for a method of forming a shaped silicon layer consistent with the concepts of the present invention. [Figure 39] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped plate consistent with the concepts of the present invention. [Figure 40] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention. [Figure 41] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention. [Figure 42] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped plate consistent with the concepts of the present invention. [Figure 43] 1 illustrates a sequence of steps for a method of fabricating a top plate for a CMUT consistent with the concepts of the present invention. [Figure 44] 1 illustrates a sequence of steps for a method of fabricating a top plate for a CMUT consistent with the concepts of the present invention. [Figure 45A] 1A-1C show cross-sectional schematic diagrams of various CMUT designs and graphs of CMUT performance consistent with the concepts of the present invention. [Figure 45B] 1A-1C show cross-sectional schematic diagrams of various CMUT designs and graphs of CMUT performance consistent with the concepts of the present invention. [Figure 45C] 1A-1C show cross-sectional schematic diagrams of various CMUT designs and graphs of CMUT performance consistent with the concepts of the present invention. [Figure 45D] 1A-1C show cross-sectional schematic diagrams of various CMUT designs and graphs of CMUT performance consistent with the concepts of the present invention. [Figure 46A] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46B] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46C] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46D] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46E] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46F] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46G] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46H] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46I]1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46J] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46K] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46L] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46M] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 46N] 1A-1C illustrate various examples of component geometries before and after an oxidation process used in the fabrication of a CMUT consistent with the concepts of the present invention. [Figure 47A] 1A and 1B show top and side views, respectively, of a CMUT plate including a solid piston consistent with the concepts of the present invention. [Figure 47B] 1A and 1B show top and side views, respectively, of a CMUT plate including a solid piston consistent with the concepts of the present invention. [Figure 48A] 1A and 1B show top and side views, respectively, of a CMUT plate including a non-solid piston consistent with the concepts of the present invention. [Figure 48B] 1A and 1B show top and side views, respectively, of a CMUT plate including a non-solid piston consistent with the concepts of the present invention. [Figure 49] 1 illustrates a sequence of steps for a method of fabricating a CMUT having a shaped profile consistent with the concepts of the present invention. [Figure 50] 1 illustrates another sequence of steps for a method of fabricating a CMUT having a shaped profile consistent with the concepts of the present invention. [Figure 51A] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention. [Figure 51B] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention. [Figure 52] 1 illustrates a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention. [Figure 53A] 1A-1C illustrate various top and side views of different embodiments of a CMUT array consistent with the concepts of the present invention. [Figure 53B] 1A-1C illustrate various top and side views of different embodiments of a CMUT array consistent with the concepts of the present invention. [Figure 54A] 1A-1C illustrate various top and side views of different embodiments of a CMUT array consistent with the concepts of the present invention. [Figure 54B] 1A-1C illustrate various top and side views of different embodiments of a CMUT array consistent with the concepts of the present invention. [Figure 55A] 1 shows a cross-sectional view of an embodiment of a CMUT including micro-pillars consistent with the concepts of the present invention. [Figure 55B] 1 shows a cross-sectional view of an embodiment of a CMUT including micro-pillars consistent with the concepts of the present invention. [Figure 56] 1 shows a top view of a CMUT array consistent with the concepts of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0030] Reference will now be made in detail to the present embodiments of the present technology, examples of which are illustrated in the accompanying drawings. Like reference numerals may be used to refer to like elements. However, this description is not intended to limit the disclosure to the particular embodiments, but should be construed to include various modifications, equivalents, and / or alternatives to the embodiments described herein.

[0031] As used herein, "comprising" (and any form of comprising, e.g., "comprise" and "comprises"), "having" (and any form of having, e.g., "have" and "has"), "including" (and any form of including, e.g., "includes" and "include"), or "containing" (and any form of containing, e.g., "contains" and "contain") specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0032] It will be further understood that, although terms such as first, second, and third may be used herein to describe various limits, elements, components, regions, layers, and / or sections, these limits, elements, components, regions, layers, and / or sections are not intended to be limited by these terms. These terms are used only to distinguish one limit, element, component, region, layer, or section from another limit, element, component, region, layer, or section. Thus, a first limit, element, component, region, layer, or section described below could be referred to as a second limit, element, component, region, layer, or section without departing from the teachings of the present application.

[0033] It will be further understood that when an element is referred to as being "on," "mounted," "connected," or "coupled" to another element, it may be directly on or above, or connected to or coupled to the other element, or that one or more intervening elements may be present. In contrast, when an element is referred to as being "directly on," "directly mounted," "directly connected," or "directly coupled" to another element, there are no intervening elements present. Other words used to describe relationships between elements should be interpreted similarly (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.).

[0034] As used herein, the terms "operably attached," "operably connected," "operably coupled," and similar terms related to attachment of components refer to the attachment of two or more components and result in one, two, or more of an electrical attachment, a fluid attachment, a magnetic attachment, a mechanical attachment, an optical attachment, an acoustic attachment, and / or other operable attachment arrangement. The operable attachment of two or more components may facilitate the transfer of power, signals, electrical energy, fluid or other flowable material, magnetism, mechanical coupling, light, sound such as ultrasound, and / or other materials and / or components between the two or more components.

[0035] It will be further understood that when a first element is referred to as being "in," "on," and / or "within" a second element, the first element may be disposed within an interior space of the second element, within a portion of the second element (e.g., within a wall of the second element), on the exterior and / or interior surface of the second element, and combinations of one or more of these.

[0036] As used herein, the term "proximate," when used to describe the proximity of a first component or location to a second component or location, should be interpreted to include one or more locations near the second component or location, as well as in, on, and / or within the second component or location. For example, a component positioned proximate to an anatomical location (e.g., a target tissue location) is intended to include a component positioned near the anatomical location, as well as a component positioned in, on, and / or within the anatomical location.

[0037] Spatially relative terms, such as "below," "below," "bottom," "above," and "top," may be used to describe the relationship of an element and / or feature to another element and / or feature, for example, as shown in the figures. It will be further understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientation shown in the figures. For example, if a device in the figures is turned over, elements described as "below" and / or "below" other elements or features may then be oriented "above" the other elements or features. The device may be otherwise oriented (e.g., rotated 90 degrees or to another orientation), and the spatially relative descriptors used herein interpreted accordingly.

[0038] As used herein, terms such as "reduce," "reducing," and "reduction" are intended to include a reduction in quantity, including a reduction to zero. Reducing the likelihood of occurrence is intended to include prevention of occurrence. Similarly, the terms "prevent," "preventing," and "prevention" are intended to include the acts of "reducing," "reducing," and "reducing," respectively.

[0039] The term "and / or" as used herein should be construed as a specific disclosure of each of the two specified features or components, regardless of the presence or absence of the other. For example, "A and / or B" should be construed as a specific disclosure of (i) A, (ii) B, and (iii) each of A and B, as if each were individually set forth herein.

[0040] As used herein, the term "one or more" can mean 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, or more, up to any number.

[0041] The terms "and combinations thereof" and "and combinations thereof," respectively, may be used herein after a list of items that are included singly or collectively. For example, components, processes, and / or other items selected from the group consisting of A, B, C, and combinations thereof, includes a set of one or more components that includes one, two, three, or more of item A, one, two, three, or more of item B, and / or one, two, three, or more of item C.

[0042] As used herein, unless otherwise stated, "and" can mean "or" and "or" can mean "and." For example, if a feature is described as having A, B, or C, the feature can have A, B, and C, or any combination of A, B, and C. Similarly, if a feature is described as having A, B, and C, the feature can have only one or two of A, B, or C.

[0043] As used herein, when a quantifiable parameter is described as having a value "between" a first value X and a second value Y, it is intended to include parameters having values ​​of at least X, less than or equal to Y, and / or at least X, less than or equal to Y. For example, a length of 1 to 10 is intended to include a length of at least 1 (including values ​​greater than 10), less than 10 (including values ​​less than 1), and / or values ​​greater than 1 and less than 10.

[0044] As used in this disclosure, the phrase "configured for" may be used interchangeably with terms such as "suitable for," "capable of," "designed for," "adapted for," "made for," and "capable," depending on the context. The phrase "configured for" does not mean only "specially designed for" in hardware. Alternatively, depending on the context, the phrase "device configured for" may mean that a device is "capable of" operating with another device or component.

[0045] As used herein, the term "threshold" refers to a maximum level, a minimum level, and / or a range of values ​​that correlate to a desired or undesirable state. In some embodiments, a system parameter is maintained above a minimum threshold, below a maximum threshold, within a threshold range of values, and / or outside a threshold range of values, e.g., to produce a desired effect (e.g., effective treatment) and / or prevent or otherwise reduce (hereinafter "prevent") an undesirable event (e.g., adverse device and / or clinical event). In some embodiments, a system parameter is maintained above a first threshold (e.g., above a first temperature threshold to produce a desired therapeutic effect on tissue) and below a second threshold (e.g., below a second temperature threshold to prevent undesirable tissue damage). In some embodiments, the thresholds are determined to include a safety margin, taking into account, for example, patient variability, system variability, and tolerances. As used herein, "above a threshold" means that a parameter is above a maximum threshold, below a minimum threshold, within a threshold range, and / or outside a threshold range.

[0046] As used herein, "room pressure" is intended to mean the pressure of the environment surrounding the systems and devices of the inventive concept. Positive pressure includes a pressure above room pressure, or simply a pressure greater than another pressure, such as a positive pressure differential across a fluid path component such as a valve. Negative pressure includes a pressure below room pressure, or a pressure less than another pressure, such as a negative pressure differential across a fluid path component such as a valve. Negative pressure may include a vacuum, but does not mean a pressure less than a vacuum. As used herein, the term "vacuum" may be used to refer to a full vacuum or a partial vacuum, or any negative pressure as described above.

[0047] The term "diameter" is used herein to describe non-circular geometric shapes and should be interpreted as the diameter of an imaginary circle that approximates the geometric shape being described. For example, when describing a cross-section, such as a cross-section of a component, the term "diameter" is interpreted to represent the diameter of an imaginary circle having the same cross-sectional area as the cross-section of the component being described.

[0048] As used herein, the terms "major axis" and "minor axis" of a component are the length and diameter, respectively, of an imaginary cylinder of smallest volume that can completely enclose the component.

[0049] As used herein, the term "functional element" is intended to include one or more elements constructed and arranged to perform a function. Functional elements may include sensors and / or transducers. In some embodiments, functional elements are configured to deliver energy and / or otherwise treat tissue (e.g., functional elements configured as therapeutic elements). Alternatively or additionally, functional elements (e.g., functional elements including sensors) may be configured to record one or more parameters, e.g., patient physiological parameters, patient anatomical parameters (e.g., tissue shape parameters), patient environment parameters, and / or system parameters. In some embodiments, sensors or other functional elements are configured to perform a diagnostic function (e.g., collect data used to perform a diagnosis). In some embodiments, functional elements are configured to perform a therapeutic function (e.g., deliver therapeutic energy and / or a therapeutic agent). In some embodiments, a functional element includes one or more elements constructed and arranged to perform a function selected from the group consisting of: delivering energy; extracting energy (e.g., to cool a component); delivering a drug or other agent; manipulating a system component or patient tissue; recording or otherwise sensing a parameter, such as a patient physiological parameter or a system parameter; and one or more combinations thereof. A functional element may include a fluid and / or a fluid delivery system. A functional element may include a reservoir, e.g., an expandable balloon or other fluid-holding reservoir. A "functional assembly" may include an assembly constructed and arranged to perform a function, such as a diagnostic and / or therapeutic function. A functional assembly may include an expandable assembly. A functional assembly may include one or more functional elements.

[0050] As used herein, the term "transducer" is intended to include any component or combination of components that receives energy or any input and generates an output. For example, a transducer may include an electrode that receives electrical energy and distributes the electrical energy to tissue (e.g., based on the size of the electrode). In some configurations, a transducer converts an electrical signal into any output, such as light (e.g., a transducer including a light-emitting diode or a light bulb), sound (e.g., a transducer including a piezoelectric crystal configured to deliver ultrasound energy), pressure (e.g., applied pressure or force), thermal energy, cryogenic energy, chemical energy, mechanical energy (e.g., a transducer including a motor or solenoid), magnetic energy, and / or a different electrical signal (e.g., different from the input signal to the transducer). Alternatively or additionally, a transducer may convert a physical quantity (e.g., a change in a physical quantity) into an electrical signal. The transducer may include any component that delivers energy and / or an agent to tissue, such as a transducer configured to deliver one or more of electrical energy to tissue (such as a transducer including one or more electrodes), optical energy to tissue (such as a transducer including a laser, a light emitting diode, and / or an optical component such as a lens or prism), mechanical energy to tissue (such as a transducer including a tissue manipulation element), acoustic energy to tissue (such as a transducer including a piezoelectric crystal), chemical energy, electromagnetic energy, magnetic energy, and combinations of one or more of these.

[0051] As used herein, the term "fluid" can refer to any flowable material such as a liquid, gas, gel, or material that can be propelled through a lumen and / or opening.

[0052] As used herein, the term "material" can refer to a single material or a combination of two, three, four, or more materials.

[0053] It will be understood that certain features of the inventive concepts, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the inventive concepts, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination. For example, it will be understood that all features recited in any claim (whether independent or dependent) may be combined in any given manner.

[0054] At least some of the drawings and descriptions of the inventive concepts have been simplified to focus on elements relevant for a clear understanding of the inventive concepts, but it should be understood that for the sake of clarity, the omission of other elements that one skilled in the art would understand may also be part of the inventive concepts. However, because such elements are well known in the art and because they do not necessarily facilitate a better understanding of the inventive concepts, descriptions of such elements are not provided herein.

[0055] The terms defined in this disclosure are used only to describe specific embodiments of the present disclosure and are not intended to limit the scope of the present disclosure. Terms provided in the singular are intended to include the plural unless the context clearly indicates otherwise. All terms used herein, including technical or scientific terms, have the same meaning as commonly understood by those skilled in the relevant art, unless otherwise defined herein. Terms defined in commonly used dictionaries should be interpreted as having the same or similar meaning as the meaning in the context of the relevant art, and should not be interpreted as having an ideal or exaggerated meaning unless explicitly defined herein. In some cases, terms defined in this disclosure should not be interpreted as excluding embodiments of the present disclosure.

[0056] Provided herein are capacitive micromachined ultrasonic transducers (CMUTs), methods for fabricating the CMUTs, and devices and systems incorporating these CMUTs. The CMUTs may include an electrode and a plate overlying the electrode to form a cavity. The electrode may include a contoured electrode and / or the plate may include a contoured plate. A voltage applied across the electrode and the plate deflects the plate. The cavity includes a non-uniform cavity space between the plate and the electrode, with the cavity space being largest in a central region of the plate.

[0057] Referring now to FIG. 1 , a schematic diagram of a system including a device with at least one capacitive micromachined ultrasonic transducer (CMUT) consistent with the inventive concepts is shown. System 10 of FIG. 1 includes various components, such as device 100 and one or more devices, as shown. Device 100 may include one or more ultrasonic sensors, such as US sensor 500, as also shown. Device 100 may also include a processing unit 110 and a user interface 120, each as described herein. Device 100 may include functional element 199, as shown. Functional element 199 may include one or more sensors, one or more transducers, and / or one or more other functional elements. Device 100 may include a consumer electronic device, such as a mobile phone, a tablet, a personal computer, and / or other electronic device. In some embodiments, device 100 comprises a medical device, such as a medical device selected from the group consisting of a device that delivers ultrasonic energy to tissue (e.g., for stimulating tissue, ablating tissue, and / or imaging tissue), a drug delivery device, a cardiac pacing device, a nerve ablation device, and combinations thereof. In some embodiments, device 100 comprises a medical device configured to deliver ultrasonic energy (e.g., via one or more CMUTs of CMUT 510), where the ultrasonic energy is configured to image tissue, ablate tissue, or both image and ablate tissue.

[0058] The US sensor 500 of the inventive concept may include one or more CMUT components (or CMUT "cells" herein), shown as CMUT 510. The CMUT 510 and / or other components of the sensor 500 may be constructed and arranged as described with reference to any of FIGS. 1, 1A, or 2-50. The CMUT 510 may be fabricated using one or more of an oxidation process, an etching process, and / or a doping process as described herein. In some embodiments, the US sensor 500 includes an electronic assembly and / or other components, i.e., a drive circuit 520, operably attached to the CMUT 510. The drive circuit 520 may include a power supply, a signal generator, a data converter (e.g., an analog-to-digital data converter and / or a digital-to-analog data converter), and / or other components configured to operate the CMUT 510 in the various operating modes described herein. In some embodiments, the sensor 500 includes an array of two or more CMUTs 510, i.e., an array 5010. The CMUT 510 may be configured for use in immersed applications (e.g., when the CMUT 510 includes at least one or more sealed CMUT transducers) and / or in airborne applications (e.g., when the CMUT 510 includes at least one or more air-coupled CMUT transducers).

[0059] Capacitive micromachined ultrasound transducers (CMUTs) have emerged as an alternative to piezoelectric-based ultrasound transducers in a variety of applications, including medical imaging, therapy, high-intensity focused ultrasound (HIFU), chemical detection, and air-coupling applications. Currently available CMUT transducers include a combination of planar plates and planar electrodes, which is widely used in CMUT-based components. The plates of a CMUT undergo large deflections when large direct current (DC) and / or alternating current (AC) voltages are applied to achieve high sensitivity and / or high output voltage. When the plates are deflected, only the central region, a small portion of the entire plate, experiences the maximum electric field. This limitation reduces the electromechanical coupling efficiency and limits both the transmit and receive sensitivities.

[0060] In some embodiments, device 100 includes a processing unit 110. Processing unit 110 may include at least one microprocessor, computer, and / or another electronic controller, denoted processor 111. Processing unit 110 may also include one, two, or more algorithms, denoted algorithm 115. Algorithm 115 may include one or more machine learning, neural network, and / or other artificial intelligence algorithms (herein “AI algorithms”). Processing unit 110 may include one or more memory storage modules, illustrated as memory 112, for example, to store instructions for executing algorithm 115 and / or to store other system 10 information (e.g., calibration and / or other manufacturing information and / or system 10 usage information). Processor 111, via algorithm 115, may perform one or more processes described herein, e.g., processes performed in response to one or more commands entered by a user into system 10 (e.g., via user interface 120 described herein). In some embodiments, the algorithm 115 (e.g., an AI algorithm) is configured to adjust the drive signal generated by the drive circuit 520 to, for example, optimize or otherwise alter the performance of the CMUT 510 (e.g., a CMUT 510 including one or more CMUTs 510). In some embodiments, the algorithm 115 is configured to analyze one or more parameters of a patient receiving ultrasound energy from the CMUT 510, for example, one, two, or more physiological parameters recorded by a functional element 199 including one, two, or more sensors. In these embodiments, the algorithm 115 may be configured to adjust the drive signal generated by the drive circuit 520 to, for example, improve images provided by the device 100 and / or improve therapy. The processing unit 110 may receive one or more signals (e.g., signals including data), for example, signals received from the US sensor 500. The processing unit 110 may be configured to perform one or more mathematical operations based on the received signals to generate results.The processing unit 110 may be configured to perform and / or facilitate the performance of (herein referred to as "performing" either or both) one or more functions of the system 10, such as energy delivery (e.g., delivery of ultrasound energy via the US sensor 500, such as to ablate or stimulate tissue), data acquisition (e.g., creation and / or collection of image data), data analysis, signal processing, procedure planning, and / or other functions (herein referred to individually or collectively as "functions of the system 10").

[0061] Device 100 may include one, two, or more interfaces for providing and / or receiving information to a user of system 10, illustrated as user interface 120. User interface 120 may include one, two, or more user input and / or user output components. For example, user interface 120 may include a joystick, keyboard, mouse, touchscreen, and / or another human interface device, illustrated as user input device 121. In some embodiments, user interface 120 includes a display (e.g., a touchscreen display), such as also illustrated display 122. In some embodiments, processor 111 may provide a graphical user interface, GUI 123, presented on and / or provided by display 122. The user interface 120 may include input and / or output devices selected from the group consisting of speakers, indicator lights such as LED displays, tactile feedback devices, foot pedals, switches such as momentary switches, microphones, cameras, for example where the processor 111 enables eye tracking and / or other input via image processing, and combinations thereof.

[0062] The CMUT 510 is described herein with reference to the corresponding orientation shown in the figures. For example, a reference to the bottom of the CMUT 510 describes the portion of the CMUT 510 disposed toward the bottom of the page. The CMUT may be composed of a "plate" suspended above a "bottom electrode" with a space (e.g., a vacuum gap and / or a fluid-filled space) therebetween. For example, the CMUT 510 may include a first conductive film, the bottom electrode 511 (also referred to herein as a substrate 511), and a second conductive film, the plate 512 (also referred to herein as an upper electrode 512). The bottom electrode 511 and the plate 512 may be axially separated and define a space, a cavity 513, therebetween (e.g., a cavity maintained at a vacuum or other negative pressure compared to environmental pressure). In some embodiments, an insulating film, a dielectric film 514, is disposed between the bottom electrode 511 and the plate 512. For example, the dielectric film 514 can be disposed on the substrate 511, the dielectric film 514 can be disposed on the plate 512, or two dielectric films 514 can be included, with a first film 514a disposed on the substrate 511 and a second film 514b disposed on the plate 512. In embodiments comprising a single dielectric film 514, the film 514 can include a thickness of at least 5 nm or 10 nm and / or a thickness of 800 nm, 600 nm, or 400 nm or less, e.g., about 200 nm. In embodiments comprising a first dielectric film 514a (e.g., disposed on the substrate 511) and a second dielectric film 514b (e.g., disposed on the plate 512), the film 514a can include a thickness of at least 5 nm or 10 nm and / or a thickness of 800 nm, 600 nm, or 400 nm or less, and the dielectric film 514b can include a thickness of at least 2 nm or 5 nm and / or a thickness of 250 nm or 150 nm or less. Either or both films may comprise silicon dioxide. In some embodiments, the dielectric film 514 comprises two films with a combined thickness of 1050 nm, 800 nm, 600 nm, or 400 nm or less. Each dielectric film 514 may comprise a minimum thickness (such as at least 5 nm) to, for example, reduce field emissions (e.g., electrons passing through the cavity 513).In some embodiments, the plate 512 is a shaped plate 512 . S and includes a plate 512 that includes a shaped ("shaped," "contoured," and / or "non-planar") shape, as described herein. In some embodiments, the bottom electrode 511 is a shaped bottom electrode 511 S (For example, molded substrate 511 S In some embodiments, the dielectric film 514 includes a bottom electrode 511 that includes a shaped (also referred to as a "shaped," "contoured," and / or "non-planar") shape, as described herein. In some embodiments, the dielectric film 514 includes a shaped dielectric film 514 S ("Forming film 514 S ” and includes a dielectric film 514 that includes a shaped (also referred to as a “shaped,” “contoured,” and / or “non-planar”) shape, as described herein. For example, the dielectric film 514 may be disposed on the top surface of the bottom electrode 511 (at the bottom of the cavity 513) or on the bottom surface of the plate 512 (at the top of the cavity 513). In some embodiments, the axial space between the bottom electrode 511 and the plate 512 is maintained by one or more supports, shown as supports 515. The supports 515 may include hollow rings (such as circular rings) that may be disposed along the periphery of the electrode 511 and the plate 512, such that the cavity 513 is disposed within the supports 515.

[0063] The substrate 511 may be composed of one, two, or more of a variety of similar and / or dissimilar materials, such as silicon and / or glass. In some embodiments, the substrate 511 includes a thickness that is less than or equal to 70%, 60%, 50%, and / or 40% of the length of the smallest wavelength of the operating frequency of the associated CMUT 510. In some embodiments, the substrate 511 includes a thickness that is less than 50% of the length of the smallest wavelength of the operating frequency to reduce the impact of acoustic resonances within the substrate on the performance of the CMUT 510.

[0064] The cavity 513 may include one, two, or more cross-sectional shapes, such as a circle, an oval, a rectangle, a square, a hexagon, a triangle, and combinations of one, two, or more thereof. The cavity 513 may include a height of at least 10 nm, 25 nm, or 40 nm, and / or a height of 5 μm, 7 μm, and / or 10 μm or less. In some embodiments, the cavity 513 includes a height of at least 100 nm and / or a height of 500 nm or less.

[0065] The dielectric film 514 may include one, two, or more of a variety of similar and / or different materials, such as silicon oxide and / or silicon nitride (e.g., a multilayer structure includes both silicon nitride and silicon oxide). The dielectric film 514 may include a material with a high dielectric constant value ("k value"), such as hafnium oxide. The dielectric film 514 may include a thickness that is determined such that the maximum electric field experienced by the dielectric film 514 during operation is a certain percentage of the dielectric strength of the film 514, for example, at least 15%, 22%, or 30% of the dielectric strength of the film 514, and / or no more than 40%, 50%, 60%, 70%, 77%, or 85% of the dielectric strength of the film 514.

[0066] The supports 515 may include one, two, or more of a variety of similar and / or different materials, such as silicon oxide and / or silicon nitride, etc. In some embodiments, the first support 515a includes a first material and the second support 515b includes a second material that is different from the first material.

[0067] Plate 512 may be composed of one, two, or more of a variety of similar and / or different materials, such as silicon, silicon nitride, and / or diamond. In some embodiments, plate 512 comprises a thickness of at least 0.2%, 0.5%, or 1% of the width of cavity 513, and / or a thickness of no more than 20%, 30%, or 40% of the width of the cavity.

[0068] In some embodiments, the plate 512 includes two or more films, such as at least one conductive film (e.g., a film forming the top electrode) and one or more non-conductive films. For example, the plate 512 may include a stack of two non-conductive films sandwiching a conductive film therebetween. The edges of the plate 512 may be attached to supports 515. The plate 512 is configured to deflect axially toward and / or away from the bottom electrode 511. In some embodiments, the plate 512 deflects in response to a driving electrical signal applied between the bottom electrode 511 and the top electrode 512 (e.g., when the CMUT 510 is configured in a “transmit mode”). As used herein, a signal (e.g., an AC signal, a DC signal, and / or a signal including AC and DC components) applied between the top plate 512 and the bottom electrode 511 (e.g., by the processing unit 110) may be described as being applied “across” the CMUT 510. Alternatively or additionally, an electrical signal may be generated (e.g., received by the processing unit 110) between the lower electrode 511 and the upper electrode 512 because one or more pressure waves received by the CMUT 510 cause the plate 512 to deflect axially (e.g., vibrate relative to the lower electrode 511 when the CMUT 510 is configured in "receive mode").

[0069] The performance of the CMUT 510 may be defined by one or more metrics, such as transmit sensitivity, receive sensitivity, and / or maximum output pressure. Transmit sensitivity may be defined as the pressure output per voltage applied across the CMUT 510. Receive sensitivity may be defined as the output current from the CMUT 510 (e.g., output current per Pascal of incident pressure) relative to the incident pressure of a pressure wave that causes actuation (e.g., deflection) of the plate 512. Maximum output pressure is defined as the maximum pressure that the CMUT 510 can generate when operating in transmit mode. As described herein, the edges of the plate 512 may be fixed to supports 515, such that axial movement at the edges of the plate 512 is zero and the axial movement of the plate 512 is greatest at the center of the CMUT 510 (farthest from the fixed edge). The maximum output pressure of a CMUT (such as the CMUT 510) may be limited by the height (e.g., “gap height”) of the cavity 513.

[0070] In some embodiments, the maximum output pressure of the CMUT 510 may increase if a larger portion of the plate 512 is displaced (e.g., a larger average displacement for the same maximum displacement) when a signal is applied to the CMUT 510. The average displacement of the plate 512 is determined by the shape and / or properties of the material of the CMUT 510, as described herein. In some embodiments, the CMUT 510 includes a contoured (e.g., including one, two, or more stepped, curved, and / or other non-planar portions) electrode, i.e., a shaped electrode 511. S , whereby the average displacement of the plate 512 increases due to the increased electrostatic force applied to the outer portions relative to the center of the plate 512. Alternatively or additionally, the CMUT 510 may include a contoured (e.g., including one, two, or more stepped, curved, and / or other non-planar portions) plate, i.e., a shaped plate 512. Sto similarly achieve an increase in these electrostatic forces on plate 512. In some embodiments, electrode 511 and / or plate 512 include at least one flat portion, at least one concave portion, and / or at least one convex portion. S This allows for a lower gap height near the edges of plate 512 relative to the center of plate 512. This lowered gap height increases the electric field near the edges of plate 512, resulting in higher electrostatic forces, e.g., at least a 2%, 5%, 20%, 25%, and / or 50% increase in electrostatic force compared to a similar component (e.g., a component of similar size or construction material) that includes a non-contoured (e.g., flat) shape. Lowering the gap height may improve transmit sensitivity (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase) by increasing the average plate displacement per volt. Lowering the gap height may also improve receive sensitivity (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase) by increasing the change in capacitance due to movement of plate 512. The increased transmit and receive sensitivity of these geometric designs of the inventive concept is achieved without physically limiting the maximum displacement of the plate 512 and therefore the maximum output pressure of the CMUT 510 (e.g., compared to a CMUT geometry including a planar electrode 511 and a planar plate 512, where increasing the gap height improves sensitivity but at the expense of a reduced maximum output pressure). Examples of CMUT 510 assemblies and other components, including plates 512 with shaped profiles, are described with reference to the various figures provided and described herein.

[0071] Molded Plate 512 S and / or shaped substrate 511 S Each of the forming plates 512 may include a contoured (shaped) profile, including a "stepped profile," for example, a stepped profile including at least two levels (such as at least two steps), at least three levels, or at least four levels. S4B, 5A, 8A, 10A, 22A, 24A, 26A, 28A, and / or elsewhere herein (e.g., stepped portion 5123 described herein). Alternatively or additionally, substrate 511 S 7B, 9B, 12B, 23B, 25B, and / or elsewhere herein may include a stepped portion (e.g., stepped portion 5113 described herein) profile. In some embodiments, shaped plate 512 S and / or shaped substrate 511 S One or more (such as all) of the steps include a thickness that is at least 5% or at least 10% of the gap height of the cavity 513 of the CMUT 510. In some embodiments, the forming plate 512 S and / or shaped substrate 511 S One or more (such as all) of the steps include a thickness that is less than or equal to 50%, 60%, or 70% of the thickness of the plate 512. S and / or shaped substrate 511 S One or more (such as all) steps of the forming plate 512 may include one, two, or more of various similar and / or different materials, such as silicone. S and / or shaped substrate 511 S Each step has a molding plate 512 S and / or shaped substrate 511 SThe steps may comprise the same material as or a different material from the rest of the cavity 513. In some embodiments, the transition between at least one pair of steps comprises a smoothed and / or rounded transition. In some embodiments, two or more steps have approximately equal widths. In some embodiments, two or more steps have approximately equal widths, but a central step (e.g., a step closest to the center of the cavity 513) has a wider width, e.g., about twice the width of the two or more steps having approximately equal widths. In some embodiments, one or more "corners" of one or more steps (e.g., corners near the center of the cavity 513) are positioned proximal to, but just below, the maximum deflection profile of the plate 512, so that these steps create a significant effect without impeding the deflection of the plate 512.

[0072] Molded Plate 512 S and / or shaped substrate 511 S Each of the shaped plates 512 may include a contoured (shaped) profile, including a "sloped profile" that includes one or more portions that are tapered or sloped. In some embodiments, the shaped plates 512 S 4C, 5B, 8B, 10B, 22B, 24B, 26B, 28B, and / or elsewhere herein (e.g., angled portion 5124 described herein). Alternatively or additionally, substrate 511 S 7C, 9C, 12C, 23C, 25C, and / or elsewhere herein (e.g., angled portion 5114 described herein). S and / or shaped substrate 511 S The inclined portions of the molded plate 512 are S and / or shaped substrate 511 S It may comprise the same material as the rest of the substrate or a different material.

[0073] Molded Plate 512 S and / or shaped substrate 511 SEach of the shaped plates 512 may include a contoured (shaped) profile with a "curved profile" that includes one or more portions of a curved shape. S 4D-4E, 5C-5D, 8C-8D, 10C-10D, 22C-22D, 24C-24D, 26C-26D, 28C-28D, and / or elsewhere herein (e.g., curved portion 5125 described herein). Alternatively or additionally, substrate 511 S 7D-7E, 9D-9E, 12D-12E, 23D-23E, 25D-25E, and / or elsewhere herein, may include curved portions (e.g., curved portions 5115 described herein). S and / or shaped substrate 511 S The curved portions of the plates 512 are formed on the respective S and / or shaped substrate 511 S It may comprise the same material as the rest of the substrate or a different material.

[0074] In some embodiments, the CMUT 510 increases the average displacement of the plates 512 (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase) based on the geometry (e.g., thickness) and / or physical properties (e.g., dielectric constant) of the dielectric film 514. Examples of CMUT 510 components that include variations in the dielectric film 514 are described with reference to Figures 31-35B and elsewhere herein.

[0075] Device 100 may include a device (e.g., a medical device) that includes a sensor 500 consisting of multiple sensors 500 in a redundant configuration, such as when an image signal received by a first sensor 500a is compared to a signal received by a second sensor 500b, such as when a comparison is made to confirm the integrity of the received image signals. Alternatively or additionally, device 100 may include a device (e.g., a medical device) that includes multiple sets of CMUTs 510 in a redundant configuration, such as when an image signal received by a first set of CMUTs 510 is compared to a signal received by a second set of CMUTs 510, such as when a comparison is made to confirm the integrity of the received image signals.

[0076] The device 100 (e.g., a medical device) may include one or more sensors 500, each including one or more arrays 5010. In these embodiments, each array 5010 of the one or more CMUTs 510 may include a first CMUT 510a of a particular configuration and at least one second CMUT 510b of a different configuration. For example, the different configurations of the CMUTs 510 may include differences in the shape and / or size of the bottom electrode 511 and / or plate 512. Alternatively or additionally, the device 100 may include one or more sensors 500, each including one, two, or more arrays 5010, where the first array 5010a has a different configuration from the at least one second array 5010b. For example, different configurations of the array 5010 may include differences in the geometric arrangement of the CMUTs 510, differences in the types of CMUTs 510 (e.g., differences in the components, shapes, and / or other configurations of the CMUTs 510), and / or differences in the number of CMUTs 510.

[0077] 1A and 1B, cross-sectional views of two examples of current (e.g., commercially available) CMUT structures consistent with the inventive concept are shown. FIG. 1A shows a CMUT 510′, which includes a substrate, i.e., substrate 511, including a conductive material (e.g., doped silicon), and an insulating film, i.e., dielectric film 514, disposed on substrate 511 and including a dielectric material (e.g., silicon nitride). Support 515 extends vertically from dielectric film 514 and also includes a dielectric material (e.g., silicon nitride). Plate 512 is disposed on top of support 515, and cavity 513 is formed between dielectric film 514 and plate 512. Plate 512 of CMUT 510′ includes a multi-layer structure and includes film 5121, a first conductive film including a conductive material (e.g., aluminum), and film 5122, a first insulating film including a dielectric material (e.g., silicon nitride). The membrane 5121 may include a structure and arrangement to avoid a significant impact of the membrane 5121 on the plate 512. In some embodiments, the membrane 5121 includes a thickness that is less than 50%, 40%, or 33% of the thickness of the plate 512. The membrane 5121 may include one, two, or more different materials, such as similar materials and / or different materials. In some embodiments, the membrane 5121 includes one, two, or more materials selected from the group consisting of aluminum, titanium, chromium, gold, aluminum with copper and / or silicon (e.g., up to 2% copper and / or silicon), indium tin oxide, and / or other transparent conductive materials, and combinations thereof. The membrane 5121 may include a multilayer structure, such as a titanium layer and an aluminum layer (e.g., as a diffusion barrier). The membrane 5122 may include a thickness of at least 0.2%, 0.5%, or 1% of the width of the cavity 513. The membrane 5122 can include one, two, or more different materials, such as similar and / or different materials. The membrane 5122 can include silicon nitride.

[0078] FIG. 1B shows another embodiment of a CMUT 510″, which includes a substrate 511 including a conductive material (such as doped silicon). Also included is a dielectric film 514 and a support 515, each including a dielectric material (such as silicon oxide) as shown. A plate 512 is disposed on top of the support 515, and a cavity 513 is formed between the dielectric film 514 and the plate 512. The plate 512 of the CMUT 510″ includes a multi-layer structure and includes a first conductive film, film 5121a, including a conductive material (such as doped silicon), and a second conductive film, film 5121b, including another conductive material (such as aluminum).

[0079] 1A and 1B illustrate two of many possible structures of the inventive CMUT 510. Each membrane and / or component of the CMUT 510 can include one or more materials, portions, and / or can include various shapes, for example, as described herein. For example, the CMUT 510 can include one, two, or more of the inventive concepts described herein, such as one, two, or more of the component configurations selected from the group consisting of: a contoured (e.g., non-planar) dielectric film, a dielectric film having a high k (i.e., relative dielectric constant) value, such as a k value greater than 5, 10, 100, 500, 1000, or 5000, a combination of dielectric materials, such as standard dielectric materials and / or a combination of dielectric materials having a high k value, such as a k value greater than 3.8, 5, 10, 100, 1000, or 5000, a shaped plate, a shaped bottom electrode, a piston component, a combination of a shaped plate, a dielectric film, and / or a shaped bottom electrode, a vented cavity, a cavity including a fluid trench, and combinations thereof. Each of these configuration options can be configured to operate in a variable voltage mode, such as a collapse mode, a conventional mode, a low voltage mode, and / or other CMUT operating modes, for example, as described herein.

[0080] In some embodiments, the inventive CMUT 510 is configured to operate in a "conventional mode." In conventional mode, the plate 512 is supported by the supports 515 and vibrates like a drumhead without touching the bottom of the cavity 513. Alternatively or additionally, the CMUT 510 may be configured to operate in a "collapse mode." In collapse mode, a central portion of the plate 512 contacts the bottom of the cavity 513 (e.g., the plate 512 is pulled into contact with the bottom of the cavity 513 by an applied DC voltage). During operation, the portion of the plate 512 between the supports 515 and the contacting central portion (e.g., the "ring" portion of the plate 512) vibrates with the central portion in contact with the bottom of the cavity 513.

[0081] In some embodiments, the CMUT 510 includes a "vented CMUT," e.g., a CMUT that includes one or more openings, i.e., vent holes 516, described herein, between the cavity 513 and the ambient environment. In some embodiments, the cavity 513 of the vented CMUT 510 includes one or more trenches or other fluid pathways 517, which may be constructed and arranged to manipulate a fluid (e.g., air) within the cavity 513 upon actuation of the CMUT 510. Various embodiments of the CMUT 510, including the vented CMUT, are described with reference to FIGS. 21A-28D and elsewhere herein. Embodiments of the CMUT 510 that include trenches 517 include one or more trenches and / or other fluid pathways (referred to herein as a "trench" or "trenches") and are described with reference to FIGS. 23A-28D and elsewhere herein.

[0082] The vent holes 516 may include one, two, or more similar and / or different cross-sectional shapes, such as circular, oval, rectangular, square, triangular, and / or combinations thereof. In some embodiments, the vent holes 516 include a major axis with a length that is less than 10%, less than 7.5%, less than 5.0%, less than 2.5%, and / or less than 1.5% of the length of the major axis of the CMUT 510 (e.g., the vent holes 516 include a circle with a diameter that is less than 10%, less than 7.5%, less than 5.0%, less than 2.5%, and / or less than 1.5% of the length of the major axis of the CMUT 510).

[0083] Trenches 517 may include one or more trenches or other fluid pathways that are at least 0.5 μm, 1.0 μm, or 2 μm deep, and / or no more than 15 μm, 25 μm, or 35 μm deep.

[0084] In some embodiments, the CMUT 510 is configured to operate in a "low voltage mode." For example, a pull-in voltage of 100V, 50V, or 10V may be applied to configure the CMUT 510 in collapse mode (e.g., for typical collapse voltages above 100V). In some embodiments, the CMUT 510 may be configured to operate in low voltage mode if the device 100 comprises a portable device (e.g., a battery-powered device configured to operate in a low power mode as described below). For example, the device 100 may comprise a battery-powered device, such as when the functional element 199 comprises a battery (or other energy storage device), e.g., a 3.2V battery. In these embodiments, the various components of the device 100 may each be configured to operate at a voltage below a threshold, e.g., below 100V, 50V, 25V, or 10V. In some embodiments, the CMUT 510 comprises a shaped bottom electrode 511. S , a shaped upper electrode (e.g., a shaped plate 512 S ), and / or a shaped dielectric film 514 configured (e.g., enabling) the CMUT 510 to operate in a low voltage mode. SIn some embodiments, device 100 may be configured to operate in a "low power mode," e.g., when one or more components of device 100 are configured to operate with relatively low power consumption. CMUT 510 may be configured to operate in a low voltage collapse mode to limit power consumption (e.g., compared to high voltage collapse mode operation), e.g., when device 100 comprises a battery-powered device.

[0085] In some embodiments, the CMUT 510 is configured to operate at 5 MHz with a pull-in voltage of 90 V. In these embodiments, the CMUT 510 may include one or more specifications selected from the group consisting of a plate 512 with a 29 μm radius, a plate 512 with a silicon layer thickness of 1.7 μm, a plate 512 with an aluminum layer thickness of 300 nm, a gap height of 230 nm, a dielectric film 514 with a thickness (e.g., oxide insulator thickness) of 220 nm, and combinations thereof. For example, a CMUT with one or more (e.g., all) of these specifications may have a transmit sensitivity (e.g., 80% of pull-in) of at least 9.9 kPa / V.

[0086] In some embodiments, the CMUT 510 is configured to operate at 5 MHz with a pull-in voltage of 45 V. In these embodiments, the CMUT 510 may include one or more specifications selected from the group consisting of a plate 512 with a 29 μm radius, a plate 512 with a silicon layer thickness of 1.7 μm, a plate 512 with an aluminum layer thickness of 300 nm, a gap height of 160 nm, a dielectric film 514 with a thickness (e.g., oxide insulator thickness) of 100 nm, and combinations thereof. Simulations performed by the applicant have shown that this CMUT configuration achieved a sensitivity of 12.1 kPa / V at 5 MHz and a bias voltage of 36.2 V (80% of pull-in).

[0087] In some embodiments, the CMUTs 510 of the present inventive concept are configured for use in airborne and / or submerged applications (e.g., one or more devices 100 including one or more CMUTs 510 are configured for use in airborne and / or submerged applications). For example, the CMUTs 510 may be used in harsh environments, such as high pressure, high temperature, and / or toxic environments, such as inside gas pipelines, chemical facilities, and / or in aerospace applications, such as spacecraft and / or vehicles, structures, or equipment designed for use on Mars or other exoplanets.

[0088] In some embodiments, the CMUT 510 of the present inventive concept is configured to deliver HIFU energy. For example, the plate 510 may include a relatively thick metal layer (e.g., for low-current heating), such as an approximately 400 nm layer. In these embodiments, the CMUT 510 may be configured to provide a minimum output voltage (e.g., a minimum value that depends on the operating frequency). The CMUT 510 may be configured to operate with a pull-in voltage of 200 V or less, making it compatible with standard electronic components such as switches and preamplifiers. In some embodiments, the CMUT 510 is configured to run at a low voltage (e.g., less than 200 V), resulting in lower electric fields during use (e.g., reduced loads on the CMUT 510 components) and reduced requirements for the transmit and receive electronics attached to the CMUT 510.

[0089] The shape of the plate 510 affects the mass and spring constant of the plate 510, and therefore the applicable operating frequency and bandwidth. The second harmonic of the plate 512 may limit the bandwidth of the CMUT 510 and contribute to nonlinearity in the CMUT response to the excitation voltage. Therefore, increasing the frequency of the second harmonic relative to the fundamental frequency may increase the bandwidth of the CMUT 510 (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase) and / or reduce the nonlinearity of the CMUT response (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% decrease), both of which are often desirable. The shape (e.g., cross-sectional shape) of the plate 510 may be configured to increase the second harmonic frequency (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase) while keeping the fundamental frequency constant.

[0090] The CMUT 510 may include a convex lens (e.g., with a speed of sound lower than the speed of sound in tissue) configured to focus the ultrasound beam in elevation (e.g., a 1D array). The convex lens may include a thickness several times the wavelength of sound used and is limited by the attenuation of ultrasound passing therethrough. This attenuation results in heating of the lens, reducing the output pressure of the CMUT 510. In some embodiments, the CMUT 510 includes a Fresnel lens that is thinner than a corresponding convex lens, thereby relatively reducing the attenuation of the lens (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% reduction) and increasing the output pressure (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase).

[0091] In some embodiments, the US sensor 500 is configured to operate in a closed-loop manner, e.g., the US sensor 500 includes the CMUT 510 and is configured and arranged to provide active feedback (e.g., to the processing unit 110) related to the position of the plate 512 during operation of the CMUT 510. A challenge with CMUTs is that the sensitivity of plate displacement to voltage is highly nonlinear. Plate displacement is much more sensitive to voltage changes when operating at high voltages, both for AC drive voltages and DC bias voltages. This sensitivity makes it difficult to move the plate across the full gap during transmit (e.g., when operating at a voltage close to the voltage that transitions the CMUT 510 into collapse mode), maximizing output pressure. Also, in receive mode, it is difficult to maintain plate displacement very close to collapse without collapsing. In some embodiments, operating multiple CMUTs 510 in an array (e.g., the array 5010 described herein) near collapse mode without unintentionally collapsing one or more CMUTs 510 can be difficult due to variations among the CMUTs 510 in the array. To avoid these problems, the system 10 can include feedback regarding the position of the plate 512, which can improve control of plate displacement (e.g., at least 2%, 5%, 10%, 25%, and / or 50% improvement in plate displacement control accuracy), improve performance, and avoid problems (e.g., avoid collapse). The feedback signal can be provided by several different configurations of the CMUTs 510. The feedback signal can provide a measurement of plate displacement relative to gap height. In some embodiments, the feedback signal can be used to set the DC bias voltage very close to the collapse voltage to maximize receive sensitivity when the CMUTs 510 are operating in receive mode. Additionally or alternatively, a feedback signal may be used to set the AC drive signal so that the maximum plate displacement is a large percentage of the gap height, resulting in a higher output pressure.

[0092] In airborne applications, the bandwidth of the CMUT 510 may be smaller than in non-airborne applications (e.g., immersion applications), necessitating better tuning of the resonant frequency and operating frequency of the device incorporating the CMUT 510. In these applications, the system 10 may track the resonant frequency and transmit and receive using the optimal frequency. The system 10 may be configured to transmit at the short-circuit resonance of the CMUT 510 and receive at the open-circuit resonance. The operating frequency of the CMUT 510 may be changed in real time (e.g., during use and / or during a calibration process) via a spring-softening effect caused by changing the DC bias voltage. In some embodiments, multiple CMUTs 510 may be implemented to operate in groups (e.g., pairs) of CMUTs 510, where each CMUT 510 in the group is configured to operate as a transmitter or a receiver, but not both. In these embodiments, each CMUT 510 in a transmitter and receiver group may be configured to operate at the same frequency, and the transmit and receive sensitivities may be optimized at the operating frequency for each of the CMUTs 510 in one or more transmitter configurations and the CMUTs 510 in one or more receiver configurations. Because the transmitter's output impedance is low, the CMUT 510 operating as a transmitter enhances performance at short-circuit resonance. Because the receiver's input impedance is high (e.g., compared to the transmitter's output impedance), reception is often optimal at the open-circuit resonance frequency. Due to the narrow bandwidth, the DC bias may be adjusted for a single CMUT 510 configured for both transmit and receive to operate at a frequency with the largest dynamic range. When multiple CMUTs 510 are arranged in a group including CMUTs 510 configured to transmit or receive (i.e., not both transmit and receive as described above), their respective operations may be performed at the same frequency, and the structure and placement of each transmitter CMUT 510 and receiver CMUT 510 may be optimized for operation at that frequency.

[0093] The CMUT 510 can be operated at a wide range of frequencies (e.g., drive frequencies or other operating frequencies). In some embodiments, the CMUT 510 is operated at one or more frequencies, which are set based on the particular application in which the CMUT 510 is to be used, such as the particular application in which the device 100 or another system 10 component is to be used. In some embodiments, the system 10 includes one or more CMUTs 510 operated at frequencies of at least 5 MHz and / or frequencies of 10 MHz or less. CMUTs 510 including vacuum gaps (e.g., non-vented cavities as described with reference to FIG. 4A and elsewhere herein) can be configured to operate at frequencies of at least 10 kHz, 250 kHz, or 500 kHz and / or frequencies of 50 MHz or less or 100 MHz or less. CMUTs 510 including vented configurations (e.g., for operation in airborne applications as described with reference to FIGS. 21A-28D and elsewhere herein) can be configured to operate at frequencies of at least 20 kHz and / or frequencies of 500 kHz or less.

[0094] In some embodiments, the US sensor 500 (such as the CMUT 510) includes a sensing electrode (e.g., in addition to the lower electrode 511 and the plate 512), which is configured to provide a signal related to the position of the plate 512 (e.g., to the processing unit 110), for example, as described herein with reference to FIG. 2 . The sensing electrode can be used in a closed-loop active feedback mode to adjust the AC or DC voltage. Alternatively or additionally, the sensing electrode can be used for periodic calibration of the US sensor 500, for example, calibration performed at least once a week, once a day, once an hour, once a minute, once a second, five times a second, or 50 times a second (e.g., automatically performed by the system 10). For example, an AC voltage is applied in increments of increasing amplitude while the signal from the sensing electrode is measured. The displacement of the plate 512 as a function of the AC voltage is nonlinear, and the shape of the nonlinear curvature can be used as a measure of the plate displacement as a percentage of the gap height.

[0095] In some embodiments, the US sensor 500 includes one or more components, a calibration circuit 530, configured to provide one or more signals used to calibrate the sensor 500. In some embodiments, the calibration circuit 530 is configured to calibrate the pull-in voltage of one or more CMUTs 510. The pull-in voltage may vary across an array of CMUTs 510, for example, due to dimensional non-uniformity of the CMUTs 510 across the array. A self-calibrating structure (such as the calibration circuit 530) may be included to measure the pull-in voltage of one or more CMUTs 510 so that the system 10 can adjust the DC bias and / or transmit voltage (e.g., via the algorithm 115). In some embodiments, the calibration structure is configured to provide an estimate of the pull-in voltage of one or more CMUTs 510 in the array based on the measured pull-in voltage of the calibration structure. In some embodiments, an array of CMUTs 510 can include one, two, or more calibration structures, each configured to provide an estimate of the pull-in voltage of one or more CMUTs 510 (e.g., CMUTs 510 proximate to the calibration structure in the array). In some embodiments, the calibration circuit 530 includes a string of CMUTs with different gap heights and / or radii. The strings of CMUTs can be connected in parallel, and the capacitance of the CMUTs versus voltage can be measured. The system 10 can be configured to detect a jump in capacitance each time a CMUT “pull-in.” The voltage of each capacitance jump can be fitted to a model to extract device parameters (e.g., gap height). Alternatively or additionally, a single calibration structure can be used to measure the collapse voltage of one or more CMUTs 510 in the array.

[0096] In some embodiments, the CMUT 510 includes one or more support structures, shown as pistons 518. The pistons 518 and piston-based CMUTs 510 may be constructed and arranged as described with reference to FIGS. 7, 8, 9, 10, 25, 26, 27, 28, 47, and 48. The pistons 518 may be configured to stiffen portions of the plate 512, such that bending of the plate 512 occurs primarily in portions of the plate 512 that are not supported by the pistons 518. This stiffness makes the plate 512 "piston-like," increasing the average displacement of the plate 512 relative to its maximum displacement and can be used to increase the sensitivity and maximum output pressure of the CMUT 510. The pistons 518 may include one, two, or more components comprising one, two, or more of a variety of similar and / or dissimilar materials, such as silicon (e.g., silicon deposited by chemical vapor deposition), aluminum, titanium, chromium, tungsten, and / or gold. In some embodiments, the piston 518 comprises a thickness that is at least 20%, 35%, or 50% of the thickness of the plate 512, and / or a thickness that is not more than 5, 7, or 10 times the thickness of the plate 512. In some embodiments, when the CMUT 510 is arranged to operate in a non-collapse mode (e.g., as described with reference to FIGS. 7 and 8), the piston 518 may comprise a width that is at least 15%, 22%, or 30% of the width of the plate 512, and / or a width that is not more than 80%, 87%, or 95% of the width of the plate 512. In some embodiments, when the CMUT 510 is arranged to operate in a collapse mode (e.g., as described with reference to FIGS. 9A-9E), the piston 518 may comprise a width that is at least 5%, 10%, or 15% of the width of the plate 512, and / or a width that is not more than 25%, 32%, 40%, 44%, or 47% of the width of the plate 512.

[0097] In some embodiments, the CMUT 510 is fabricated directly on a CMOS wafer (e.g., such that the CMUT 510 is integrated into a CMOS device at the wafer level). For example, it may be advantageous to directly integrate the CMUT 510 into a CMOS wafer using wafer-level processing. In some embodiments, a sacrificial release process, such as that described with reference to FIG. 39 and elsewhere herein, may be used in directly integrating the CMUT onto a CMOS wafer. Integrating the CMUT 510 into a CMOS device may provide improved sensitivity and / or optimization of manufacturing costs. In some embodiments, the CMUT 510 is fabricated using wafer-level processing on a previously processed (e.g., finished and / or partially finished) CMOS wafer. When wafer-level processing is performed on a finished CMOS wafer, temperature budgets are limited. Typically, wafer-level processing cannot exceed 400° C. for any process step. The sacrificial methods described herein can be completed with only low-temperature processing below the thermal budget of the CMOS wafer, for example, if the CMUT 510 is fabricated at 350°C or 300°C, without exceeding 400°C. In some embodiments, if the CMUT 510 is fabricated on a CMOS wafer that already has CMOS electronics on it, the wafer cannot withstand an oxidation furnace step to grow additional thermal oxide because the temperature limits of the CMOS cannot be exceeded. The CMUT 510 can be fabricated using a low-temperature bonding option configured to bond a thermal oxide (e.g., an oxide formed at a high temperature) to the CMOS wafer without exposing the CMOS to high temperatures.

[0098] Referring now to FIG. 2 , a top view of a plate of a CMUT including a sensing electrode is shown, consistent with the inventive concepts. In some embodiments, the CMUT 510 includes a third electrode, a sensing electrode 5127 (e.g., in addition to the top and bottom electrodes). The sensing electrode 5127 may be located on the top or bottom of the CMUT 510, such as when the sensing electrode 5127 is located near the center of the plate 512 as shown. The sensing electrode 5127 may comprise an area of ​​20%, 30%, or 40% or less of the area of ​​the cavity 513. In some embodiments, the sensing electrode 5127 is electrically isolated from the plate 512 and / or the bottom electrode 511 of the CMUT 510 (e.g., when the sensing electrode 5127 is located on the top or bottom of the CMUT 510, respectively). For example, the plate 512 may include a segmented plate including one or more channels, as shown, in which the sensing electrode 5127 and conductors (also referred to as "traces") operably connected (e.g., electrically connected) to the sensing electrode 5127 may be disposed. In some embodiments, the sensing electrode 5127 is small relative to the top and / or bottom electrodes of the CMUT 510 (e.g., the bottom electrode 511 and / or the plate 512 configured to actuate the CMUT 510 to transmit and / or receive signals). In some embodiments, the sensing electrode 5127 generates a signal (e.g., a current) that depends on the displacement of the plate 512. This signal may be used as a feedback signal to control a DC bias and / or transmit voltage on the electrode. In some embodiments, the plate 512 includes a portion including nitride, carbide, diamond, and / or other dielectric material. In some embodiments, the sensing electrode 5127 is disposed at the bottom of a cavity in the CMUT 510 (e.g., the cavity 513 is not shown but is described herein).For example, the sensing electrode 5127 may be disposed within the cavity if the CMUT 510 includes a relatively large transducer (e.g., if there is relatively large room within the cavity to create an electrode pattern), such as when the CMUT 510 is configured as an air transducer (e.g., typically includes a large transducer, such as a transducer with a major axis (e.g., diameter) greater than 0.5 cm or greater than 1 cm). For example, air transducers used in ranging applications typically operate in the range of 40 kHz to 100 kHz. At these frequencies, the wavelengths of ultrasound are 8.5 mm and 3.4 mm, respectively. For a single CMUT 510 used in these types of applications, the major axis (e.g., diameter) of the CMUT 510 would be multiple wavelengths wide (e.g., greater than 1 cm).

[0099] Referring now to FIG. 3, a transducer array including a CMUT component and a sensing transducer consistent with the inventive concept is shown. The US sensor 500 may include one or more ultrasonic transducer array elements 5010, such as the illustrated array elements 5010a and 5010b. Each of the array elements 5010a, b may include one or more CMUT components (e.g., at least 5, 10, or 20 CMUTs 510). In some embodiments, each of the array elements 5010a, b may include one or more sensors 5011 (e.g., at least 5, 10, or 20 sensors 5011). The sensors 5011 may include ultrasonic components (e.g., CMUT components) configured to acoustically couple to one or more CMUTs 510 of the array elements 5010a, b. In some embodiments, the array elements 5010a,b are configured to operate in a closed-loop mode, for example, where a signal generated by the sensor 5011 provides a feedback signal that is used by the sensor 500 (e.g., via the algorithm 115) to control a signal (e.g., a drive signal) provided to one or more CMUTs 510. In some embodiments, one or more ground guard wires (e.g., ground electrical traces) may be disposed between the CMUTs 510 and the sensor 5011 to reduce electrical crosstalk. In some embodiments, the device 100 includes at least 3, 6, or 8 array elements 5010.

[0100] 4A-5D, various cross-sectional views of a CMUT component configuration including a shaped plate consistent with the concepts of the present invention are shown. The CMUT 510 shown may include similar components to the CMUT 510 described with reference to FIG. 1 and elsewhere herein.

[0101] FIG. 4A shows a CMUT 510 that includes a CMUT configured to operate in a conventional mode (herein a "conventional mode CMUT") and includes a planar plate and a planar bottom electrode.

[0102] 4B illustrates a CMUT 510 that includes a conventional mode CMUT with a shaped plate that includes a stepped profile (e.g., including one or more "profile steps"). The CMUT 510 of FIG. 4B includes a plate 512 having a stepped profile that includes step 5123, which includes two steps, namely, ring-shaped steps 5123a and 5123b, as shown. S In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0103] FIG. 4C shows a CMUT 510 that includes a conventional mode CMUT with a shaped plate that includes a graded profile (eg, a piecewise linear profile that includes one or more graded portions).

[0104] FIG. 4D shows a CMUT 510 that includes a conventional mode CMUT with a shaped plate that includes a curved profile.

[0105] FIG. 4E shows a CMUT 510 including a conventional mode CMUT with a shaped plate including a curved profile, where the edge of the plate contacts the edge of the bottom electrode (e.g., the edge of plate 512 contacts an insulating film 514 disposed on the bottom electrode 511).

[0106] A plate 512 including a molded profile, herein plate 512 S CMUT 510, as described herein, may provide advantages over "standard" CMUT components (e.g., current commercially available CMUT components that include unshaped plates and electrodes, as shown in FIG. 4A). For example, shaped plate 512 Smay provide an enhanced electric field (e.g., at least a 2%, 5%, or 10% enhancement) and / or an increased electromechanical coupling efficiency (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase). S may provide an improvement in both transmit and receive sensitivity, for example, at least a 50%, 75%, and / or 100% increase in sensitivity with a reduction in DC voltage (e.g., about a 39% reduction in DC voltage). S allows for an increase in transient maximum output voltage, which may be, for example, at least a 1.1x increase (e.g., at least a 10% improvement) at 44% lower AC voltage. S may allow for a reduction in drive voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% reduction in either or both of the bias voltage (DC) and excitation voltage (AC)), for example, allowing for a 39% lower DC voltage and a 44% lower AC voltage (e.g., without degradation in performance of the CMUT 510).

[0107] In some embodiments, the CMUT 510 includes one or more CMUT transducers configured for immersion applications and operates with one, two, or more of the following parameters: operating frequency between 10 KHz and 100 MHz, major axis (e.g., diameter) between 10 μm and 50 mm, plate thickness between 0.1 μm and 100 μm, and / or gap height between 10 nm and 5 mm.

[0108] In some embodiments, the shaped portion of the plate 512 includes a thickness that is 20% or less of the thickness of the plate 512 (e.g., the thickness of the center portion of the plate 512). Alternatively or additionally, the shaped portion of the plate 512 may include a minimum thickness (e.g., a minimum thickness at the edge of the shaped portion) of at least 15% of the gap height or 5% of the effective gap height of the CMUT 510.

[0109] 5A illustrates a CMUT 510 that includes a CMUT configured to operate in collapse mode (e.g., a "collapse mode CMUT") and includes a shaped plate that includes a stepped profile. The CMUT 510 of FIG. 5A includes a plate 512 with a stepped profile having a step 5123. S , where step 5123 includes two steps, ring-shaped steps 5123a and 5123b as shown. In some embodiments, one or more of steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, CMUT 510 includes plate 512 having three, four, or more steps. S Includes:

[0110] FIG. 5B shows a CMUT 510 that includes a collapse mode CMUT with a shaped plate that includes a sloped profile.

[0111] FIG. 5C shows a CMUT 510 that includes a collapse mode CMUT with a shaped plate that includes a curved profile.

[0112] FIG. 5D shows a CMUT 510 including a collapse mode CMUT with a shaped plate including a curved profile, where the edge of the plate contacts the edge of the bottom electrode (e.g., the edge of plate 512 contacts an insulating film 514 disposed on the bottom electrode 511).

[0113] Forming plate 512 configured in collapse mode S CMUT 510 including shaped plate 512 may offer advantages over standard CMUT components configured in collapse mode (e.g., as shown in FIG. 4A). SThis configuration may provide an enhanced electric field (e.g., an enhancement of at least 2%, 5%, 10%, 25%, and / or 50%), may allow for improved transmit and receive sensitivity (e.g., an increase in either or both sensitivity of at least 2%, 5%, or 10%), and may allow for reduced operating voltage (e.g., a reduction in operating voltage of at least 2%, 5%, 10%, 25%, and / or 50%).

[0114] 6A-6I, various charts and graphs of CMUT power output and other performance characteristics consistent with the inventive concepts are shown. Applicant has performed analyses of various shaped plate CMUT component configurations as described herein. The results of these analyses are shown in the figures and discussed below.

[0115] In the analysis conducted by the applicant, the CMUT 510 component is formed by a molded plate 512. S , which have been shown to significantly improve the electric field and / or electromechanical coupling efficiency of the CMUT 510 (e.g., by at least 2%, 5%, 10%, 25%, and / or 50%), thereby improving either or both of the transmit and receive sensitivities (e.g., by at least 2%, 5%, 10%, 25%, and / or 50% increase in either or both sensitivities while maintaining a wide bandwidth, such as 50% to 150% bandwidth). S ) and its fabrication method can be used for CMUTs operating in conventional mode (e.g., non-collapse mode), collapse mode, or both. A standard CMUT includes plates and electrodes that are planar, limiting the electric field when the plates are biased with a DC voltage because the deflected plate 512 cannot move parallel to the bottom electrode 511. Shaped plate 512 SAdvantages of having include, but are not limited to, a significant enhancement of the electric field (e.g., an increase of at least 2%, 5%, 10%, 25%, and / or 50%), an increase in electromechanical coupling efficiency (e.g., an increase of at least 2%, 5%, 10%, 25%, and / or 50%), a significant improvement in both transmit and receive sensitivity (e.g., an increase of at least 2%, 5%, or 10% in either or both), and / or a reduction in drive voltage (e.g., a reduction of at least 2%, 5%, 10%, 25%, and / or 50%).

[0116] A shaped plate 512 for improving electromechanical coupling efficiency and enhancing both transmission and reception sensitivity S Various examples of CMUTs 510 including the shaped plate 512 are shown in FIGS. S includes a stepped portion 5123, which is a "multiple profile step" structure, which can face downward relative to the planar substrate 511 (as shown and described with reference to Figures 4B, 5A, 8A, 10A, 22A, 24A, 26A, 28A, and elsewhere herein). S can be made of a conductive material so that the potential is S In some embodiments, the pressure applied to the stepped portion 5123 of the plate 512 (e.g., the lower surface of the portion 5123) can be S The material of the shaped plate 5122 may include an insulating material. In these embodiments, the stepped portion 5123 may include a conductive material, and an electrical potential may be applied to the underside of the stepped portion 5123. In some embodiments, the shaped plate 5122 may include an insulating material. S The molded plate 512 includes a sloped portion 5124 that is a sloped structure, which can face downward relative to the planar substrate 511 (e.g., as shown and described with reference to Figures 4C, 5B, 8B, 10B, 22B, 24B, 26B, 28B, and elsewhere herein). SThe angled portion 5124 may comprise a thickness of at least 50%, 60%, or 70% of the thickness of the cavity 513. The angled portion 5124 may comprise a thickness of at least 2%, 5%, or 10% of the gap height of the cavity 513. The angled portion 5124 may comprise one, two, or more of a variety of similar and / or different materials, such as silicon. The angled portion 5124 may be formed of a material that is substantially the same as or different from the material of the molded plate 512. S The molded plate 512 may comprise the same material as or a different material from the molded plate 512. S The plate 512 may be made of a conductive material, and the potential S In some embodiments, the pressure applied to the shaping plate 512 may be applied to the inclined portion 5124 (e.g., the lower surface of the inclined portion 5124). S In these embodiments, the angled portion 5124 may comprise a conductive material, and an electric potential may be applied to the underside of the angled portion 5124.

[0117] In some embodiments, the plate 512 includes one or more curved structures, curved portions 5125, which may be oriented downward relative to the planar substrate 511 (e.g., as shown and described with reference to Figures 4D-4E, 5C-5D, 8C-8D, 10C-10D, 22C-22D, 24C-24D, 26C-26D, and 28C-28D). S The curved portion 5125 may comprise a thickness of at least 50%, 60%, or 70% of the thickness of the cavity 513. The curved portion 5125 may comprise a thickness of at least 2%, 5%, or 10% of the gap height of the cavity 513. The curved portion 5125 may comprise one, two, or more of a variety of similar and / or different materials, such as silicon. The curved portion 5125 may be formed of a material that is not resistant to the shaping of the molded plate 512. S The molded plate 512 may comprise the same material as or a different material from the molded plate 512. S may be made of a conductive material so that an electrical potential is applied to the shaped plate 512 SIn some embodiments, the plate 512 comprises an insulating material. In these embodiments, the curved portion 5125 may comprise a conductive material, such that a potential may be applied to the underside of the curved portion 5125. The profile of the curved portion 5125 may be derived from (e.g., configured to resemble) the shape of a deflected planar plate driven with a large DC bias or a large AC excitation signal. This provides significant performance improvements (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase in one or more performance parameters) without mechanically restricting the displacement of the center of the plate. The profile may approximate this shape, for example, using a horizontal step to reduce manufacturing complexity.

[0118] In some embodiments, the shaped plate 512 S 4E, the curved portion 5125 is constructed and arranged to contact the substrate at an edge of the CMUT 510, e.g., at a contact region 5126. In these embodiments, the curvature of the curved portion 5125 can be constructed and arranged (e.g., optimized) to improve receive sensitivity by increasing the drive voltage above the pull-in voltage (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase). For example, the contact region 5126 increases as more voltage is applied and the deflection of the plate 512 increases, reducing the lateral dimension of the plate 512 and making it stiffer to prevent collapse. This allows higher voltages to be applied to the CMUT 510 without reaching collapse.

[0119] Similar molded plate 512 SThese configurations can also be used in collapse-mode CMUTs, as shown, for example, in Figures 5A-5D. Compared to traditional planar substrate configurations (e.g., as shown in Figure 4A), the most active area associated with strong electric fields can be increased by up to 50%, 75%, and / or 100% using these configurations, which can result in significant enhancements in electromechanical coupling efficiency, as described herein (e.g., efficiency increases of at least 2%, 5%, 10%, 25%, and / or 50%). For example, Figures 5A-5D show CMUTs 510 in collapse mode having configurations similar to the CMUTs 510 of Figures 4B-4E, respectively.

[0120] Applicant has performed simulations (e.g., finite model analyses of various CMUT component configurations described herein). Figure 6A shows a simulation of deformation of a flat plate, where the plate is biased at a 90% pull-in voltage. Figure 6B shows a simulation of deformation of a plate containing two "profile steps," where the plate is biased at a 90% pull-in voltage. Figure 6C shows a simulation of deformation of a plate containing a sloped portion, where the plate is biased at a 90% pull-in voltage. Figure 6D shows a simulation of deformation of a plate containing a curved portion, where the plate is biased at a 90% pull-in voltage.

[0121] Applicant has evaluated the performance of various forming plate configurations (e.g., forming plate 512 described herein) when operating in a conventional mode. S The performance of CMUTs including various shaped plates 512 was designed and simulated. The following parameters were used in the simulation: an operating frequency of 7.5 MHz, a plate 512 thickness of 1.5 μm, a plate 512 radius of 21 μm, and a gap height of 0.25 μm (to obtain an appropriate driving voltage, e.g., less than 200 V, less than 150 V, etc.). Figure 6E shows the performance of various shaped plates 512. SThe pull-in voltage from the configuration is shown compared to a standard CMUT component. As shown, the pull-in voltage is reduced by up to 38.8% in comparison. FIGS. 6F and 6G show enhanced electric field and improved electromechanical coupling efficiency, respectively (e.g., an increase of at least 2%, 5%, 10%, 25%, and / or 50%). FIG. 6H shows transmit (a) and receive (b) sensitivities biased at a 90% pull-in voltage. Both transmit and receive sensitivities can be increased by at least 50% (e.g., about 93%) while operating at at least a 10% lower DC bias (e.g., a 38.8% lower DC bias). The maximum transient output voltage is similarly compared and shown in FIG. 6I. Shaped plate 512 S can generate 1.1 times more sound pressure while being driven with 38.8% less DC voltage and 43.8% less AC voltage. S may also suppress higher harmonics.

[0122] 7A-10D, various cross-sectional views of piston-based CMUT components including a shaped plate and / or a shaped bottom electrode are shown, consistent with the concepts of the present invention. The illustrated CMUT 510 may include similar components to the CMUT 510 as described with reference to FIG. 1 and / or elsewhere herein. In some embodiments, the CMUT 510 of FIGS. 7A-10D or the CMUT 510 described elsewhere herein may include a solid piston as described herein with reference to FIGS. 47A-47B, or a non-solid piston as described herein with reference to FIGS. 48A-48B.

[0123] FIG. 7A shows a CMUT 510 that includes a piston-based CMUT (e.g., a CMUT that includes a piston) and is configured to operate in conventional mode (herein a "piston-based conventional mode CMUT"), and includes a planar plate and a planar bottom electrode.

[0124] 7B shows a CMUT 510 that includes a piston-based conventional mode CMUT with a flat plate and a shaped bottom electrode that includes a stepped profile. The CMUT 510 of FIG. 7B includes a substrate 511S a substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in FIG. 7B.

[0125] FIG. 7C shows a CMUT 510 that includes a piston-based conventional mode CMUT with a flat plate and a shaped bottom electrode that includes a sloped profile.

[0126] FIG. 7D shows a CMUT 510 that includes a piston-based conventional mode CMUT with a flat plate and a shaped bottom electrode that includes a curved profile.

[0127] FIG. 7E shows a CMUT 510 that includes a piston-based conventional mode CMUT with a flat plate and a shaped bottom electrode that includes a curved profile in which the edge of the bottom electrode contacts the edge of the plate (e.g., insulating film 514 contacts the edge of plate 512).

[0128] 8A shows a CMUT 510 that includes a piston-based conventional mode CMUT with a shaped plate that includes a stepped profile. The CMUT 510 of FIG. S Includes plate 512 SAs shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0129] FIG. 8B shows a CMUT 510 that includes a piston-based conventional mode CMUT with a shaped plate that includes a sloped profile.

[0130] FIG. 8C shows a CMUT 510 that includes a piston-based conventional mode CMUT with a shaped plate that includes a curved profile.

[0131] FIG. 8D shows a CMUT 510 that includes a piston-based conventional mode CMUT with a shaped plate that includes a curved profile in which the edge of the plate contacts the edge of the bottom electrode (e.g., the edge of plate 512 contacts an insulating film 514 disposed on bottom electrode 511).

[0132] Molded lower electrode 511 S and / or forming plate 512 SWhen operated in a conventional mode, a CMUT 510 including the piston (e.g., the piston-based CMUT described with reference to FIGS. 7B-8D ) may provide advantages over a standard CMUT component (e.g., the standard CMUT including the piston shown in FIG. 7A ) operated in a conventional mode, as described herein. For example, these advantages include, but are not limited to, wider operating bandwidth, higher transmit and / or receive sensitivity, harmonic suppression (e.g., enabling harmonic suppression), enhanced electric field (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), improved electromechanical coupling efficiency (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), increased transient maximum output voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), and / or reduced drive voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% decrease for either or both of the bias voltage (DC) and excitation voltage (AC)).

[0133] In some embodiments, the piston 518 comprises a thickness that is at least 50% of the thickness of the plate 512 and / or a thickness that is no greater than 5 times the thickness of the plate 512. In some embodiments, the piston 518 comprises a diameter that is 20% to 80% of the major axis (e.g., diameter) of the CMUT 510. In some embodiments, the shaped portions of the electrode 511 and / or plate 512 may comprise a minimum thickness (e.g., a minimum thickness at the edges of the shaped portions) of at least 15% of the gap height of the CMUT 510 or 5% of the effective gap height.

[0134] FIG. 9A illustrates a CMUT 510 that includes a piston-based CMUT configured to operate in collapse mode (herein a "piston-based collapse mode CMUT") and includes a planar plate and a planar bottom electrode.

[0135] 9B shows a CMUT 510 that includes a piston-based collapse mode CMUT with a flat plate and a shaped bottom electrode that includes a stepped profile. The CMUT 510 of FIG. 9B includes a substrate 511. Sa substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in Figure 9B.

[0136] FIG. 9C shows a CMUT 510 that includes a piston-based collapse mode CMUT with a flat plate and a shaped bottom electrode that includes a sloped profile.

[0137] FIG. 9D shows a CMUT 510 that includes a piston-based collapse mode CMUT with a flat plate and a shaped bottom electrode that includes a curved profile.

[0138] FIG. 9E shows a CMUT 510 that includes a piston-based collapse mode CMUT with a flat plate and a shaped bottom electrode that includes a curved profile where the edge of the bottom electrode contacts the edge of the plate (e.g., insulating film 514 contacts the edge of plate 512).

[0139] 10A shows a CMUT 510 that includes a piston-based collapse mode CMUT with a shaped plate that includes a stepped profile. The CMUT 510 of FIG. 10A includes a plate 512 S Includes plate 512 SAs shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0140] FIG. 10B shows a CMUT 510 that includes a piston-based collapse mode CMUT with a shaped plate that includes a sloped profile.

[0141] FIG. 10C shows a CMUT 510 that includes a piston-based collapse mode CMUT with a shaped plate that includes a curved profile.

[0142] FIG. 10D shows a CMUT 510 that includes a piston-based collapse mode CMUT with a shaped plate that includes a curved profile in which the edge of the plate contacts the edge of the bottom electrode (e.g., the edge of plate 512 contacts an insulating film 514 disposed on the bottom electrode 511).

[0143] Molded lower electrode 511 S and / or forming plate 512 SWhen operated in collapse mode, a CMUT 510 including the piston (e.g., a piston-based CMUT as described with reference to Figures 9B-10D) may provide advantages over a standard CMUT component (e.g., a standard CMUT including the piston shown in Figure 9A) operating in collapse mode, as described herein. For example, these advantages include, but are not limited to, wider operating bandwidth, higher transmit and / or receive sensitivity, harmonic suppression (e.g., enabling harmonic suppression), enhanced electric field (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), improved electromechanical coupling efficiency (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), increased transient maximum output voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), and / or reduced drive voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% decrease for either or both of the bias voltage (DC) and excitation voltage (AC)).

[0144] 11A-20, various charts and graphs of CMUT power output and other performance characteristics consistent with the inventive concepts are shown. Applicant has performed analyses of the various shaped plate CMUT component configurations described herein. The results of these analyses are shown and discussed below.

[0145] Analysis conducted by applicants has shown that a CMUT component of the inventive concept comprises a piston (e.g., a piston attached to a plate 512, herein referred to as a "piston plate") and a shaped electrode (e.g., a shaped bottom electrode 511). S and / or forming plate 512 S), which has been shown to significantly improve either or both of the transmit and receive sensitivities (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase in either or both sensitivities) and significantly increase the output acoustic pressure (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase while maintaining a wide bandwidth at a low drive voltage). The piston-based CMUT component configurations of the inventive concept, and their fabrication methods, can be used for CMUTs operating in either or both of conventional and collapsed modes. Standard flat-plate and flat-electrode piston-based CMUT configurations limit the electromechanical transformation ratio due to the inability of the deflected plate to move parallel to the lower planar electrode when the plate is biased with a DC voltage. The piston and shaped electrode (e.g., lower electrode 511) S and / or Plate 512 S Advantages of having such a MOSFET include, but are not limited to, significant improvements in both transmit and receive sensitivity (e.g., transmit and / or receive sensitivity increased by at least 2%, 5%, 10%, 25%, and / or 50%), a wider operating bandwidth (e.g., bandwidth increased by at least 2%, 5%, 10%, 25%, and / or 50%), harmonic suppression (e.g., harmonics can be suppressed by at least 2%, 5%, 10%, 25%, and / or 50%), reduced drive voltage (e.g., reduced by at least 2%, 5%, 10%, 25%, and / or 50%), and / or an improved electromechanical transformation ratio (e.g., an improvement of at least 2%, 5%, 10%, 25%, and / or 50%).

[0146] Various examples of CMUTs 510 including piston and shaped electrodes (e.g., bottom electrode 511 and / or plate 512) for improving both transmit and receive sensitivity are shown in Figures 7B-10D. A piston-based CMUT may include a piston plate including a mass piston 518 disposed on a plate 512, as shown in Figure 7A, for example. In some embodiments, the bottom electrode 511 includes a stepped portion 5113 that is a multiple profile step structure. S1, 7B, 9B, 21B, 23B, 25B, 27B, and elsewhere herein. Alternatively or additionally, a shaped bottom electrode 511 S The shaped bottom electrode 511 may include a sloped portion 5114 that is a sloped structure, as shown and described with reference to FIGS. 1, 7C, 9C, 21C, 23C, 25C, 27C, and elsewhere herein. The sloped portion 5114 may include one, two, or more similar and / or different materials, such as silicon. In some embodiments, the sloped portion 5114 includes a material similar to the substrate 511. The sloped portion 5114 may include a maximum thickness such that the slope 5114 is close to, but does not fully contact, the plate 512 at maximum deflection. The sloped portion 5114 may include a width that is at least 10% or 20% of the length of the major axis of the cavity 513. The sloped portion 5114 may include a maximum height that is at least 30%, 20%, or 10% of the gap height of the cavity 513. In some embodiments, the shaped bottom electrode 511 may include a width that is at least 10% or 20% of the length of the major axis of the cavity 513. The sloped portion 5114 may include a width that is at least 10% or 20% of the length ... S includes curved portion 5115, which is a curved structure, as shown and described with reference to FIGS. 1, 7D-7E, 9D-9E, 21D-21E, 25D-25E, 27D-27E, and elsewhere herein. The profile of curved portion 5115 can be derived from (e.g., configured to resemble) the shape of a deflected flat plate driven with a large DC bias or a large AC excitation signal. Curved portion 5115 can include a curvature that approximates the curvature of the deflection profile of plate 512. Curved portion 5115 can include a height that is at least 2%, 5%, or 10% of the gap height of cavity 513.

[0147] In some embodiments, the lower electrode 511 (e.g., electrode 511 S) is constructed and arranged to contact plate 512 at an edge of CMUT 510, e.g., at contact region 5116, as shown in Figures 7E, 9E, 21E, 23E, and 25E. The area associated with contact region 5116 depends on the magnitude of the voltage applied to CMUT 510. The curvature of curved portion 5115 can be constructed and arranged (e.g., optimized) to improve receive sensitivity (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase in sensitivity) by increasing the drive voltage above the pull-in voltage. For example, during deflection of plate 512, plate 512 gradually comes into contact with curved portion 5115, causing the deflectable portion of plate 512 to gradually contract, increasing the spring constant of plate 512 and increasing the pull-in voltage.

[0148] In some embodiments, the CMUT 510 includes a shaped plate 512 S The CMUT 510 includes a piston-based CMUT having a formed plate 512 including a stepped portion 5123, as shown in FIG. S In some embodiments, the CMUT 510 may include a shaped plate 512 that includes an angled portion 5124, as shown in FIG. S In some embodiments, the CMUT 510 includes a shaped plate 512 including a curved portion 5125, as shown in FIG. S The profile of the curved portion 5125 may be derived from (e.g., configured to resemble) the shape of a deflected flat plate driven with a large DC bias or a large AC excitation signal. In some embodiments, the shaped plate 512 including the curved portion 5125 Scan contact the bottom electrode 511 at a contact region 5126, shown in Figures 4E, 5D, 8D, 10D, 22D, 24D, 26D, 27E, and 28D. The curvature of the curved portion 5125 can be constructed and arranged (e.g., optimized) to improve receive sensitivity by increasing the drive voltage above the pull-in voltage, as described herein (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase in sensitivity). The area associated with the contact region 5126 depends on the magnitude of the voltage applied to the CMUT 510.

[0149] A CMUT 510 configuration according to the present inventive concept, including a piston and shaped electrodes, can be operated in collapse mode, for example, as shown in Figures 9A-10D, which illustrate a CMUT 510 in collapse mode having a configuration similar to Figures 7B-8D, respectively.

[0150] In some embodiments, the shaped electrode 511 S comprises a conductive material. Piston 518 (e.g., a piston attached to plate 512) can comprise either a conductive material or an insulating material. Compared to conventional planar plate and planar electrode component configurations (e.g., as shown in FIG. 7A ), the most active area having the strongest electric field can be increased by up to 50%, 75%, and / or 100% using the configurations shown in FIGS. 7B-10D , resulting in significant improvements in electromechanical coupling efficiency (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase), as described herein.

[0151] Applicant designed and simulated the performance of piston-based CMUTs with various shaped electrode configurations operating in conventional mode. The simulations used the following parameters: an operating frequency of 7.5 MHz, a plate 512 thickness of 1.5 μm, a plate 512 radius of 21 μm, and a gap height of 0.25 μm (e.g., to obtain an appropriate drive voltage, e.g., less than 200 V peak-to-peak). The piston width was set (e.g., optimized) to half the plate radius to provide the highest sensitivity without sacrificing bandwidth. In some embodiments, the piston 518 includes one or more dimensions as described with reference to FIG. 1 and / or elsewhere herein. The resonant frequency increases to 10 MHz with an increased piston-plate spring constant, and the pull-in voltage can increase by approximately 22% (e.g., at least a 5% and / or 10% increase). Figures 11A-11D show the transmit and receive sensitivities of various CMUT component configurations biased at a 90% pull-in voltage. FIG. 11A compares the transmit sensitivity of simulated CMUTs with various bottom electrodes 511. FIG. 11B compares the transmit sensitivity of simulated CMUTs with various plates 512. FIG. 11C compares the receive sensitivity of simulated CMUTs with various bottom electrodes 511. FIG. 11D compares the receive sensitivity of simulated CMUTs with various plates 512. Both the transmit and receive sensitivity can be increased by at least 50%, 75%, 100%, 125%, and / or 150% (e.g., as described below). A comparison of the maximum transient output voltage of CMUT component configurations using various electrodes 511(a) and various plates 512(b) is shown in FIG. 12. In the simulation, the shaped plate 512 S and molded electrode 511 SIt is shown that this component configuration can generate over 2.2 times the acoustic pressure while being driven with the same drive voltage. Figure 13 compares the electromechanical transformation ratio and DC bias voltage of various component configurations described herein. The DC bias voltage is set to 90% of the pull-in voltage. A conventional planar CMUT design without a piston has the lowest electromechanical transformation ratio and DC bias. Adding a piston significantly stiffens the plate, thereby increasing the pull-in voltage the most. However, adding a shaped electrode significantly reduces the DC but significantly improves the electromechanical transformation ratio (e.g., by at least 2%, 5%, 10%, 25%, and / or 50%). The curved electrode configuration has the best transformation ratio at the lowest DC bias, followed by the tilted electrode and the two-step electrode. The shaped plate configuration has a higher DC because the plate is stiffer than the sub-electrode.

[0152] FIG. 14A shows a simulation of deformation of a planar plate of a collapse mode CMUT, where the plate is biased at 100% pull-in voltage. FIG. 14B shows a close-up of the simulation of FIG. 14A. FIG. 15A shows a simulation of deformation of a planar piston plate of a collapse mode CMUT, where the plate is biased at 100% pull-in voltage. FIG. 15B shows a close-up of the simulation of FIG. 15A. FIG. 16A shows a simulation of deformation of a planar piston plate of a collapse mode CMUT including an electrode 511 with a sloped profile. FIG. 16B shows a close-up of the simulation of FIG. 16A.

[0153] 17A and 17B show graphs comparing the transmit and receive sensitivities of the conventional CMUT of FIG. 14A, the piston-based CMUT of FIG. 15A, and the piston-based CMUT of FIG. 16A including electrodes 511 with a sloped profile, respectively.

[0154] 18A-18C show simulations of the CMUTs of FIGS. 14A, 15A, and 16A, respectively, showing the maximum vibration position for each design relative to the equilibrium position.

[0155] FIG. 19 shows a graph comparing the transient acoustic output pressure of the CMUTs of FIGS. 14A, 15A, and 16A. FIG. 20 shows a table showing the percentage gains and losses of key characteristics of these CMUT designs. As shown, the resonant frequency of the piston-based CMUT of FIG. 15A is lower than that of the CMUT of FIG. 14A, but the transmit and receive sensitivities, as well as the maximum transient output pressure, are all increased. The piston-based CMUT of FIG. 16A, which includes electrodes 511 with a sloped profile, shows further improvements in these metrics and a reduction in pull-in voltage (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% reduction in pull-in voltage). The transmit and receive sensitivities of the CMUT 510 configurations of FIGS. 14A, 15A, and 16A are improved by more than 35% at approximately 50% excitation voltage, as shown.

[0156] 21A-28D, various cross-sectional views of CMUT components configured for airborne applications and including shaped plates and / or shaped bottom electrodes are shown consistent with the inventive concepts. The CMUT 510 shown may include components similar to the CMUT 510 described with reference to FIG. 1 and elsewhere herein, such as the illustrated components 511, 512, 513, 514, 515, 516, 517, and 518.

[0157] 21B to 21E show the ventilation hole 516 and the molded substrate 511. S 22A-22D show a CMUT 510 including a vent hole 516 and a shaped plate 512. S 23B-23E show a CMUT 510 including trenches 517 (e.g., four ring-shaped fluid channels passing through a dielectric film 514 in the substrate 511, as shown) and a molded substrate 511. S 24A-24D show a CMUT 510 including trenches 517 (e.g., four ring-shaped fluid channels passing through a dielectric film 514 in a substrate 511, as shown) and a shaped plate 512. S 25B-25E show a CMUT 510 including a vent 516, a piston 518, and a molded substrate 511. S26A-26D show a CMUT 510 including a vent 516, a piston 518, and a molded plate 512. S 27B-27E show a CMUT 510 including vent holes 516, trenches 517 (e.g., four ring-shaped fluid channels passing through the dielectric film 514 in the substrate 511 as shown), and a molded substrate 511. S 28A-28D show a CMUT 510 including vent holes 516, trenches 517 (e.g., four ring-shaped fluid channels passing through a dielectric film 514 in a substrate 511, as shown), and a shaped plate 512. S 5 shows a CMUT 510 including:

[0158] FIG. 21A shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a "through-vent via" (eg, a hole through the bottom electrode 511 as shown), a planar plate, and a planar bottom electrode.

[0159] 21B shows a CMUT 510 having an air-compatible conventional mode CMUT including a through-vent via, a planar plate, and a shaped bottom electrode including a stepped profile (e.g., including one or more "profile steps"). The CMUT 510 of FIG. 21B is mounted on a substrate 511. S a substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in Figure 21B.

[0160] FIG. 21C shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a vent through via, a flat plate, and a shaped bottom electrode that includes a sloped profile.

[0161] FIG. 21D shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a vent through via, a flat plate, and a shaped bottom electrode that includes a curved profile.

[0162] FIG. 21E shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a vent through via, a planar plate, and a shaped bottom electrode that includes a curved profile, where the edge of the bottom electrode contacts the edge of the plate (e.g., insulating film 514 contacts the edge of plate 512).

[0163] 22A shows a CMUT 510, which includes an air-compatible conventional mode CMUT that includes a vented through via and a shaped plate with a stepped profile. S Includes plate 512 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0164] FIG. 22B shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias and a shaped plate that includes a sloped profile.

[0165] FIG. 22C shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias and a shaped plate that includes a curved profile.

[0166] FIG. 22D shows a CMUT 510 including an air-compatible conventional mode CMUT including a vent through via and a shaped plate including a curved profile, with the edge of the plate contacting the edge of the bottom electrode (e.g., the edge of plate 512 contacts an insulating film 514 disposed on the bottom electrode 511).

[0167] FIG. 23A illustrates a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluidic channels, a planar plate, and a planar bottom electrode consistent with the concepts of the present invention.

[0168] 23B shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluidic channels, a planar plate, and a shaped bottom electrode with a stepped profile. S a substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in Figure 23B.

[0169] FIG. 23C shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluidic channels, a planar plate, and a shaped bottom electrode with a sloped profile.

[0170] FIG. 23D shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluidic channels, a planar plate, and a shaped bottom electrode with a curved profile.

[0171] FIG. 23E shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a vent through-via, a fluidic channel, a planar plate, and a shaped bottom electrode with a curved profile, with the edge of the bottom electrode contacting the edge of the plate (e.g., insulating film 514 contacting the edge of plate 512).

[0172] 24A shows a CMUT 510, which includes an air-compatible conventional mode CMUT that includes vent through vias, fluid channels, and a shaped plate with a stepped profile. S Includes plate 512 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0173] FIG. 24B shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluid channels, and a shaped plate with a sloped profile.

[0174] FIG. 24C shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes vent through vias, fluid channels, and a shaped plate with a curved profile.

[0175] FIG. 24D shows a CMUT 510 that includes an air-compatible conventional mode CMUT that includes a vent through via, a fluid channel, and a shaped plate with a curved profile, with the edge of the plate contacting the edge of the bottom electrode (e.g., the edge of plate 512 contacting an insulating film 514 disposed on the bottom electrode 511).

[0176] FIG. 25A shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vent-through via, a planar plate, and a planar bottom electrode.

[0177] 25B shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vented through-via, a planar plate, and a shaped bottom electrode with a stepped profile. S a substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in Figure 25B.

[0178] FIG. 25C shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vent through-via, a planar plate, and a shaped bottom electrode with a sloped profile.

[0179] FIG. 25D shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vent through-via, a planar plate, and a shaped bottom electrode with a curved profile.

[0180] FIG. 25E shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vent through-via, a planar plate, and a shaped bottom electrode with a curved profile, with the edge of the bottom electrode contacting the edge of the plate (e.g., insulating film 514 contacting the edge of plate 512).

[0181] 26A shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vented through-via and a molded plate with a stepped profile. S Includes plate 512 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0182] FIG. 26B shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias and a molded plate with a sloped profile.

[0183] FIG. 26C shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias and a shaped plate with a curved profile.

[0184] FIG. 26D shows a CMUT 510 including an air-compatible piston-based conventional mode CMUT including a vent through via and a shaped plate with a curved profile, with the edge of the plate contacting the edge of the bottom electrode (e.g., the edge of plate 512 contacting an insulating film 514 disposed on the bottom electrode 511).

[0185] FIG. 27A illustrates a CMUT 510 that includes an air-compatible, piston-based, conventional mode CMUT that includes vent-through vias, fluidic channels, a planar plate, and a planar bottom electrode consistent with the concepts of the present invention.

[0186] 27B shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through vias, fluidic channels, a planar plate, and a shaped bottom electrode with a stepped profile. The CMUT 510 of FIG. 27B is mounted on a substrate 511. S a substrate 511 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5113, which includes ring-shaped steps 5113a and 5113b. In some embodiments, one or more of the steps 5113 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of cavity 513). In some embodiments, the CMUT 510 includes a substrate 511 with three, four, or more steps. S In some embodiments, insulating film 514 covers the horizontal and / or vertical surfaces of one, two, or more stepped portions 5113, although only the horizontal surfaces are shown covered in Figure 27B.

[0187] FIG. 27C shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias, fluidic channels, a planar plate, and a shaped bottom electrode with a sloped profile.

[0188] FIG. 27D shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias, fluidic channels, a planar plate, and a shaped bottom electrode with a curved profile.

[0189] FIG. 27E shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes a vent through-via, a fluid channel, a planar plate, and a shaped bottom electrode with a curved profile, where the edge of the bottom electrode contacts the edge of the plate (e.g., insulating film 514 contacts the edge of plate 512).

[0190] 28A shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through vias, fluid channels, and a molded plate with a stepped profile. S Includes plate 512 S As shown, the CMUT 510 has a stepped profile including two steps, namely, step 5123, which includes ring-shaped steps 5123a and 5123b. In some embodiments, one or more of the steps 5123 include different shapes, such as oval, rectangular, triangular, and / or other shapes (e.g., shapes similar to the shape of the cavity 513). In some embodiments, the CMUT 510 includes a plate 512 with three, four, or more steps. S Includes:

[0191] FIG. 28B shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias, fluid channels, and a shaped plate with a sloped profile.

[0192] FIG. 28C shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias, fluid channels, and a shaped plate with a curved profile.

[0193] FIG. 28D shows a CMUT 510 that includes an air-compatible piston-based conventional mode CMUT that includes vent through-vias, fluid channels, and a shaped plate with a curved profile, with the edge of the plate contacting the edge of the bottom electrode (e.g., the edge of plate 512 contacting an insulating film 514 disposed on the bottom electrode 511).

[0194] The bandwidth of a vacuum-based CMUT (e.g., a vacuum-based CMUT as shown in FIG. 4A ) is limited by resistance from the air medium when operating in air (e.g., when used in airborne applications). In some embodiments, to increase the operating bandwidth, a squeeze film damping is introduced by venting the vacuum cavity. In some embodiments, a trench 517, including one or more fluid trenches or other pathways, can be included to significantly increase the bandwidth while simultaneously increasing sensitivity and reducing the drive voltage. In some embodiments, trench 517 is included in combination with a shaped electrode (e.g., electrodes 511 and / or 512), which further increases sensitivity (e.g., at least 2%, 5%, 10%, 25%, and / or 50% sensitivity increase) and further reduces the drive voltage (e.g., at least 2%, 5%, 10%, 25%, and / or 50% voltage reduction). A shaped electrode (e.g., shaped electrode 511 S and / or forming plate 512 S Advantages of having both the CMUT and the trench 517 include, but are not limited to, a wide operating bandwidth, such as 2% to 200%, easy control of the bandwidth by adjusting the height of the trench 517, very low drive voltage, e.g., as low as 50 V, such as a maximum of 10 V or 5 V, high transmit and receive sensitivity, and / or simplified packaging and housing (e.g., by using a PCB). Advantages of having a piston-based CMUT (e.g., including one or more pistons 518) also include an increase in output acoustic pressure (e.g., an increase of at least 2%, 5%, 10%, 25%, and / or 50%).

[0195] 29A-29D, top views of a portion of a CMUT component including various patterns of fluidic trenches consistent with the concepts of the present invention are shown. In FIG. 29A, the CMUT 510 includes trench 517 with a ring-shaped fluidic trench as shown. In FIG. 29B, the CMUT 510 includes trench 517a with trenches arranged to surround an array of micropillars, i.e., micropillars 5171, as shown. Micropillars 5171 may include a major axis (e.g., diameter) that is 5%, 10%, or 20% or less of the major axis (e.g., diameter) of cavity 513. In FIG. 29C, the CMUT 510 includes trench 517b with trenches arranged in a fan-shaped pattern as shown. In FIG. 29D, the CMUT 510 includes trenches 517b, which include a hybrid set of trenches, respectively including trenches 517a surrounding an array of micropillars 5171 located near the center of the CMUT 510 and fan-shaped trenches 517b located on the periphery of the CMUT 510, as shown. A gas squeeze film is introduced when the cavity is vented by a through via (e.g., vent hole 516 described herein) and is controlled by the fluid trenches. The fluid trenches of trenches 517 control the bandwidth by adjusting the stiffening and damping effects of the squeeze film, where the stiffening effect acts as a spring and the damping effect represents a damper. The illustrated patterns and / or combinations of these patterns can effectively adjust the stiffening and damping effects of the squeeze film while simultaneously lowering the pull-in voltage by increasing the area of ​​the electrodes on the substrate. Because the displacement of the plate 512 varies from zero at its edges to a maximum at its center, different regions of the plate 512 contribute differently to the output pressure and damping of the CMUT 510. The micropillars 5171 may include smaller pillars near the center of the CMUT 510, and the relative trench area may be larger near this center (e.g., if the displacement of the plate 512 is large, more trench area is needed to counteract the stiffening effect of the squeeze film).The micropillars 5171 can be larger near the edges of the CMUT 510 where the displacement of the plates 512 is smaller, thus requiring less trench area and allowing more area to be allocated to the electrodes on the micropillars 5171.

[0196] 30A-30Y, various charts and graphs of CMUT output power and other performance characteristics consistent with the inventive concepts are shown. Applicant has performed analyses of various airborne CMUT component configurations described herein. The results of these analyses are shown and discussed below.

[0197] Analysis performed by applicant indicates that airborne CMUT component configurations may include shaped electrodes and / or fluidic trenches to significantly broaden the operating bandwidth of airborne CMUTs and reduce drive voltages while improving transmit and receive sensitivity, as discussed above. The bandwidth of vacuum-based CMUTs is limited by the small resistance from the air medium. In some embodiments, a CMUT (e.g., CMUT 510 described herein) includes squeeze film damping and fluidic trenches (e.g., trench 517) configured to allow a tradeoff between sensitivity and bandwidth by design. The advantages of having shaped electrodes and fluidic trenches are described herein.

[0198] Various examples of airborne CMUTs 510 with shaped electrodes and / or fluid trenches to improve both transmit and receive sensitivity are shown in Figures 21A-28D. In some embodiments, the CMUT 510 includes an air vent 516, which includes one or more vias, such as one or more vias that pass through the bottom electrode 511 between the cavity 513 and the medium surrounding the CMUT 510. In some embodiments, the vias may be located near the center of the CMUT 510 and / or the one or more vias may be located near the edge of the CMUT 510. The location and distribution of the one or more vias may be configured to optimize performance.

[0199] The air-compatible CMUT may include vent holes 516 through a planar bottom electrode 511, as shown, for example, in FIG. 21A. In some embodiments, the bottom electrode 511 may be an electrode 511 including multiple profile step structures (e.g., two profile step structures), as shown in FIG. 21B. S 21C, the shaped bottom electrode 511 includes a stepped portion 5113 and a vent hole 516. In some embodiments, as shown in FIG. S The shaped bottom electrode 511 includes a sloped portion 5114 and a vent hole 516. S 21D, may include curved portions 5115 and vent holes 516. The profile of curved portions 5115 may be derived from (e.g., set similar to) the deflected shape of a flat plate driven with a large DC bias or a large AC excitation signal.

[0200] In some embodiments, a shaped bottom electrode 511 including a curved portion 5115 and vent holes 516 S21E, the curved portion 5115 contacts the plate 512 at an edge of the CMUT 510, e.g., at a contact region 5116. The curvature of the curved portion 5115 can be constructed and arranged (e.g., optimized) to improve receiver sensitivity by increasing the drive voltage above the pull-in voltage (e.g., by at least a 2%, 5%, 10%, 25%, and / or 50% increase). For example, during deflection of the plate 512, the gradual contact of the plate 512 with the curved portion 5115 causes the plate 512 to gradually contract, increasing the spring constant of the plate 512 and increasing the pull-in voltage. In some embodiments, as shown in FIG. 22A, the plate 512 includes a stepped portion 5123 and the bottom electrode 511 includes a vent hole 516. As shown in FIG. 22B, the plate 512 can include a sloped portion 5124 and the bottom electrode 511 includes a vent hole 516. In some embodiments, as shown in FIG. 22C , the plate 512 includes a curved portion 5125, and the bottom electrode 511 includes a vent hole 516. The profile of the curved portion 5125 can be derived from (e.g., configured to resemble) the shape of a deflected flat plate driven with a large DC bias or a large AC excitation signal. In some embodiments, the plate 512 with the curved portion 5125 can be contacted with an insulating film 514 on the bottom electrode 511 at a contact region 5126, as shown in FIG. 22D , and the curvature of the curved portion 5125 can be constructed and arranged (e.g., optimized) to improve receive sensitivity (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% sensitivity increase) by increasing the drive voltage above the pull-in voltage, as described herein. In some embodiments, the bottom electrode 511 can include a trench 517 (e.g., made by an etching process), where the trench 517 is configured to tune the attenuation of the squeeze film. CMUT 510 configurations including trenches 517 are shown in Figures 23A-24D. The configurations shown in Figures 23A-24D may be similar to the configurations shown in Figures 21A-22D, respectively, and may include similar shaped electrodes, as described herein. CMUTs 510 including piston-based CMUTs, each including a piston 518, are shown in Figures 25A-28D.The configurations shown in Figures 25A-28D may be similar to the configurations shown in Figures 21A-24D, respectively, and may include similar shaped electrodes, vent holes, and / or fluid trenches, as described herein.

[0201] Applicant has designed and simulated the performance of airborne CMUTs including various configurations, as described herein. The simulations used the following parameters: an operating frequency of 100 kHz, a plate 512 thickness of 50 μm, a plate 512 radius of 1500 μm, and a gap height as small as 1 μm. The simulations used a shaped electrode (shaped electrode 511 S and / or forming plate 512 S It has been shown that using a gap height of 100 .mu.m or less (e.g., greater than 1 μm) reduces the pull-in voltage by approximately 70%. With the inclusion of the trench 517, the pull-in voltage remains low. The stress on the substrate caused by the squeeze film damping is reduced by a factor of 50, and the squeeze film damping begins to dominate the dynamic behavior of the CMUT 510. However, the bandwidth may be broadened by at least 30% based on the height of the trench 517 of the associated CMUT 510. The transmit and / or receive sensitivity may also be improved (e.g., at least 2%, 5%, 10%, 25%, and / or 50% sensitivity increase) by placing the gap height in the sub-micrometer range (e.g., less than 1 μm). Simulations have also shown that the bandwidth may be readily broadened by up to 30% based on the height of the trench 517 of the associated CMUT 510, e.g., trench heights greater than 1 μm and / or less than 100 μm. In configurations with lower gap heights, the bandwidth may exceed 150%. Simulations performed by applicants have shown that various CMUT 510 configurations described herein can reduce drive voltages down to 10 V, which is impractical to achieve in standard configurations. For example, the pull-in voltage of a CMUT in a planar configuration was measured at 32.8 V, while a stepped profile configuration achieved a 40% reduction in pull-in voltage (19.7 V), a tilted configuration achieved a 59% reduction in pull-in voltage (13.4 V), and a curved configuration achieved a 67% reduction in pull-in voltage (10.8 V).

[0202] FIG. 30A shows the shape of a deflected planar plate biased at 90% pull-in voltage.

[0203] FIG. 30B shows the squeeze film pressure on the substrate for a standard planar electrode vented CMUT without a fluidic trench.

[0204] FIG. 30C shows a front view of trench 517 including a fluidic trench for a CMUT 510 including a standard planar electrode CMUT.

[0205] FIG. 30D shows a cross-sectional view of a fluidic trench for a standard planar electrode CMUT.

[0206] FIG. 30E shows a graph of the squeeze film pressure on the substrate of a vented CMUT with a standard planar electrode and a ring-shaped fluidic trench. The pull-in voltage of the related configuration was measured at 34.34 V. For the CMUT 510 with a ring-shaped fluidic trench for adjusting the squeeze film, the pressure on the substrate is reduced by more than 50 times compared to a similar design without a fluidic trench. Optimizing the distribution of the fluidic trench uniforms the pressure on the substrate, increasing the area of ​​the electrode, increasing the effective capacitance, and reducing the pull-in voltage.

[0207] FIG. 30F shows the shape of a deflected two-profile step plate biased at 90% pull-in voltage.

[0208] FIG. 30G shows a graph of squeeze film pressure on the substrate of a vented CMUT with two-profile step electrodes and no fluidic trench.

[0209] FIG. 30H shows a front view of trench 517 including a fluidic trench for CMUT 510 including a two-profile step electrode CMUT.

[0210] FIG. 30I shows a cross-sectional view of a fluidic trench in a two-profile step-electrode CMUT.

[0211] FIG. 30J shows a graph of the squeeze film pressure on the substrate of a vented CMUT with a two-profile step electrode and fluidic trench. The pull-in voltage of the related configuration was measured at 22.85 V, which is 33% lower than the pull-in voltage of the standard planar electrode design. As mentioned above, for the CMUT 510 with a ring-shaped fluidic trench for adjusting the squeeze film, the pressure on the substrate is nearly 50 times lower than that of a similar design without a fluidic trench. Optimizing the distribution of the fluidic trench to uniformly distribute the pressure on the substrate can increase the area of ​​the electrode and increase the effective capacitance.

[0212] FIG. 30K shows the shape of the deflected plate with the tilt electrode biased at 90% pull-in voltage.

[0213] FIG. 30L shows a graph of squeeze film pressure on the substrate of a graded electrode vented CMUT without a fluidic trench.

[0214] FIG. 30M shows a front view of a trench 517 containing a fluidic trench of a CMUT 510 containing a graded electrode CMUT.

[0215] FIG. 30N shows a cross-sectional view of a fluidic trench in a graded electrode CMUT.

[0216] Figure 30O shows a graph of the squeeze film pressure on the substrate of a graded-electrode vented CMUT with a fluidic trench. The pull-in voltage of the related configuration was measured at 17.03 V, which is 50% lower than the pull-in voltage of a standard planar electrode design. By adding and optimizing the ring-shaped fluidic trench to tune the squeeze film, the pressure on the substrate is 65 times lower than that of a similar design without a fluidic trench.

[0217] FIG. 30P shows the shape of the deflected plate with the curved electrodes biased at 90% pull-in voltage.

[0218] FIG. 30Q shows a graph of squeeze film pressure on the substrate of a curved electrode vented CMUT without a fluidic trench.

[0219] FIG. 30R shows a front view of trench 517 including a fluidic trench of CMUT 510 including a curved electrode CMUT.

[0220] FIG. 30S shows a cross-sectional view of a fluidic trench in a curved electrode CMUT.

[0221] Figure 30T shows a graph of the squeeze film pressure on the substrate of a curved-electrode vented CMUT with a fluidic trench. The pull-in voltage of the related configuration is 14.49 V, which is 56% lower than the pull-in voltage of the standard planar electrode design. By adding and optimizing the ring-shaped fluidic trench to tune the squeeze film, the pressure on the substrate is over 60 times lower than that of a similar design without a fluidic trench.

[0222] Figure 30U compares the transmit sensitivity of various electrode shapes for a vented CMUT.

[0223] Figure 30V compares the receiver sensitivity of various electrode shapes for a CMUT with air holes.

[0224] FIG. 30W compares the transmit sensitivity of various electrode geometries for a vented CMUT with a fluidic trench.

[0225] FIG. 30X compares the receive sensitivity of various electrode geometries for a vented CMUT with a fluidic trench.

[0226] Figure 30Y compares the transmit sensitivity and bandwidth of CMUTs with varying fluidic trench heights and a DC bias of 90% pull-in voltage. The bandwidth is broadened by introducing a squeeze film and controlled by optimizing the fluidic trench to adjust the damping and stiffening effects of the squeeze film. The bandwidth can be adjusted over a wide range by adjusting the trench height, simplifying the design, optimization, and fabrication of wide-bandwidth airborne CMUTs 510. In some embodiments, the trenches 517 of the present inventive concept include one or more trenches with a height (e.g., depth) of at least 1 μm, or 2 μm, and / or a height of 15 μm, 20 μm, 30 μm, or 40 μm or less.

[0227] Referring now to FIG. 31 , a cross-sectional view of an embodiment of a CMUT with a shaped dielectric consistent with the concepts of the present invention is shown. The CMUT 510 of FIG. 31 can be similar in structure and configuration to the CMUT 510 described in FIG. 1 and elsewhere herein. The CMUT 510 can include a bottom electrode 511 having a dielectric film 514 and a support 515 disposed thereon. As shown in FIG. 31 , the support 515 and the dielectric film 514 can include one or more similar materials, such as silicon dioxide. A plate 512 is disposed on the support 515, and a cavity 513 is formed between the dielectric film 514 and the plate 512. The plate 512 can include a multi-layer structure, as shown, for example, a structure including a first conductive film 5121 a including a conductive material (e.g., doped silicon) and a second conductive film 5121 b including another conductive material (e.g., aluminum). Alternatively, the plate 512 can include a single-layer structure (e.g., a single layer of doped silicon). The dielectric film 514 may include a non-planar shape (e.g., a contoured shape described herein), for example, a shape in which the edges of the dielectric film 514 are thicker than the center (e.g., closer to the plate 512). The shape of the dielectric film 514 may be selected to optimize the capacitance of the CMUT 510 (e.g., while avoiding impeding the movement of the plate).

[0228] The capacitance of a parallel plate capacitor is expressed as: C=εr ε0A / d where A is the plate area, d is the plate spacing, and ε r is the relative dielectric constant of the dielectric film 514, and ε is the vacuum dielectric constant. The thickness of the vacuum layer is d0, and the thickness of the dielectric film 514 is d ins , and the relative permittivity ε between the plates r For a capacitor with , the effective gap height may be defined as: d eff =d0+d ins / ε r Therefore, the capacitance is: C=ε0A / d eff

[0229] 31A, a schematic diagram illustrating the capacitance of a CMUT consistent with the concepts of the present invention is shown. CMUT 510 of FIG. 31A includes a shaped dielectric film 514. S and a cavity 513. The CMUT 510 can be modeled as a series of multiple parallel plate capacitors, as shown in Figure 31A. In the case of a planar bottom electrode 511, a planar dielectric film 514 (not shown), and a planar plate 512, d0 + d ins is constant across the cavity area in this model CMUT 510 when the plates are undeflected. In some embodiments, the capacitance C of a segment (e.g., an edge segment) of the CMUT 510 varies with the effective gap height d eff (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase). For example, the shaped dielectric film 514 in the segment of the CMUT 510 S By increasing the thickness of ins increases, d0 decreases, and ε r >1 (e.g., for silicon dioxide, ε r =3.8), the effective gap height d eff decreases.

[0230] 31B and 31C, cross-sectional views of various CMUT components including shaped dielectric films consistent with the concepts of the present invention are shown. S (e.g., a dielectric film 514 containing one or more profile steps) S ) is shown. FIG. 31C shows a CMUT 510 including a curved dielectric film 514 S In some embodiments, the CMUT 510 includes a curved dielectric film 514. S The shape of approximating the profile of plate 512 when plate 512 is fully deflected.

[0231] The CMUT 510 of FIGS. 31A-31C, and other CMUTs 510 described herein, includes a shaped plate 512. S , while also including a non-shaped (e.g., planar) bottom electrode 511. Advantages of this configuration include, but are not limited to, a simplified manufacturing process (e.g., by eliminating the need to etch the bottom electrode 511 to form a contoured or other non-planar shape or by eliminating the need to place an additional curved support layer for the electrode 511) and / or fabricating all or a portion of the CMUT 510 directly on the integrated circuit (e.g., when the electrode 511 cannot be etched). Avoiding a shaped electrode for the electrode 511 avoids limitations on how close the bottom electrode 511 can be to the plate 512 near the edge of the CMUT 510 (e.g., because a sufficiently thick dielectric film 514 is required between the electrode 511 and the plate 512) to prevent dielectric breakdown.

[0232] 32, there is shown a cross-sectional view of a CMUT including a multi-layer dielectric consistent with the concepts of the present invention. The CMUT 510 of FIG. 32 includes a dielectric film 514 including a first portion 5141 and a second portion 5142. SFirst portion 5141 may include a thickness determined such that the maximum electric field experienced by the dielectric during operation is at least a certain percentage of the dielectric strength, e.g., at least 15%, 22%, or 30% of the dielectric strength of the dielectric film, and / or at least 40%, 50%, 60%, 70%, 77%, or 85% of the dielectric strength of the dielectric film. First portion 5141 may include one, two, or more different materials, e.g., similar and / or different materials such as silicon oxide and / or silicon nitride. Second portion 5142 may include a thickness determined such that corners of portion 5142 do not contact plate 512 when plate 512 is fully deflected. Second portion 5142 may include one, two, or more different materials, e.g., similar and / or different materials such as silicon nitride, hafnium oxide, zirconium silicate, hafnium silicate, and / or zirconium dioxide. First portion 5141 can include a first material having a first k-value and a first dielectric strength. First portion 5141 can be disposed between bottom electrode 511 and plate 512. Second portion 5142 can include a second material having a second k-value higher than the first k-value of first portion 5141, e.g., a k-value greater than 3.8, and a second dielectric strength. Second portion 5142 can be disposed near the edge of plate 512, as shown. In some embodiments, the second material of second portion 5142 includes a dielectric material having a high k-value, such as a k-value greater than 3.8, such as a dielectric material selected from the group consisting of hafnium oxide, zirconium silicate, hafnium silicate, zirconium dioxide, and combinations thereof. The first material of first portion 5141 can include a dielectric material with a relatively low k-value, such as a dielectric material selected from the group consisting of silicon nitride, silicon oxide, and combinations thereof. In some embodiments, dielectric film 514 S In some embodiments, the film 514 comprises a single material, including a dielectric material having a high k value, such as a k value greater than 3.8. S may be deposited using atomic layer deposition (e.g., deposited on the bottom electrode 511 in a CMUT manufacturing process). The portion of the CMUT 510 that includes the second portion 5142 of the insulating film isr The larger the value, the greater the effective gap height d eff may include a larger capacitance C (e.g., at least 2%, 5%, 10%, 25%, and / or 50% larger capacitance) because .

[0233] 32, as well as other CMUTs 510 described herein, may include a multilayer dielectric film 514, such as where a first layer includes a high-k dielectric film disposed on a second layer including silicon dioxide. Such an arrangement may provide numerous advantages. For example, a material with high dielectric strength but low dielectric constant may be used as the bottom layer to prevent breakdown, while a material with high dielectric constant but low dielectric strength may be used as the top layer to provide increased capacitance at the edge of the CMUT 510 (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase).

[0234] Referring now to Figure 33, a sequence of steps in a method for fabricating a CMUT with a stepped profile dielectric film consistent with the concepts of the present invention is shown. In step A, oxide is dispensed onto a silicon wafer (bottom electrode 511), for example via low pressure chemical vapor deposition (LPCVD). In step B, the oxide deposited in step A is patterned as shown. In step C, an additional oxide film is dispensed and etched again, as shown in step D. In step E, another oxide film is dispensed. The resulting oxide shape of steps A-E is the stepped profile dielectric film 514. S (e.g., a dielectric film 514 including one or more profile steps) and a support 515. In step F, an SOI wafer ("silicon on insulator" wafer) is bonded to the support 515 along with a device layer formation plate 512. In some embodiments, one or more additional deposition profile steps and / or etch profile steps may be repeated to form one or more "profile steps" and / or other desired topographical features in the dielectric film 514.

[0235] Referring now to FIG. 34 , a sequence of steps for a method of fabricating a CMUT with a stepped-profile bottom electrode and a stepped-profile dielectric film consistent with the inventive concepts is shown. In step A, oxide is dispensed onto a silicon wafer (bottom electrode 511), for example, via LPCVD. In step B, the oxide deposited in step A is patterned as shown. In step C, additional oxide is applied, and in step D, it is etched again. In step E, a thermal oxidation process is performed to oxidize a portion of the silicon wafer, increasing the oxide thickness while simultaneously creating the stepped profile of the silicon layer shown in the figure. In step F, the SOI wafer is bonded to a support 515, and the handle and buried oxide are removed to form plate 512. In some embodiments, one or more additional deposition steps (such as thermal oxidation steps) and / or etching steps may be repeated to form one or more profile steps and / or other desired topographical features in dielectric film 514. Alternatively or additionally, one or more etching-based processes may be used to modify the profile of one or more components of CMUT 510.

[0236] 35A-35D, cross-sectional views of analyzed CMUT configurations consistent with the inventive concepts are shown, along with graphs of transmit and receive sensitivity for the illustrated CMUT configurations. Applicants have performed finite element analysis of various CMUT configurations. A standard CMUT component (shown in FIG. 35A) was analyzed, and a molded dielectric film 514 S (shown in FIG. 35B). Both CMUT configurations are radially symmetric (e.g., the CMUT is circular). The CMUT has a shaped dielectric film 514 SThe CMUTs are identical in all respects except for the presence of an additional molded dielectric material in the arrangement. Each analyzed CMUT includes a plate, cavity, dielectric film, and bottom electrode, as shown in the figure. The plate 512 of each CMUT 510 includes three layers (listed from bottom to top): a 1.1 μm thick highly doped silicon layer, a 250 nm thick aluminum layer, and a 100 nm thick silicon nitride layer. The gap height at the center of each cavity 513 is 275 nm. The dielectric film 514 includes silicon dioxide with a thickness of 150 nm at the center of the CMUT. The molded dielectric CMUT (shown in Figure 35B) additionally has two profile steps of dielectric material on top of the base 150 nm layer (see figure). The first profile step begins at a radius of 9 μm and is 75 nm high. The second profile step begins at a radius of 15 μm and is 175 nm high. The top plate of each CMUT forms the top electrode (eg, plate 512) and the highly doped silicon substrate forms the bottom electrode (eg, electrode 511).

[0237] Both of the above CMUT 510 configurations have the same dimensions of the plate 512 and therefore the same resonant frequency. These CMUT 510 configurations are configured to operate at 5 MHz in water. S includes a stepped profile, providing space for the same maximum possible plate 512 displacement as the standard component configuration, with plate 512 not contacting dielectric film 514. The standard CMUT configuration has a pull-in voltage of 100.4 V, but with the associated shaped dielectric film 514 S The configuration has a pull-in voltage of 83.0 V. A 17% reduction in pull-in voltage is advantageous because it lowers the voltage required to operate the CMUT and reduces the risk of dielectric breakdown.

[0238] In Figure 35C, a graph shows a comparison of the transmit sensitivity (pressure output per applied voltage) of the two CMUT configurations of Figures 35A and 35B. In both cases, a DC bias voltage equal to 80% of the pull-in voltage is applied. SThe arrangement provides a maximum transmit sensitivity 25% higher than the standard planar dielectric film 514 arrangement.

[0239] In Figure 35D, a graph shows a comparison of the receiver sensitivity (output current per incident voltage) of the two CMUT configurations of Figures 35A and 35B. In both cases, a DC bias voltage equal to 80% of the pull-in voltage is applied. S The arrangement results in a 25% increase in maximum receive sensitivity over the standard planar dielectric film 514 configuration. In a typical use (such as pulse-echo imaging), the improvement shown in Figures 35C and 35D represents a 56% increase in bidirectional sensitivity when comparing the CMUT configuration of Figure 35B to the CMUT configuration of Figure 35A.

[0240] The applicant has conducted a computer simulation to determine whether the shaped dielectric film 514 S We have discovered that CMUT 510 configurations including (as described herein) provide a strong "catch effect" for the plate when the plate displacement is large or when the device is operated in collapse mode. In other words, when the plate 512 is in contact with the dielectric film 514 (e.g., the dielectric film 514 includes a shape that approximates the deflected shape of the plate 512), S ), the force on plate 512 is greater than if dielectric film 514 were planar, as in the standard CMUT configuration. This discovery by applicants is advantageous for a number of reasons, as will be explained below.

[0241] For example, when operating in collapse mode, the device can be used with a low (e.g., very low) snapback voltage, so that collapse mode operation can be achieved at a very low DC bias voltage. For example, the snapback voltage can be less than 30%, 40%, 50%, or 60% of the pull-in voltage.

[0242] In another example, an electrically adjustable operating frequency with strong spring softening may be used.

[0243] In yet another example, the CMUT 510 can be configured as a two-state precharged component. The precharged CMUT 510 can include a built-in bias voltage, which is generated by trapping static electricity at a location between the top and bottom electrodes. Strong hysteresis due to the catch effect results in a lower snapback voltage, and the same DC bias voltage can be used for both conventional and collapsed modes of operation. The CMUT 510 can be switched between the two states by temporarily applying a voltage. Because the CMUT 510 has different center frequencies for the collapsed and conventional modes, this technique allows the same device to operate at two different frequencies. This can be useful, for example, for switching between a higher-frequency, short-range, high-resolution mode and a lower-frequency, long-range, low-resolution mode in airborne ultrasound applications.

[0244] In yet another example, a drive signal including half-wave excitation and / or unipolar pulses and a shaped dielectric film 514 S A combination of a CMUT 510 with a half-wave excitation may be used. For example, the drive signal may include a half-wave excitation arrangement such as that described in U.S. Patent Application Publication No. 20220152651A1. The catch effect reduces the maximum displacement as a percentage of the gap height the plate can withstand under conventional sine wave or square wave AC excitation. Half-wave excitation techniques may allow for greater gap utilization. For example, half-wave excitation may allow a greater force to be applied to the plate 512 before the plate 512 reaches its peak amplitude, at which point the force may be rapidly reduced to reduce the catch effect.

[0245] In yet another example, various dielectric films 514 S The profile of the shaped dielectric film 514 may be included to optimize sensitivity to pressure. Depending on the need for maximum transmit and receive sensitivity to pressure, a profile that is close to (e.g., matches) the deflection profile of the plate 512 may be included. SIn some cases, the mismatch may not be optimal. Some degree of mismatch may be beneficial to reduce the catch effect. Modeling performed by applicants has shown that dielectric films 514 with high k values, such as k values ​​greater than 3.8, S In a ring configuration, varying the inner radius of the ring changes the optimized performance between pressure (e.g., maximum pressure) and sensitivity. The ring of dielectric material can be placed in various locations to adjust the displacement profile of plate 512. Because the force on plate 512 is greater in the region where the dielectric ring is present, the force profile of plate 512 can be designed to adjust the displacement profile of the plate.

[0246] In yet another example, the dielectric constant constraint for the dielectric film 514 may be 3.8. r Increasing ε results in increased sensitivity (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase). r As ε is further increased, there is little additional gain in sensitivity, but the strength of the catch effect increases (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase). r can be used to improve sensitivity without excessively increasing the catch effect (at least 2%, 5%, 10%, 25%, and / or 50% increase in sensitivity). Useful improvements in transmit and / or receive sensitivity can be achieved by increasing ε r This can be achieved using common dielectric materials such as silicon oxide and silicon nitride, where ε is in the range of 3 to 6. Alternatively, r A dielectric with a dielectric constant greater than 6 may be used for part of the insulating film, with a low-k material forming the remainder of the insulating film.

[0247] In yet another example, the CMUT 510 may be configured to receive without transmitting, such as when used in an optoacoustic and / or thermoacoustic device (e.g., one or more CMUTs 510 are integrated into a device 100 configured to perform optoacoustic and / or thermoacoustic applications). In these embodiments, maximizing output pressure is not a design goal, and therefore the functionality of the CMUT 510 may be optimized (e.g., actively optimized) for high sensitivity. High sensitivity may be achieved by using a shaped dielectric film 514 with a high k value, e.g., a k value greater than 3.8. S In these embodiments, the gap height can be very low, such as at least less than 100 nm, but can have a fairly thick dielectric film 514, such as at least 100 nm. Also, in these embodiments, the CMUT 510 can be configured for low bias voltage operation (e.g., up to 20 V, up to 15 V, or up to 10 V), while achieving high receive sensitivity.

[0248] In yet another example, the CMUT 510 may be configured for use in airborne ultrasonic applications, such as those described herein, which may include ultrasonic flow measurement of gases, gesture sensing, obstacle sensing for automobiles and drones, and / or ultrasonic sensing of compressed gas leaks.

[0249] 36, a sequence of steps for a method of fabricating a CMUT including a shaped bottom electrode consistent with the inventive concepts is shown. In step A, a silicon wafer is shaped using localized oxidation as described herein. In step B, a support 515 is formed using localized oxidation. In step C, the support 515 is etched to define the edges of the CMUT 510 and create a shaped structure for the dielectric film 514. In step D, the dielectric film 514 is formed, for example, by thermal oxidation. After step D, the CMUT 510 can be completed using one or more bonding techniques, such as fusion bonding.

[0250] The CMUT 510 has a molded bottom electrode 511 S and molded dielectric film 514 SIn some embodiments, the CMUT 510 includes a thick support 515, for example, a support 515 that is thicker than the thickness of the insulating film 514 plus the maximum gap height of the CMUT 510 (e.g., the gap height at the center of the CMUT 510). Increasing the thickness of the support 515 can reduce the parasitic capacitance of the CMUT 510. The structure of the CMUT 510 can be configured to achieve the desired transmit and receive sensitivity while reducing the parasitic capacitance. As shown, a high-profile step of silicon material can be placed around the edges of the CMUT 510 (e.g., instead of the center of the CMUT 510). This placement allows for the shaped bottom electrode 511 to be positioned around the edges of the CMUT 510. S and support 515 (e.g., a thickened oxide support). In some embodiments, for example, as described herein, shaped electrode 511 S and / or molded dielectric film 514 S In some embodiments, including the embodiment of FIG. 36, the thickness of the support 515 is coupled to the gap height (e.g., the thickness of the support 515 is equal to the sum of the gap height and the thickness of the dielectric film 514). The method of FIG. 36 allows for an increased thickness of the support 515, for example, a thickness greater than 500 nm and / or a thickness of 2 μm or less. This increased thickness may reduce the parasitic capacitance of the support region (e.g., a reduction in parasitic capacitance of at least 2%, 5%, 10%, 25%, and / or 50%) and / or reduce the risk of dielectric breakdown. Parasitic capacitance reduces the receive sensitivity of the CMUT 510 by providing a parallel impedance to the circuit ground for the receive current. For the same reason, increasing the thickness of the support 515 may also increase power requirements when operating in transmit mode. The area of ​​the support 515 may contribute significantly to the parasitic capacitance, for example, if the support 515 is relatively thin. The method of FIG. 36 allows for very fine control of the gap height, making it possible to fabricate CMUTs 510 with small gap heights, e.g., gap heights less than 100 nm, for low voltage operation, e.g., less than 100 V.

[0251] Referring now to FIG. 37 , a sequence of steps for a method of forming a graded silicon layer consistent with the inventive concepts is shown. CMUT transducers, such as CMUT 510 described herein, can be fabricated using various microfabrication processes as described herein. The steps shown in FIG. 37 illustrate how a graded silicon layer can be fabricated using a LOCOS (Local Oxidation of Silicon) process and a graded silicon oxide mask. Step A shows the graded silicon oxide mask applied to an SOI wafer using, for example, LPCVD. After a thermal oxidation process in which the oxidation pattern correlates with the thickness of the silicon oxide mask, the silicon oxide is removed and the remaining SOI wafer contains a graded profile as shown in step B. This graded wafer can be incorporated into the fabrication of CMUT 510, as described herein, for example, as bottom electrode 511 and / or plate 512.

[0252] Referring now to FIG. 38, a series of steps for a method of forming a shaped silicon layer consistent with the inventive concepts is shown. The steps shown in FIG. 38 illustrate how a shaped silicon layer can be fabricated using a LOCOS process and a patterned oxide mask. Step A shows the patterned silicon oxide mask applied to an SOI wafer. After a thermal oxidation process in which the oxide pattern correlates with the thickness of the silicon oxide mask, the silicon oxide is removed and the remaining SOI wafer contains a shaped profile as shown in step B. This shaped wafer can be incorporated into the fabrication of a CMUT 510, as described herein, for example, as bottom electrode 511 and / or plate 512.

[0253] Referring now to FIG. 39, a series of steps for a method of fabricating a CMUT with a shaped plate consistent with the inventive concept is shown. The steps shown in FIG. 39 illustrate a method of fabricating a CMUT, such as the CMUT 510 described herein, using a sacrificial layer during the process. Step A shows a shaped (e.g., sloped as shown) sacrificial layer deposited on a silicon wafer and patterned as shown. In step B, a metal layer is applied, such as by evaporation and / or sputtering processes. In step C, the top of the metal layer is planarized, such as by chemical mechanical polishing (CMP). In step D, the sacrificial and metal layers are patterned to expose a portion of the wafer (e.g., an "anchor" region). In step E, a dielectric material is deposited over the assembly, with a portion of the deposited dielectric material anchored to the wafer at the anchor region, and the dielectric material extends over the entire top of the metal layer. In step F, the sacrificial layer is removed, and the plate 512, including the insulating film 5122 and the conductive film 5121, is peeled off from the bottom electrode 511. The supports 515 extend from the anchor regions to the sides of the plate 512 .

[0254] Referring now to FIG. 40 , a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention is shown. The steps shown in FIG. 40 illustrate a method of fabricating a CMUT, such as CMUT 510 described herein, using a multi-layer profile step oxide passivation film. In step A, a film of silicon oxide (the “oxide mask”) is applied to a silicon wafer, such as by thermal oxidation or LPCVD. In some embodiments, the thickness of the oxide mask is determined based on the desired profile step height resulting from the thermal oxidation of step D. In step B, photoresist is applied, such as by lithography, and the silicon oxide film is etched, such as by reactive ion etching (RIE), where the photoresist is not present. The thickness of the etched oxide mask can be configured to control the height of features created in the wafer. In step C, additional photoresist is applied, and the silicon oxide film is etched again. In step D, the assembly undergoes thermal oxidation, and the oxide mask retards oxidation of the silicon wafer based on the height of the mask. In step E, photoresist is applied, and the silicon oxide film is etched, such as by buffered oxide etching (BOE). In step F, a final thermal oxidation may be performed to form an insulating film (e.g., dielectric film 514) on the stepped profile silicon wafer. Step F may also be performed to form the stepped profile bottom electrode 511 of the CMUT 510 with the dielectric film 514 and the support 515. S A similar process can be used to fabricate stepped profile plate 512 as described herein. S can be produced.

[0255] Referring now to FIG. 41 , a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the inventive concepts is shown. The steps shown in FIG. 41 illustrate a method of fabricating a CMUT, such as CMUT 510 described herein, using selective oxidation. In step A, a silicon wafer is patterned as described with reference to FIG. 40 herein. The wafer includes multiple profile steps, and a silicon oxide film is disposed on the wafer, as shown. In step B, a silicon nitride film is applied, such as by LPCVD. In step C, photoresist is applied, and the silicon oxide and silicon nitride films are etched, as shown. In step D, the assembly undergoes thermal oxidation, and the stepped profile of the silicon wafer now includes a sloped profile, with each profile step having a gradual transition, as shown. In some embodiments, the transition length (e.g., slope) can be precisely controlled by controlling the thickness of the oxide passivation film and / or the oxidation time. In step E, the nitride film is removed, lithography is applied, and unmasked oxide film is removed, such as via BOE. In step F, a final thermal oxidation may be performed to form an insulating film (e.g., dielectric film 514) on the graded silicon wafer. Step F may also include the step of forming the graded bottom electrode 511 of the CMUT 510 with the dielectric film 514 and the support 515. S A similar process can be used to fabricate the sloping plate 512 as described herein. S can be produced.

[0256] Referring now to FIG. 42, a series of steps in a method for fabricating a CMUT with shaped plates consistent with the concepts of the present invention are shown. The steps shown in FIG. 42 illustrate a method for fabricating two CMUT cells, each including a shaped plate, such as CMUT 510 described herein. In step A, fabrication begins with an SOI wafer. In step B, two recesses (one for each CMUT) are created in the SOI wafer, as shown, by, for example, thermal oxidation and etching. In step C, thermal oxidation is performed to create an oxide layer, which is then etched to form the profile shown. Step C also illustrates the fabrication of a simple plate 512 containing a single level change (e.g., a single profile step).S Although a variety of shapes as described herein can be achieved, in step D, the silicon wafer is thermally oxidized to create a silicon oxide film, and the shaped SOI wafer is inverted and aligned with the silicon wafer. In step E, the two wafers are bonded, such as by fusion bonding. In step F, the handle layer and buried oxide of the SOI wafer are removed, such as by grinding and etching. In step G, openings are etched through the SOI wafer down to the silicon of the silicon wafer. In step H, aluminum is deposited and patterned to form an array of CMUTs 510a and 510b, two of which are shown. CMUTs 510a and 510b each have a shaped plate 512, as shown. S In some embodiments, additional steps may be performed, such as (additional) passivation steps, metal stacking (e.g., on bond pads), and / or other micro-fabrication steps as described herein.

[0257] Referring now to FIG. 43, a sequence of steps for a method of fabricating a top plate for a CMUT consistent with the inventive concepts is shown. The steps shown in FIG. 43 illustrate a method of fabricating two shaped plates for two CMUT cells, such as for two CMUTs 510 described herein, each plate including a profile of multiple profile steps. In step A, fabrication begins with an SOI wafer. In step B, a silicon oxide film and a silicon nitride film are deposited on the silicon layer of the SOI wafer, for example, by thermal oxidation and LPCVD, respectively. The oxide and nitride films may be patterned as shown. These films may include a mask for thermal oxidation. In step C, thermal oxidation is performed, consuming unmasked silicon in the SOI wafer. In step D, the oxide formed by thermal oxidation is removed. In step E, the oxide and nitride films are patterned again as shown. In step F, another thermal oxidation is performed. In step G, the oxide formed by thermal oxidation is removed. In step H, the oxide and nitride films are removed. In step I, thermal oxidation is performed to create an oxide film, which is then etched to separate the two plates 512.S An assembly as shown in the figure is formed.

[0258] In some embodiments, steps A to I of Figure 43 are replaced with steps A to C of Figure 42. The process shown in Figure 43 involves the steps of forming a plate 512 S Repeat the process steps to form two profile steps on the outline of plate 512. S 43. In some embodiments, the contour of the profile step created is smoother than the sharp profile step shown in FIG.

[0259] Referring now to FIG. 44, a series of steps are shown for a method of fabricating a top plate for a CMUT consistent with the inventive concepts. The steps shown in FIG. 44 illustrate a method of fabricating two shaped plates for two CMUTs, such as two CMUTs 510 described herein, each plate including features realized by grayscale lithography. In step A, fabrication begins with an SOI wafer. In step B, a layer of photoresist is applied and exposed using grayscale lithography. In step C, the silicon is etched, the depth of the etch depending on the pattern in the grayscale lithography. In step D, thermal oxidation is performed to form shaped plate 512. S Create the profile shown, including:

[0260] 45A-45D, cross-sectional schematic diagrams of various CMUT designs and graphs of CMUT performance consistent with the concepts of the present invention are shown. FIG. 45A shows a schematic diagram of a CMUT 510 including a standard CMUT with a bottom electrode 511 including a planar shape and a plate 512 including a planar shape. The set of dashed lines shown indicates the corresponding deflected shape of the plate 512 when an associated bias voltage is applied to the CMUT 510. The conventional shape shown represents the shape of the plate 512 when a bias voltage below the collapse voltage of the CMUT 510 is applied. The collapsed shape shown represents the shape of the plate 512 when a bias voltage in a range equal to or exceeding the collapse voltage of the CMUT 510 is applied. The deep collapsed shape shown represents the shape of the plate 512 when a bias significantly higher than the collapse voltage is applied, e.g., a bias at least 300% higher than the collapse voltage, e.g., a bias at least 400% higher than the collapse voltage. 45B shows a graph of the resonant frequency of the CMUT 510 versus the bias voltage. The changing state of the CMUT 510 is shown as the bias voltage is increased.

[0261] In some embodiments, the CMUT 510 may include a bottom electrode 511 with a non-planar shape, as shown in FIG. 45C. S , and / or a plate 512 having a contoured (e.g., non-planar) shape not shown but described herein. S A contoured (e.g., non-planar) bottom electrode 511 S (or Plate 512 S ) can be configured to allow the CMUT 510 to operate in multiple collapse states, each of which requires a lower bias voltage than that required to reach the "deep collapse" state of a similar standard CMUT. S may include a stepped profile, as described herein and as shown in FIG. 45C. Alternatively or additionally, the bottom electrode 511 Smay include a curved or other shaped profile as described herein. In some embodiments, the CMUT 510 may include a bottom electrode 511 and / or a bottom plate 512. S The dashed lines in FIG. 45C show the deflected shape of the plate 512 when a bias voltage is applied to the CMUT 510. The conventional shape shown represents the shape of the plate 512 when a bias voltage lower than the collapse voltage of the CMUT 510 is applied. The first collapsed shape shown represents the shape of the plate 512 when a bias voltage equal to the first collapse voltage but lower than the second collapse voltage of the CMUT 510 is applied. The second collapsed shape shown represents the shape of the plate 512 when a bias voltage higher than the second collapse voltage of the CMUT 510 is applied. FIG. 45D shows a graph of the resonant frequency of the CMUT 510 versus bias voltage. The changing state of the CMUT 510 is shown as the bias voltage is increased.

[0262] The transitions between different collapse modes may result in "jumps" in frequency and electric field, caused by a sudden change in the portion of plate 512 that is allowed to move.

[0263] 45C CMUT 510 can achieve higher operating frequencies and fields while using lower drive voltages by "discrete" the collapse operation. In some embodiments, system 10 can be configured to allow for variation of the optimal frequency range used during operation (e.g., varying the bias voltage to change the optimal frequency based on the application of use).

[0264] System 10 may be configured to switch between the aforementioned conventional, collapsed, and deep collapsed states (e.g., to enable a wide range of operating frequencies with a single device). In some embodiments, CMUT 510 may include a thick insulating film (e.g., a dielectric film 514, not shown, but described herein) to accommodate the high voltages applied in the deep collapsed state.

[0265] Referring now to FIGS. 46A-46N, various examples of component geometries before and after oxidation processes used in the fabrication of CMUTs consistent with the inventive concepts are shown. The examples shown are based on localized oxidation of silicon, where a thick oxide layer is used as a passivation layer to control the oxidation of the silicon. The transition length and curvature of the oxidized silicon can be controlled by varying the thickness of the oxide layer. In some embodiments, these methods can be combined with nitride barrier layers and / or multiple-profile-step silicon substrates to fabricate 3D silicon structures containing multiple profile steps of various shapes (e.g., various heights), slopes, and / or curvatures. The illustrated fabrication methods provide extremely precise control of the 3D dimensions and profiles of silicon structures (e.g., microstructures and / or nanostructures), providing unprecedented uniformity across and between wafers to ensure the fabrication of large-scale CMUT arrays with improved performance (e.g., at least a 2%, 5%, 10%, 25%, and / or 50% increase in one or more performance parameters).

[0266] The oxidation of silicon can be nonlinear, such that a thin oxide film (such as a masking layer and / or passivation film) consumes more silicon during the oxidation process than a thicker layer. Thus, silicon structures containing multiple profile steps and / or curved profiles can be fabricated using multiple profile step oxide films containing various thicknesses. During the oxidation process, transition regions are formed between portions of the oxide film of various thicknesses.

[0267] FIG. 46A shows the silicon substrate before oxidation of the 2 μm oxide mask and the resulting structure after the oxidation process, where the silicon substrate includes a stepped profile including transition regions between the profile steps as shown.

[0268] FIG. 46B shows the silicon substrate before oxidation of the patterned oxide mask and the resulting structure after the oxidation process, where the silicon substrate includes a profile of multiple profile steps including transition regions between the profile steps, as shown.

[0269] Figure 46C shows a silicon substrate before oxidation of the patterned oxide mask and the resulting structure after the oxidation process, where the silicon substrate includes multiple profile steps with transition regions between the profile steps as shown. The profile steps shown in Figure 46C are shorter (e.g., closer together) than the profile steps shown in Figure 46B, resulting in a more "sloped profile" (also referred to as a "graded profile").

[0270] Figure 46D shows the silicon substrate before oxidation of the patterned oxide mask and the resulting structure after the oxidation process. The oxide mask contains distinct sections, resulting in an "island" style multiple profile step silicon structure as shown.

[0271] In some embodiments, nitride films are used to mask regions of the silicon substrate from unwanted oxidation during the oxidation process. Thick oxide films can be used to control the transition region of oxidation, with the transition length being related to the oxide thickness. During the fabrication process, the oxide thickness can be selected to control the curvature of silicon structures fabricated using the techniques described herein. For example, Figures 46E-46G show examples of transition differences achievable by varying the oxide thickness from 1 μm to 3 μm.

[0272] FIG. 46E shows a silicon substrate with a 1 μm oxide layer and a nitride layer masking the oxide layer before oxidation, and the resulting structure after the oxidation process.

[0273] FIG. 46F shows a similar structure before and after oxidation with a 2 μm oxide layer.

[0274] FIG. 46G also shows a similar structure before and after oxidation with a 3 μm oxide layer.

[0275] As shown in Figures 46E-46G, the thicker the oxide film, the shorter the transition of the silicon substrate in the post-oxidation structure.

[0276] In some embodiments, multiple oxidation steps may be performed to produce a silicon substrate with multiple profile steps, as shown in Figure 46H.

[0277] Figure 46H shows a silicon substrate and an oxide film partially masked by a nitride film. After the first oxidation, a first profile step is formed in the silicon substrate. An additional nitride mask is applied to the oxide film before the second oxidation. After the second oxidation, the silicon substrate forms a second profile step as shown in the figure. In some embodiments, the design of the post-oxidation silicon structure can include curved structures (e.g., including smooth profiles) by limiting the overlap of the nitride mask in the pre-oxidation step to prevent flat areas from being created in the profiled areas of the silicon substrate during oxidation.

[0278] In some embodiments, nitride films may be used in combination with thick, multiple-profile step oxide films to form curved and / or quasi-graded structures. The nitride film and thick oxide film may be selected to determine the transition length. The oxide film thickness may be limited, for example, by cost, to 3 μm or less. The use of nitride films in the manufacturing process may extend the transition length in the silicon after oxidation, as shown, for example, in FIGS. 46I-46L.

[0279] FIG. 46I shows a silicon substrate with a 2 μm oxide layer partially masked with a nitride layer before oxidation and the resulting structure after the oxidation process, where the silicon has a two-step profile with a sloping transition as shown.

[0280] Figure 46J shows a silicon substrate with a 2 μm oxide layer that has been partially etched and partially masked with pre-oxidation of the nitride layer, and the resulting structure after the oxidation process, where the silicon has a two-step profile with a sloping transition as shown. Different pre-oxidation etching of the oxide layer can affect the sloping rate of the silicon structure.

[0281] FIG. 46K shows a silicon substrate with multiple profile step oxide layers partially masked with nitride pre-oxidation and the resulting structure after the oxidation process, where the silicon includes multiple profile step structures with sloping transitions between the profile steps.

[0282] 46L shows a silicon substrate with multiple profile step oxides partially masked with pre-oxidation of nitride, and the resulting structure after the oxidation process, where the silicon includes a graded transition from a first thickness to a second thickness, the characteristics of the graded transition being defined by the pre-oxidation characteristics of the oxide and nitride, as described herein.

[0283] In some embodiments, combining a patterned nitride film and a multi-profile-step oxide film on a multi-profile-step silicon substrate may enable the fabrication of curved and / or sloped silicon structures (e.g., nanostructures and / or microstructures) with various properties. The shape of the nitride and / or oxide film can be tailored to control the curvature and / or slope of the resulting silicon structures, as shown, for example, in Figures 46M-46N.

[0284] FIG. 46M shows a multiple profile step silicon substrate with patterned oxide and nitride layers pre-oxidation and the resulting structure after the oxidation process, where the silicon substrate includes a sloped profile.

[0285] FIG. 46N shows a silicon substrate with multiple profile steps having patterned oxide and nitride layers pre-oxidation and the resulting structure after the oxidation process, where the silicon substrate includes a varying profile (e.g., a wavy profile).

[0286] 47A-47B, which illustrate top and side views, respectively, of a CMUT plate including a solid piston consistent with the concepts of the present invention. Additionally, FIGS. 48A-48B illustrate top and side views, respectively, of a CMUT plate including a non-solid piston consistent with the concepts of the present invention. As described herein, a piston-based CMUT can include a plate 512 having a mass piston 518 disposed thereon. In some embodiments, the piston 518 includes a relatively solid structure, as shown, for example, in FIGS. 47A-47B. Alternatively, the piston 518 can include a lattice structure including one or more hollow portions, such as the relief 5181 shown in FIGS. 48A-48B. The piston 518 can include one or more reliefs 5181 that extend vertically across the height of the plate 512 (see FIG. 48A), laterally across the thickness of the piston 518 (see FIG. 48B), or both. The reliefs 5181 may extend laterally in the x-direction, the y-direction, or both to create a grid pattern of reliefs 5181 within the piston 518. A piston 518 including both vertical and lateral reliefs may include a three-dimensional grid pattern. A piston 518 including reliefs 5181 may increase the stiffness of the plate 512 with less mass than a comparably sized solid piston 518.

[0287] Referring now to FIG. 49, a sequence of steps for a method of fabricating a CMUT with a shaped profile consistent with the concepts of the present invention is shown. Silicon can be shaped using a thermal oxidation process, for example, as described herein. The rate of oxidation of the silicon can be increased using a doping process, for example, an ion implantation process, a diffusion doping process, or both. The various doping processes can be performed quickly and are well controlled. Additionally, a soft mask, such as photoresist, can be used as a doping mask. A diffusion process can be used to redistribute dopants within the silicon, thereby smoothing sharp edges or corners with a doping profile.

[0288] The illustrated process includes multiple ion implantation steps. In each step, various doses and ion beam energies can be used to achieve a desired dopant profile in the silicon substrate. As shown in step A, a mask is applied to the silicon substrate, e.g., the bottom electrode 511 of the CMUT 510 described herein. The mask may include a photoresist mask or other mask that does not damage the top surface of the silicon substrate. In some embodiments, a hard mask, such as an LPCVD oxide, may be used. In step B, an ion implantation process is performed on the silicon substrate to create doped regions under the mask openings. In step C, the mask is removed, and a second mask is applied to expose another portion of the silicon substrate. An additional ion implantation process is performed to dope the additional portion of the silicon substrate. In step D, a thermal diffusion process is performed to smooth the gradient of the doping profile. In step E, thermal oxidation is performed. The heavily doped regions of the silicon substrate oxidize faster than the undoped regions, resulting in the oxidation process creating a shaped profile in the silicon substrate that follows the doping profile. In step F, the oxide is removed and in step G, an insulating film can be applied to the silicon substrate as shown.

[0289] Referring now to FIG. 50, another sequence of steps for a method of fabricating a CMUT with a shaped profile consistent with the concepts of the present invention is shown. The illustrated process includes a single ion implantation step. The volume and concentration of the dopant can be adjusted by adjusting the open area of ​​the doping mask. Thermal diffusion can be used to convert a discrete doping pattern into a continuous doping profile. In step A, a doping mask is applied to a silicon substrate. In step B, the mask is patterned so that the density of the open area varies across the surface of the substrate as shown. In step C, an ion implantation process is performed on the silicon substrate to create individual doped portions of the substrate. In step D, a thermal diffusion process is performed to smooth the individual doped portions into a continuous doping profile. In step E, thermal oxidation is performed. Heavily doped regions of the silicon substrate oxidize faster than undoped regions, resulting in the oxidation process creating a shaped profile in the silicon substrate that follows the doping profile. In step F, the oxide is removed, and in step G, an insulating film can be applied to the silicon substrate as shown.

[0290] When a description of a component's performance or other metric, with reference to a component (e.g., part or assembly) of the inventive concepts, is enabled by a particular feature of the component and is expressed in terms of a percentage increase and / or decrease, it should be understood that the associated increase and / or decrease relates to a comparison between the component including that feature and a component that does not include that feature but is otherwise similar (e.g., similar size, materials of construction, etc.). For example, when describing a CMUT that includes a contoured plate that achieves at least a 10% increase in output pressure, this minimum increase describes a comparison to a similar CMUT (e.g., similar size, materials, shape, etc.) that does not have the same contoured plate.

[0291] 51A and 51B, a sequence of steps for a method of fabricating a CMUT with a shaped dielectric consistent with the concepts of the present invention is shown. The steps shown in FIGS. 51A and 51B illustrate a method of fabricating a CMUT, such as CMUT 510, described herein. The described method can be used to fabricate a shaped dielectric film (e.g., shaped dielectric film 514, described herein). S In some embodiments, for example, as shown in FIGS. 51A and 51B, the described methods may produce a CMUT 510, further comprising a shaped bottom electrode (e.g., a shaped electrode 511 as described herein). S ) can be fabricated. Alternatively, the CMUT 510 can include a non-contoured (e.g., flat) bottom electrode (such as electrode 511, also described herein). The cross-sectional images shown in FIGS. 51A and 51B are cross-sections through the center of a circular CMUT (e.g., a CMUT with a circular cavity, i.e., cavity 513, as described herein), and the illustrated profile represents a circular “ring” centered on the central axis of the CMUT. In other embodiments, the CMUT cell can include a non-circular shape, such as a hexagon, square, or other non-circular shape. In some embodiments, such as to improve transmit and receive sensitivity performance, the contour formed by the step of the shaped dielectric cavity, as described herein, can be shaped to approximate (e.g., match) the iso-displacement contour of a deflected plate (such as plate 512, as described herein). For example, for a circular cell, this approximation can be achieved with a circular contour. For other cell shapes, it is more complex. For example, for a square cell, the contour must transition from a square (e.g., a square with rounded corners) near the edge of the plate to a circle near the center. In some embodiments, even a non-optimized profile can have significant beneficial effects, such as a square profile with a square CMUT cell. One advantage of circular cells over other shapes is the ease with which the profile of the shaped dielectric step can be matched to the iso-displacement profile of the deflected plate.

[0292] The process shown in Figures 51A-51B relies on thermal oxidation of silicon. During the thermal oxidation process, oxidation occurs at the surface of the silicon (e.g., the surface of a silicon wafer, as described below). Initially, the rate of oxidation is limited by the rate of chemical reactions at the silicon surface, and the oxide thickness increases linearly with time. However, as the oxide grows, it acts as a barrier through which the oxidant must diffuse. The thicker the oxide (e.g., the longer the oxidation process lasts), the slower the oxidation rate. In this state, the oxide thickness increases with the square root of time. When thermal oxidation is performed on a wafer that has patterned overlying oxide (e.g., oxide formed in a previous oxidation process), the oxide-free areas increase in thickness more quickly than the oxide-present areas.

[0293] During the oxidation process, silicon is consumed to form an oxide. The new oxide film is thicker than the silicon that was consumed (approximately 2.2 times thicker). The first part of the oxide film occupies the volume previously occupied by the consumed silicon, and the second part extends over the surface of the consumed silicon.

[0294] In some embodiments, the oxidation time and temperature required to produce a desired step height in the molded part can be determined using the Deal-Grove oxidation model and / or other thermal oxidation models, such as the Massoud model. The complete 2D and / or 3D structure of the CMUT fabricated by the processes described herein can be predicted using finite element analysis.

[0295] In step A, a first silicon wafer is shown that has undergone thermal oxidation to form an oxide layer and then masked with a first masking layer comprising photoresist (e.g., photoresist applied in a lithography process). The oxide mask is then etched using a timed etch process to form a shaped oxide layer with a single step profile (e.g., a first oxide "ring" that is elevated relative to the center of the oxide layer), as shown. The timed oxide etch requires precise uniformity and etch rate control because there is no "etch stop layer," i.e., a layer above which all oxide present is etched (e.g., a silicon layer that is not etched once the oxide is completely removed). In some embodiments, this timed oxide etch is performed in two steps: first, the oxide is partially etched, e.g., to about 70% of the target etch depth. The etch depth can then be measured, and the actual etch rate can be calculated. The calculated rate can be used to determine the time required to etch the remaining oxide to the desired target depth. The etch depth can be measured optically, such as with a spectroreflectometer (e.g., when the timed etch is performed in a closed-loop manner). In some embodiments, one or more "test structures" may be simultaneously etched onto the CMUT during fabrication, and the test structures may be actively measured to monitor the progress of the timed etching process.

[0296] Applicant fabricated an array of CMUTs, array 5010F, as an example of a method for fabricating array 5010. In this fabricated array 5010F, the oxide thickness in step A was 266 nm, and 85 nm of oxide was removed by etching, leaving 181 nm of oxide in the center of the CMUT. Array 5010F was composed of a plurality of CMUTs, each containing a square cell, as described herein.

[0297] In step B, a second masking layer (e.g., a photoresist layer applied in a lithography process) is applied and a second timed oxide etch is performed to create a two-step profile in the oxide film, as shown in the figure.

[0298] For fabricated array 5010F, the etch in step B removed 70 nm of oxide, leaving 111 nm of oxide in the center portion of the CMUT.

[0299] In step C, a third masking layer is applied and a third oxide etch is performed to create a three-step profile in the oxide film, as shown. In some embodiments, the third oxide etch removes all of the unmasked oxide (e.g., in the center of the silicon wafer), as shown, and a timed oxide etch is not required because the first silicon wafer acts as an etch stop layer.

[0300] In fabricated array 5010F, the etch in step C removed 111 nm of oxide remaining in the center of the CMUT.

[0301] In step D, the masking layer applied in step C is removed and a thermal oxidation process is performed to thicken the oxide film across the silicon wafer while maintaining the illustrated multi-step profile. In some embodiments, the thermal oxidation process performed in step D comprises a dry thermal oxidation process.

[0302] For fabricated array 5010F, the thermal oxidation process of step D increased the oxide thickness in the center of the CMUT to 214 nm and the outer portions of the oxide to 353 nm.

[0303] As shown in FIGS. 51A and 51B, the dielectric film 514 SAs shown and described, includes levels formed by the process described in steps A through D. More or fewer layers can be fabricated using similar processes by adding and / or removing masking and etching steps.

[0304] In step E, a fourth masking layer is applied, comprising photoresist patterned in rings with openings at various levels of the oxide film. For example, each ring of photoresist covers a portion of each oxide step, as shown, leaving the transitions between the steps unmasked. A fourth oxide etch (the "ring etch" refines the transitions between the oxide steps) is then performed. During the various oxidation processes described herein, the convex corners of the steps can form upward "oxide bulges." These bulges can be caused by increased oxidation rates due to shorter diffusion distances for oxidants through adjacent thinner oxides. In some embodiments, the ring etch can remove oxide bulges, thereby reducing the likelihood of high electric fields caused by raised oxides. Additionally or alternatively, this ring etch can remove oxide bulges that may occur along the edges of the CMUT cavities (e.g., along the corners of the support 515), which can adversely affect the wafer bonding process described below with reference to step F by creating non-planar bonding surfaces. In some embodiments, step E is performed before step D, such that the ring etch is performed before the final thermal oxidation. By swapping steps D and E, step F may be performed immediately after the final oxidation of step D, reducing the risk of contamination of the oxide and the interior of the CMUT cell. Additionally, this order of operations avoids the formation of a thin oxide region around the outer edge of the central oxide step, which may be susceptible to dielectric breakdown because the dielectric oxide is thinner than the rest of the CMUT cell.

[0305] In some embodiments, the shaped dielectric step can additionally function as a mechanical "stop," preventing the center of a plate (e.g., plate 512 described herein) from contacting the bottom of the CMUT cell. This can reduce the risk of sticking by reducing the contact area between the plate and the dielectric oxide if the plate is crushed. Additionally or alternatively, this can reduce the risk of dielectric breakdown by preventing the plate from contacting the thinnest part of the oxide at the center of the CMUT. The ring etch of the dielectric step described above helps achieve this, as it creates a corner with a well-defined height and distance from the center of the cell.

[0306] In the fabricated array 5010F, the width of the outer ring of the fourth masking layer was 3 μm and the width of the inner two rings was 2 μm after step E. The etching depth was about 25 nm.

[0307] In step F, a second silicon wafer is bonded to the device formed in steps A-E, as shown. In some embodiments, the second silicon wafer includes a handle layer and a "buried oxide" ("BOX") layer, which were present during the bonding process and were removed in step F after the bonding process. In some embodiments, an insulating film (not shown) may be added to the second silicon wafer before the bonding process. The second silicon wafer may be positioned relative to the device of steps A-E, with the insulator facing the interior of the CMUT cells formed in step F. In some embodiments, this insulating film may include a thermal oxide layer of at least 10 nm and / or no more than 100 nm, e.g., 10 nm to 100 nm.

[0308] While steps A-F illustrate an array 5010 including a single CMUT cell, multiple cells can be simultaneously formed across a silicon wafer using these example fabrication methods, e.g., in a grid or other pattern. In some embodiments, multiple cells are formed in a pattern forming an array of CMUT cells. Alternatively, or additionally, a set of cells simultaneously formed across a single silicon wafer can be divided into one or more individual CMUT groups. Steps G-K illustrate a single CMUT cell and the edges and spaces between adjacent CMUT cells in a formed array of CMUT cells (herein "array"). In step G, a fifth masking layer is applied, which may include photoresist applied across the array to a second silicon wafer, e.g., the applied photoresist covers each CMUT cell formed in steps A-F, leaving the ground contact portions unmasked. An etching process is then performed to etch the second silicon wafer, oxide layer, and first silicon wafer as shown. This etching process forms an opening in the first silicon wafer, where, for example, a ground pad can be applied.

[0309] In step H, the photoresist is removed, and a layer of metal (such as aluminum) is deposited over the entire array, covering each CMUT and the exposed portions of the first silicon wafer located between each CMUT. In some embodiments, the metal layer includes multiple layers of different metals. For example, a layer of titanium can be included between the silicon wafer and the aluminum to minimize "spiking," a phenomenon in which silicon diffuses into an adjacent aluminum layer, forming voids. As the aluminum fills the voids, it forms aluminum "spikes" that extend into the silicon layer. In some embodiments, the aluminum-containing metal layer includes up to 2% silicon to minimize spiking and / or up to 2% copper to minimize electromigration.

[0310] In the fabricated array 5010F, the metal layer consisted of a 15 nm titanium layer and a 400 nm aluminum layer containing 2% silicon deposited on a silicon wafer.

[0311] In step I, a sixth masking layer is applied, which includes photoresist applied over the metal layer, leaving exposed portions etched (e.g., aluminum etched) as shown. This etching defines the CMUT top plate, the CMUT bond pads, and the electrical connections between the CMUT elements and the bond pads. Steps G through I are independent of the internal structure of the CMUT cell and may be performed in a variety of different ways and / or in a modified order in various embodiments. For example, in some embodiments, steps G through I may be modified to first mask and etch the second silicon wafer, then mask and etch openings into the first silicon wafer, and finally deposit, mask, and etch the metal layer.

[0312] In step J, the photoresist is removed and a passivation film is applied. In some embodiments, the passivation film is deposited using a process such as plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), or other deposition methods. The passivation film protects the CMUT device and prevents surface conduction. The passivation film may include a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and combinations thereof.

[0313] For fabricated array 5010F, the passivation film consisted of 100 nm of silicon oxide deposited using PECVD.

[0314] In step K, a seventh masking layer is applied, the seventh masking layer comprising photoresist applied over the passivation film leaving exposed portions, which are etched away (e.g., via a passivation film etch) as shown. Removal of these portions of the passivation film exposes the bond pads, allowing electrical connection to the CMUT.

[0315] Referring to Figure 52, a sequence of steps for a method of fabricating a CMUT with a shaped bottom electrode consistent with the concepts of the present invention is shown. Steps A-F of Figure 52 are an alternative embodiment of steps A-F of Figure 51A. In step A, a first silicon wafer is shown which undergoes thermal oxidation to form an oxide layer, and then is masked with photoresist (e.g., photoresist patterned by a lithography process) and an oxide etch forms the stepped oxide layer as shown.

[0316] In step B, a second thermal oxidation was performed to form a stepped profile of oxide on the first silicon wafer as shown.

[0317] In step C, a second mask etch process was performed as described herein to create a two-step oxide profile as shown.

[0318] In step D, a third thermal oxidation was performed to form an oxide profile on the first silicon wafer as shown.

[0319] In step E, a third mask etch process was performed as described herein to create a three-step oxide profile as shown.

[0320] In step F, a fourth mask etch process is performed, where the mask and etch process includes a ring etch as described with reference to step E of Figure 51A.

[0321] In step G, a fourth thermal oxidation is performed as described herein to form a three-step profile including a ring etch, as shown.

[0322] In step H, a second silicon wafer is bonded to the shaped oxide film formed in steps A-G, as shown. In some embodiments, the second silicon wafer includes an oxide film (e.g., a "bottom oxide" film, or "BOX" film) during the bonding process, which is removed in step H after the bonding process. Following step H, steps G-K of FIG. 51B may be performed as described herein. FIG. 52 illustrates fabrication of a CMUT including a shaped dielectric film 514 in three steps. As described herein, in some embodiments, fewer and / or more steps may be produced by eliminating and / or adding one or more oxidation and / or etching steps.

[0323] It should be understood that the above manufacturing methods may be performed in various temporal sequences of the described steps. For example, the etching and oxidation steps may be performed in any order. In some embodiments, the bottom of plate 512 may include an oxide layer.

[0324] Referring to Figures 53A-54B, various top and side views of CMUT arrays consistent with the concepts of the present invention are shown. Figures 53A and 54A each show a CMUT array 5010 including a row of four CMUT cells 510. Figures 53B and 54B each show a CMUT array 5010 including a row of three CMUT cells 510. The array 5010 and its components may be similar in structure and arrangement to the array 5010 described with reference to Figure 1 and elsewhere herein. Each array 5010 may include multiple CMUTs 510a and / or 510b, with the CMUTs 510a and 510b having different characteristics, as described below.

[0325] A CMUT array (such as one or more arrays 5010) may exhibit acoustic coupling between cells (e.g., CMUT cells 510), for example, through dispersive guided wave modes in the medium at the surface of the CMUT array. This coupling can create an acoustic mutual impedance between the cells, which can cause the cell behavior to differ significantly from that predicted by a single-cell model (e.g., different from that predicted by a computer model used to design and / or test the CMUT array). The acoustic mutual impedance between the cells can cause the cells of the array to have significantly different displacements, even when the cells are driven with the same voltage, as shown in Figures 53A and 53B. Typically, a plate (e.g., plate 512 described herein) is constructed and arranged to prevent impact (e.g., large contact) with the bottom of the cells during operation, and the output pressure is determined by the average displacement of the cells. Therefore, non-uniform displacement between the cells (such as CMUT 510) limits the maximum output pressure of the array. In applications where high output pressure is required, or at least desired, non-uniform displacement is avoided.

[0326] The nature of the acoustic coupling between cells depends on many variables, such as the operating frequency, medium properties, and the presence or absence of acoustic lenses and / or coatings in the array. Acoustic coupling can occur between two or more arrays 5010 (e.g., when a device includes two or more CMUT arrays 5010, each containing one, two, or more CMUT cells). Acoustic coupling can also occur within a single CMUT array 5010 when the array includes multiple CMUT cells 510 (e.g., when coupling occurs between two or more of the multiple CMUT cells 510). The acoustic coupling behavior between arrays 5010 may further depend on the relative phase with which the arrays 5010 are driven. Modeling, such as finite element analysis (FEA), can be performed for each proposed design of cell 510 and / or array 5010 and the operating parameters of the design to properly understand, for example, the acoustic coupling behavior.

[0327] In some embodiments, the non-uniform plate displacement caused by acoustic mutual impedance can be partially counteracted by using CMUT cells with different sensitivities within the same array. For example, a common displacement pattern is that the outer cells (e.g., the illustrated CMUT 510a) in a three- or four-cell wide element have larger displacements than the inner cells (e.g., the illustrated CMUT 510b). In some embodiments, this larger displacement of the outer cells can be counteracted by making the inner cells 510b more sensitive than the outer cells 510a, as shown in Figures 54A and 54B. This difference in cell sensitivity can result in an increase in maximum output pressure.

[0328] The sensitivity of a CMUT cell can be changed by varying the gap height, by varying the thickness of the insulating film (e.g., the thickness of the dielectric film 514, not shown but described herein), or both. However, this can significantly complicate the manufacturing process because the gap height and layer thickness are set by deposition and etching steps, which are typically performed for the entire wafer at once (e.g., for the entire array 5010 and / or for multiple arrays 5010 fabricated simultaneously). Using different gap heights and layer thicknesses within the same array typically requires separate lithography and etching for each variation.

[0329] In some embodiments, the sensitivity of a single CMUT 510 can be improved by adjusting the shaped dielectric film 514, each of which is described herein. S , molded bottom electrode 511 S , or shaped upper electrode 512 SThe sensitivity of the CMUT cells 510 can be varied by varying the profile of the CMUT cells 510. The profiles of these shaping components can be used to increase the sensitivity of the CMUT cells 510. These varied profiles can be used to achieve non-uniform sensitivity across the element by implementing profile differences of different magnitudes in different cells 510. This differentiation is advantageous because it allows the sensitivity to be varied from cell to cell (e.g., between adjacent CMUTs 510 in the array 5010) using only lithographic patterns (e.g., to avoid increased complexity in manufacturing).

[0330] In selecting the sensitivity profile of the CMUT 510, modeling (such as FEA modeling) can be performed over a range of operating conditions to determine cell sensitivity patterns that provide an overall beneficial effect. For example, modeling can be performed using different drive signal phases between adjacent CMUTs 510 (e.g., CMUTs 510a and 510b as shown) to find cell displacement patterns under different focus conditions.

[0331] In some embodiments, similar principles of element sensitivity profiling may also be applied for other purposes, such as apodization in elevation of the array 5010 to reduce side lobes.

[0332] Another configuration for canceling non-uniformities due to acoustic mutual impedance between CMUT cells 510 is to divide the array element into individually addressed sub-elements that are only one or two cells wide. In some embodiments, the sub-elements can be driven with different voltage amplitudes to cancel displacement non-uniformities.

[0333] 55A and 55B, cross-sectional views of embodiments of CMUTs including micro-pillars consistent with the concepts of the present invention are shown. S55A and 55B show CMUTs 510 each configured to operate in conventional and collapse modes. The CMUTs 510 and their components may be similar in structure and arrangement to the CMUTs 510 described with reference to FIG. 1 and elsewhere herein. The CMUTs 510 of FIGS. 55A and 55B each include a shaped plate 512 including a curved portion 5125, as described herein. S , a support 515, a bottom electrode 511, and a cavity 513. A dielectric film 514 may be disposed on the top surface of the bottom electrode 511, and a shaped plate 512 may be disposed on the top surface of the bottom electrode 511. S The plate 512 electrically insulates the lower electrode 511 from the lower electrode 511. In some embodiments, the plate 512 may comprise a flat plate, or the lower electrode 511 may comprise a shaped lower electrode, and combinations thereof, as described herein. In some embodiments, as shown, the shaped plate 512 S The edge of the may contact the dielectric film 514 at contact area 5126 as shown.

[0334] In some embodiments, one or more surfaces of the CMUT 510 include a surface modification, one or more micropillars, such as the illustrated micropillar 5171. The dielectric film 514 and / or the shaped plate 512 S The dielectric film 514 and / or the shaped plate 512 may include one or more arrays of micropillars or other surface modifications. S Surface modification (as shown) can reduce adhesion between the two surfaces.

[0335] Referring to FIG. 56, a top view of a CMUT array consistent with the inventive concepts is shown. The array 5010 and its components may be similar in structure and arrangement to the array 5010 described with reference to FIG. 1 and elsewhere herein. The array 5010 may include one or more CMUTs 510, such as the CMUT 510 shown, as described herein. The array 5010 may include a silicon top layer including plates 512 for each CMUT 510. The silicon top layer may extend from the array 5010 as shown and form bond pads to connect wires or other electrical conduits to the array 5010. In some embodiments, the silicon top layer does not include any sharp corners, such as when the silicon top plate includes rounded and / or otherwise non-sharp corners as shown. The rounded corners may be configured to reduce the electric fields present at the corners of the silicon top plate and / or may prevent or reduce the likelihood of cracks forming in the silicon top plate.

[0336] It should be understood that the above-described embodiments serve as examples only, and further embodiments are contemplated. Any feature described herein in connection with any one embodiment may be used alone or in combination with other features described, or in combination with one or more features of any other embodiment, or in any combination with any other embodiment. Furthermore, equivalents and variations not described above may also be used without departing from the scope of the inventive concept as defined in the appended claims.

Claims

1. A process for fabricating a CMUT, comprising: (a) applying a silicon thermal oxide film to a first silicon wafer; (b) performing pattern etching of the silicon oxide film; and (c) repeating step (b) one or more times to form a silicon oxide structure on the first silicon wafer, wherein the silicon oxide structure comprises one or more steps; The process includes:

2. (d) applying a thermal oxide coating after the step is formed; 10. The process of claim 1 or more, further comprising:

3. A process for fabricating a CMUT, comprising: (a) applying a silicon thermal oxide film to a first silicon wafer; (b) pattern-etching the oxide film; (c) repeating steps (a) and (b) to form a silicon oxide structure on the first silicon wafer, wherein the silicon oxide structure includes one or more steps; and (d) applying a thermal oxide coating after the step is formed; Including, the etching of the repeated step (b) forms exposed portions of the first silicon wafer. process.

4. 10. The process of claim 1 or more herein, wherein the silicon oxide structure comprising the step comprises a dielectric membrane of the CMUT.

5. The one or more steps include one or more corners, and the process comprises: (e) removing the oxide bulge formed during step (a) from one or more of the one or more corners; 10. The process of claim 1 or more, further comprising:

6. The process of claim 5 , wherein step (e) is performed using pattern etching.

7. 6. The process of claim 5, wherein step (e) is performed before step (d).

8. 6. The process of claim 5, wherein step (e) is performed after step (d).

9. The process of claim 5 , wherein the silicon oxide structure further comprises one or more supports, each having one or more corners.

10. 10. The process of claim 9, wherein step (e) comprises removing oxide bulges formed during step (a) from one or more of the corners of the one or more substrates.

11. (f) attaching a second silicon wafer to the silicon oxide structure to form a CMUT cell having an internal cavity; 10. The process of claim 1 or more, further comprising:

12. 12. The process of claim 11, further comprising applying an oxide layer to the second silicon wafer before step (f).

13. 13. The process of claim 12, wherein the oxide film on the second silicon wafer comprises a thickness of at least 10 nm and / or no more than 100 nm.

14. The process of claim 12 , wherein the oxide film is disposed on the second silicon wafer toward the interior of the cavity of the CMUT.

15. 12. The process of claim 11, wherein the shape of the silicon oxide structure, when deflected in use, approximately equals the shape of the second silicon wafer.

16. 10. The process of one or more of the claims herein, wherein the first silicon wafer comprises one or more corners, and at least one corner comprises a non-sharp shape.

17. A device comprising a sensor comprising one or more CMUTs according to any one or more of the preceding claims.

18. The device of claim 17 , wherein the device comprises a medical device.

19. The device of claim 17 , wherein the sensor comprises two or more sensors in a redundant configuration.

20. 20. The device of claim 17, wherein the sensor includes a first set of the one or more CMUTs and a second set of the one or more CMUTs, the first set and the second set being configured in a redundant configuration.

21. The device of claim 17 , wherein the sensor comprises two or more CMUT arrays, each CMUT array comprising at least one of the one or more CMUTs.

22. 22. The device of claim 21, wherein the two or more CMUT arrays include a first CMUT array in a first configuration and a second CMUT array in a second configuration different from the first configuration.

23. 23. The device of claim 22, wherein the first array includes first CMUTs in a first configuration and the second array includes second CMUTs in a second configuration different from the first configuration.

24. 24. The device of claim 23, wherein the first CMUT includes a first bottom electrode configuration and a first plate configuration, and the second CMUT includes a second bottom electrode configuration and a second plate configuration, the first plate configuration being different from the second plate configuration, and / or the first bottom electrode configuration being different from the second bottom electrode configuration.

25. 24. The device of claim 23, wherein the first array and the second array include different geometric arrangements of CMUTs, different types of CMUTs, and / or different numbers of CMUTs.

Images