Integrated photonic device having an electro-optic layer and method for manufacturing the device

Abstract

The present invention relates to a photonic device comprising a carrier substrate (1e), a layer (2) of photonic components disposed in contact with the carrier substrate (1e) and containing at least one waveguide (2a) disposed within a coating material (2), an embedded dielectric layer (1b) disposed on the layer of photonic components (2) in contact with the waveguide (2a), and an electro-optic layer on the embedded dielectric layer (1b) that extends at least partially above the waveguide (2a) to enable the generation of hybrid optical modes within the waveguide (2a) and within the electro-optic layer (3). The present invention also relates to a method for preparing such a device.

Description

Technical Field

[0001] The present invention relates to an integrated photonic device comprising an electro-optic layer. The present invention also relates to a method of manufacturing such a device.

Background Art

[0002] Electro-optic materials are materials whose optical properties are changed by the application of an electrical quantity, particularly by the application of an electric field. These can be materials that exhibit the Pockels effect, such as piezoelectric materials like lithium niobate (LNO) or barium titanate (BTO). These materials are particularly promising for the manufacture of ultra-fast and low-loss integrated optical modulators. See, for example, WO 2021 / 202853 or F. Eltes et al., "Thin-film BTO-based modulators enabling 200 Gb / s data rates with sub 1 Vpp drive signal," in Optical Fiber Communication Conference (OFC) 2023, Technical Digest Series (Optica Publishing Group, 2023), paper Th4A.2.

[0003] Furthermore, the paper Shayan Mookherjea, Viphretuo Mere, Forrest Valdez; Thin-film lithium niobate electro-optic modulators: To etch or not to etch. Appl. Phys. Lett. 20 March, 2023; 122(12):120501 presents several approaches for forming modulators from thin-film electro-optic materials. These approaches include etching the electro-optic material to form waveguides in the thin film itself, and / or forming waveguides on the electro-optic material by deposition and patterning, and / or bonding a thin film of the electro-optic material to a carrier substrate that already incorporates waveguides. In all cases, the objective is to generate optical modes, i.e., light emission that propagates at least partially within the electro-optic material, in order to modify the properties of this light emission by an electric field applied to the electro-optic material. Each approach described in the above paper raises technical integration or performance issues.

[0004] For example, etching of electro-optical materials generates particles in the etched composite material, making it difficult to integrate them into industrial processes for silicon-based microelectronics (known as "CMOS technology"). This etching also leads to the formation of non-vertical waveguide sidewalls, which affects their performance.

[0005] In the bonding method, a thin layer of electro-optic material is transferred onto a carrier substrate incorporating silicon-based and / or silicon nitride-based waveguides, which are placed within an encapsulation material such as silicon dioxide. This approach requires very good uniformity in the thickness of the encapsulation material layer that separates the electro-optic material thin layer from the waveguides. This uniformity is difficult to achieve due to the surface topology associated with the presence of photonic components such as waveguides and / or metal tracks within the carrier substrate. This topology becomes increasingly important when forming substantial stacks of elements, particularly metal tracks, in the component layers.

[0006] This uniformity problem is described and quantified in the literature, Peter O. Weigel et al, "Bonded thin film lithium niobate modulator on a silicon photonics platform exceeding 100 GHz 3-dB electrical modulation bandwidth," Opt. Express 26, 23728-23739 (2018). In this literature, the thickness of the planarized encapsulation material layer between the silicon waveguide and the lithium niobate film varies with an amplitude of 150 nm over a 150 mm range of the substrate. This thickness non-uniformity causes variations in the modulator bandwidth (50-250 GHz) and modulation efficiency (6-8 V.cm) due to variations in optical mode confinement within the hybrid waveguide. As the planarized layer becomes thinner, modes are further confined within the silicon waveguide, reducing the modulation efficiency.

[0007] The paper F. Eltes et al, "A BaTiO3-Based Electro-Optic Pockels Modulator Monolithically Integrated on an Advanced Silicon Photonics Platform," in Journal of Lightwave Technology, vol.37, no.5, pp.1456-1462, 1 March 2019, doi:10.1109 / JLT.2019.2893500, proposes a monolithic integration scheme for barium titanate-based electro-optic modulators. A thin film of this material is applied to the integrated photonic device at the "back end of the line" after the metal interconnect lines (metal level) have been generated. This means that, in order to avoid or at least limit optical loss, the modulator is positioned at a relatively large distance (several micrometers) from other photonic components located below the metal interconnect lines and at a certain distance from them. However, in the integration scheme proposed in this paper, the electro-optic layer is far from the waveguide, so the optical coupling required between these components and the modulator is of poor performance.

[0008] A similar approach with the same limitations is proposed by Nicholas Boynton et al, "A heterogeneously integrated silicon photonic / lithium niobate traveling wave electro-optic modulator," Opt. Express 28, 1868-1884 (2020).

[0009] U.S. Patent No. 9,871,343 proposes optical phase modulation using a III-V / silicon hybrid MOS capacitor. A layer of doped III-V material is separated from a layer of doped silicon via a dielectric interface layer. An electric field is applied between two electrodes in contact with the III-V material and the silicon material, respectively. The electric field applied between the two electrodes causes charge accumulation on both sides of the dielectric interface layer. This causes a change in the optical phase of the hybrid mode due to the change in refractive index induced by the charge accumulation on both sides of the dielectric layer, at the interface between the III-V material layer and the dielectric material, and at the interface between the silicon layer and the dielectric material. The induction of the optical hybrid mode is determined by the overlapping portion of these two layers, and the determination of these portions must be fully understood. The technical solution proposed in this document, which utilizes the application of an electric field between two materials, is quite different from one that attempts to utilize the application of an electric field within a single layer made of a single material, where the optical properties of that single layer are modified by the application of the modulating electric field.

[0010] Generally speaking, the present invention aims to arrange the electro-optic material layers of a waveguide as close together as possible to enable efficient optical coupling between these two elements. This, therefore, works favorably for the confinement of hybrid optical modes within the electro-optic layers, ensuring greater modulation efficiency. The electrodes used to apply the modulation field to the electro-optic material layers must also be placed as close to these layers as possible for the same reasons of modulation efficiency. This need for compactness, particularly the presence of metal electrodes close to the waveguide, results in high optical loss. Therefore, in known integration schemes, it is often necessary to find a compromise between the efficiency of applying the modulation field and optical loss. [Overview of the Initiative] [Problems that the invention aims to solve]

[0011] One object of the present invention is to improve, at least partially, the problems described above. More specifically, one object of the present invention is to propose a scheme for integrating an electro-optic layer into an integrated photonic device that allows for a better compromise between optical loss and modulation efficiency than known solutions. [Means for solving the problem]

[0012] To achieve one of these objectives, the object of the present invention is to propose a method for preparing a photonic substrate, comprising the following steps. - A step of providing a starting substrate including a base substrate, an embedded dielectric layer disposed in contact with the base substrate, and a surface layer disposed in contact with the embedded dielectric layer and having a refractive index higher than that of the embedded dielectric layer, - A process of processing a starting substrate to form a layer of photonic components, wherein the photonic components are located within a coating material and include at least one waveguide formed within the surface layer. - A process of transferring the photonic component layer to a support substrate, removing the base substrate, and exposing the embedded dielectric layer, - A step of transferring an electro-optic layer onto at least a portion of an embedded dielectric layer, wherein the electro-optic layer has a first surface in contact with the embedded dielectric layer and a second surface opposite to the first surface, and the electro-optic layer extends at least partially over the waveguide so that hybrid optical modes can be generated in the waveguide and the electro-optic layer. - The process includes forming at least two electrodes that are positioned laterally on both sides of the waveguide and configured to generate a modulating electric field in the electro-optic layer and block hybrid optical modes.

[0013] According to other advantageous non-limiting features of the present invention, either alone or in any technically feasible combination, The surface layer is formed from a semiconductor material. The electrode formation step includes depositing a sealing layer that is in contact with a second surface of the electro-optic layer and / or in contact with the embedded dielectric layer. The electrode formation step includes depositing a metal pad above the second surface of the electro-optic layer and / or above the embedded dielectric layer. The electrode formation process includes the formation of at least two metal vias. The initial substrate processing step includes forming at least two doped pads on the semiconductor surface layer, wherein the two doped pads (6) are arranged laterally on both sides of the waveguide. The initial substrate processing step includes forming at least two metal tracks on the layer of photonic components.

[0014] In another aspect, the present invention proposes a photonic device, which is - Carrier substrate and, -A layer of photonic components, which are arranged in contact with a carrier substrate and include at least one waveguide, -In contact with the waveguide, an embedded dielectric layer is placed on top of the photonic component layer, - An electro-optic layer on an embedded dielectric layer, having a first surface in contact with the embedded dielectric layer and a second surface opposite to the first surface, and extending at least partially above the waveguide so as to be able to generate hybrid optical modes within the waveguide and within the electro-optic layer, -Includes at least two electrodes positioned laterally on both sides of the waveguide and configured to generate a modulating electric field in the electro-optic layer and block hybrid optical modes.

[0015] According to other advantageous non-limiting features of the present invention, either alone or in any technically feasible combination, The embedded dielectric layer has a thickness of less than 300 nm, preferably less than 100 nm, and / or a thickness uniformity of 50 nm or less. The waveguide is formed of a semiconductor material, preferably silicon or silicon nitride. The waveguide extends longitudinally on both sides of the electro-optic layer, and the waveguide is thinner in the electro-optic layer than the rest of the waveguide. The device comprises a sealing layer that contacts a second surface of the electro-optical layer and / or a buried dielectric layer. At least two electrodes each comprise two metal pads positioned above the electro-optic layer and / or above the embedded dielectric layer, • At least two electrodes are provided with at least two metal vias. • At least two electrodes are formed of a doped semiconductor material and each comprises at least two pads arranged in a layer of photonic components, the two doped pads being arranged laterally on either side of the waveguide. • At least two electrodes each comprise two metal tracks positioned in a layer of photonic components, the metal tracks located in the plane between the waveguide (2a) and the carrier substrate. The photonic device comprises two waveguides located at least partially beneath the electro-optic layer, and these two waveguides form two arms of a modulator. [Brief explanation of the drawing]

[0016] Other features and advantages of the present invention will become apparent from the following detailed description of the invention with reference to the accompanying drawings. [Figure 1a] Shows the steps of the preparation method according to the present invention. [Figure 1b] Shows the steps of the preparation method according to the present invention. [Figure 1c] Shows the steps of the preparation method according to the present invention. [Figure 1d] Shows the steps of the preparation method according to the present invention. [Figure 1e] Shows the steps of the preparation method according to the present invention. [Figure 1f] Shows the steps of the preparation method according to the present invention. [Figure 1g] Shows the steps of the preparation method according to the present invention. [Figure 1h] Shows the steps of the preparation method according to the present invention. [Figure 2a] Shows different embodiments of the integrated photonic device according to the present invention. [Figure 2b] Shows different embodiments of the integrated photonic device according to the present invention. [Figure 2c] Shows different embodiments of the integrated photonic device according to the present invention. [Figure 3a] Shows different embodiments of the integrated photonic device according to the present invention. [Figure 3b] Shows different embodiments of the integrated photonic device according to the present invention. [Figure 4] Shows an integrated photonic circuit according to the present invention implementing a modulator. [Figure 5a] Shows different views of the first embodiment of the photonic component shown in FIG. 4. [Figure 5b] Shows different views of the first embodiment of the photonic component shown in FIG. 4. [Figure 6a] Shows different views of another embodiment of the photonic component shown in FIG. 4. [Figure 6b] Shows different views of another embodiment of the photonic component shown in FIG. 4. [Figure 7a] Other embodiments of the integrated photonic device according to the present invention are shown. [Figure 7b] Other embodiments of the integrated photonic device according to the present invention are shown. [Figure 7c] Other embodiments of the integrated photonic device according to the present invention are shown. [Modes for carrying out the invention]

[0017] Figures 1a to 1h illustrate various steps of the method according to the present invention.

[0018] In the first step shown in [Figure 1a], a starting substrate 1 is provided. This substrate is, for example, an insulator-on-silicon type, typically made of silicon, and formed with a base substrate 1a with a thickness of several hundred microns. A buried dielectric layer 1b, typically made of silicon oxide, is placed in contact with the base substrate 1a. This layer can have a thickness of several tens to several thousand nanometers. For reasons that will become apparent in the context of this specification and in the remainder of this presentation, it is preferable to select this relatively thin layer 1b to be, for example, 5 nm to 300 nm, preferably 5 nm to 200 nm, or 5 nm to 100 nm. According to an important feature, this buried dielectric layer 1b has good thickness uniformity, with a thickness variation of less than 50 nm, or even less than 5 nm, or less than 3 nm, or less than 1 nm, across the entire substrate. Finally, the starting substrate 1 comprises a semiconductor surface layer 1c placed in contact with the buried dielectric layer 1b. This layer 1c is formed from single-crystal silicon in particular and can have a thickness of 50 nm to 1000 nm.

[0019] Silicon starting substrates 1 on an insulator are widely available on the market in a wide variety of dimensions and freely selectable thicknesses, particularly for the semiconductor surface layer 1c and the embedded dielectric layer 1b. Therefore, providing these starting substrates 1, which constitute the first step of the method according to the present invention, is not particularly difficult. These substrates, in particular, have a preferred thickness uniformity of less than 50 nm for the embedded dielectric layer 1b across the entire substrate.

[0020] It should be noted that the starting substrate may be of a different type than that presented here. In particular, the surface layer 1c can be selected to have properties different from those of the semiconductor material. It may be silicon nitride, for example.

[0021] Therefore, more generally, the starting substrate 1 is formed from a base substrate 1a which may be made of silicon, an embedded dielectric layer 1b which may be made of silicon dioxide, and a surface layer 1c which has a refractive index greater than that of the embedded dielectric layer 1b. This surface layer may, in particular, be made of silicon nitride or may contain silicon nitride.

[0022] In the second step of the method according to the present invention, illustrated in [Figure 1b], the starting substrate 1 is processed to form photonic components in and on the surface layer 1c.

[0023] As is well known, this process may include any type of conventional technology process in the world of microelectronics, namely deposition, etching, and photolithography to define patterns that enable these components to function. For example, these conventional technology processes may be linked together to form a waveguide 2a by etching a surface layer 1c. A photodetector 2c may be formed using a selective germanium deposition process, for example. An additional waveguide 2b may be formed using a silicon nitride deposition process. Metal tracks 7 may also be formed at different levels to conduct electrical signals. Multiple deposition processes of a coating material 2e, such as silicon dioxide (which may be followed by polishing processes), form layers of components 2 that encapsulate the assembly and are placed on the base substrate 1a via an embedded dielectric layer 1b. The coating material 2e may be etched open during the process of processing the starting substrate to form metal vias 2d that can contact the metal tracks 7, for example, making contact on active components of the component layers, as will be described later, or generating a modulation field in the electro-optic layer.

[0024] At the end of this processing step, regardless of the components formed within and on the surface layer 1c, layer 2 of the photonic components is available, and these components are embedded in the coating material 2e. The photonic components 2a, 2b, 2c, 2d, 7 of layer 2 are formed in the surface layer 1c and comprise at least one waveguide 2a that extends longitudinally within layer 2 (along the direction perpendicular to the cross-section in [Figure 1b]).

[0025] Since this waveguide 2a is formed in the surface layer 1c, it rests on and is in contact with the embedded dielectric layer 1b. Waveguide 2a is preferentially not doped in order to limit optical loss.

[0026] At the end of this processing step, the exposed surface of layer 2 of the photonic component can be polished to facilitate the next transfer step.

[0027] In the next step shown in [Figure 1c], layer 2 of the photonic component is transferred to the support substrate 1e. This transfer can be carried out using any suitable technique. This transfer generally involves assembling layer 2 of the photonic component, supported by the base substrate 1a, onto the support substrate 1e. This may be assembled, for example, by molecular adhesion. Once assembled, the base substrate 1a is removed to expose the embedded dielectric layer 1b. This removal can be carried out by grinding aided by dry or wet etching, using the embedded dielectric layer 1b which forms a particularly effective barrier against etching. [Figure 1d] shows layer 2 of the photonic component transferred to the support substrate 1e at the end of this step. At this stage, the embedded dielectric layer 1b can be thinned to a selected thickness, for example, by chemical etching. In this case, care should be taken not to excessively degrade its uniform thickness.

[0028] In the next step of the preparation method according to the present invention, the electro-optic layer 3 is transferred to the embedded dielectric layer 1b. The electro-optic layer 3 may be composed of, for example, lithium niobate (LNO), barium titanate (BTO), or other piezoelectric material. The layer 3 preferably has single-crystal quality. It can be transferred by assembling and thinning a substrate of solid electro-optic material, or a substrate on which layers of electro-optic material have been pre-deposited, typically by epitaxy. Alternatively, the substrate may be of the "electro-optic material on an insulator" type, including a surface layer of electro-optic material, such as lithium niobate, transferred onto a manipulator substrate, such as a silicon substrate having a silicon oxide layer.

[0029] In either case, the electro-optic layer 3, positioned on the constituent layer 2, has a first surface in contact with the embedded dielectric layer 1c and a second surface opposite to the first surface. The electro-optic layer 3 extends completely laterally above the waveguide 2a, and as a result, hybrid optical modes can be generated within the waveguide and within the electro-optic layer, the induction of these optical modes being defined by the waveguide 2a. More specifically, this induction is independent of the lateral position of the electro-optic layer 3 relative to the waveguide 2a (as long as the layer actually covers the waveguide 2a), which makes it very easy to position the electro-optic layer 3 on the constituent layer 2 and does not require high positional precision.

[0030] It should be noted that the electro-optic layer 3 is isolated from the waveguide 2a by the thickness of the embedded dielectric layer 1b. The latter is preferably selected to be relatively thin and uniform in thickness, and it is now understood that this selection facilitates the generation of hybrid optical modes when the integrated photonic device is in operation.

[0031] The electro-optic layer 3 does not need to extend over the entire extent of the embedded dielectric layer 1b. For example, it may be preferable to leave a portion of this layer 1b uncovered by the electro-optic layer 3 to provide easier access to a particular photonic component underneath, or to allow input / output of optical radiation to an integrated device, as shown in one of the specific embodiments of the invention disclosed in later sections of this description.

[0032] The configuration shown in [Figure 1f], in which the electro-optic layer does not completely cover the embedded dielectric layer 1c, can be achieved in several ways. According to the first approach, the process of transferring the electro-optic layer 3 can consist of transferring (vinetting) one or more blocks (vignettes) formed of the electro-optic material, each block having reduced dimensions and smaller than the dimensions of the exposed surface of the embedded dielectric layer 1b, but sufficient to at least partially overhang at least one waveguide of the photonic component layer 3. This approach means that the configuration shown in [Figure 1f] can be obtained directly without performing an etching process on this layer after the electro-optic layer 3 has been transferred. Advantageously, to simplify the manufacturing method, it is desirable to limit the number of blocks transferred to the embedded dielectric layer 1b. For this purpose, the blocks can overhang multiple waveguides of the photonic component layer 3.

[0033] According to another approach, the electro-optic layer 3 is transferred to completely cover the embedded dielectric layer 1b, and then a portion of the electro-optic layer 3 is removed to expose a portion of the embedded dielectric layer 1b. This removal can be achieved by etching.

[0034] Naturally, as shown in [Figure 1e], it is also possible to leave an electro-optic layer 3 that completely covers the embedded dielectric layer 1b, and the two approaches presented here are entirely arbitrary. In all cases, the electro-optic layer 3 is left to completely cover at least the waveguide 2a so that hybrid optical modes can be unfolded. And advantageously, by not performing etching of this electro-optic layer 3, the particle generation-related problems described in the introduction of this application can be avoided.

[0035] The method according to the present invention also includes the step of forming at least two electrodes positioned laterally (and closest to the electro-optic layer) on both sides of the waveguide 2a so as to be able to generate a modulating electric field that passes laterally through the electro-optic layer and blocks hybrid optical modes. The modulating electric field, given by the potential difference between the two electrodes and extending into the electro-optic material between the two ends of the electrodes, allows the optical properties of the electro-optic material to be altered, thereby modulating the light radiation propagating through it. For the purposes of this description, “electrode” refers to an element used to form a conduction path for conducting an electrically modulated signal as close as possible to the electro-optic layer 3. The electrodes are not in contact with the waveguide 2a but are positioned laterally on both sides of the waveguide 2a. In some of the configurations described below, the ends of the electrodes may be in contact with or close to the electro-optic layer so as to generate a modulating electric field in this layer.

[0036] This electrode formation process can consist of forming two pads 4a by depositing a metallic material, such as gold, on the second surface of the electro-optic layer 3, i.e., its exposed surface. This configuration is shown in [Figure 1g].

[0037] In [Figure 1h], a sealing layer 5 is formed on the second surface of the electro-optic layer 3, covering it. Two metal pads 4a are placed on the sealing layer 5, and two metal vias 4b penetrate the sealing layer 5 by etching this layer. In the embodiment of [Figure 1h], the two metal vias 4b are in contact with the metal pads 4a on one side and with the second surface of the electro-optic layer 3 on the other. The vias may be made of aluminum.

[0038] It should be noted that the preparation method can be divided into two different sequences: the first sequence of steps of the method aims to prepare a layer 2 of photonic components transferred onto a carrier substrate 1e, and the second sequence of steps of the method following the first sequence aims to transfer an electro-optic layer 3 covering the embedded dielectric layer 1b and to form at least a portion of the electrodes. These two sequences can be carried out in different industrial environments, and the first sequence can be carried out in a CMOS technology environment incompatible with certain steps forming the second sequence, in particular, the etching of the electro-optic material and the use of gold for forming the metal pad 4a. The second sequence can be carried out in a compatible environment different from the CMOS technology environment in which the first sequence is carried out.

[0039] In either case, the above method applies to the carrier substrate 1e, -A layer 2 of photonic components, which includes at least one waveguide 2a, placed in contact with the carrier substrate 1e and arranged within the coating material 2. - An embedded dielectric layer 1b is placed on the photonic component layer 2 and is in contact with the waveguide 2a. - An electro-optic layer 3 on an embedded dielectric layer 1b, having a first surface in contact with the embedded dielectric layer 1b and a second surface opposite to the first surface, and extending at least partially above the waveguide 2a so as to be able to generate hybrid optical modes in the waveguide and the electro-optic layer, - An integrated photonic device is provided comprising at least two electrodes positioned laterally on both sides of the waveguide 2a to generate a modulating electric field that blocks the hybrid optical mode.

[0040] The induction of hybrid optical modes is defined by waveguide 2a. The electrodes are not in contact with waveguide 2a. The ends of these electrodes, positioned laterally on both sides of waveguide 2a, allow a modulating electric field to be generated between them as it passes through the electro-optic layer.

[0041] The embedded dielectric layer 1b is advantageously thin, for example, less than 300 nm, which enables easy and lossless (or low-loss) coupling between the waveguide 2a and the electro-optic layer 3. Furthermore, its thickness uniformity is less than 50 nm.

[0042] It should be noted that the metal track 7 of this device is located in the plane between the waveguide 2a and the carrier substrate 1e, which reflects the transfer of the component layers from the base substrate 1a to the carrier substrate 1e.

[0043] Figure 2a shows a further embodiment of the photonic device according to the present invention. This embodiment allows the metal portion of the electrode to be separated from the hybrid optical mode, which further reduces optical loss compared to the embodiment shown in Figure 1h or Figure 1g. In this configuration, the electrode includes a doped semiconductor pad 6 located in layer 2 of the photonic component. The waveguide 2a is not doped to limit optical loss, as previously described.

[0044] Figure 2a shows a base substrate 1e on which the photonic component layer 2, the embedded dielectric layer 1b, and the electro-optic layer 3 are continuously mounted. The latter is positioned overhanging the waveguide 2a, as in the main embodiment.

[0045] In the embodiment shown in [Figure 2a], two pads 6 formed of doped semiconductor material are also provided, and the two doped pads 6 are arranged laterally on both sides of the waveguide. These two pads are formed on the semiconductor surface layer during the processing step of the starting substrate 1 ([Figure 1b]). Doping can be carried out by ion implantation, as is well known. Doping makes these pads 6 of the semiconductor material conductive. This doping is p-type or n-type and is 2.0 × 10⁻¹⁶ per cm³ 19 The dopant density can be on the order of 10¹ atoms. This doping may be uniform across the entire length of the pad, or it may show a gradient from the end 6b furthest from waveguide 2a to the end 6a closest to waveguide 2a, where the dopant density is 2.0 × 10¹⁶. 19 The dopant density may be on the order of at / cm³, and the dopant density is 2.0 × 10⁻⁶. 18 The order of at / cm^3 is also acceptable.

[0046] Figure 2a also shows a metal pad 4a formed on the sealing layer 5 and a metal via 4b penetrating the sealing layer 5 and the electro-optical layer 3, with each metal via 4b being electrically connected to at least two doped pads 6. The metal pad 4a and metal via 4b are generated in the electrode formation process. In this embodiment, the metal via 4b is in direct contact with the doped pad 6 at its end 6b furthest from the waveguide 2a, thus keeping them away from the hybrid optical mode. Thus, the electrode is formed from the metal pad 4a, the metal via 4b, and the doped pad 6.

[0047] This embodiment is advantageous in that the modulated electric field is generated from the end 6a of the doped pad 6 located closest to the waveguide 2a, thereby ensuring high efficiency when applying this modulated electric field to the electro-optic layer 3 at the level of the optical modes generated there. Since it is made of a non-metallic semiconductor material, the pad 6 has little effect on the generated optical modes, and optical loss remains limited.

[0048] Figure 2b shows a variation of the embodiment shown in Figure 2a, which utilizes metal tracks 7 formed in layer 2 of the photonic component to provide better electrical contact with the doped pads 6. In fact, the metal tracks 7 formed during the manufacturing process of the layer of component 2 benefit from a silicide surface layer, which is known to form very good electrical contact. For this purpose, two conductive metal tracks 7 are provided in layer 2 of the photonic component, which is encapsulated in the coating material and placed beneath the doped pads 6 during the processing process of the starting substrate 1. These two metal tracks 7 are each in electrical contact with the two doped pads 6. In this embodiment, the metal vias 4b of the electrodes are each in contact with the two metal tracks 7 via their "landing" ends. Thus, the electrodes are formed from the metal pad 4a, the metal vias 4b, the metal tracks 7, and the doped pads 6, respectively.

[0049] In the modified example shown in [Figure 2c], the two electrodes are sufficiently far apart so that the metal vias 4b do not penetrate the electro-optic layer 3. The two electrodes are formed from metal pads 4a located on the sealing layer 5 (or, if the sealing layer is absent, on the embedded dielectric layer 1c), and the metal vias 4b are electrically connected to at least two doped pads 6 without penetrating the electro-optic layer 3.

[0050] Figures 3a and 3b show another embodiment of the photonic device according to the present invention, which also allows the metal portion of the electrode to be separated from the hybrid optical mode. In this embodiment, an electric field is applied to the electro-optical layer 3 via metal tracks 7 located in layer 2 of the photonic component. These metal tracks 7 are electrically connected to metal pads 4a via metal vias 4b in which they are in contact. To facilitate the routing of electrical signals, these metal tracks 7 can be in contact with other metal tracks 7a located at different levels of layer 2 of the photonic component, as shown in the figure, and these tracks 7, 7a are interconnected by intermediate vias. As already mentioned, the metal tracks 7, 7a are located in the plane between the waveguide 2a and the carrier substrate 1e.

[0051] In the modified example shown in [Figure 3a], two metal pads 4a are formed on the sealing layer 5, and vias 4a penetrate both the sealing layer 5 and the electro-optical layer 3. In the modified example shown in [Figure 3b], the two metal pads 4a are spaced far enough apart so that vias 4b do not penetrate the electro-optical layer 3. The two metal pads 4a are formed on the sealing layer 5, and each metal via 4b is electrically connected to at least two doped pads 6, penetrates the sealing layer 5, but does not penetrate the electro-optical layer 3. As already mentioned, the sealing layer is optional, and if there is no sealing layer, the metal pads 4a are positioned in contact with the embedded dielectric layer 1b.

[0052] Figure 4 shows an embodiment of a Mach-Zehnder-like modulator. Two waveguides 2a are located beneath the electro-optic layer 3, and three electrodes 4G, 4S are used to apply dedicated electric fields to the two hybrid optical modes generated in the waveguides 2a and the electro-optic layer, respectively. As is well known, the central electrode 4S is generally intended to carry the modulation signal, and the two lateral electrodes 4G are electrical grounds. It should be noted that electrodes 4S, 4G can be extended along the entire length of the modulator MOD to increase modulation efficiency.

[0053] The modulation block MOD is thus formed by two branches. Multiple such modulation blocks can, of course, be provided in the integrated photonic device according to the present invention.

[0054] Figure 5a shows a top view of a very favorable example of the implementation of the device shown in Figure 4. This figure clearly shows an electro-optic layer 3 (in the form of a thumbnail) overhanging two waveguides 2a and metal tracks 7. These metal tracks 7 are positioned in the plane below the waveguides 2a of layer 2 of the photonic components (as in the configuration shown in Figure 3a). The waveguides 2a and metal tracks 7 extend longitudinally across this layer 3 on both sides of the electro-optic layer 3. Thus, the ends of the waveguides 2a and metal tracks 7 do not protrude from this layer 3, which in turn makes it possible to place metal pads 4a at the ends of the metal tracks 7, and thus makes it possible to prevent metal vias 4b from penetrating this layer 3.

[0055] In this plan view, the waveguide 2a and metal track 7 extend longitudinally to define a series of zones, namely, an input zone z1, a transition zone z2, a core zone where modulation occurs, a new transition zone z2, and an output zone z4.

[0056] Figure 5b shows cross-sections of the device shown in Figure 5a, specifically the input zone z1 and output zone z2 (section AA in Figure 5a), the transition zone z2 (section BB), and the core zone z3 (section CC) of the modulator MOD.

[0057] Figure 5b shows the variation in the thickness of waveguide 2a according to different zones of the modulator. In particular, Ep2 is thinner in the core zone z3 than in the transition zone z2 and input / output zone z1. The relatively thicker thickness in the transition zone z2 prevents reflection due to the presence of the electro-optic layer 3. The relatively thin thickness in the core zone z3 increases the confinement of the electro-optic layer 3 within the material, and therefore increases the modulation efficiency. In this advantageous configuration, waveguide 2a extending longitudinally on both sides of the electro-optic layer 3 therefore has less thickness in the electro-optic layer 3 than the rest of waveguide 2a.

[0058] Furthermore, to limit these reflections, it is preferable to use a wider waveguide 2a in the input-output zones z1, z4 and the transition zone z2 than in the core zone z3. A waveguide with reduced width in the modulator's core zone z2 allows for the deconfinement of the optical modes of waveguide 2a and further confinement within the material of the electro-optic layer 3.

[0059] Therefore, the configuration shown in Figures 5a and 5b enables control of the optical mode MH (shown in Figure 5b), thereby allowing the optical mode MH to propagate efficiently and be generated within the electro-optic layer 3 in the core zone Z3, effectively modulating this optical mode MH.

[0060] Please note that in the method presented with reference to Figures 1a to 1h, it is particularly easy to form and structure the semiconductor surface layer 1c to the desired width and thickness.

[0061] Figure 6a shows a top view of the device shown in Figure 4 in the core zone z3 (cross section CC in Figure 6a) when the electrodes are mounted by the doped pads 6, as described in relation to Figures 2, 2a, and 2b, and Figure 6b shows a cross-sectional view thereof. In this configuration, the metal track 7 is in electrical contact with the doped pads 6.

[0062] Naturally, the present invention is not limited to the embodiments described, and various modified embodiments can be envisioned without departing from the scope of the invention as defined by the claims.

[0063] It should be noted that in all the embodiments described above, the sealing layer 5 is entirely optional. A diagram without the sealing layer 5 is shown in [Figure 7c]. In this case, the metal pad 4a can be placed directly on the embedded dielectric layer 1b.

[0064] It may also be possible to integrate photonic components other than those already explicitly presented into the device. For example, the carrier substrate 1e may have an air-filled cavity 8. Located beneath and in line with the waveguide 2a, this air cavity 8 can be used to improve matching between the optical mode and the radio frequency mode, and thus improve the modulation bandwidth. This cavity 8 is shown in the embodiment shown in [Figure 4], but is applicable to all embodiments described herein.

[0065] When a photonic device is intended to form a modulator, it is not necessarily implemented by a Mach-Zehnder interferometer as exemplified in this disclosure. Therefore, the modulator may be implemented, for example, by a resonant ring modulator or by a Michelson-like interferometer.

[0066] Furthermore, in addition to the modulator shown in the example, or instead, the photonic device may include other components that utilize the properties of the electro-optical layer.

[0067] Figures 7a and 7b show a photonic device comprising two modulation blocks MOD, where the electro-optic layer 3 does not completely cover the embedded dielectric layer 1b. This configuration is used to inject / generate external light radiation into or from the photonic device by placing surface couplers GC, GC' on the exposed embedded dielectric layer 1b that is not covered by the electro-optic layer. In Figure 5a, the surface coupler GC is formed in the semiconductor layer 1c of the starting substrate during the process of forming the layer 2 of the photonic component. A metal mirror M is embedded in the coating material of the coating layer to guide the light radiation toward the waveguide 2a. In the case of Figure 5b, the surface coupler GC' is also embedded in the coating material. It may be composed of silicon nitride. In this case as well, the surface couplers illustrated in Figures 5a and 5b can be incorporated into any of the embodiments described herein.

Claims

1. A method for preparing a photonic device, - A step of providing a starting substrate (1) including a base substrate (1a), an embedded dielectric layer (1b) disposed in contact with the base substrate (1a), and a surface layer (1c) disposed in contact with the embedded dielectric layer (1b) having a refractive index greater than that of the embedded dielectric layer (1c), - A step of processing the starting substrate (1) to form a layer (2) of photonic components, wherein the photonic components are located within a coating material (2e) and include at least one waveguide (2a) formed within the surface layer (1c), - A step of transferring the photonic component layer (2) to the carrier substrate (1e), removing the base substrate (1a) to expose the embedded dielectric layer (1b), - A step of transferring an electro-optic layer (3) onto at least a portion of the embedded dielectric layer (1b), wherein the electro-optic layer (3) has a first surface in contact with the embedded dielectric layer (1b) and a second surface opposite to the first surface, and the electro-optic layer (3) extends at least partially above the waveguide (2a) so that hybrid optical modes can be generated within the waveguide (2a) and within the electro-optic layer (3), A method comprising the step of forming at least two electrodes arranged laterally on both sides of the waveguide (2a) and configured to generate a modulated electric field within the electro-optic layer (3) and to block the hybrid optical mode.

2. The surface layer (1c) is formed from a semiconductor material, as described in claim 1.

3. The method according to claim 1 or 2, wherein the step of forming the electrode includes depositing a sealing layer (5) that is in contact with the second surface of the electro-optic layer (3) and / or the embedded dielectric layer (1b).

4. The method according to any one of claims 1 to 3, wherein the step of forming the electrode includes depositing a metal pad (4a) above the second surface of the electro-optic layer (3) and / or above the embedded dielectric layer (1b).

5. The method according to any one of claims 1 to 4, wherein the step of forming the electrode includes forming at least two metal vias (4b).

6. The method according to any one of claims 1 to 5, wherein the step of processing the starting substrate (1) includes forming at least two dope pads (6) in the semiconductor surface layer (1c), the two dope pads (6) being arranged laterally on both sides of the waveguide (2a).

7. The method according to any one of claims 5 or 6, wherein the step of processing the starting substrate (1) includes forming at least two metal tracks (7) within the layer (2) of the photonic component.

8. It is a photonic device, - Carrier substrate (1e), - A layer (2) of photonic components, which is disposed in contact with the carrier substrate (1e) and includes at least one waveguide (2a) disposed within the coating material (2), - The embedded dielectric layer (1b) is in contact with the waveguide (2a) and is placed on the layer (2) of the photonic component, - An electro-optic layer on the embedded dielectric layer (1b), wherein the electro-optic layer (3) has a first surface in contact with the embedded dielectric layer (1b) and a second surface opposite to the first surface, the second surface extending at least partially above the waveguide (2a) so as to be able to generate hybrid optical modes within the waveguide (2a) and within the electro-optic layer (3), A photonic device comprising: at least two electrodes arranged laterally on both sides of the waveguide (2a) and configured to generate a modulated electric field within the electro-optic layer (3) and to block the hybrid optical mode.

9. The photonic device according to claim 8, wherein the embedded dielectric layer (1b) has a thickness of less than 300 nm, preferably less than 100 nm, and / or has a thickness uniformity of 50 nm or less.

10. The photonic device according to claim 8 or 9, wherein the waveguide (2a) is formed from a semiconductor material, preferably silicon or silicon nitride.

11. The photonic device according to any one of claims 8 to 10, wherein the waveguide (2a) extends longitudinally on both sides of the electro-optic layer (3), and the waveguide (2a) has a thickness smaller than the rest of the waveguide (2a) in the electro-optic layer (3).

12. A photonic device according to any one of claims 8 to 11, comprising a sealing layer (5) that contacts the second surface of the electro-optic layer (3) and / or the embedded dielectric layer (1b).

13. The photonic device according to any one of claims 8 to 12, wherein the at least two electrodes each include two metal pads (4a) disposed above the electro-optic layer (3) and / or above the embedded dielectric layer (1b).

14. The photonic device according to any one of claims 8 to 13, wherein the at least two electrodes include at least two metal vias (4b).

15. The photonic device according to any one of claims 8 to 14, wherein each of the at least two electrodes comprises at least two pads (6) formed from a doped semiconductor material and disposed within the layer (2) of the photonic component, the two doped pads (6) being arranged laterally on both sides of the waveguide (2a).

16. The photonic device according to any one of claims 8 to 15, wherein each of the at least two electrodes comprises two metal tracks (7) disposed within the layer (2) of the photonic component, the metal tracks being located in the plane between the waveguide (2a) and the carrier substrate (1e).

17. A photonic device according to any one of claims 8 to 16, comprising two waveguides (2a) at least partially disposed beneath the electro-optic layer (3), wherein the two waveguides form two arms of a modulator (MOD).

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