Integrated electrical and optical apparatus for electrical characterization and laser annealing

Abstract

The apparatus includes an optical apparatus and an electrical characterization apparatus. The optical apparatus and the electrical characterization apparatus include an integrated configuration for performing laser annealing operations to tune the junction resistance of a superconducting tunnel junction device on a quantum chip, and for performing in-situ resistance measurements to measure the junction resistance of the superconducting tunnel junction device on the quantum chip.

Description

[Background technology]

[0001] This disclosure generally relates to techniques for tuning Josephson junction devices, and more particularly to laser annealing systems and techniques for tuning the tunnel junction resistance of Josephson junction devices. Quantum computing systems can be implemented using a circuit quantum electrodynamics (cQED) architecture constructed using quantum circuit components such as superconducting qubits (e.g., fixed-frequency transmon qubits), superconducting quantum interference devices (SQUIDs), and other types of superconducting devices including Josephson junction devices. In particular, a superconducting qubit (qubit) is an electronic circuit implemented using components such as superconducting tunnel junctions (e.g., Josephson junctions), inductors, and / or capacitors, and behaves as a quantum mechanical anharmonic (nonlinear) oscillator in a quantized state when cooled to cryogenic temperatures. Fixed-frequency qubits, such as transmon qubits, have a transition frequency (f) corresponding to the energy difference between the ground state |0> and the first excited state |1> of the qubit. 01 It has (as indicated). The tunnel junction resistance (R) of the cubit Josephson junction. J (This is written as) the transition frequency f of the qubit 01 It is known that it is possible to estimate this.

[0002] A solid-state quantum processor may include a plurality of superconducting qubits arranged in a given lattice structure (e.g., a square lattice, a heavy hexagonal lattice) to enable quantum information processing through quantum gate operations (e.g., single-qubit gate operations and multi-qubit gate operations) where quantum information is generated and encoded in the computational ground states of a single qubit (e.g., |0> and |1>), superpositions of computational ground states of a single qubit, and / or entangled states of multiple qubits. Continuous technological advancements in quantum processor design are enabling rapid scaling of both the physical number of superconducting qubits and the computational power of quantum processors. In fact, while current quantum processors have more than 50 qubits, future quantum processors are expected to have far more qubits, for example, on the order of hundreds, thousands, or even larger.

[0003] Scaling the number of qubits (e.g., fixed-frequency transmon qubits) in a qubit lattice while maintaining high-fidelity quantum gate operations remains a major challenge in quantum computing. For example, as superconducting quantum processors scale to larger numbers of qubits, frequency congestion within the qubit lattice becomes increasingly problematic because the qubit transition frequencies must be precisely controlled to minimize gate errors that can arise from lattice frequency collisions (for example, improper detuning between superconducting qubits can reduce the fidelity of multi-qubit gate entanglement operations). However, due to variations in semiconductor processing, the transition frequencies of fabricated superconducting qubits can deviate from the design target.

[0004] In this regard, laser annealing techniques can be used to adjust the frequency of qubits after manufacturing, thereby selectively tuning the fixed-frequency qubits of a given qubit grating to a desired frequency pattern. In particular, by selectively trimming (i.e., tuning) the frequency of individual qubits after manufacturing, it is possible to locally thermal anneal the Josephson junctions of the qubits, thereby reducing the tunnel junction resistance R of each Josephson junction. J (and correspondingly, the respective qubit transition frequencies f 01) can utilize a laser annealing technique to increase the collision-free yield of a fixed-frequency qubit lattice by adjusting and stabilizing ) with high accuracy. However, tuning the qubit transition frequency through laser thermal annealing is not easy, for example, due to the inherent variations of the laser thermal annealing process itself and / or variations in the equipment utilized to perform such laser thermal annealing after manufacturing to tune the qubit transition frequency within a given qubit lattice. SUMMARY OF THE INVENTION

[0005] Exemplary embodiments of the present disclosure include a laser annealing apparatus for laser tuning of junction resistance of a superconducting tunnel junction device (e.g., a Josephson junction).

[0006] An exemplary embodiment includes an apparatus including an optical device and an electrical characterization device. The optical device and the electrical characterization device comprise an integrated configuration for performing a laser annealing operation that tunes the junction resistance of a superconducting tunnel junction device on a quantum chip, and for performing in-situ resistance measurement that measures the junction resistance of the superconducting tunnel junction device on the quantum chip.

[0007] Advantageously, the integration of the optical device and the electrical characterization device enables integration of in-situ operations for, for example, laser annealing of a Josephson junction and measurement of its junction resistance, which can support laser tuning operations (e.g., tracking the progress of tuning across multiple iterations of laser annealing) to improve the accuracy and throughput of the laser tuning operations. For example, the integration of laser tuning and in-situ electrical characterization can increase the throughput and scaling of laser tuning processes, such as the LASIQ process that laser anneals Josephson junctions of superconducting qubits to tune (e.g., trim) the transition frequency of the superconducting qubits.

[0008] Another exemplary embodiment includes a system comprising a control system and a laser annealing apparatus coupled to the control system. The laser annealing apparatus comprises an integrated configuration of an optical device and an electrical property evaluation device. The control system is configured to cause the laser annealing apparatus to perform a laser annealing operation for tuning a junction resistance of a superconducting tunnel junction device on a quantum chip, and to perform in-situ resistance measurement for measuring the junction resistance of the superconducting tunnel junction device on the quantum chip.

[0009] Another exemplary embodiment provides a method, comprising performing an annealing operation for tuning a junction resistance of a superconducting tunnel junction device on a quantum chip, wherein performing the annealing operation comprises: performing a thermal annealing operation that heats the quantum chip and thermally anneals the superconducting tunnel junction device to partially shift the junction resistance of the superconducting tunnel junction device toward a respective target junction resistance of the superconducting tunnel junction device; subsequent to the thermal annealing operation, performing resistance measurement on the superconducting tunnel junction device to measure a respective junction resistance of the superconducting tunnel junction device; and performing a laser annealing operation on the superconducting tunnel junction device to shift the junction resistance of the superconducting tunnel junction device from the respective measured junction resistance to the respective target junction resistance.

[0010] Another exemplary embodiment includes a method, comprising performing a laser tuning process that tunes a junction resistance of a superconducting tunnel junction device on a quantum chip using a laser annealing apparatus, to perform a laser annealing operation that laser-tunes the junction resistance of the superconducting tunnel junction device and perform in-situ resistance measurement that measures the junction resistance of the superconducting tunnel junction device on the quantum chip.

[0011] Another exemplary embodiment includes a computer program product for laser tuning. The computer program product includes one or more computer-readable storage media and program instructions collectively stored on one or more computer-readable storage. The program instructions include program instructions for performing a laser tuning process to tune the junction resistance of a superconducting tunnel junction device on a quantum chip using a laser annealing apparatus to perform a laser annealing operation to laser tune the junction resistance of the superconducting tunnel junction device and to perform an in-situ resistance measurement to measure the junction resistance of the superconducting tunnel junction device on a quantum chip.

[0012] In another exemplary embodiment, which may be combined with the preceding paragraph, the electrical characterization apparatus is configured to perform a DC resistance measurement operation to measure the junction resistance of a superconducting tunnel junction device.

[0013] In another exemplary embodiment, which may be combined with the preceding paragraph, the electrical characterization apparatus is configured to perform an alternating current (AC) resistance measurement operation to measure the junction resistance of a superconducting tunnel junction device.

[0014] In another exemplary embodiment, which may be combined with the preceding paragraph, the electrical characterization apparatus includes a wafer prober, the wafer prober includes at least one of an automated and a semi-automated wafer probing system.

[0015] In another exemplary embodiment, which may be combined with the preceding paragraph, the electrical characterization apparatus has an environment chamber configured to control the surrounding environment of the quantum chip when performing a laser annealing operation.

[0016] In another exemplary embodiment, which may be combined with the preceding paragraph, the environmental chamber is configured to control the surrounding environment by (i) controlling the composition of one or more gases within the environmental chamber, and (ii) generating a vacuum within the environmental chamber.

[0017] In another exemplary embodiment, which may be combined with the preceding paragraph, the electrical characterization apparatus includes a thermal control system configured to (i) heat the quantum chip to perform a bulk thermal annealing operation that shifts the junction resistance of the tunnel junction device of the quantum chip, and (ii) cool the quantum chip to perform an in-situ resistance measurement.

[0018] Other embodiments will be described in the following detailed description of exemplary embodiments, which should be read in conjunction with the attached figures. [Brief explanation of the drawing]

[0019] [Figure 1] This figure schematically illustrates a laser annealing system according to an exemplary embodiment of the present disclosure.

[0020] [Figure 2A] This figure schematically shows a laser annealing apparatus including a modular optical scope unit according to an exemplary embodiment of the present disclosure.

[0021] [Figure 2B] This is a perspective view of a modular optical scope unit according to an exemplary embodiment of the present disclosure.

[0022] [Figure 2C] This figure shows a flowchart illustrating a method for performing a laser tuning operation using a laser annealing apparatus including a modular optical scope unit, according to an exemplary embodiment of the present disclosure.

[0023] [Figure 3A] This figure schematically illustrates a laser annealing system according to another exemplary embodiment of the present disclosure.

[0024] [Figure 3B] This figure schematically shows an optical system that can be implemented in the laser annealing system of Figure 3A, according to an exemplary embodiment of the present disclosure.

[0025] [Figure 4] This figure schematically illustrates a laser annealing system according to another exemplary embodiment of the present disclosure.

[0026] [Figure 5] This is a flowchart of a method for tuning a Josephson junction of a qubit lattice qubit device based on a tuning plan according to an exemplary embodiment of the present disclosure.

[0027] [Figure 6] This is a flowchart of a method for performing an iterative laser annealing process, according to an exemplary embodiment of the present disclosure, which progressively shifts the junction resistance of a Josephson junction to its respective target junction resistance.

[0028] [Figure 7-1] Figure 7A is a flowchart of a method for focusing and aligning with a target Josephson junction for the purpose of performing in-situ Josephson junction resistance measurement, according to an exemplary embodiment of the present disclosure.

[0029] Figure 7B is a flowchart of a method for performing contact resistance and contact stability check operations prior to performing in-situ Josephson junction resistance measurement, according to an exemplary embodiment of the present disclosure.

[0030] [Figure 7-2]Figure 7C is a flowchart of a method for focusing and aligning a laser to a target Josephson junction for the purpose of performing a laser annealing process, according to an exemplary embodiment of the present disclosure.

[0031] Figure 7D is a schematic diagram illustrating a process for aligning a contact probe and a laser spot with respect to a Josephson junction of a qubit, according to an exemplary embodiment of the present disclosure.

[0032] [Figure 8A] This is a flowchart illustrating a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with in-situ DC resistance measurement using a laser annealing apparatus according to an exemplary embodiment of the present disclosure.

[0033] [Figure 8B] This is a flowchart illustrating a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with in-situ DC resistance measurement using a laser annealing apparatus according to another exemplary embodiment of the present disclosure.

[0034] [Figure 9] This is a flowchart illustrating a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with in-situ AC resistance measurement using a laser annealing apparatus according to an exemplary embodiment of the present disclosure.

[0035] [Figure 10] This figure schematically illustrates an exemplary architecture of a computing environment for implementing a control system configured to control a laser annealing system to tune a Josephson junction, according to an exemplary embodiment of the present disclosure. [Modes for carrying out the invention]

[0036] Herein, exemplary embodiments of the present disclosure will be described in further detail with respect to a laser annealing apparatus and techniques for utilizing the laser annealing apparatus to laser-tune the junction resistance of a superconducting tunnel junction device (e.g., a Josephson junction of a superconducting qubit device). Generally, exemplary embodiments of the present disclosure include a laser annealing apparatus that includes an optical apparatus and an electrical characterization apparatus. The optical apparatus and electrical characterization apparatus include an integrated configuration for performing laser annealing operations to tune the junction resistance of a superconducting tunnel junction device on a quantum chip and for performing in-situ resistance measurements to measure the junction resistance of a superconducting tunnel junction device on a quantum chip.

[0037] More specifically, in some embodiments, the optical apparatus is used for laser annealing operations and optical characterization. Laser annealing operations include, for example, generating a laser beam, performing beam shaping to generate a desired laser beam spot pattern for laser annealing, and controlling the laser beam exposure time to control the annealing time. Optical characterization includes, for example, enabling computer vision inspection of the device being laser-annealed and performing imaging and pattern recognition to support alignment of the target device to the laser beam spot pattern for laser annealing, and aligning the electrical probe of the electrical characterization apparatus to the contacts of the target device for electrical characterization operations (e.g., measuring the junction resistance of a Josephson junction). Furthermore, in some embodiments, the electrical characterization apparatus is configured to enable electrical characterization of the target device (e.g., a Josephson junction) before, during, and after laser tuning. For example, integration of the electrical characterization apparatus makes it possible to perform in-situ resistance measurements during iterative laser annealing operations on a Josephson junction to track the progression of the resistance shift of the junction resistance of the Josephson junction to the respective target junction resistance.

[0038] In some embodiments of the laser annealing apparatus, the optical apparatus includes a separate optical configuration (e.g., a desktop configuration), which includes a separate optically coupled laser unit and an imaging unit. The laser unit includes a laser source and optical components that control the laser annealing operation (e.g., generating and shaping the laser beam into a desired laser beam spot pattern for laser annealing, controlling the exposure time of the laser beam to control the annealing time, etc.). The imaging unit is configured to image a sample within the field of view of the laser unit, for example, to enable computer vision inspection and alignment operations.

[0039] In some embodiments of the laser annealing apparatus, the optical apparatus includes a laser unit and a modular optical scope unit (e.g., a modular microscope unit), the laser unit and the modular optical scope unit being optically coupled by an optical fiber. The laser unit includes a laser source configured to generate a laser beam. The modular optical scope unit includes an optically integrated configuration of an imaging unit, optical components, a laser beam shaping device, and a laser beam focusing element. The laser beam generated by the laser unit is transmitted to the modular optical scope unit via an optical fiber. In such a configuration, the modular optical scope is configured to perform various laser annealing and optical characterization functions, such as beam shaping the laser beam (received from the laser unit) to generate a desired laser beam spot pattern for laser annealing, controlling the laser beam exposure time to control the annealing time, imaging for pattern image recognition to support computer vision inspection operations, and laser beam and electrical probe alignment operations.

[0040] In all exemplary embodiments of the laser annealing apparatus, the integration of the optical apparatus and the electrical characterization apparatus enables the integration of laser tuning of a superconducting tunnel junction device (e.g., Josephson junction) and in-situ electrical characterization of the superconducting tunnel junction device (e.g., measurement of junction resistance values) to support the laser tuning operation (e.g., tracking the progress of tuning over multiple iterations of laser annealing) in order to increase the throughput of the laser tuning operation. The integration of laser tuning and in-situ electrical characterization makes it possible to increase the throughput and scaling of laser tuning processes, such as the LASIQ process, which laser anneales the Josephson junction of a superconducting qubit to tune (e.g., trim) the transition frequency of the superconducting qubit.

[0041] It should be understood that the various features shown in the attached drawings are schematic illustrations and not drawn to scale. Furthermore, the same or similar reference numerals are used throughout the drawings to indicate the same or similar features, elements, or structures, and therefore, a detailed description of the same or similar features, elements, or structures is not repeated in each of the drawings. In addition, the term “exemplary” as used herein means “serving as an example, case, or illustration.” Any embodiment or design described as “exemplary” herein should not be construed as being preferable or advantageous to other embodiments or designs. Moreover, the terms “approximately” or “substantially” with respect to percentages, ranges, etc., as used herein, are intended to indicate that they are approximate or approximate, not exact. For example, the terms “approximately” or “substantially” as used herein suggest that there may be a small margin of error, such as 1% or less of the amount mentioned.

[0042] The phrase "configured to..." should be further understood to mean that when used in combination with a circuit, structure, element, component, or similar that performs one or more functions or otherwise provides some functionality, embodiments in which such circuit, structure, element, component, or similar is implemented in hardware, software, and / or combinations thereof, and in implementations including hardware, the hardware is intended to encompass embodiments in which the hardware may include individual circuit elements (e.g., transistors, inverters, etc.), programmable elements (e.g., application-specific integrated circuit (ASIC) chips, field-programmable gate array (FPGA) chips, etc.), processing devices (e.g., central processing units (CPUs), graphics processing units (GPUs), etc.), one or more integrated circuits, and / or combinations thereof. Therefore, when a circuit, structure, element, component, etc. is defined as being configured to provide a particular functionality, it is intended to include, but is not limited to, embodiments comprising elements, processing devices, and / or integrated circuits that enable the circuit, structure, element, component, etc. to perform that particular functionality when it is in operation (e.g., connected or otherwise deployed in a system, powered on, receiving input, and / or generating output), and also to include embodiments when the circuit, structure, element, component, etc. is in non-operational state (e.g., not connected or otherwise deployed in a system, not powered on, not receiving input, and / or generating output) or in a partially operational state.

[0043] Furthermore, the term “quantum chip,” as used herein, is intended to broadly refer to any device including qubits and, optionally, other quantum devices. For example, a quantum chip may be a semiconductor die containing an array (lattice) of qubits, manufactured on a wafer containing multiple dies and which can be split (cut) from the wafer using a die splitting process to provide split dies. In some cases, a quantum chip may be a wafer having multiple semiconductor dies. In the context of quantum computing, a quantum chip may include one or more processors for a quantum computer.

[0044] Furthermore, as used herein, the term “shot” refers to a laser annealing operation performed by applying laser power to a target element (e.g., a Josephson junction) over a specified duration (annealing time) to tune the target element. In the context of exemplary embodiments of the disclosure discussed herein, a laser tuning method is provided for tuning the junction resistance of a Josephson junction in a progressive and incremental manner, wherein multiple “shots” are applied to a given Josephson junction to tune its junction resistance to a target junction resistance, and the tuning method is in contrast to conventional methods for tuning a Josephson junction to a target junction resistance using only one laser shot.

[0045] As used herein and in the context of laser annealing processes, the terms “iterative” or “iteratively” are intended to refer to a process that includes a single “shot” by the LASIQ computer system and apparatus for determining the target annealing time and power for performing an annealing shot, along with the associated control, measurement, and calculation. Thus, a laser annealing iteration, or LASIQ iteration, refers to the entire process in which a Josephson junction is measured, the annealing power and annealing time are determined, and the annealing shot is performed. In this sense, a single iteration relates to one stage of the progressive approach to the resistance target for one Josephson junction, and thus involves the entire sequence of the laser annealing system and apparatus. Thus, the completion of tuning a junction (i.e., reaching its target resistance) can be said to proceed “iteratively.” The term “iterative process,” as used herein, is generally intended to refer to a set of iterations involving a Josephson junction, applicable to one or more qubits, or similar, where one or more qubits are tuned for approaching their respective targets.

[0046] The terms “gradual” or “progressive” as used herein and in the context of laser annealing processes are intended to refer to a progressive method of shifting the junction resistance of a Josephson junction toward its respective target resistance. Such a progressive method is the result of multiple annealing iterations, each of which involves a laser shot to change the junction resistance toward the desired target resistance. In addition, such a progressive method is asymptotic in the sense that the tuning rate nominally decreases as the junction resistance of a given Josephson junction approaches its respective target resistance.

[0047] The terms “adaptive” or “adaptively,” as used herein and in the context of the laser annealing process, are intended to refer to the appropriate selection of laser annealing parameters, including such parameters as laser annealing time and annealing power, as they relate to the laser shots, enabling the Josephson junction resistances to approach their respective resistance targets monotonically and asymptotically. The adaptive nature of the laser annealing iterations is achieved using the method described herein, thereby selecting the laser annealing time and power based on the historical reconstruction of the tuning progress of a particular junction. The method described herein takes into account the rate of historical tuning of the particular junction being tuned, thereby mitigating the risk of missing the resistance target (for example, by using laser shots with extra time to allow the junction resistance to tune beyond the desired resistance target).

[0048] The term “round robin,” as used herein and in the context of a laser annealing process for tuning Josephson junctions of qubits, is intended to refer to a tuning process in which, for example, all Josephson junctions of qubits on a multi-qubit device undergo a laser annealing process sequentially, followed by another round robin or a series of round robins. Such round robins may be performed sequentially until all qubits on the multi-qubit device reach their respective targets. For example, a divided quantum chip may include multiple qubit devices containing Josephson junctions (e.g., 100 qubits denoted as Q1, Q2, Q3, ..., Q100). In an exemplary embodiment of the tuning method, Q1 is first tuned in one or more annealing iterations, as desired. The process then proceeds to Q2, where one or more annealing iterations may be performed, as desired. The process then proceeds to Q3, etc., until Q100 is finally tuned in one or more annealing iterations, as desired. The entire process from Q1 to Q100 is defined as a single round-robin. After this first round-robin, the process may return to Q1 and repeat until Q100 is reached. A successive round-robin process may provide means of time control and delay between iterations or sets of iterations, thereby allowing the Josephson junctions to relax to their final junction resistance prior to the next annealing iteration or set of iterations.

[0049] Figure 1 schematically shows a laser annealing system 100 for tuning a Josephson junction according to an exemplary embodiment of the present disclosure. In some embodiments, the laser annealing system 100 tunes the junction resistance R JThe system is configured to implement a LASIQ (Laser Annealing of Stochastically Impaired Qubits) tuning method for laser annealing of Josephson junctions of post-manufactured qubits in order to adjust and stabilize the system and thereby selectively tune the individual qubit frequencies via laser thermal annealing of each Josephson junction. As schematically shown in Figure 1, the laser annealing system 100 includes a control system 110, a laser unit 120, an optical fiber 125, a microscope unit 130, a probe unit 140, and an optional environment chamber 150.

[0050] The control system 110 includes a laser annealing control unit 111, an imaging control unit 112, a probe control unit 113, a data processing system 114, and a tuning calibration data database 115. The laser unit 120 includes a laser source 121, an isolator 122, a laser power control block 123, and a fiber coupler 124. The microscope unit 130 includes a light source 131, a camera 132, a laser beam shutter 133, a fiber collimator 134, a laser beam shaper 135, a plurality of optical components 136, and an objective lens 137. The probe unit 140 includes an XYZ stage 142 and an electrical probe 144. A quantum chip 160 (or any other similar under-test device) can be mounted on the XYZ stage. In some embodiments, the quantum chip includes a lattice of superconducting qubits, where each superconducting qubit includes at least one respective Josephson junction that, after fabrication, can be annealed using a laser annealing system 100 to tune the junction resistance and thus the transition frequency of the superconducting qubit.

[0051] In some embodiments, the laser unit 120 and the microscope unit 130 include a modular unit coupled together via an optical fiber 125. In some embodiments, the optical fiber 125 includes a single-mode (SM) polarization-maintaining (PM) optical fiber, which is configured to maintain the linear polarization of linearly polarized light injected into the optical fiber 125 by the laser unit 120 and propagated to the microscope unit 130. The microscope unit 130 includes a modular optical unit including visible light and laser optical components. The microscope unit 130 can be integrated with a prober unit 140 (e.g., a wafer-scale prober). In this regard, in some embodiments, the laser unit 120, the microscope unit 130, and the prober unit 140 can be physically coupled / mounted together to form an integrated laser annealing apparatus configured to perform laser annealing operations for tuning the junction resistance of a Josephson junction and to perform in-situ junction resistance measurements under the control of a control system 110. In some embodiments, the control system 110 is operationally / communicatively coupled to the laser unit 120, the microscope unit 130, and the prober unit 140 via wires and / or wirelessly. The control system 110 includes hardware and / or software for automated control of various operations of the laser unit 120, the microscope unit 130, and the prober unit 140 of the laser annealing system 100.

[0052] The laser unit 120 is configured to generate a laser beam used by the microscope unit 130 to generate a laser beam pattern including a single or multi-spot beam pattern for laser annealing a given Josephson junction. In some embodiments, the laser source 121 includes a solid-state diode pump that generates laser energy and a laser head that generates a focused laser beam from the laser energy emitted from the solid-state diode pump. In some embodiments, the diode pump includes a solid-state laser with a 532 nanometer (nm) (2x frequency) diode pump (e.g., a second harmonic generation (SHG) laser). In some embodiments, the power level of the laser source 121 (e.g., solid-state diode pump) can be adjusted by the control system 110. For example, the power level of the laser source 121 can be set to one of several different power level settings (e.g., low power, medium power, high power settings). The isolator 122 is configured to provide polarization cleanup and optical isolation to reduce unwanted feedback of the laser source 121 to the laser head.

[0053] The laser power control block 123 is configured to actively control and calibrate the power of the focused laser beam. For example, in some embodiments, the laser power control block 123 includes a half-wave plate and a polarizing beam splitter (PBS) coupled to a damper. The half-wave plate is configured to shift the polarization direction of the laser beam output from the isolator 122. The laser power control block 123 further includes a power monitor including an optical wedge configured, for example, to redirect some of the laser beam power to a silicon photodiode. The silicon photodiode generates an electrical signal indicating the laser power level, which is feedback to a control system 110 (e.g., a laser annealing control unit 111), which generates a control signal that is applied to the laser power control block 123 to adjust the laser power as instructed for laser tuning of the Josephson junction. More specifically, in some embodiments, the power level of the laser beam can be roughly adjusted by controlling the power output of the laser source 121, while the power level of the laser beam can be finely adjusted by the operation of the laser power control block 123.

[0054] For example, in some embodiments, the half-wave plate of the laser power control block 123 is configured to shift the polarization direction of the laser beam output from the isolator 122, and the half-wave plate includes an adjustable rotation, which can be electronically controlled via the laser annealing control unit 111 to adjust the total attenuation to a desired power level by rotating the polarization incident on the polarization beam splitter. In some embodiments, the polarization beam splitter of the laser power control block 123 includes an optical filter that allows light waves of a specific polarization associated with the laser beam to pass through the optical filter and light waves of other polarizations to be blocked, thereby generating a laser beam with well-defined polarization.

[0055] Polarized laser light generated by the laser unit 120 is coupled to a single-mode polarization-retaining optical fiber 125 (e.g., a single-mode polarization-retaining optical fiber) via an optical fiber coupler 124 and propagated to the microscope unit 130. In the microscope unit 130, a fiber collimator 134 (e.g., a collimating lens) is configured to convert the laser light output from the optical fiber 125 into a free-space collimated beam. In some embodiments, the microscope unit 130 includes a power monitor, such as a beam sampler (e.g., a beam splitter) and a photodiode, to monitor the power of the collimated laser beam downstream from the power control / adjustment mechanism provided by the laser unit 120, enabling precise exposure control.

[0056] Furthermore, in the microscope unit 130, the laser beam shutter 133 includes an electronic shutter that operates under the control of, for example, the laser annealing control unit 111 of the control system 110, to control the duration of laser exposure when annealing a given Josephson junction. For example, the laser beam shutter 133 can be opened for a given duration when annealing a target Josephson junction, allowing the annealing laser beam to be projected onto a quantum chip 160 adjacent to the target Josephson junction, and then automatically closed after that given duration. In this regard, the laser power level and pulse duration (laser exposure) can be controlled to achieve a desired change (e.g., decrease) in the resistance of the annealed Josephson junction.

[0057] The laser beam shaper 135 is configured to split a collimated laser beam (passing through the laser beam shutter 133) into two or more laser beams having slightly different angles to each other. In some embodiments, the laser beam shaper 135 includes a diffractive optical element (DOE), such as a diffractive beam splitter, which splits a single laser beam into several beams (diffraction order) in a predefined configuration. The diffractive beam splitter includes a holographic optical element that imparts a precise angle (e.g., a 0.5-degree shift) to the incoming laser beam in the positive and negative angular directions with respect to a reference plane, thereby generating multiple outgoing laser beams.

[0058] The number of laser beams generated by the laser beam shaper 135 may vary depending on a given application. For example, in some embodiments, the laser beam shaper 135 includes a 2×2 diffraction beam splitter, which splits a single collimated laser beam into four separate laser beams, thereby resulting in a final quad-spot irradiation pattern projected onto the surface of the quantum chip 160 at the target location, an exemplary embodiment of which will be discussed below in conjunction with Figure 7D. In some embodiments, the laser beam shaper 135 may be switched manually or automatically using different diffraction beam splitters (e.g., multiple DOEs on a rotating stage) to obtain different laser spot patterns as desired. In this regard, different diffraction beam splitters may be selected for use to generate any desired number (e.g., 2, 3, 5, 6, etc.) of laser beams with a defined irradiation pattern tailored to different applications.

[0059] The microscope unit 130 implements a light source 131 and a camera 132 for illuminating and viewing target features (e.g., qubits and corresponding Josephson junctions) on the surface of the quantum chip 160 within a given field of view (FOV) of the microscope unit 130. In some embodiments, the light source 131 includes any suitable photogenerating device, including one or more light-emitting diodes (LEDs) having a desired photon wavelength, a monochromatic light source, etc. The light source 131 implements Koehler illumination, along with some of the optical components 136 in the optical viewing path, to create uniform illumination of the target features in the FOV of the microscope unit 130, and to ensure that the image of the light source 131 is not visible in the image obtained as a result of being captured by the camera 132.

[0060] In some embodiments, camera 132 includes a charge-coupled device (CCD) image sensor or an infrared (IR) complementary metal oxide semiconductor (CMOS) image sensor. Camera 132 is used to capture an image of a target area on the surface of the quantum chip 160 to facilitate, for example, aligning an electrical probe 144 to a contact electrode when performing in-situ Josephson junction resistance measurement, or aligning a laser beam pattern onto a target area when performing laser annealing operations. For example, in some embodiments, a Josephson junction of a given qubit is aligned to the center of the FOV of the microscope unit 130, for example, to a Josephson junction template image, using pattern recognition. Also in some embodiments, more than one camera may be used in parallel by using a beam splitter to split the image path and, for example, by using an IR CMOS camera in addition to a visible wavelength camera, and these may be used for process monitoring (e.g., wide FOV for inspection, process tracking, or similar).

[0061] The optical component 136 includes various types of optical components for directing, reflecting, focusing, modifying, and shaping optical signals (e.g., a laser beam for annealing and visible / IR light for viewing) as needed for a given application. For example, the optical component 136 includes components such as mirrors, beam splitters, filters, polarizers, and various lenses such as tube lenses, objective lenses, relay lenses, etc. The objective lens 137 is the lens located closest to the device under test (quantum chip 160) and provides basic magnification for generating a magnified image visible by camera 132 and plays a role in projecting the annealing laser beam pattern (e.g., a quad-spot pattern) onto the surface of quantum chip 160. In some embodiments, the objective lens 137 includes a working distance (WD) objective lens. In exemplary, non-limiting embodiments, the objective lens 137 (together with an optional second objective lens) is configured to focus the laser beam and multispot pattern fourfold and simultaneously provide a 20x image magnification.

[0062] The probe unit 140 is configured to automatically move the quantum chip 160 during the laser annealing process to align the target Josephson junction of a given qubit within the FOV of the microscope unit 130, thereby performing in-situ Josephson junction resistance measurement and laser annealing of the target Josephson junction. In particular, the quantum chip 160 is mounted on an automated XYZ stage 142, which is moved in a three-dimensionally controllable manner to align the features of the quantum chip 160 within the FOV of the microscope unit 130 and to enable contact between the electrical probe 144 and the contact pads on the quantum chip 160. For example, in some embodiments, during the laser annealing process, the target Josephson junction of a given qubit is aligned to the center of the FOV of the microscope unit 130 using an automated pattern recognition process in which features of an image captured by the camera 132 are automatically aligned to corresponding features of a template image to ensure proper positioning of the target Josephson junction and associated contact pads. In particular, the alignment process is performed to ensure accurate alignment between the contact pads of the target Josephson junction and the electrical probe 144 when performing in-situ Josephson junction resistance measurements. In addition, the alignment process is performed to ensure proper alignment between the target Josephson junction and the laser spot pattern when performing laser annealing operations.

[0063] As described above, the electrical probe 144 is implemented to perform in-situ Josephson junction resistance measurements during the laser annealing process. In particular, in-situ Josephson junction resistance measurements are performed between laser annealing operations (shots) to track the tuning progress of the Josephson junction of the qubit during a multi-stage (i.e., iterative) annealing process in which the Josephson junction is progressively tuned. In some embodiments, the electrical probe 144 includes two pairs of probes configured to perform 4-wire resistance measurements (or Kelvin resistance measurements) to more precisely measure the junction resistance of the Josephson junction. Generally, 4-wire (Kelvin) resistance measurements measure the current (I) flowing through the junction and the voltage (V) drop across the junction, and Ohm's law, i.e., R J = V / I = junction resistance R J This involves determining the resistance of a given Josephson junction.

[0064] In some embodiments, the electrical probe 144 includes a probe card mechanically mounted in a fixed position relative to the prober unit 140. In some embodiments, the integration of the microscope unit 130 and the prober unit 140 is configured to ensure that the sample imaging plane and the laser focus plane are substantially identical, while the probing plane is displaced by a predetermined amount from the sample imaging plane, e.g., 70 microns, 80 microns, etc. In this configuration, the electrical probe 144 is fixedly displaced from the image plane, and the Z position of the XYZ stage 142 (on which the quantum chip 160 is mounted) is moved to the default contact position, thereby establishing electrical contact between the electrical probe 144 and the target contact pad on the quantum chip 160, thereby performing in-situ Josephson junction resistance measurement. In some embodiments, the microscope unit 130 may be mounted on its own XYZ stage and, in addition, may be moved in their corresponding X, Y, and Z degrees of freedom.

[0065] In some embodiments, the XYZ stage is positioned at various locations to image, electrically characterize, and anneal the Josephson junction, thereby enabling these functions to be performed safely and effectively. The inventors use the terms “contact position,” “annealing position,” and “safety position” to describe the various positions of the XYZ stage.

[0066] When used herein and in the context of the laser annealing system 100, the term "contact position" is intended to refer to a position on the XYZ stage 142 such that the sample (i.e., the quantum chip 160) is in mechanical and electrical contact with the probe. That is, the surface of the sample is substantially identical to the probing plane. Electrical characterization may be performed in this "contact position" configuration, which typically involves 4-wire (Kelvin) resistance measurement. Each annealing iteration will typically involve junction resistance measurement, where the XYZ stage 142 is moved to the "contact position" prior to the subsequent annealing.

[0067] When used herein and in the context of the laser annealing system 100, the term “annealing position” is intended to refer to the Z position of the XYZ stage 142 such that the surface of the sample (i.e., quantum chip 160) is in the focal plane of the laser annealing beam. In exemplary embodiments, at the “annealing position,” the surface of the sample (i.e., quantum chip 160) is substantially identical to the imaging plane, thereby allowing both imaging and annealing to be performed at the same Z position on the XYZ stage 142, or, to put it equally, allowing both the sample and the laser beam to be simultaneously viewed in focus by the imaging system. In addition, at the “annealing position,” pattern recognition and corrective alignment may be performed so that the junction is correctly centered on the FOV prior to annealing. Similarly, at the annealing position, visual characterization, inspection, and the like may be performed to determine whether the chip is physically suitable for use as a chip candidate. Nominally, the "annealing position" may be selected as a fixed difference from the "contact position," which is defined herein as the "separation distance," and may be, for example, 70 microns, 80 microns, etc., and may be selected by the operator as desired.

[0068] When used herein and in the context of the laser annealing system 100, the term “safe position” is intended to refer to a large displacement of the Z position of the XYZ stage 142 such that the surface of the sample (i.e., the quantum chip 160) is safely displaced from the “contact position” so that the highest surface features of the sample do not cross the probing plane, or, to put it another way, so that no features on the sample intersect the probing plane. In this way, regardless of the selected X or Y position on the sample, the probe is not at risk of damage resulting from collision with any surface features while the XYZ stage 142 is in the “safe position”.

[0069] In an exemplary embodiment, the probe card is fixed at the Z position, and the “separation distance” is selected to be 70 microns, i.e., the “annealing position” is 70 microns below the “contact position”. In addition, the “safety position” may be selected to be (e.g.) 1000 microns or greater, or a value sufficiently greater than the height of any feature on the sample. When the apparatus is initialized, the relative positions of the sample plane, probing plane, imaging plane and laser annealing plane are not known in advance, and any operation performed using the laser annealing system 100 may exhibit, for example, image focus shift, poor electrical contact during probing, and / or poor annealing performance. Therefore, an initialization protocol must be performed to ensure that the contact position, annealing position and safety position are well defined. In an exemplary embodiment, to define these positions, the XYZ stage 142 may be programmed to move to a safe location on either a test chip, initialization chip, or similar, where a clean conductive surface (e.g., a contact pad) is available beneath the probe. In this exemplary embodiment, a dedicated initialization chip having an array of conductive contact pads is available for safe contact with the electrical probe 144. Subsequently, the XYZ stage 142 is incremented toward the electrical probe 144 at the Z position (e.g., in increments of 2 microns), and with each increment, the contact resistance is checked until a contact threshold (e.g., 100 ohms, or another threshold as desired) indicating successful contact between the sample and the probing plane is achieved, or equivalently, until the sample plane and the probing plane are in the same position and the XYZ stage 142 is in the “contact position”. Following the determination of the contact position, the XYZ stage 142 is lowered at the Z position by a desired “separation distance” of 70 microns, thereby bringing the XYZ stage 142 into the “alignment position”. However, there may be cases where the image focal plane has not yet reached a position substantially identical to the sample surface.In this case, the microscope unit may be adjusted manually using Z focus adjustment, or automatically (in the case where the microscope is mounted on its own XYZ stage and controlled by the imaging control unit 112), so that the imaging focus plane is substantially identical to the sample plane. Thus, using this protocol, the "annealing position" corresponds to the state where the sample surface is in focus on the microscope unit 130, and both imaging and annealing can now be performed at the "annealing position". If electrical measurements are desired, a highly reliable probing may be subsequently implemented by simply incrementing the Z position of the XYZ stage 142 by 70 microns (i.e., the "separation distance") or more, because some level of overtravel is desirable for robust electrical contact. Furthermore, a “safety position” may be defined so that when moving between qubits or between other features on the quantum chip 160, the XYZ stage 142 first moves to its safety position, then to the X and Y positions of the desired feature, and then to either an “annealing position” for imaging / tuning or a “contact position” for electrical characterization. This initialization protocol described above may be implemented in general to ensure that stage motion, imaging, annealing, and electrical measurements can be performed safely and with high reliability. In one or more embodiments, it should be understood that the above initialization protocol and the various positions of the XYZ stage 142 are actively used in the operation and calibration of the laser annealing system 100. In some embodiments, the laser focal plane may be designed as an additional degree of freedom relative to the image focal plane, and the laser beam may be focused or defocused as desired.

[0070] In some embodiments, the probe unit 140 is housed in or otherwise arranged within an optional environment chamber 150 to control the ambient environment during laser annealing, and different ambient environments affect the progress of laser annealing differently. For example, in some embodiments, the laser annealing system 100 may include an environment gas control system coupled to the environment chamber 150 and configured to inject a mixture of one or more gases into the environment chamber 150 to control the annealing environment. More specifically, in some embodiments, the environment gas control system may include a gas dilution unit connected to a plurality of gas cylinders storing different gases (e.g., nitrogen, dry air, etc.), the gas dilution unit can optionally mix different gases at various concentrations to provide a given gas environment for laser annealing, and inject the mixed gas into the environment chamber 150. In addition, the environment gas control system includes a vacuum system coupled to the environment chamber 150 to evacuate the annealing gas from the chamber or otherwise evacuate air from the environment chamber 150 in order to perform laser annealing in a vacuum atmosphere.

[0071] Furthermore, in some embodiments, a temperature control system is coupled to the XYZ stage 142 (e.g., a wafer chuck) to control the temperature of the XYZ stage 142 on which the quantum chip 160 is mounted. The XYZ stage 142 may be temperature-controlled to enable high-temperature annealing (e.g., bulk annealing) or low-temperature probing for low-noise electrical resistance measurement, and to reduce the relative contribution of substrate conductivity to junction resistance measurement. For example, in some embodiments, the XYZ stage 142 can be temperature-controlled in the range of -60°C to 300°C.

[0072] As described above, the various functions of the laser unit 120, microscope unit 130, and prober unit 140 are automatically controlled by the control system 110. In some embodiments, the laser annealing control unit 111, imaging control unit 112, and prober control unit 113 each generate control signals and apply them to the components of such units 120, 130, and 140, and receive signals (e.g., data, measurements, feedback control signals, etc.) from the components of such units 120, 130, and 140, and process the received signals. The data processing system 114 includes one or more processors that execute software programs / routines to control laser annealing, imaging, and prober operation by processing data received from control units 111, 112, and 113 (for example, to perform automated pattern recognition for active alignment, to perform bond resistance measurement calculations, etc.) when performing laser annealing and in-situ bond resistance measurement, and by generating and outputting control signals to cause control units 111, 112, and 113 to control the operation of the laser unit 120, microscope unit 130, and prober unit 140 in a coordinated manner.

[0073] For example, in some embodiments, the laser annealing control unit 111 is configured to control the operation of components of the laser unit 120, such as the laser source 121 and the laser power control block 123, to adjust the power level of the laser beam output from the laser unit 120. In addition, the laser annealing control unit 111 is configured to control the operation of components of the microscope unit 130 for laser annealing operation. For example, the laser annealing control unit 111 is configured to control the operation of the laser beam shutter 133 to control the duration of laser exposure when laser tuning a given Josephson junction. Furthermore, in some embodiments, the laser annealing control unit 111 is configured to control the laser beam shaper 135, for example, to switch diffraction beam splitter settings and corresponding laser irradiation patterns.

[0074] Furthermore, in some embodiments, the imaging control unit 112 is configured to control the operation of one or more of the light source 131, camera 132, and optical components 136 (e.g., tube lenses) that constitute the image path of the microscope unit 130. For example, the imaging control unit 112 can generate camera control signals to cause the camera 132 to capture an image within the FOV of the microscope unit 130 and transmit the image to the imaging control unit 112. The imaging control unit 112 can be configured to preprocess image data into a format suitable for processing by the data processing system 114 in order to perform automated pattern recognition functions for performing laser alignment and electrical probe alignment operations, as discussed herein.

[0075] Furthermore, in some embodiments, the probe control unit 113 is configured to control the operation of the probe unit 140. For example, the probe control unit 113 may include hardware for generating a test voltage applied to an electrical probe to perform junction resistance measurement, for example, for 4-wire (Kelvin) resistance measurement, and the probe control unit 113 may include a current and voltage measuring circuit coupled to the electrical probe 144 and configured to measure the current flowing through the Josephson junction as a result of the test voltage being applied to the electrical probe, as well as the voltage across the Josephson junction. The measured current and voltage can be digitized and transmitted to a data processing system 114 for calculating the junction resistance. In addition, the probe control unit 113 includes control elements for precisely controlling the movement and positioning of the XYZ stage 142.

[0076] In some embodiments, the data processing system 114 performs the calibration process by performing laser annealing operations on a representative hardware Josephson junction using different combinations of laser annealing power and annealing time to generate tuning calibration data (stored in the tuning calibration data database 115). The tuning calibration data can be obtained by performing the calibration process on representative hardware, which in some embodiments may be a dummy Josephson junction located on the same quantum chip to be tuned, and in other embodiments may be a Josephson junction of a qubit formed on a sister chiplet from the same manufacturing process. The tuning calibration data is analyzed using statistical methods to fit the tuning calibration data to a tuning curve, which is used to determine the tuning rate and maximum tuning range for the Josephson junction under different laser annealing power and annealing time. The tuning curve is used by the data processing system 114 to select, as desired, target combinations of annealing power and annealing time for the target tuning rate and maximum tuning range for a laser-annealed Josephson junction of a given post-manufactured quantum chip. In some embodiments, a tuning curve is used to predict an initial laser annealing operation (initial shot) to tune a given Josephson junction to a specific target (e.g., 50% relative to the target) in the first shot. The calibration process ensures a smooth and rapid approach to target tuning for a given Josephson junction while mitigating the risks of both undershoot and overshoot in tuning.

[0077] In some exemplary embodiments, the control system 110 for the laser annealing system 100 may be implemented using any suitable computing system architecture configured to implement a method supporting the automated control process described herein by executing computer-readable program instructions embodied on a computer program product including a computer-readable storage medium (or more mediums) having computer-readable program instructions for causing a processor to execute the control method described herein. An exemplary architecture of a computing environment for implementing a control system configured to control an exemplary laser annealing apparatus for tuning a Josephson junction as disclosed herein will be discussed in more detail below in conjunction with Figure 10. It should be understood that the exemplary laser annealing system 100 in Figure 1 can be used to perform exemplary laser tuning methods, such as those described below in conjunction with Figures 2C, 5, 6, 7A, 7B, 7C, 7D, 8A, 8B, and 9, for tuning the junction resistance of a Josephson junction of a superconducting qubit, whose transition frequency can be tuned using LASIQ tuning operation based on exemplary adaptive laser tuning techniques, as described herein, for tuning the junction resistance of a superconducting tunnel junction device for various applications, for example, those described below in conjunction with Figures 2C, 5, 6, 7A, 7B, 7C, 7D, 8A, 8B, and 9.

[0078] Note that in the exemplary laser annealing system 100 shown in Figure 1, the laser unit 120 and the microscope unit 130 collectively comprise an optical apparatus, and the prober unit 140 comprises an electrical characterization apparatus. The optical apparatus and the electrical characterization apparatus comprise an integrated configuration of the laser annealing apparatus configured to perform various operations in situ to facilitate the laser tuning of the junction resistance of a superconducting tunnel junction device (e.g., a Josephson junction) on a quantum chip, such operations including, for example, a laser annealing operation for laser tuning the junction resistance of a superconducting tunnel junction device on a quantum chip, and in situ resistance measurements to measure the junction resistance of a superconducting tunnel junction device at any point before, during, and / or after the laser annealing operation, as necessary, in order to determine or otherwise track the progression of the junction resistance shift of the superconducting tunnel junction device.

[0079] In some embodiments, the electrical characterization apparatus is configured to perform a direct current (DC) resistance measurement operation to measure the junction resistance of a superconducting tunnel junction device. In some embodiments, the electrical characterization apparatus is configured to perform an alternating current (AC) resistance measurement operation to measure the junction resistance of a superconducting tunnel junction device. In some embodiments, the resistance measurement is performed using a four-wire (Kelvin) resistance measurement for a more precise measurement of the junction resistance. In some embodiments, the electrical characterization apparatus includes a wafer scale prober apparatus (e.g., a 200 millimeter (millimeter) or 300 mm wafer scale prober apparatus) configured to perform an integrated electrical characterization technique as discussed herein. The wafer prober includes at least one of an automated and / or semi-automated wafer probing system.

[0080] Furthermore, in some embodiments, as described above, the electrical characterization apparatus (e.g., probe unit 140) includes an environment chamber (e.g., chamber 150, Figure 1) configured to control the surrounding environment of the quantum chip when performing a laser annealing operation. For example, the environment chamber is configured to control the surrounding environment by, if desired, (i) controlling the composition of one or more gases within the environment chamber, and (ii) generating a vacuum within the environment chamber, when performing a laser annealing operation. Exemplary techniques for controlling the surrounding environment will be discussed in more detail below in conjunction with Figure 4.

[0081] Furthermore, in some embodiments, the electrical characterization apparatus (e.g., probe unit 14) includes a thermal control system configured to perform at least one of the following: (i) heating the quantum chip to perform a bulk thermal annealing operation to shift the junction resistance of the superconducting tunnel junction device of the quantum chip; and (ii) cooling the quantum chip to perform an in-situ resistance measurement. Exemplary devices and techniques for implementing and utilizing thermal control will be discussed in more detail below, for example, in conjunction with Figures 4, 8A, 8B, and 9.

[0082] Figure 1 shows an exemplary laser annealing apparatus in which the optical device is implemented using a partially modular optical scope unit (e.g., microscope unit 130), which should be noted as including an optically integrated configuration of an imaging unit, optical components, a laser beam shaping device, and a laser beam focusing element. In particular, microscope unit 130 includes a modular optical scope unit having an integrated component configured to generate, align, and project a desired laser beam pattern on the surface of a quantum chip to perform laser annealing operations. Microscope unit 130 is “modular” in that it includes a packaged functional assembly of components for performing various functions (e.g., imaging, laser beam pattern generation, and delivery, etc.) and provides an optical scope unit that offers portability for use with suitable configurations of laser unit 120 and prober unit 140. The modular microscope unit 130 includes a compact and portable optical scope assembly that can be mounted on a desired prober unit and coupled to any suitable laser unit via a single-mode optical fiber 125 to receive laser beam energy from a separate laser unit. In this regard, the modular microscope unit 130 does not include an actual laser source and therefore can be made more compact and portable.

[0083] In this regard, at a basic level, the microscope unit 130 includes an optical microscope device that includes an optically integrated configuration of components for performing functions such as imaging a target device within the field of view of the optical microscope device, laser annealing the target device by generating a laser beam spot pattern from a laser beam received on an optical fiber from a remote laser source, and controlling the duration of exposure of the laser beam spot pattern for laser annealing the target device. The optical microscope device includes a modular device configured to be mounted on an electrical characterization system to enable in-situ electrical characterization of the target device in conjunction with laser annealing, and in some embodiments, the electrical characterization system includes a wafer-scale prober unit.

[0084] Figure 2A schematically illustrates a laser annealing apparatus including a modular optical scope unit according to an exemplary embodiment of the present disclosure. In particular, Figure 2A schematically illustrates a laser annealing apparatus including a laser unit 210, an optical fiber 215, and a modular optical scope unit 220. In some embodiments, the modular optical scope unit 220 schematically illustrates an exemplary architecture for implementing the microscope unit 130 of the laser annealing apparatus in Figure 1. The modular optical scope unit 220 includes a light source 221, a camera 222, a fiber collimator lens 223, a laser beam shaper 224, a laser beam shutter 225, and an objective lens 226, which perform the same or similar functions as the corresponding components of the microscope unit 130 discussed above, the details of which are not repeated.

[0085] Furthermore, the modular optical scope unit 220 includes multiple optical components such as a lens 231, a mirror 232, a beam splitter 233, a notch filter 234, a relay lens 235, a mirror 236, a relay lens 237, a beam splitter 238, and an optional quarter-wave plate 239, which are collectively configured to direct, reflect, focus, modify, and shape optical signals (e.g., a laser beam for annealing and visible / IR light for viewing) as needed for a given application. In general, the tube lens 230 includes a multi-element optical component configured to focus parallel light passing through the objective lens 226 onto the image plane of the focal plane array of the camera 222. The notch filter 234 is configured to filter light using known techniques. The beam splitters 233 and 238 are optical components configured to split incident light into two separate beams in a specified ratio and to combine the two different beams into a single beam. Relay lenses 235 and 237 are configured to relay the laser beam along the optical laser path from the beam shaper element 224 to the objective lens 226. An optional quarter-wave plate 239 can be used to change the polarization state of the light traveling through the waveplate. For example, an optional quarter-wave plate 239 can be implemented to shift linearly polarized light to circularly polarized light and vice versa.

[0086] In the light source path, lens 231 is configured to "parallelize" the light emitted from light source 221 to form an illumination beam 240. The illumination beam 240 is directed along the optical path to beam splitter 233 by mirror 232, passes through notch filter 234, beam splitter 238, and an optional quarter-wave plate 239, and is focused by objective lens 236 to illuminate the portion of quantum chip 260 within the FOV of objective lens 226. Light source 221, together with optical components 231, 232, and 233, implements a Kohler illumination configuration to create uniform illumination of the target feature in the FOV of objective lens 226, and at the same time ensure that the image of light source 221 is not visible in the image obtained as a result of being captured by camera 222.

[0087] In the laser beam path, the fiber collimator 223 collimates the laser light emitted from the optical fiber 215 to generate a collimated laser beam 250. In some embodiments, the modular optical scope unit 220 includes a power monitor 240, which includes, for example, a beam sampler 241 (e.g., a beam splitter) and a photodiode 242, to monitor the power of the collimated laser beam 250 downstream from the power control / adjustment mechanism provided by the laser unit 210, enabling precise exposure control. The collimated laser beam 250 propagates to a laser beam shaper 224, which is configured to split the collimated laser beam 250 into two or more laser beams having slightly different angles to each other, as described above. As described above, the laser beam shaper 224 includes diffractive optical elements such as a diffractive beam splitter that splits a single laser beam into several beams (diffraction order) in a predefined configuration.

[0088] Figure 2B is a perspective view of a modular optical scope unit according to an exemplary embodiment of the present disclosure. In particular, Figure 2B shows an exemplary modular optical scope unit 220-1 based on an exemplary integrated optical assembly architecture, as schematically shown in Figure 2A. The exemplary modular optical scope unit 220-1 shown in Figure 2B includes a portable and compact optical system that can be easily mounted on any suitable prober unit (e.g., a wafer-level prober system) to integrate the optical and electrical characterization capabilities of a laser annealing apparatus to perform in-situ laser annealing and junction resistance measurement operations to facilitate laser tuning of superconducting tunnel junction devices on a quantum chip, for example, to perform a LASIQ process to tune the transition frequency of a qubit device in a given qubit lattice of a quantum chip 160.

[0089] Figure 2C shows a flowchart of a method for performing a laser tuning operation using a laser annealing apparatus including a modular optical scope unit, according to an exemplary embodiment of the present disclosure. In some embodiments, Figure 2C shows an operation performed by a laser annealing apparatus including a modular optical scope unit, e.g., a modular microscope unit 220 (Figure 2A), performing a laser tuning operation, according to an exemplary embodiment of the present disclosure. Figure 2C shows a high-level process 260 for performing a laser tuning operation. A laser beam is generated by the laser unit (block 261). The laser beam is transmitted to the modular microscope unit by an optical fiber that optically couples the laser unit to the modular microscope (block 262). The target device to be laser annealed (e.g., a Josephson junction of a cubit) is aligned to the FOV of the modular microscope unit using the imager of the modular microscope unit (block 263). More specifically, in some embodiments, as will be described in further detail below, the alignment process includes, for example, imaging the FOV via the imager of the modular microscope unit to generate a sample image of the FOV, performing a pattern recognition process (via a control system) by comparing the sample image with a template image to determine the amount of offset between the sample image and the template image, and aligning the target device within the FOV of the modular microscope unit by moving the target device to the XYZ stage based on the determined offset. The modular microscope unit generates a laser beam pattern from a laser beam (provided by a laser unit) and uses the laser beam pattern to laser anneal the target device (block 264).

[0090] Figures 1, 2A, and 2B illustrate exemplary embodiments of a laser annealing apparatus including an integrated configuration of a modular optical scope and an electrical characterization device. However, it should be noted that in other embodiments, the laser annealing apparatus may be implemented using separate desktop optical devices in conjunction with an electrical characterization device to perform laser tuning operations and associated operations as discussed herein. For example, Figure 3A schematically illustrates a laser annealing system according to another exemplary embodiment of the present disclosure. In particular, Figure 3A schematically illustrates a laser annealing system 300 including a control system 310, an imaging unit 320, a laser unit 330, and a prober unit 140 (e.g., an electrical characterization device). Figure 3A illustrates exemplary embodiments of an integrated configuration of separate desktop optical devices (implemented, for example, by the imaging unit 320 and the laser unit 330) and an electrical characterization device (implemented, for example, by the prober unit 140) to perform the laser annealing operations discussed herein.

[0091] The laser unit 330 includes a laser source that generates a laser beam, and various laser optical components that work together to generate a laser beam pattern from the laser beam generated by the laser source, project the laser beam pattern onto a target sample to perform laser annealing, and control the annealing time using an electronic shutter. The imaging unit 320 is a separate unit optically coupled to the laser unit 320. The imaging unit 320 is configured to support various operations such as real-time visualization, imaging, pattern recognition, and other related functions as discussed herein. The control system 310 consists of hardware and software suitable for controlling the operation of the imaging unit 320 and the laser unit 330 using the same or similar control and data processing functions as the control system 110 in Figure 1, the details of which are not repeated. The imaging unit 320 and the laser unit 320 can be implemented using any suitable architecture, such as that shown in Figure 3B.

[0092] Figure 3B schematically shows an optical system that can be implemented in the laser annealing system of Figure 3A according to an exemplary embodiment of the present disclosure. In particular, Figure 3B schematically shows an imaging unit 320, a laser unit 330, and an XYZ stage 142-1 for mounting a quantum chip 160 to be laser annealed. Generally, the imaging unit 320 includes a camera 321, a tube lens 322, and a beam splitter 232. The laser unit 330 includes a laser source 331, which includes a laser head 332 and a diode pump 333 that generates laser energy, the diode pump 333 being cooled using any suitable thermoelectric cooling device. The laser unit 330 further includes an isolator 334, a laser power monitor and control block 335 (including a half-wavelength corrugated plate 336, a polarizing beam splitter 337, a damper 338, an optical wedge 339, and a photodiode 340), an electronic shutter 341, a piezo mirror mount 342, a beam reducer 343, a diffraction grating 344 (which generates a laser beam pattern), a focusing lens 345, a first objective lens 346 and a second objective lens (which provide a dual objective lens system), and a polarizing beam splitter 348. The imaging unit 320 and the laser unit 330 are optically coupled via a beam splitter 323 and a polarizing beam splitter 348.

[0093] Various components of the imaging unit 320 and the laser unit 330 operate in the same or similar manner as discussed above in conjunction with Figure 1. Briefly repeating, in some embodiments, the laser source 331 includes a solid-state laser with a 532 nm (2x frequency) diode pump that generates a laser beam used as a laser annealing source. The laser power monitor and control block 335 actively calibrates the laser beam power via a combination of a half-wave plate 336 and a polarizing beam splitter 337. The optical window wedge 339 is used as a laser power pickoff to a silicon photodiode 340 to monitor the laser power level to set an appropriate laser power level for the laser annealing operation. The piezo mirror mount 342 actively aligns the laser beam within the FOV of the objective lens (via image pattern recognition), and the laser beam is optionally shaped by a diffraction grating 344 (e.g., a holographic diffraction grating) to create a multi-spot beam pattern. The beam size is focused to 4x using a dual objective setup, which also provides a 20x junction image magnification. The magnified image of the quantum chip 160 is captured by camera 321 and used for active alignment of the target device (e.g., a qubit Josephson junction).

[0094] Figure 4 schematically illustrates a laser annealing system according to another exemplary embodiment of the present disclosure. In particular, Figure 4 schematically illustrates a laser annealing system 400 including an optical system 410, a prober control unit 420, an electrical characterization system 440 (e.g., a prober unit) disposed within an environmental microchamber 450, an environmental control unit 430, and an ambient environment system 460. The optical system 410 includes a laser system, an imaging system, and associated optical components. The optical system 410 can be implemented using any one of the exemplary optical architectures of laser units, imaging units, and modular microscope units discussed above in conjunction with Figures 1, 2A, 2B, 3A, and 3B.

[0095] The electrical characterization system 440 (e.g., a prober unit) includes an XYZ stage 442 having a wafer chuck including a thermoelectric cooler 443, and an electrical probe 444. The electrical characterization system is similar in configuration and operation to the prober unit 140 discussed above in conjunction with Figure 1, except that the exemplary electrical characterization system 440 implements a thermoelectric cooler 443 that provides a thermal control system (e.g., a temperature-controlled wafer chuck system, or other suitable type of heating / cooling system) configured to (i) heat the quantum chip 160 to perform a bulk thermal annealing operation to shift the junction resistance of the tunnel junction device of the quantum chip 160, and (ii) cool the quantum chip 160 to perform in-situ resistance measurements. In some embodiments, the temperature-controlled wafer chuck system can be temperature-controlled in the range of -60°C to 300°C. The probe control unit 420 includes or is otherwise implemented an automated test equipment (ATE) system 422, which includes a combination of hardware and software to control the automated operation of the electrical characterization system 400 (e.g., automated probe movement, test signal generation, processing of resulting voltage / current signals generated as a result of resistance measurement probing operations, etc.).

[0096] The electrical characterization system 440 is housed within or otherwise disposed within the environmental chamber 450 to control the ambient environment within the environmental chamber 450 by the operation of the environmental control unit 430 and the ambient environment system 460. The ambient environment system 460 includes an environmental gas control system coupled to the environmental chamber 450 and a gas mixing and dilution system 470 configured to inject a mixture of one or more gases into the environmental chamber 450 to control the annealing environment. The gas mixing and dilution system 470 is connected to a plurality of gas cylinders 472-1, ..., 472-n that store different gases (e.g., nitrogen, dry air, etc.). The gas mixing and dilution system 470 operates under the control of the environmental control unit 430 to mix different gases at various concentrations as desired to provide a given gas environment for laser annealing, and to inject the mixed gas into the environmental chamber 450. In addition, the ambient environment system 460 includes a vacuum system 480 coupled to the environment chamber 450 for exhausting annealing gas from the chamber 450 to perform laser annealing in a vacuum atmosphere, or otherwise for exhausting air from the environment chamber 550. An exhaust system 482 is coupled to the vacuum system 480 and is configured to direct the exhausted gas for proper disposal.

[0097] Figure 5 shows a flowchart of a method for tuning Josephson junctions of a qubit device in a qubit lattice based on a tuning plan, according to an exemplary embodiment of the present disclosure. In particular, Figure 5 shows process 500, which includes various operations that can be performed using exemplary laser annealing systems and apparatus as disclosed herein to tune the transition frequencies of the superconducting qubits in a given qubit lattice (via the LASIQ tuning process) based on a frequency tuning plan that is generated and updated to eliminate or otherwise minimize the possibility of frequency collisions in a given qubit lattice, by performing in-situ junction resistance measurements and laser annealing operations on the Josephson junctions of superconducting qubits to tune the junction resistance of the Josephson junctions to their respective target junction resistances, thereby eliminating or otherwise minimizing the possibility of frequency collisions in a given qubit lattice.

[0098] Referring to Figure 5, process 500 includes an initial step of placing a quantum device (e.g., a quantum chip or quantum wafer) on the XYZ stage of an electrical characterization system (e.g., a probe unit) and optically inspecting the quantum device for physical defects or damage using an optical system (e.g., a modular microscope unit) (block 501). In an exemplary embodiment, the quantum device includes a lattice of superconducting qubits that is to be laser-tuned after fabrication to trim the transition frequencies of the superconducting qubits according to an initial frequency tuning plan generated for the lattice of superconducting qubits. If the optical inspection is deemed acceptable (affirmative decision in block 502), process 500 proceeds to obtain the initial generated frequency tuning plan that is assumed to be acceptable at this point (affirmative decision in block 503).

[0099] Process 500 proceeds to performing a laser annealing operation on Josephson junctions of a superconducting qubit to shift the junction resistance of each Josephson junction to a respective target junction resistance (block 504). The target junction resistance (R target ) for a given Josephson junction of a superconducting qubit is specified in a tuning plan, and the target junction resistance of the given Josephson junction corresponds to the target transition frequency of the associated superconducting qubit. Process 500 performs in-situ resistance measurement between laser annealing operations to determine a current junction resistance of the Josephson junctions as the junction resistance of the Josephson junctions is progressively shifted to their respective target junction resistances by performing iterative annealing operations (block 505).

[0100] After performing one or more iterations of the laser annealing process, a decision is made as to whether the laser tuning is complete (block 506). If in-situ resistance measurements indicate that some or all of the Josephson junctions have not reached their respective target junction resistances, the laser tuning process is considered incomplete (negative decision in block 506). In some embodiments, for example, a yield evaluation is performed to determine how many frequency collisions are expected based on the current junction resistance of the Josephson junctions (and therefore the corresponding current transition frequencies of the superconducting qubits) based on a given frequency tuning plan (block 506). If, based on the results of the yield evaluation, it is determined that the current tuning plan is unacceptable (negative decision in block 503), a new, updated tuning plan is generated (block 509). For example, if the yield evaluation indicates that at least some of the target transition frequencies specified in the current tuning plan are not achievable based at least partially on the currently measured junction resistance of the Josephson junctions, the current tuning plan may be considered unacceptable. The laser tuning operation then proceeds based on the newly updated tuning plan (returning to block 504). When the laser tuning process is deemed complete (positive decision in block 506), process 500 can proceed to perform post-laser tuning analysis (block 507).

[0101] In some embodiments, exemplary laser tuning methods, such as those discussed herein, include iterative laser tuning methods for tuning the junction resistance of a superconducting tunnel junction device (e.g., a Josephson junction), by implementing an asymptotic tuning methodology in which the Josephson junctions of qubits on a given multi-qubit device are adaptively and progressively tuned in an incremental manner to progressively shift the junction resistance toward the respective target junction resistance of the Josephson junction. In some embodiments, as will be described in more detail below in conjunction with Figure 6, the adaptive and progressive tuning of a given Josephson junction is implemented by adaptively determining the annealing time for a given tuning iteration at a given laser power level, based on (i) the amount of resistance shift remaining to reach the target junction resistance and (ii) the total amount of annealing time spent for previous laser annealing iterations applied to the superconducting tunnel junction. Such iterative tuning methods are in contrast to conventional tuning methods in which the Josephson junction is tuned to the target junction resistance using a single laser shot or a single annealing iteration, which is unpredictable.

[0102] Furthermore, in some embodiments, exemplary laser tuning methods include, for example, a specified target junction resistance R target The initial target resistance (R) corresponds to an approximately 50% resistance shift relative to initial_target The system is configured to determine a target combination of laser power level and annealing time for a given Josephson junction to perform an initial laser annealing operation (initial shot) on the given Josephson junction in order to achieve an initial junction resistance shift to ). In particular, the initial shot is the initial resistance shift ΔR initial =R initial_target -R initial It is configured to achieve this, and here,

number

[0103] In some embodiments, as described above, the tuning calibration data 115 in Figure 1 is used to determine target combinations of laser power level and laser annealing time to be used for the initial shot of a given Josephson junction. The tuning calibration data 115 includes information such as, for example, the maximum tuning range that can be achieved for each of several different combinations of laser power and annealing time, and tuning curves representing the tuning rates for the different combinations of laser power and annealing time. In some embodiments, the calibration data is generally obtained by performing a calibration process which includes (i) performing a laser annealing operation on a set of test Josephson junctions using different combinations of laser power and annealing time, (ii) determining the junction resistance shift of the test Josephson junctions as a result of the laser annealing operation, and (iii) using the determined junction resistance shift of the test Josephson junctions to determine calibration data for configuring a laser annealing operation for a laser-tuned Josephson junction corresponding to the test Josephson junctions. In some embodiments, the set of test Josephson junctions resides on a test quantum chip (e.g., a systochiplet) having the test Josephson junctions, which are manufactured using the same manufacturing process as the Josephson junctions that are to be laser-tuned by a laser annealing operation configured using calibration data. In other embodiments, the set of test Josephson junctions resides on the same quantum chip (e.g., in the kerf region) as the Josephson junctions that are to be laser-tuned by a laser annealing operation configured using calibration data.

[0104] Figure 6 shows a flowchart of a method for tuning a Josephson junction according to an exemplary embodiment of the present disclosure. In some embodiments, Figure 6 shows a control process for iteratively and adaptively tuning a qubit's Josephson junction on a quantum chip, which can be performed using any of the exemplary laser annealing systems discussed herein (e.g., laser annealing system 100 in Figure 1). Figure 6 shows an exemplary embodiment of an iterative tuning process in a round-robin format, where each round-robin is iterated through all Josephson junctions, each of these Josephson junctions being measured and "shot" once to achieve an incremental junction resistance shift, so that each consecutive iteration is performed on a different Josephson junction on the quantum chip. Figure 6 further illustrates an exemplary embodiment of the tuning process, in which a probe contact resistance check and a probe contact stability check are performed before each in-situ junction resistance measurement to ensure sufficient contact between the electrical probe and the contact pads of the Josephson junction being tested.

[0105] Referring to Figure 6, the quantum chip is placed on the XYZ stage 142 of the probe unit 140, and the control system 110 initiates the automated tuning process (block 600). The automated tuning process selects the initial Josephson junction of the qubit and moves to the selected Josephson junction (block 601). In particular, the control system 110 moves the XYZ stage 142 to position the initial Josephson junction within the FOV of the microscope unit 130. The tuning process initiates control operations to cause the microscope unit and probe unit to perform focusing and alignment processes to ensure proper focusing to the focal plane and proper alignment of the target Josephson junction within the FOV of the microscope unit 130 for the purpose of performing in-situ Josephson junction resistance measurement (block 602). An exemplary focusing process will be described below in conjunction with Figure 7A. Focusing ensures that the sample plane (e.g., the plane containing the target Josephson junction) becomes the focal plane (i.e., the plane of focus) of the objective lens 137. Focusing can be adjusted by adjusting the Z position of the XYZ stage 142. As described above, alignment to the Josephson junction is performed using a machine learning pattern recognition process to align the Josephson junction to the center of the FOV. In addition, depending on a given iteration, the alignment can be slightly adjusted in the X and / or Y positions to ensure that the electrical probe of the prober unit lands at different locations on the contact pads of the Josephson junction, and not at the same location for each Josephson junction tuning iteration.

[0106] Next, the tuning process proceeds by having the prober unit move the contact pads of the Josephson junction into contact with the electrical probe and perform a contact resistance and contact stability check (block 603). An exemplary process for checking contact resistance and contact stability will be described below in conjunction with Figure 7B. After the successful completion of the contact resistance and contact stability test, an in-situ junction resistance measurement is performed to determine the current junction resistance of the Josephson junction using the same or similar resistance measurement method discussed herein (e.g., Kelvin resistance measurement) (block 604).

[0107] The tuning process involves measuring the junction resistance R of a given Josephson junction. current However, the target junction resistance R of the given Josephson junction... target Determine whether it is or is near that (block 605). For example, as described above, the currently measured junction resistance R current The target junction resistance R target A decision is made as to whether or not it falls within the specified threshold percentage, i.e.,

number

[0108] For example, the tuning process initiates control operations (block 606) that cause the microscope unit 130 and prober unit 140 to perform focusing and alignment processes to ensure proper focusing to the focal plane and proper alignment of the target Josephson junction within the FOV of the microscope unit 130 for the purpose of performing a laser annealing operation. An exemplary focusing and alignment process for preparing for a laser annealing operation will be discussed in more detail below in conjunction with Figure 7C. In addition, the tuning process proceeds to determine the “shot” annealing time and laser power to be used to laser anneal a given Josephson junction for a given iteration, based on the measured junction resistance (block 607). This process is performed using the same or similar methods as discussed above in conjunction with Figures 2, 3A, and 3B, and its details do not need to be repeated.

[0109] A laser annealing operation (shot) for a given iteration is performed using the determined annealing time and laser power to laser anneal a given Josephson junction (block 608). After the completion of the final annealing operation, the tuning process proceeds to the next Josephson junction to be tuned (block 601), and the process is repeated. If, at a given point in the iterative process, the currently selected Josephson junction is at its respective target resistance (positive decision in block 605), and it is determined that there are no remaining Josephson junctions to be tuned further (negative decision in block 609), the tuning process terminates (block 610). In this example, it is assumed that each Josephson junction is tuned to its respective target junction resistance, and as a result, each corresponding qubit is tuned to its respective target transition frequency.

[0110] As described above, Figure 6 illustrates an adaptive tuning process, including an iterative laser tuning process, for tuning the junction resistance of a Josephson junction by implementing an asymptotic tuning methodology in which the Josephson junction of a qubit on a given multi-qubit device is adaptively and progressively tuned in an incremental manner to progressively shift the junction resistance toward the respective target junction resistance of the Josephson junction. In some embodiments, the adaptive and progressive tuning of a given Josephson junction involves (i) the amount of resistance shift remaining until the target junction resistance is reached (ΔR remaining (ii) the annealing time (t) for a given tuning iteration at a given laser power level, based on the total amount of annealing time spent for previous laser annealing iterations applied to the superconducting tunnel. shot This is implemented by adaptively determining the following.

[0111] For example, the annealing time (t) for a given "shot" at a given laser power level. shot An example function for determining ) is represented as follows:

number

[0112] t shot In an example function for calculating the ratio,

number

number

[0113] function t shot Based on the exemplary parameters, in a given iteration of the tuning process, the target junction resistance R target If the measured junction resistance indicates that there is still a relatively large resistance shift required to reach the determined annealing time t shot is, (ratio)

number

number

number

number

[0114] The exemplary laser tuning methods discussed herein are in contrast to conventional tuning methods in which a Josephson junction is tuned to a target junction resistance using a single laser shot, which is unpredictable. The exemplary junction tuning techniques disclosed herein involve setting the junction resistance to an initial resistance (R initial ) From, for example, the target junction resistance (R targetThe system is configured to perform an initial "shot" on a given Josephson junction to shift the junction resistance to approximately 50% of its final value, and thereafter, the junction resistance of a given Josephson junction is iteratively tuned using multiple shots with annealing times adaptively determined for each shot to ensure that it gradually approaches the target junction resistance, taking into account the relaxation of the junction resistance after laser annealing, which may require a period of time delay to stabilize closer to their final values. In an exemplary embodiment of the laser tuning process after the first shot, each junction (starting from the first and progressing to the last) is shot once in succession, and the process is repeated, starting again from the first junction. In this scheme, the first junction resistance has time to relax and stabilize near its final value prior to subsequent shots. In another embodiment of the laser tuning process after the first shot, each junction may be iteratively annealed to completion prior to annealing the next junction. In this case, in order to improve the accuracy of approaching the resistance target, a time delay may be implemented between consecutive annealing iterations for the same junction to allow the junction resistance to relax and stabilize near its final value.

[0115] Figure 7A shows a flowchart of a method for focusing and aligning to a target Josephson junction for the purpose of performing in-situ Josephson junction resistance measurement, according to an exemplary embodiment of the present disclosure. In some embodiments, Figure 7A shows an exemplary process 700 for implementing the focusing / alignment process in block 402 of Figure 6. The initial stage of process 700 involves performing a coarse alignment in which the XYZ stage 142 is operated in a controllable manner to move the target Josephson junction so that it is aligned to the center of the FOV of the microscope unit (block 701). The prober unit 140 is then controlled to sweep the Z position of the XYZ stage 142 through a series of discrete steps (positions), and the camera 132 of the microscope unit 130 is controlled to capture and save a digital image (sample image) of the sample in the FOV at each Z position (block 702).

[0116] The tuning process then determines the sharpest sample image from among multiple sample images acquired at different Z positions (block 703). In some embodiments, the sharpest sample image is determined using an edge detection process that identifies the sample image having the sharpest edge (e.g., the sharpest edge of the contact pad that the electrical probe will contact). The XYZ stage 142 is then controlled to move to the target Z position corresponding to the sharpest sample image (block 704), at which it is assumed that the sample imaging plane with the contact pad is displaced by a known distance (e.g., 70 microns) from the probing plane. Finally, an optional step can be performed to slightly adjust the X and / or Y positions of the quantum chip to provide a somewhat smaller offset from the original centering (block 705), thereby allowing the probe tip of the electrical probe to contact the contact pad of a given Josephson junction at a desired target contact position different from the contact position made against the contact pad for the previous in-situ junction resistance measurement for the previous iteration.

[0117] Figure 7B shows a flowchart of a method for performing a contact resistance and contact stability check operation prior to performing an in-situ Josephson junction resistance measurement, according to an exemplary embodiment of the present disclosure. In some embodiments, Figure 7B shows an exemplary process 710 for implementing the contact resistance and stability check process in block 603 of Figure 6. The initial step of process 710 involves making contact between the tip of an electrical probe and the contact pads of the Josephson junction using the same or similar method as discussed herein (block 711).

[0118] Next, the process proceeds to measure the contact resistance between the electrical probe and the contact pads of the Josephson junction (block 712). The contact resistance is measured using known techniques. A decision is made as to whether the measured contact resistance is less than the contact resistance threshold (block 713). If it is determined that the measured contact resistance is less than the contact resistance threshold (affirmative decision in block 713), the tuning process proceeds to determine whether the contact is stable (block 714). In some embodiments, the contact stability check is performed by repeatedly measuring the contact resistance over a given period (e.g., 1 to 10 seconds) and determining whether the repeatedly measured contact resistance over the given period remains less than the contact resistance threshold. The contact stability check is performed to ensure that the electrical contact between the tip of the electrical probe and the contact pads of the Josephson junction is stable, because intermediate or intermittent contact during in-situ junction resistance measurement can cause voltage spikes that could potentially damage the Josephson junction being measured.

[0119] In response to determining that the electrical contact between the probe and the contact pad has low contact resistance and is stable (positive determination in blocks 713 and 714), the tuning process proceeds to perform an in-situ junction resistance measurement operation to measure the resistance of the Josephson junction (block 715). On the other hand, if either the contact resistance check or the contact stability check fails (negative determination in block 713 or block 714), the tuning process may skip the junction resistance measurement for that Josephson junction and move on to the next Josephson junction, proceeding with a round-robin tuning iteration for that next Josephson junction (block 716). In this case, corrective measures may be taken (e.g., cleaning the probe tip or making contact with a different area on the contact pad of the skipped Josephson junction) to ensure that the skipped Josephson junction can be tuned in subsequent iterations.

[0120] Figure 7C shows a flowchart of a method for focusing and aligning to a target Josephson junction for the purpose of performing a laser annealing process according to an exemplary embodiment of the present disclosure. In some embodiments, Figure 7C shows an exemplary process 720 for implementing the focusing / alignment process in block 606 of Figure 6. The initial stage of process 720 involves performing a coarse alignment process (block 721), in which the XYZ stage 142 is controlled to move back to a previously determined Z position to position the image plane in or near the focal plane as a result of a focusing stage performed, for example, for in-situ junction resistance measurement (e.g., block 704, Figure 7A). In this example, it is assumed that the target Josephson junction is positioned to be aligned (or nearly aligned) to the center of the FOV of the microscope unit (block 701). A pattern recognition operation is performed to determine the amount of offset (if any) between the acquired sample image of the Josephson junction in the FOV and the template image of the Josephson junction aligned to the center of the FOV (block 722). In some embodiments, the pattern recognition operation may be performed using the cross-correlation between the sample image and the template image to quantify the quality of the match and the corresponding amount of offset (if any) required to optimize the match.

[0121] Next, a decision is made as to whether the subsequently determined offset exceeds the offset threshold (block 723). For example, such a decision can be made to determine whether the sample image of the Josephson junction in the FOV is misaligned by a certain amount of offset that exceeds the offset threshold in the X direction, the Y direction, or both the X and Y directions. If it is determined that the X offset and / or Y offset exceed the offset threshold (positive decision in block 723), the XYZ stage 142 is controlled to move in the X and / or Y directions by the determined offset amount to correct the misalignment in the X and / or Y directions (block 724), and the pattern recognition and offset determination steps (blocks 722 and 723) are repeated. Once it is determined that the sample image of the Josephson junction in the FOV is aligned to the template image, the tuning process proceeds to the laser annealing operation (block 725).

[0122] Figure 7D schematically illustrates a process for aligning a contact probe and laser spot with a Josephson junction of a qubit according to an exemplary embodiment of the present disclosure. In particular, Figure 7D schematically illustrates an exemplary FOV 730, which schematically illustrates a superconducting qubit 740. The superconducting qubit 740 includes a transmon qubit comprising a capacitor and a Josephson junction connected in parallel. In particular, the superconducting qubit 740 includes a first superconducting pad 741, a second superconducting pad 742, and a Josephson junction 743 coupled to and disposed between the first and second superconducting pads 741 and 742. The first and second superconducting pads 741 and 742 constitute electrodes of the coplanar parallel plate capacitor structure of the superconducting qubit 740. The Josephson junction 743 functions as a nonlinear inductor, which, when connected in parallel with the capacitor formed by the first and second superconducting pads 741 and 742, has a given transition frequency f 01An anharmonic LC oscillator is formed having individually addressable energy levels (e.g., two lowest energy levels corresponding to the ground state |0> and the first excited state |1>). As described above, laser annealing is applied to the Josephson junction 743 to monotonically increase the junction resistance of the Josephson junction 743 to the target junction resistance, thereby the transition frequency f of the superconducting qubit 740. 01 This results in an incremental decrease towards the target transition frequency.

[0123] FOV 730 represents the area of ​​the object imaged by the microscope unit 130, where the size of the FOV is generally determined by the magnification of the objective lens 137. In the exemplary camera / subject architecture of the microscope unit 130, the FOV of the objective lens applies to the image sensor (e.g., a focal plane array) of the camera 132. Since the image sensor is rectangular in shape, the image captured by the microscope unit 130 has a rectangular FOV, as shown in Figure 7D, which does not capture the full circular FOV from the objective lens 137.

[0124] Figure 7D schematically illustrates an exemplary alignment process in which multiple electrical probes 750-1 and 750-2 (e.g., probe tips) are aligned in contact with first and second superconducting pads 741 and 742, which include electrodes for a coplanar parallel-plate capacitor of the superconducting cubit 740. In particular, Figure 7D shows an electrical probe configuration for implementing a 4-wire (Kelvin) resistance measurement, where electrical probe 750-1 includes two probes in contact with the first superconducting pad 741, and electrical probe 750-2 includes two probes in contact with the second superconducting pad 742. In this embodiment, the first and second superconducting pads 741 and 742 serve as contact pads for a Josephson junction 743 to which the electrical probes are landed to perform an in-situ junction resistance measurement.

[0125] In some embodiments, the template image used to perform the pattern recognition alignment process includes an overall image of the superconducting qubit 740, including the first and second superconducting pads 741 and 742 and the Josephson junction 743. In other embodiments, the template image used to perform the pattern recognition alignment process includes an image of the Josephson junction 743. In other embodiments, one or more additional features of the template image can be used to perform the pattern recognition alignment process.

[0126] Figure 7D further illustrates an exemplary pattern of laser spots 760 that can be used to laser anneal a Josephson junction 743. In particular, the exemplary pattern of laser spots 760 includes four spots corresponding to four laser beams generated by a laser beam shaper 135 (Figure 1), which is implemented using a 2x2 diffraction beam splitter that generates four laser beams projected onto the surface of a quantum chip 160 via a microscope unit 130, for example. As schematically shown in Figure 7D, the Josephson junction 743 is aligned in the FOV 730 such that the laser beam spot pattern includes two laser spots positioned on one side of the Josephson junction 743 (e.g., above) and two laser spots positioned on the opposite side of the Josephson junction 743 (e.g., below), and the laser spots 760 are positioned to irradiate (and heat) a region of the upper surface of the quantum chip 160 adjacent to the Josephson junction 743, rather than directly irradiating the Josephson junction 743. In other embodiments, other types of laser spot patterns can be used to laser anneal the Josephson junction 743. For example, different laser spot patterns include, for example, a 1-spot pattern, a 2-spot pattern, a 6-spot pattern, etc., depending on the application and / or the shape of the feature being laser annealed.

[0127] Figure 7D shows a superconducting qubit 740 containing a single Josephson junction 743, but it should be noted that other types of superconducting qubits or quantum devices may have multiple Josephson junctions, which can be laser annealed simultaneously using a suitable laser spot pattern. For example, some quantum devices, such as tunable qubit couplers, include a SQUID, which includes a pair of Josephson junctions connected in parallel to form a superconducting loop (referred to as a SQUID loop) through which an external magnetic flux φ that controls the operation of the tunable qubit coupler can pass. In this regard, the Josephson junctions of a SQUID can be simultaneously laser-annealed and tuned by using a suitable laser spot pattern configured to heat the substrate region surrounding the two Josephson junctions of the SQUID. Fixed-frequency qubits, such as those shown in Figure 7D, are candidates for laser tuning using exemplary laser tuning techniques as disclosed herein, but it should be further understood that such exemplary techniques may be implemented to laser-tune any quantum element including at least one Josephson junction, including, but not limited to, fixed-frequency transmon qubits, SQUID devices, and similar devices.

[0128] Figure 8A is a flowchart of a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with in-situ DC resistance measurement using a laser annealing apparatus according to an exemplary embodiment of the present disclosure. In particular, Figure 8A shows an exemplary process 800 for tuning the junction resistance of a Josephson junction using a bulk thermal annealing phase, which can be performed using, for example, a thermoelectric cooler 443 (e.g., a temperature-controlled wafer chuck system) of an exemplary electrical characterization system 440 (Figure 4), and thereafter using a target-limited laser annealing phase. In some embodiments, the bulk thermal annealing phase includes an initial step (block 801) of performing an in-situ resistance measurement at room temperature to measure the junction resistance of a Josephson junction of superconducting qubits in a given qubit lattice on a given quantum device, e.g., a quantum chip / wafer.

[0129] The quantum device is then heated to a target temperature over a specified time to perform a bulk thermal annealing process designed to shift (increase) the junction resistance of the Josephson junction by a desired amount (block 802). The quantum device is then cooled back to room temperature (block 803), and an in-situ resistance measurement is performed to remeasure the junction resistance of the Josephson junction at room temperature. In exemplary embodiments, the resistance measurement operation (blocks 801 and 804) includes a DC measurement performed using, for example, a 4-wire (Kelvin) resistance measurement operation.

[0130] Following the bulk thermal annealing phase, process 800 proceeds to perform a target-limited laser annealing phase to laser tune the junction resistance of the Josephson junctions to their respective target junction resistances. Specifically, process 800 generates a tuning plan (block 805) for tuning the transition frequency of the superconducting qubit to a target transition frequency, which is generated based on the currently measured junction resistance and determines the respective target junction resistance for the Josephson junction under certain constraints such as the current junction resistance and the maximum tuning range achievable to shift the current junction resistance of the Josephson junction to the target junction resistance. Process 800 then proceeds to perform a laser annealing operation to laser tune the Josephson junction based on the generated tuning plan (block 806). For example, the laser tuning / annealing operation in block 806 can be implemented using, for example, the process shown in Figures 5 and 6.

[0131] Figure 8B is a flowchart of a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with an in-situ DC resistance measurement using a laser annealing apparatus, according to another exemplary embodiment of the present disclosure. In particular, Figure 8B shows an exemplary process 810 for tuning the junction resistance of a Josephson junction using a bulk thermal annealing phase, which can be performed, for example, using a thermoelectric cooler 443 (e.g., a temperature-controlled wafer chuck system) of an exemplary electrical characterization system 440 (Figure 4), and thereafter using a target-limited laser annealing phase. In some embodiments, the bulk thermal annealing phase includes an initial step (block 811) in which an in-situ resistance measurement is performed at a specified low temperature to measure the junction resistance of a Josephson junction of superconducting qubits in a given qubit lattice on a given quantum device, e.g., a quantum chip / wafer, with the quantum device cooled to a low temperature. Low-temperature resistance measurement provides a more precise resistance measurement (e.g., a low-noise electrical measurement) and reduces the contribution of substrate conductivity to the junction resistance measurement.

[0132] The quantum device is then heated to a target temperature for a specified time to perform a bulk thermal annealing process designed to shift (increase) the junction resistance of the Josephson junction by a desired amount (block 812). The quantum device is then cooled back to a target temperature (block 813), and an in-situ resistance measurement is performed to remeasure the junction resistance of the Josephson junction with the quantum device cooled to the low temperature. In exemplary embodiments, the resistance measurement operation (blocks 811 and 814) includes a DC measurement performed using, for example, a 4-wire (Kelvin) resistance measurement operation.

[0133] Following the bulk thermal annealing phase, process 810 proceeds to perform a target-only laser annealing phase to laser tune the junction resistance of the Josephson junctions to their respective target junction resistances. Specifically, process 810 generates a tuning plan (block 815) for tuning the transition frequency of the superconducting qubit to a target transition frequency, the tuning plan being generated based on the currently measured junction resistance and determining the respective target junction resistance for the Josephson junction under certain constraints such as the current junction resistance, the maximum tuning range achievable to shift the current junction resistance of the Josephson junction to the target junction resistance, etc. Process 810 then proceeds to perform a laser annealing operation to laser tune the Josephson junction based on the generated tuning plan (block 816). For example, the laser tuning / annealing operation in block 806 can be implemented using, for example, the process shown in Figures 5 and 6.

[0134] Figure 9 is a flowchart of a method for tuning the junction resistance of a Josephson junction by performing an annealing operation in conjunction with an in-situ AC resistance measurement using a laser annealing apparatus according to an exemplary embodiment of the present disclosure. In particular, Figure 9 shows an exemplary process 900 for tuning the junction resistance of a Josephson junction using a bulk thermal annealing phase, which can be performed using, for example, a thermoelectric cooler 443 (e.g., a temperature-controlled wafer chuck system) of an exemplary electrical characterization system 440 (Figure 4), and thereafter using a target-limited laser annealing phase. In some embodiments, the bulk thermal annealing phase includes an initial step (block 911) of performing an in-situ AC resistance measurement at a specified low temperature to measure the junction resistance of a Josephson junction of superconducting qubits in a given qubit lattice on a given quantum device, e.g., a quantum chip / wafer, with the quantum device cooled to a low temperature. Low-temperature resistance measurement provides a more precise resistance measurement. In addition, in some embodiments, the AC measurement is performed at a frequency of about 1.0 kHz or higher. The high-frequency resistance measurement is configured to reduce 1 / f noise, thereby improving the accuracy of junction resistance measurements.

[0135] The quantum device is then heated to a target temperature for a specified time to perform a bulk thermal annealing process designed to shift (increase) the junction resistance of the Josephson junction by a desired amount (block 912). The quantum device is then cooled back to a target low temperature (block 913), and an in-situ resistance measurement is performed using an AC measurement to remeasure the junction resistance of the Josephson junction while the quantum device is cooled to the low temperature. In exemplary embodiments, the resistance measurement operation (blocks 911 and 914) includes an AC measurement performed at low temperature using, for example, a 4-wire (Kelvin) resistance measurement operation.

[0136] Following the bulk thermal annealing phase, process 900 proceeds to perform a target-limited laser annealing phase to laser tune the junction resistance of the Josephson junctions to their respective target junction resistances. Specifically, process 900 generates a tuning plan (block 915) for tuning the transition frequency of the superconducting qubit to a target transition frequency, which is generated based on the currently measured junction resistance and determines the respective target junction resistance for the Josephson junction under certain constraints such as the current junction resistance and the maximum tuning range achievable to shift the current junction resistance of the Josephson junction to the target junction resistance. Process 900 then proceeds to perform a laser annealing operation to laser tune the Josephson junctions based on the generated tuning plan (block 916). For example, the laser tuning / annealing operation in block 916 can be implemented using, for example, the process shown in Figures 5 and 6.

[0137] Various aspects of this disclosure are described by explanatory text, flowcharts, block diagrams of computer systems and / or block diagrams of machine logic included in computer program product (CPP) embodiments. With respect to any flowchart, operations may be performed in a different order than those shown in a given flowchart, depending on the technology involved. For example, again depending on the technology involved, two operations shown in consecutive flowchart blocks may be performed in reverse order, as a single integrated stage, simultaneously, or with at least partial time overlap.

[0138] Computer program product embodiment ("CPP embodiment" or "CPP") is a term used in this disclosure to describe any set of one or more storage media ("mediums") that collectively comprise a set of one or more storage devices that collectively contain machine-readable code corresponding to instructions and / or data for performing computer operations specified in a given CPP claim. A "storage device" is any tangible device capable of holding and storing instructions for use by a computer processor. Computer-readable storage media may be, but are not limited to, electronic storage media, magnetic storage media, optical storage media, electromagnetic storage media, semiconductor storage media, mechanical storage media, or any suitable combination of those described above. Some known types of storage devices, including these media, include: diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, mechanically encoded devices (such as pits / lands formed on the main surface of a punch card or disk), or any suitable combination of the foregoing. When the term "computer-readable storage medium" is used in this disclosure, it shall not be construed as storage in the form of transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides, optical pulses passing through optical fiber cables, electrical signals communicated through wires, and / or other transmitting media.As those skilled in the art will understand, data typically moves at several intermittent points during the normal operation of a storage device, such as during access, defragmentation, or garbage collection; however, this does not make the storage device transient, because data is not transient while it is stored.

[0139] The computing environment 1000 in Figure 10 includes, for example, an example of an environment for executing at least a portion of computer code (block 1026) that includes data processing and control algorithms for performing various operations such as laser annealing operations, imaging operations, machine learning pattern recognition operations, joint resistance measurement operations, tuning calibration operations, and other computer automation control and data processing operations, as discussed herein, for performing various methods as illustrated and described in combination with Figures 1, 2A, 2B, 2C, 3A, 3B, 4, 5, 6, 7A, 7B, 7C, 7D, 8A, 8B, and 9. In addition to block 1026, the computing environment 1000 includes, for example, a computer 1001, a wide area network (WAN) 1002, an end-user device (EUD) 1003, a remote server 1004, a public cloud 1005, and a private cloud 1006. In this embodiment, the computer 1001 includes a processor set 1010 (including processing circuits 1020 and a cache 1021), a communication fabric 1011, volatile memory 1012, persistent storage 1013 (including an operating system 1022 and blocks 1026 as identified above), a peripheral device set 1014 (including a user interface (UI), a device set 1023, storage 1024, and an Internet of Things (IoT) sensor set 1025), and a network module 1015. The remote server 1004 includes a remote database 1030. The public cloud 1005 includes a gateway 1040, a cloud orchestration module 1041, a host physical machine set 1042, a virtual machine set 1043, and a container set 1044.

[0140] Computer 1001 may take the form of a desktop computer, laptop computer, tablet computer, smartphone, smartwatch or other wearable computer, mainframe computer, quantum computer, or any other form of computer or mobile device currently known or to be developed in the future that is capable of executing programs, accessing networks, or querying databases such as remote database 1030. As is well understood in the field of computer technology, and depending on the technology, the execution of the computer implementation method may be distributed among multiple computers and / or across multiple locations. On the other hand, in this presentation of computing environment 1000, in order to keep the presentation as concise as possible, the detailed discussion focuses on a single computer, specifically computer 1001. Computer 1001 may be located in the cloud, although it is not shown in the cloud in Figure 10. On the other hand, computer 1001 is not required to be in the cloud, except to the extent that it can be definitively shown.

[0141] The processor set 1010 includes one or more computer processors of any type currently known or to be developed in the future. The processing circuitry 1020 may be distributed across multiple packages, for example, multiple coordinated integrated circuit chips. The processing circuitry 1020 may implement multiple processor threads and / or multiple processor cores. The cache 1021 is memory located within the processor chip package and is typically used for data or code that should be available for rapid access by threads or cores running on the processor set 1010. The cache memory is typically organized into multiple levels, depending on its relative proximity to the processing circuitry. Alternatively, some or all of the cache for the processor set may be located "off-chip". In some computing environments, the processor set 1010 may operate using qubits and be designed to perform quantum computing.

[0142] Computer-readable program instructions typically cause the processor set 1010 of computer 1001 to execute a series of operational steps, thereby loading them onto computer 1001 to implement a computer implementation method, and the instructions thus executed instantiate the methods specified in the flowcharts and / or descriptions of the computer implementation methods contained herein (collectively referred to as the "Methods of the Invention"). These computer-readable program instructions are stored in various types of computer-readable storage media, such as the cache 1021 and other storage media discussed below. The program instructions and associated data are accessed by the processor set 1010 to control and direct the execution of the Methods of the Invention. In the computing environment 1000, at least some of the instructions for executing the Methods of the Invention may be stored in block 1026 in persistent storage 1013.

[0143] The communication fabric 1011 includes signal conduction paths that enable various components of the computer 1001 to communicate with one another. Typically, this fabric is made up of switches and conductive paths, such as buses, bridges, physical input / output ports, and similar switches and conductive paths. Other types of signal communication paths, such as optical fiber communication paths and / or wireless communication paths, may be used.

[0144] The volatile memory 1012 is any type of volatile memory currently known or to be developed in the future. Examples include dynamic type random access memory (RAM) or static type RAM. Typically, volatile memory is characterized by random access, but this is not required unless explicitly stated. In computer 1001, the volatile memory 1012 is located in a single package and resides inside computer 1001, but alternatively or in addition, the volatile memory may be distributed across multiple packages and / or located externally to computer 1001.

[0145] Persistent storage 1013 is any form of non-volatile storage for a computer, currently known or to be developed in the future. The non-volatility of this storage means that the stored data is maintained whether or not power is directly supplied to computer 1001 and / or persistent storage 1013. Persistent storage 1013 may be read-only memory (ROM), but typically at least a portion of the persistent storage allows for writing, deleting, and rewriting of data. Some well-known forms of persistent storage include magnetic disks and solid-state storage devices. Operating system 1022 may take several forms, such as various known proprietary operating systems or open-source portable operating system interface (OPV) type operating systems employing a kernel. The code contained in block 1026 typically includes at least some computer code involved in the execution of the inventive method.

[0146] The peripheral device set 1014 includes a set of peripheral devices for the computer 1001. Data communication connections between the peripheral devices and other components of the computer 1001 may be implemented in various ways, such as Bluetooth connections, near-field communication (NFC) connections, connections made by cables (such as universal serial bus (USB) type cables), insert-type connections (e.g., secure digital (SD) cards), connections made via local area communication networks, and even connections made via wide area networks such as the internet. In various embodiments, the UI device set 1023 may include components such as a display screen, speaker, microphone, wearable devices (such as goggles and smartwatches), keyboard, mouse, printer, touchpad, game controller, and haptic device. Storage 1024 is external storage such as an external hard drive, or insertable storage such as an SD card. Storage 1024 may be persistent and / or volatile. In some embodiments, storage 1024 may take the form of a quantum computing memory device for storing data in the form of qubits. In embodiments where computer 1001 is required to have a large amount of storage (for example, computer 1001 locally stores and manages a large database), this storage may be provided by peripheral storage devices designed to store very large amounts of data, such as a storage area network (SAN) shared by multiple geographically distributed computers. The IoT sensor set 1025 consists of sensors that can be used in Internet of Things applications. For example, one sensor may be a thermometer and another may be a motion detector.

[0147] The network module 1015 is a collection of computer software, hardware, and firmware that enables computer 1001 to communicate with other computers via the WAN 1002. The network module 1015 may include hardware such as a modem or Wi-Fi signal transceiver, software for packetizing and / or depacketizing data for transmission over a communication network, and / or web browser software for communicating data over the internet. In some embodiments, the network control and network forwarding functions of the network module 1015 are performed on the same physical hardware device. In other embodiments (e.g., embodiments utilizing software-defined networking (SDN)), the control and forwarding functions of the network module 1015 are performed on physically separate devices, such that the control function manages several different network hardware devices. Computer-readable program instructions for performing exemplary methods of the present invention can typically be downloaded from an external computer or external storage device to computer 1001 through a network adapter card or network interface included in the network module 1015.

[0148] WAN1002 is any wide area network (e.g., the Internet) capable of communicating computer data over non-local distances by any currently known or future-developed technology for communicating computer data. In some embodiments, the WAN may be replaced and / or supplemented by a local area network (LAN), such as a Wi-Fi network, designed to communicate data between devices located in a local area. The WAN and / or LAN typically include computer hardware such as copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and edge servers.

[0149] The end-user device (EUD) 1003 is any computer system used and controlled by an end-user (e.g., a customer of the company operating computer 1001) and can take any of the forms discussed above in relation to computer 1001. Typically, EUD 1003 receives useful and valuable data from the operation of computer 1001. For example, in a hypothetical case where computer 1001 is designed to provide recommendations to the end-user, these recommendations would typically be communicated from the network module 1015 of computer 1001 to EUD 1003 via WAN 1002. In this way, EUD 1003 can display or otherwise present the recommendations to the end-user. In some embodiments, EUD 1003 may be a client device such as a thin client, heavy client, mainframe computer, or desktop computer.

[0150] The remote server 1004 is any computer system that provides at least some data and / or functionality to computer 1001. The remote server 1004 may be controlled and used by the same entity that operates computer 1001. The remote server 1004 represents a machine that collects and stores useful and valuable data for use by other computers, such as computer 1001. For example, in the hypothetical case where computer 1001 is designed and programmed to provide recommendations based on historical data, this historical data may be provided to computer 1001 from the remote database 1030 of the remote server 1004.

[0151] Public Cloud 1005 is any computer system available for use by multiple entities, providing on-demand availability of computer system resources and / or other computer functions, particularly data storage (cloud storage) and computing power, without direct active management by the user. Cloud computing typically leverages resource sharing to achieve coherence and economies of scale. Direct active management of the computing resources of Public Cloud 1005 is performed by the computer hardware and / or software of the Cloud Orchestration Module 1041. The computing resources provided by Public Cloud 1005 are typically implemented by virtual computing environments running on various computers that make up the host physical machine set 1042, which is the area of ​​physical computers available in and / or to Public Cloud 1005. The virtual computing environment (VCE) typically takes the form of virtual machines from the virtual machine set 1043 and / or containers from the container set 1044. These VCEs may be stored as images and are understood to be transferable either as images or after VCE instantiation, among and between various physical machine hosts. The cloud orchestration module 1041 manages the transfer and storage of images, deploys new VCE instantiations, and manages active instantiations of VCE deployments. The gateway 1040 is a collection of computer software, hardware, and firmware that enables the public cloud 1005 to communicate over the WAN 1002.

[0152] Here, some further explanation of virtualized computing environments (VCEs) is provided. A VCE can be stored as an "image." A new active instance of a VCE can be instantiated from an image. Two well-known types of VCEs are virtual machines and containers. A container is a VCE that uses operating system-level virtualization. This refers to an operating system feature in which the kernel allows for the existence of multiple isolated user-space instances called containers. These isolated user-space instances typically behave as actual computers from the perspective of the programs running in them. Computer programs running on a normal operating system can utilize all of that computer's resources, such as connected devices, files and folders, network shares, CPU power, and quantifiable hardware capabilities. However, programs running inside a container can only use the contents of the container and the devices allocated to the container; this feature is known as containerization.

[0153] Private Cloud 1006 is similar to Public Cloud 1005, except that its computing resources are available only for use by a single enterprise. While Private Cloud 1006 is shown communicating with WAN 1002, in other embodiments, the private cloud may be completely isolated from the internet and accessible only via a local / private network. A hybrid cloud is a combination of multiple clouds of different types (e.g., private, community, or public cloud types), often implemented by different vendors. Each of the multiple clouds remains a separate and distinct entity, but the larger hybrid cloud architecture is bound together by standardized or proprietary technologies that enable orchestration, management, and / or data / application portability between the multiple configured clouds. In this embodiment, both Public Cloud 1005 and Private Cloud 1006 are part of a larger hybrid cloud.

[0154] While descriptions of various embodiments of this disclosure have been presented for illustrative purposes, they are not intended to be exhaustive or to limit oneself to the disclosed embodiments. Many modifications and variations will become apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been selected to best describe the principles of the embodiments, their practical applications, or technical improvements to the art found in the market, or to enable other those skilled in the art to understand the embodiments disclosed herein.

Claims

1. It is a device: Optical devices; and Electrical characteristics evaluation device Equipped with; The optical apparatus and the electrical property evaluation apparatus include an integrated configuration for performing a laser annealing operation to tune the junction resistance of a superconducting tunnel junction device on a quantum chip, and for performing in-situ resistance measurements to measure the junction resistance of the superconducting tunnel junction device on the quantum chip.

2. The aforementioned optical device is: A laser unit including a laser source and optical components configured to generate one or more laser beams for performing the aforementioned laser annealing operation; and An imaging unit optically coupled to the laser unit and configured to image a sample within the field of view of the laser unit. The apparatus according to any one of the preceding claims, having the following:

3. The aforementioned optical device is: A laser unit including a laser source configured to generate a laser beam; A modular microscope unit including an optically integrated configuration of an imaging unit, optical components, a laser beam shaping device, and a laser beam focusing element; An optical fiber configured to couple the laser beam output from the laser unit to the laser beam input of the modular microscope unit. The apparatus according to any one of the preceding claims, having the following:

4. The apparatus according to any one of the preceding claims, wherein the optical apparatus comprises an imager configured for computer vision imaging and inspection of the quantum chip.

5. The optical apparatus according to any one of the prior claims, wherein the imaging plane is configured to correspond to the laser focal plane.

6. The apparatus according to any one of the preceding claims, wherein the electrical characteristics evaluation apparatus is configured to perform a DC resistance measurement operation to measure the junction resistance of the superconducting tunnel junction device.

7. The apparatus according to any one of the preceding claims, wherein the electrical characteristics evaluation apparatus is configured to perform an AC resistance measurement operation to measure the junction resistance of the superconducting tunnel junction device.

8. The apparatus according to any one of the preceding claims, wherein the electrical characteristics evaluation apparatus has a wafer prober, and the wafer prober includes at least one of an automated and a semi-automated wafer probing system.

9. The apparatus according to any one of the preceding claims, wherein the optical apparatus and the electrical characteristic evaluation apparatus are integrated such that the probing plane is displaced by a specified distance from the imaging plane.

10. The apparatus according to any one of the preceding claims, wherein the electrical characteristic evaluation apparatus has an environment chamber configured to control the surrounding environment of the quantum chip when performing the laser annealing operation.

11. The apparatus according to claim 10, wherein the environmental chamber is configured to control the surrounding environment by at least one of (i) controlling the composition of one or more gases within the environmental chamber, and (ii) generating a vacuum within the environmental chamber.

12. The apparatus according to any one of the preceding claims, wherein the electrical characterization apparatus has a thermal control system configured to (i) heat the quantum chip to perform a bulk thermal annealing operation to shift the junction resistance of the tunnel junction device of the quantum chip, and (ii) cool the quantum chip to perform the in-situ resistance measurement.

13. It is a system: Control system; and Laser annealing device coupled to the control system Equipped with; The laser annealing apparatus includes an integrated configuration of an optical apparatus and an electrical characteristics evaluation apparatus; A control system that controls the laser annealing apparatus to perform laser annealing operations to tune the junction resistance of a superconducting tunnel junction device on a quantum chip, and to perform in-situ resistance measurements to measure the junction resistance of the superconducting tunnel junction device on the quantum chip.

14. The system according to claim 13, wherein the control system controls the laser annealing apparatus to perform a direct current (DC) resistance measurement operation to measure the junction resistance of the superconducting tunnel junction device.

15. The system according to any one of claims 13 to 14, wherein the control system controls the laser annealing apparatus to perform an alternating current (AC) resistance measurement operation to measure the junction resistance of the superconducting tunnel junction device.

16. The laser annealing apparatus further comprises an environmental chamber; The system according to any one of claims 13 to 15, wherein the control system is configured to control the surrounding environment within the environmental chamber when the quantum chip is disposed within the chamber and a laser annealing operation is performed.

17. The system according to claim 16, wherein the control system is configured to control the surrounding environment by at least one of (i) controlling the composition of one or more gases in the environment chamber, and (ii) generating a vacuum in the environment chamber.

18. The system according to any one of claims 13 to 17, wherein the laser annealing apparatus further comprises a thermal control system configured to perform at least one of the following: (i) heating the quantum chip to perform a bulk thermal annealing operation to shift the junction resistance of the tunnel junction device of the quantum chip; and (ii) cooling the quantum chip to perform the in-situ resistance measurement.

19. Method: The process includes a step of performing an annealing operation to tune the junction resistance of a superconducting tunnel junction device on a quantum chip, wherein the step of performing the annealing operation includes: A step of heating the quantum chip and performing a thermal annealing operation to partially shift the junction resistance of the superconducting tunnel junction device to the respective target junction resistances of the superconducting tunnel junction device; A step following the thermal annealing operation, in order to measure the resistance of each of the superconducting tunnel junctions, to perform a resistance measurement of the superconducting tunnel junction; and The step of performing a laser annealing operation on the superconducting tunnel junction device in order to shift the junction resistance of the superconducting tunnel junction device from each of its measured junction resistances to each of its target junction resistances. A method having

20. The method according to claim 19, wherein the annealing operation for tuning the junction resistance of the superconducting tunnel junction device on the quantum chip is performed in situ by a laser annealing apparatus configured to perform the thermal annealing operation, the resistance measurement, and the laser annealing operation.

21. The method according to claim 20, wherein the in-situ resistance measurement includes AC resistance measurement.

22. The method according to any one of claims 20 to 21, further comprising the steps of cooling the quantum chip in-situ to a target temperature following the thermal annealing operation, and performing the in-situ resistance measurement of the superconducting tunnel junction device while the quantum chip has cooled to the target temperature.

23. The superconducting tunnel junction device includes a Josephson junction for each superconducting qubit device in a given lattice on the quantum chip; The method according to any one of claims 19 to 22, wherein the target junction resistance of each of the superconducting tunnel junction devices includes a target junction resistance specified in the tuning plan for tuning the transition frequency of the superconducting qubit device to a target transition frequency such that the tuning plan determines the respective target transition frequency.

24. A method comprising the step of performing a laser tuning process for tuning the junction resistance of a superconducting tunnel junction device on a quantum chip using a laser annealing apparatus, in order to perform a laser annealing operation for laser tuning the junction resistance of the superconducting tunnel junction device and to perform an in-situ resistance measurement for measuring the junction resistance of the superconducting tunnel junction device on a quantum chip.

25. A computer program product for laser tuning: The system comprises one or more computer-readable storage media, and program instructions collectively stored on the one or more computer-readable storage media, wherein the program instructions are: Program instructions for performing a laser tuning process to tune the junction resistance of a superconducting tunnel junction device on a quantum chip, using a laser annealing apparatus to perform a laser annealing operation to laser tune the junction resistance of the superconducting tunnel junction device on the quantum chip, and to perform in-situ resistance measurements to measure the junction resistance of the superconducting tunnel junction device on the quantum chip. A computer program product that has [certain characteristics].

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